1 #ifndef __MONO_MINI_MIPS_H__
2 #define __MONO_MINI_MIPS_H__
4 #include <mono/arch/mips/mips-codegen.h>
7 #define MONO_ARCH_CPU_SPEC mips_desc
9 #define MONO_MAX_IREGS 32
10 #define MONO_MAX_FREGS 32
12 #define MONO_SAVED_GREGS 32
13 #define MONO_SAVED_FREGS 32
16 * at and t0 used internally
17 * v0, v1 aren't here for clarity reasons
18 * a0, a1, a2, a3 are for arguments
19 * Use t9 for indirect calls to match the ABI
22 #define MIPS_V_REGS ((1 << mips_v0) | \
24 #define MIPS_T_REGS ((1 << mips_t0) | \
32 #define MIPS_S_REGS ((1 << mips_s0) | \
41 #define MIPS_A_REGS ((1 << mips_a0) | \
46 #define mips_temp mips_t8
48 #define MONO_ARCH_CALLEE_REGS (MIPS_T_REGS | MIPS_V_REGS)
49 #define MONO_ARCH_CALLEE_SAVED_REGS MIPS_S_REGS
50 #define MIPS_ARG_REGS MIPS_A_REGS
53 #define MIPS_FP_PAIR(reg) ((1 << (reg)) | (1 << ((reg)+1)))
55 /* Only put the even regs in */
56 #define MIPS_FP_PAIR(reg) (1 << (reg))
59 #define MONO_ARCH_CALLEE_FREGS (MIPS_FP_PAIR(mips_f0) | \
60 MIPS_FP_PAIR(mips_f2) | \
61 MIPS_FP_PAIR(mips_f4) | \
62 MIPS_FP_PAIR(mips_f6) | \
63 MIPS_FP_PAIR(mips_f8) | \
64 MIPS_FP_PAIR(mips_f10) | \
65 MIPS_FP_PAIR(mips_f12) | \
66 MIPS_FP_PAIR(mips_f14) | \
67 MIPS_FP_PAIR(mips_f16) | \
68 MIPS_FP_PAIR(mips_f18))
70 #define MONO_ARCH_CALLEE_SAVED_FREGS (MIPS_FP_PAIR(mips_f20) | \
71 MIPS_FP_PAIR(mips_f22) | \
72 MIPS_FP_PAIR(mips_f24) | \
73 MIPS_FP_PAIR(mips_f26) | \
74 MIPS_FP_PAIR(mips_f28) | \
75 MIPS_FP_PAIR(mips_f30))
77 #define mips_ftemp mips_f18
79 #define MONO_ARCH_USE_FPSTACK FALSE
80 #define MONO_ARCH_FPSTACK_SIZE 0
82 /* Parameters used by the register allocator */
84 /* On Mips, for regpairs, the lower-numbered reg is most significant
85 * This is true in both big and little endian
88 #define MONO_ARCH_INST_SREG2_MASK(ins) (0)
89 #define MONO_ARCH_INST_IS_REGPAIR(desc) ((desc) == 'V' || (desc) == 'l')
90 #define MONO_ARCH_INST_REGPAIR_REG2(desc,hreg1) (((desc) == 'l') ? ((hreg1) + 1) : (((desc) == 'V') ? ((hreg1) - 1) : -1))
91 #define MONO_ARCH_INST_IS_FLOAT(desc) ((desc == 'f') || (desc == 'g'))
93 // This define is called to get specific dest register as defined
94 // by md file (letter after "dest"). Overwise return -1
96 #define MONO_ARCH_INST_FIXED_REG(desc) (((desc) == '0') ? mips_zero : (((desc) == 'a') ? mips_at : ((((desc) == 'v')) ? mips_v0 : (((desc) == 'V') ? mips_v1 : (((desc) == 'g') ? mips_f0 : -1)))))
98 #define MONO_ARCH_FRAME_ALIGNMENT 8
100 /* fixme: align to 16byte instead of 32byte (we align to 32byte to get
101 * reproduceable results for benchmarks */
102 #define MONO_ARCH_CODE_ALIGNMENT 32
104 void mips_patch (guint32 *code, guint32 target);
106 #define MIPS_LMF_MAGIC1 0xa5a5a5a5
107 #define MIPS_LMF_MAGIC2 0xc3c3c3c3
110 gpointer previous_lmf;
115 gulong iregs [MONO_SAVED_GREGS];
116 gfloat fregs [MONO_SAVED_FREGS];
120 /* we define our own structure and we'll copy the data
121 * from sigcontext/ucontext/mach when we need it.
122 * This also makes us save stack space and time when copying
123 * We might also want to add an additional field to propagate
124 * the original context from the signal handler.
128 gulong sc_regs [MONO_SAVED_GREGS];
129 gfloat sc_fpregs [MONO_SAVED_FREGS];
132 typedef struct MonoCompileArch {
135 guint spillvar_offset;
136 guint spillvar_offset_float;
139 #define MONO_ARCH_EMULATE_FCONV_TO_I8 1
140 #define MONO_ARCH_EMULATE_LCONV_TO_R8 1
141 #define MONO_ARCH_EMULATE_LCONV_TO_R4 1
142 #define MONO_ARCH_EMULATE_LCONV_TO_R8_UN 1
143 #define MONO_ARCH_EMULATE_FREM 1
144 #define MONO_ARCH_BIGMUL_INTRINS 1
146 #define MIPS_RET_ADDR_OFFSET (-4)
147 #define MIPS_FP_ADDR_OFFSET (-8)
148 #define MIPS_STACK_ALIGNMENT 16
149 #define MIPS_STACK_PARAM_OFFSET 16 /* from sp to first parameter */
150 #define MIPS_MINIMAL_STACK_SIZE (4*4 + 4*4)
151 #define MIPS_EXTRA_STACK_SIZE 16 /* from last parameter to top of frame */
152 #define MIPS_FIRST_ARG_REG mips_a0
153 #define MIPS_LAST_ARG_REG mips_a3
154 #define MIPS_FIRST_FPARG_REG mips_f12
155 #define MIPS_LAST_FPARG_REG mips_f14
159 /* XXX - a mystery, but it works */
160 #define MONO_GET_CONTEXT \
161 void *ctx = (void *)(((int)context)+24);
163 /* set the next to 0 once inssel-mips.brg is updated */
164 #define MIPS_PASS_STRUCTS_BY_VALUE 1
165 #define MIPS_SMALL_RET_STRUCT_IN_REG 0
167 #define MONO_ARCH_USE_SIGACTION
168 #define MONO_ARCH_NEED_DIV_CHECK 1
170 #define MIPS_NUM_REG_ARGS (MIPS_LAST_ARG_REG-MIPS_FIRST_ARG_REG+1)
171 #define MIPS_NUM_REG_FPARGS (MIPS_LAST_FPARG_REG-MIPS_FIRST_FPARG_REG+1)
173 /* we have the stack pointer, not the base pointer in sigcontext */
174 #define MONO_CONTEXT_SET_IP(ctx,ip) do { (ctx)->sc_pc = (int)(ip); } while (0);
175 #define MONO_CONTEXT_SET_BP(ctx,bp) do { (ctx)->sc_regs[mips_fp] = (int)(bp); } while (0);
176 #define MONO_CONTEXT_SET_SP(ctx,sp) do { (ctx)->sc_regs[mips_sp] = (int)(sp); } while (0);
178 #define MONO_CONTEXT_GET_IP(ctx) ((gpointer)((ctx)->sc_pc))
179 #define MONO_CONTEXT_GET_BP(ctx) ((gpointer)((ctx)->sc_regs[mips_fp]))
180 #define MONO_CONTEXT_GET_SP(ctx) ((gpointer)((ctx)->sc_regs[mips_sp]))
184 unsigned long at; /* assembler temp */
185 unsigned long v0; /* return values */
187 unsigned long a0; /* 4 - func arguments */
191 unsigned long t0; /* 8 temporaries */
199 unsigned long s0; /* 16 calle saved */
207 unsigned long t8; /* 24 temps */
208 unsigned long t9; /* 25 temp / pic call-through register */
209 unsigned long k0; /* 26 kernel-reserved */
211 unsigned long gp; /* 28 */
212 unsigned long sp; /* stack pointer */
213 unsigned long fp; /* frame pointer */
214 unsigned long ra; /* return address */
215 } MonoMipsStackFrame;
217 #define MONO_INIT_CONTEXT_FROM_FUNC(ctx,func) do { \
219 guint32 *code = (guint32 *)(void *)func; \
221 memset ((ctx), 0, sizeof (*(ctx))); \
222 __asm__ volatile("addu %0,$0,$29" : "=r" (sp)); \
223 /* Look for adjustment of sp */ \
224 while ((*code & 0xffff0000) != 0x27bd0000) \
226 imm = (short) (*code & 0xffff); \
227 MONO_CONTEXT_SET_BP ((ctx), sp + (-imm)); \
228 ra = *(guint32 *)(sp + (-imm) + MIPS_RET_ADDR_OFFSET); \
229 MONO_CONTEXT_SET_IP ((ctx),ra); \
230 MONO_CONTEXT_SET_SP ((ctx), MONO_CONTEXT_GET_BP (ctx)); \
234 #define mono_find_jit_info mono_arch_find_jit_info
235 #define CUSTOM_STACK_WALK
238 /* re-attaches with gdb - sometimes causes executable to hang */
239 #undef HAVE_BACKTRACE_SYMBOLS
241 #undef DEBUG_EXCEPTIONS
242 #undef CUSTOM_EXCEPTION_HANDLING
244 #define MONO_ZERO_REG mips_zero
246 #define MONO_EMIT_NEW_BRANCH_UNREG_LABEL(cfg,op,sr1,label) do { \
248 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
251 inst->inst_i0 = label; \
252 inst->flags = MONO_INST_BRLABEL; \
253 mono_bblock_add_inst ((cfg)->cbb, inst); \
256 #define MONO_EMIT_NEW_BRANCH_BIREG_LABEL(cfg,op,sr1,sr2,label) do { \
258 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
262 inst->inst_i0 = label; \
263 inst->flags = MONO_INST_BRLABEL; \
264 mono_bblock_add_inst ((cfg)->cbb, inst); \
267 #define MONO_EMIT_NEW_BRANCH_NONZERO_LABEL(cfg,op,sr1,targetbb) do { \
269 MonoInst *target_label; \
270 target_label = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
271 target_label->opcode = OP_LABEL; \
272 target_label->next = (targetbb)->code; \
273 target_label->inst_c0 = (targetbb)->native_offset; \
274 (targetbb)->code = target_label; \
275 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
277 (inst)->sreg1 = sr1; \
278 (inst)->sreg2 = sr2; \
279 inst->inst_i0 = target_label; \
280 inst->flags = MONO_INST_BRLABEL; \
281 mono_bblock_add_inst ((cfg)->cbb, inst); \
284 #define MONO_EMIT_NEW_COMPARE_BRANCH_BLOCK(cfg,op,sr1,sr2,targetbb) do { \
286 MonoInst *target_label; \
287 target_label = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
288 target_label->opcode = OP_LABEL; \
289 target_label->next = (targetbb)->code; \
290 target_label->inst_c0 = (targetbb)->native_offset; \
291 (targetbb)->code = target_label; \
292 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
294 (inst)->sreg1 = sr1; \
295 (inst)->sreg2 = sr2; \
296 inst->inst_i0 = target_label; \
297 inst->flags = MONO_INST_BRLABEL; \
298 mono_bblock_add_inst ((cfg)->cbb, inst); \
301 #ifndef MONO_EMIT_NEW_COMPARE_BRANCH_LABEL
302 #define MONO_EMIT_NEW_COMPARE_BRANCH_LABEL(cfg, cmp_op, sreg1, sreg2, label) \
306 MONO_EMIT_NEW_BRANCH_BIREG_LABEL(cfg, OP_MIPS_BEQ, sreg1, sreg2, label); \
309 MONO_EMIT_NEW_BRANCH_BIREG_LABEL(cfg, OP_MIPS_BNE, sreg1, sreg2, label); \
312 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLT, mips_at, sreg1, sreg2); \
313 MONO_EMIT_NEW_BIALU_IMM (s, OP_MIPS_XORI, mips_at, mips_at, 1); \
314 MONO_EMIT_NEW_BRANCH_BIREG_LABEL(cfg, OP_MIPS_BNE, mips_at, mips_zero, label); \
317 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLTU, mips_at, sreg1, sreg2); \
318 MONO_EMIT_NEW_BIALU_IMM (s, OP_MIPS_XORI, mips_at, mips_at, 1); \
319 MONO_EMIT_NEW_BRANCH_BIREG_LABEL(cfg, OP_MIPS_BNE, mips_at, mips_zero, label); \
322 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLT, mips_at, sreg2, sreg1); \
323 MONO_EMIT_NEW_BRANCH_BIREG_LABEL(cfg, OP_MIPS_BNE, mips_at, mips_zero, label); \
326 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLTU, mips_at, sreg2, sreg1); \
327 MONO_EMIT_NEW_BRANCH_BIREG_LABEL(cfg, OP_MIPS_BNE, mips_at, mips_zero, label); \
330 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLT, mips_at, sreg1, sreg2); \
331 MONO_EMIT_NEW_BRANCH_BIREG_LABEL(cfg, OP_MIPS_BNE, mips_at, mips_zero, label); \
334 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLTU, mips_at, sreg1, sreg2); \
335 MONO_EMIT_NEW_BRANCH_BIREG_LABEL(cfg, OP_MIPS_BNE, mips_at, mips_zero, label); \
338 g_assert_not_reached(); \
343 #ifndef MONO_EMIT_NEW_COMPARE_IMM_BRANCH_LABEL
344 #define MONO_EMIT_NEW_COMPARE_IMM_BRANCH_LABEL(cfg, cmp_op, sreg1, imm, label) \
348 cmp_reg = mips_zero; \
352 MONO_EMIT_NEW_ICONST (cfg, cmp_reg, (imm)); \
354 MONO_EMIT_NEW_COMPARE_BRANCH_LABEL(cfg, cmp_op, sreg1, cmp_reg, label); \
358 #ifndef MONO_EMIT_NEW_COMPARE_BRANCH_BLOCK
359 #define MONO_EMIT_NEW_COMPARE_BRANCH_BLOCK(cfg, cmp_op, sreg1, sreg2, block) \
363 MONO_EMIT_NEW_BRANCH_BIREG_BLOCK (cfg, OP_MIPS_BEQ, sreg1, sreg2, block); \
366 MONO_EMIT_NEW_BRANCH_BIREG_BLOCK (cfg, OP_MIPS_BNE, sreg1, sreg2, block); \
369 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLTU, mips_at, sreg1, sreg2); \
370 MONO_EMIT_NEW_BRANCH_BIREG_BLOCK (cfg, OP_MIPS_BNE, mips_at, mips_zero, block); \
373 g_assert_not_reached (); \
378 #ifndef MONO_EMIT_NEW_COMPARE_IMM_BRANCH_BLOCK
379 #define MONO_EMIT_NEW_COMPARE_IMM_BRANCH_BLOCK(cfg, cmp_op, sreg1, imm, block) \
383 cmp_reg = mips_zero; \
387 MONO_EMIT_NEW_ICONST (cfg, cmp_reg, (imm)); \
389 MONO_EMIT_NEW_COMPARE_BRANCH_BLOCK(cfg, cmp_op, sreg1, cmp_reg, block); \
393 #define MONO_EMIT_NEW_MIPS_COND_EXC(cfg,cond,sr1,sr2,name) do { \
395 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
396 inst->opcode = cond; \
397 inst->inst_p1 = (char*)name; \
400 mono_bblock_add_inst ((cfg)->cbb, inst); \
403 #ifndef MONO_EMIT_NEW_COMPARE_EXC
404 #define MONO_EMIT_NEW_COMPARE_EXC(cfg, cmp_op, sreg1, sreg2, exc) do { \
405 switch (OP_MIPS_COND_EXC_##cmp_op) { \
406 case OP_MIPS_COND_EXC_EQ: \
407 MONO_EMIT_NEW_MIPS_COND_EXC (cfg, OP_MIPS_COND_EXC_EQ, sreg1, sreg2, exc); \
409 case OP_MIPS_COND_EXC_NE_UN: \
410 MONO_EMIT_NEW_MIPS_COND_EXC (cfg, OP_MIPS_COND_EXC_NE_UN, sreg1, sreg2, exc); \
412 case OP_MIPS_COND_EXC_GT: \
413 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLT, mips_at, sreg2, sreg1); \
414 MONO_EMIT_NEW_MIPS_COND_EXC (cfg, OP_MIPS_COND_EXC_NE_UN, mips_at, mips_zero, exc); \
416 case OP_MIPS_COND_EXC_GT_UN: \
417 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLTU, mips_at, sreg2, sreg1); \
418 MONO_EMIT_NEW_MIPS_COND_EXC (cfg, OP_MIPS_COND_EXC_NE_UN, mips_at, mips_zero, exc); \
420 case OP_MIPS_COND_EXC_LE: \
421 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLT, mips_at, sreg2, sreg1); \
422 MONO_EMIT_NEW_MIPS_COND_EXC (cfg, OP_MIPS_COND_EXC_EQ, mips_at, mips_zero, exc); \
424 case OP_MIPS_COND_EXC_LE_UN: \
425 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLTU, mips_at, sreg2, sreg1); \
426 MONO_EMIT_NEW_MIPS_COND_EXC (cfg, OP_MIPS_COND_EXC_EQ, mips_at, mips_zero, exc); \
428 case OP_MIPS_COND_EXC_LT: \
429 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLT, mips_at, sreg1, sreg2); \
430 MONO_EMIT_NEW_MIPS_COND_EXC (cfg, OP_MIPS_COND_EXC_NE_UN, mips_at, mips_zero, exc); \
432 case OP_MIPS_COND_EXC_LT_UN: \
433 MONO_EMIT_NEW_BIALU (cfg, OP_MIPS_SLTU, mips_at, sreg1, sreg2); \
434 MONO_EMIT_NEW_MIPS_COND_EXC (cfg, OP_MIPS_COND_EXC_NE_UN, mips_at, mips_zero, exc); \
437 g_warning ("unknown comparison %s\n", #cmp_op); \
438 g_assert_not_reached (); \
443 #ifndef MONO_EMIT_NEW_COMPARE_IMM_EXC
444 #define MONO_EMIT_NEW_COMPARE_IMM_EXC(cfg, cmp_op, sreg1, imm, exc) do { \
447 cmp_reg = mips_zero; \
451 MONO_EMIT_NEW_ICONST (cfg, cmp_reg, (imm)); \
453 MONO_EMIT_NEW_COMPARE_EXC (cfg, cmp_op, sreg1, cmp_reg, exc); \
457 #ifndef MONO_EMIT_NEW_ICOMPARE_IMM_EXC
458 #define MONO_EMIT_NEW_ICOMPARE_IMM_EXC(cfg, cmp_op, sreg1, imm, exc) do { \
459 MONO_EMIT_NEW_COMPARE_IMM_EXC(cfg, cmp_op, sreg1, imm, exc); \
470 #endif /* __MONO_MINI_MIPS_H__ */