2 * mini-codegen.c: Arch independent code generation functionality
4 * (C) 2003 Ximian, Inc.
11 #include <mono/metadata/appdomain.h>
12 #include <mono/metadata/debug-helpers.h>
13 #include <mono/metadata/threads.h>
14 #include <mono/metadata/profiler-private.h>
15 #include <mono/utils/mono-math.h>
20 #include "mini-arch.h"
22 #define DEBUG(a) if (cfg->verbose_level > 1) a
24 #if defined(__x86_64__)
25 const char * const amd64_desc [OP_LAST];
26 static const char*const * ins_spec = amd64_desc;
27 #elif defined(__sparc__) || defined(sparc)
28 const char * const sparc_desc [OP_LAST];
29 static const char*const * ins_spec = sparc_desc;
30 #elif defined(__i386__)
32 extern const char * const pentium_desc [OP_LAST];
34 const char * const pentium_desc [OP_LAST];
36 static const char*const * ins_spec = pentium_desc;
37 #elif defined(__ia64__)
38 const char * const ia64_desc [OP_LAST];
39 static const char*const * ins_spec = ia64_desc;
40 #elif defined(__arm__)
41 const char * const arm_cpu_desc [OP_LAST];
42 static const char*const * ins_spec = arm_cpu_desc;
43 #elif defined(__s390x__)
44 const char * const s390x_cpu_desc [OP_LAST];
45 static const char*const * ins_spec = s390x_cpu_desc;
46 #elif defined(__s390__)
47 const char * const s390_cpu_desc [OP_LAST];
48 static const char*const * ins_spec = s390_cpu_desc;
50 #error "Not implemented"
53 #define use_fpstack MONO_ARCH_USE_FPSTACK
56 mono_regname_full (int reg, gboolean fp)
59 return mono_arch_fregname (reg);
61 return mono_arch_regname (reg);
65 mono_call_inst_add_outarg_reg (MonoCallInst *call, int vreg, int hreg, gboolean fp)
69 regpair = (((guint32)hreg) << 24) + vreg;
71 call->out_freg_args = g_slist_append (call->out_freg_args, (gpointer)(gssize)(regpair));
73 call->out_ireg_args = g_slist_append (call->out_ireg_args, (gpointer)(gssize)(regpair));
77 * returns the offset used by spillvar. It allocates a new
78 * spill variable if necessary.
81 mono_spillvar_offset (MonoCompile *cfg, int spillvar)
83 MonoSpillInfo **si, *info;
86 si = &cfg->spill_info;
88 while (i <= spillvar) {
91 *si = info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo));
93 if (cfg->flags & MONO_CFG_HAS_SPILLUP) {
94 info->offset = cfg->stack_offset;
95 cfg->stack_offset += sizeof (gpointer);
97 cfg->stack_offset += sizeof (gpointer);
98 info->offset = - cfg->stack_offset;
103 return (*si)->offset;
109 g_assert_not_reached ();
114 * returns the offset used by spillvar. It allocates a new
115 * spill float variable if necessary.
116 * (same as mono_spillvar_offset but for float)
119 mono_spillvar_offset_float (MonoCompile *cfg, int spillvar)
121 MonoSpillInfo **si, *info;
124 si = &cfg->spill_info_float;
126 while (i <= spillvar) {
129 *si = info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo));
131 if (cfg->flags & MONO_CFG_HAS_SPILLUP) {
132 cfg->stack_offset += 7;
133 cfg->stack_offset &= ~7;
134 info->offset = cfg->stack_offset;
135 cfg->stack_offset += sizeof (double);
138 cfg->stack_offset += sizeof (double);
139 info->offset = - cfg->stack_offset;
144 return (*si)->offset;
150 g_assert_not_reached ();
155 * Creates a store for spilled floating point items
158 create_spilled_store_float (MonoCompile *cfg, int spill, int reg, MonoInst *ins)
161 MONO_INST_NEW (cfg, store, OP_STORER8_MEMBASE_REG);
163 store->inst_destbasereg = cfg->frame_reg;
164 store->inst_offset = mono_spillvar_offset_float (cfg, spill);
166 DEBUG (g_print ("SPILLED FLOAT STORE (%d at 0x%08lx(%%sp)) (from %d)\n", spill, (long)store->inst_offset, reg));
171 * Creates a load for spilled floating point items
174 create_spilled_load_float (MonoCompile *cfg, int spill, int reg, MonoInst *ins)
177 MONO_INST_NEW (cfg, load, OP_LOADR8_SPILL_MEMBASE);
179 load->inst_basereg = cfg->frame_reg;
180 load->inst_offset = mono_spillvar_offset_float (cfg, spill);
182 DEBUG (g_print ("SPILLED FLOAT LOAD (%d at 0x%08lx(%%sp)) (from %d)\n", spill, (long)load->inst_offset, reg));
186 #define regmask(reg) (((regmask_t)1) << (reg))
188 #define is_hard_ireg(r) ((r) >= 0 && (r) < MONO_MAX_IREGS)
189 #define is_hard_freg(r) ((r) >= 0 && (r) < MONO_MAX_FREGS)
190 #define is_global_ireg(r) (is_hard_ireg ((r)) && (MONO_ARCH_CALLEE_SAVED_REGS & (regmask (r))))
191 #define is_local_ireg(r) (is_hard_ireg ((r)) && (MONO_ARCH_CALLEE_REGS & (regmask (r))))
192 #define is_global_freg(r) (is_hard_freg ((r)) && (MONO_ARCH_CALLEE_SAVED_FREGS & (regmask (r))))
193 #define is_local_freg(r) (is_hard_ireg ((r)) && (MONO_ARCH_CALLEE_FREGS & (regmask (r))))
194 #define ireg_is_freeable(r) is_local_ireg ((r))
195 #define freg_is_freeable(r) is_hard_freg ((r))
197 #define reg_is_freeable(r,fp) ((fp) ? freg_is_freeable ((r)) : ireg_is_freeable ((r)))
198 #define is_hard_reg(r,fp) ((fp) ? ((r) < MONO_MAX_FREGS) : ((r) < MONO_MAX_IREGS))
199 #define is_soft_reg(r,fp) (!is_hard_reg((r),(fp)))
200 #define rassign(cfg,reg,fp) ((fp) ? (cfg)->rs->fassign [(reg)] : (cfg)->rs->iassign [(reg)])
201 #define sreg1_is_fp(ins) (ins_spec [(ins)->opcode] [MONO_INST_SRC1] == 'f')
202 #define sreg2_is_fp(ins) (ins_spec [(ins)->opcode] [MONO_INST_SRC2] == 'f')
204 #ifdef MONO_ARCH_INST_IS_FLOAT
205 #define dreg_is_fp(ins) (MONO_ARCH_INST_IS_FLOAT (ins_spec [(ins)->opcode] [MONO_INST_DEST]))
207 #define dreg_is_fp(ins) (ins_spec [(ins)->opcode] [MONO_INST_DEST] == 'f')
210 #define regpair_reg2_mask(desc,hreg1) ((MONO_ARCH_INST_REGPAIR_REG2 (desc,hreg1) != -1) ? (regmask (MONO_ARCH_INST_REGPAIR_REG2 (desc,hreg1))) : MONO_ARCH_CALLEE_REGS)
212 #ifdef MONO_ARCH_IS_GLOBAL_IREG
213 #undef is_global_ireg
214 #define is_global_ireg(reg) MONO_ARCH_IS_GLOBAL_IREG ((reg))
222 int flags; /* used to track fp spill/load */
223 regmask_t preferred_mask; /* the hreg where the register should be allocated, or 0 */
227 print_ins (int i, MonoInst *ins)
229 const char *spec = ins_spec [ins->opcode];
230 g_print ("\t%-2d %s", i, mono_inst_name (ins->opcode));
232 g_error ("Unknown opcode: %s\n", mono_inst_name (ins->opcode));
234 if (spec [MONO_INST_DEST]) {
235 gboolean fp = dreg_is_fp (ins);
236 if (is_soft_reg (ins->dreg, fp)) {
237 if (spec [MONO_INST_DEST] == 'b') {
238 if (ins->inst_offset == 0)
239 g_print (" [R%d] <-", ins->dreg);
241 g_print (" [R%d + 0x%lx] <-", ins->dreg, (long)ins->inst_offset);
244 g_print (" R%d <-", ins->dreg);
245 } else if (spec [MONO_INST_DEST] == 'b') {
246 if (ins->inst_offset == 0)
247 g_print (" [%s] <-", mono_arch_regname (ins->dreg));
249 g_print (" [%s + 0x%lx] <-", mono_arch_regname (ins->dreg), (long)ins->inst_offset);
251 g_print (" %s <-", mono_regname_full (ins->dreg, fp));
253 if (spec [MONO_INST_SRC1]) {
254 gboolean fp = (spec [MONO_INST_SRC1] == 'f');
255 if (is_soft_reg (ins->sreg1, fp))
256 g_print (" R%d", ins->sreg1);
257 else if (spec [MONO_INST_SRC1] == 'b')
258 g_print (" [%s + 0x%lx]", mono_arch_regname (ins->sreg1), (long)ins->inst_offset);
260 g_print (" %s", mono_regname_full (ins->sreg1, fp));
262 if (spec [MONO_INST_SRC2]) {
263 gboolean fp = (spec [MONO_INST_SRC2] == 'f');
264 if (is_soft_reg (ins->sreg2, fp))
265 g_print (" R%d", ins->sreg2);
267 g_print (" %s", mono_regname_full (ins->sreg2, fp));
269 if (spec [MONO_INST_CLOB])
270 g_print (" clobbers: %c", spec [MONO_INST_CLOB]);
275 print_regtrack (RegTrack *t, int num)
281 for (i = 0; i < num; ++i) {
284 if (i >= MONO_MAX_IREGS) {
285 g_snprintf (buf, sizeof(buf), "R%d", i);
288 r = mono_arch_regname (i);
289 g_print ("liveness: %s [%d - %d]\n", r, t [i].born_in, t[i].last_use);
293 typedef struct InstList InstList;
301 static inline InstList*
302 inst_list_prepend (MonoMemPool *pool, InstList *list, MonoInst *data)
304 InstList *item = mono_mempool_alloc (pool, sizeof (InstList));
314 * Force the spilling of the variable in the symbolic register 'reg'.
317 get_register_force_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, int reg, gboolean fp)
321 int *assign, *symbolic;
324 assign = cfg->rs->fassign;
325 symbolic = cfg->rs->fsymbolic;
328 assign = cfg->rs->iassign;
329 symbolic = cfg->rs->isymbolic;
333 /*i = cfg->rs->isymbolic [sel];
334 g_assert (i == reg);*/
336 spill = ++cfg->spill_count;
337 assign [i] = -spill - 1;
339 mono_regstate_free_float (cfg->rs, sel);
341 mono_regstate_free_int (cfg->rs, sel);
342 /* we need to create a spill var and insert a load to sel after the current instruction */
344 MONO_INST_NEW (cfg, load, OP_LOADR8_MEMBASE);
346 MONO_INST_NEW (cfg, load, OP_LOAD_MEMBASE);
348 load->inst_basereg = cfg->frame_reg;
349 load->inst_offset = mono_spillvar_offset (cfg, spill);
351 while (ins->next != item->prev->data)
354 load->next = ins->next;
356 DEBUG (g_print ("SPILLED LOAD (%d at 0x%08lx(%%ebp)) R%d (freed %s)\n", spill, (long)load->inst_offset, i, mono_regname_full (sel, fp)));
358 i = mono_regstate_alloc_float (cfg->rs, regmask (sel));
360 i = mono_regstate_alloc_int (cfg->rs, regmask (sel));
366 /* This isn't defined on older glib versions and on some platforms */
367 #ifndef G_GUINT64_FORMAT
368 #define G_GUINT64_FORMAT "ul"
372 get_register_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, regmask_t regmask, int reg, gboolean fp)
376 int *assign, *symbolic;
379 assign = cfg->rs->fassign;
380 symbolic = cfg->rs->fsymbolic;
383 assign = cfg->rs->iassign;
384 symbolic = cfg->rs->isymbolic;
387 DEBUG (g_print ("\tstart regmask to assign R%d: 0x%08" G_GUINT64_FORMAT " (R%d <- R%d R%d)\n", reg, (guint64)regmask, ins->dreg, ins->sreg1, ins->sreg2));
388 /* exclude the registers in the current instruction */
389 if ((sreg1_is_fp (ins) == fp) && (reg != ins->sreg1) && (reg_is_freeable (ins->sreg1, fp) || (is_soft_reg (ins->sreg1, fp) && rassign (cfg, ins->sreg1, fp) >= 0))) {
390 if (is_soft_reg (ins->sreg1, fp))
391 regmask &= ~ (regmask (rassign (cfg, ins->sreg1, fp)));
393 regmask &= ~ (regmask (ins->sreg1));
394 DEBUG (g_print ("\t\texcluding sreg1 %s\n", mono_regname_full (ins->sreg1, fp)));
396 if ((sreg2_is_fp (ins) == fp) && (reg != ins->sreg2) && (reg_is_freeable (ins->sreg2, fp) || (is_soft_reg (ins->sreg2, fp) && rassign (cfg, ins->sreg2, fp) >= 0))) {
397 if (is_soft_reg (ins->sreg2, fp))
398 regmask &= ~ (regmask (rassign (cfg, ins->sreg2, fp)));
400 regmask &= ~ (regmask (ins->sreg2));
401 DEBUG (g_print ("\t\texcluding sreg2 %s %d\n", mono_regname_full (ins->sreg2, fp), ins->sreg2));
403 if ((dreg_is_fp (ins) == fp) && (reg != ins->dreg) && reg_is_freeable (ins->dreg, fp)) {
404 regmask &= ~ (regmask (ins->dreg));
405 DEBUG (g_print ("\t\texcluding dreg %s\n", mono_regname_full (ins->dreg, fp)));
408 DEBUG (g_print ("\t\tavailable regmask: 0x%08" G_GUINT64_FORMAT "\n", (guint64)regmask));
409 g_assert (regmask); /* need at least a register we can free */
411 /* we should track prev_use and spill the register that's farther */
413 for (i = 0; i < MONO_MAX_FREGS; ++i) {
414 if (regmask & (regmask (i))) {
416 DEBUG (g_print ("\t\tselected register %s has assignment %d\n", mono_arch_fregname (sel), cfg->rs->fsymbolic [sel]));
421 i = cfg->rs->fsymbolic [sel];
422 spill = ++cfg->spill_count;
423 cfg->rs->fassign [i] = -spill - 1;
424 mono_regstate_free_float (cfg->rs, sel);
427 for (i = 0; i < MONO_MAX_IREGS; ++i) {
428 if (regmask & (regmask (i))) {
430 DEBUG (g_print ("\t\tselected register %s has assignment %d\n", mono_arch_regname (sel), cfg->rs->isymbolic [sel]));
435 i = cfg->rs->isymbolic [sel];
436 spill = ++cfg->spill_count;
437 cfg->rs->iassign [i] = -spill - 1;
438 mono_regstate_free_int (cfg->rs, sel);
441 /* we need to create a spill var and insert a load to sel after the current instruction */
442 MONO_INST_NEW (cfg, load, fp ? OP_LOADR8_MEMBASE : OP_LOAD_MEMBASE);
444 load->inst_basereg = cfg->frame_reg;
445 load->inst_offset = mono_spillvar_offset (cfg, spill);
447 while (ins->next != item->prev->data)
450 load->next = ins->next;
452 DEBUG (g_print ("\tSPILLED LOAD (%d at 0x%08lx(%%ebp)) R%d (freed %s)\n", spill, (long)load->inst_offset, i, mono_regname_full (sel, fp)));
454 i = mono_regstate_alloc_float (cfg->rs, regmask (sel));
456 i = mono_regstate_alloc_int (cfg->rs, regmask (sel));
463 free_up_ireg (MonoCompile *cfg, InstList *item, MonoInst *ins, int hreg)
465 if (!(cfg->rs->ifree_mask & (regmask (hreg)))) {
466 DEBUG (g_print ("\tforced spill of R%d\n", cfg->rs->isymbolic [hreg]));
467 get_register_force_spilling (cfg, item, ins, cfg->rs->isymbolic [hreg], FALSE);
468 mono_regstate_free_int (cfg->rs, hreg);
473 free_up_reg (MonoCompile *cfg, InstList *item, MonoInst *ins, int hreg, gboolean fp)
476 if (!(cfg->rs->ffree_mask & (regmask (hreg)))) {
477 DEBUG (g_print ("\tforced spill of R%d\n", cfg->rs->isymbolic [hreg]));
478 get_register_force_spilling (cfg, item, ins, cfg->rs->isymbolic [hreg], fp);
479 mono_regstate_free_float (cfg->rs, hreg);
483 if (!(cfg->rs->ifree_mask & (regmask (hreg)))) {
484 DEBUG (g_print ("\tforced spill of R%d\n", cfg->rs->isymbolic [hreg]));
485 get_register_force_spilling (cfg, item, ins, cfg->rs->isymbolic [hreg], fp);
486 mono_regstate_free_int (cfg->rs, hreg);
492 create_copy_ins (MonoCompile *cfg, int dest, int src, MonoInst *ins, const unsigned char *ip, gboolean fp)
497 MONO_INST_NEW (cfg, copy, OP_FMOVE);
499 MONO_INST_NEW (cfg, copy, OP_MOVE);
505 copy->next = ins->next;
506 copy->cil_code = ins->cil_code;
509 DEBUG (g_print ("\tforced copy from %s to %s\n", mono_regname_full (src, fp), mono_regname_full (dest, fp)));
514 create_spilled_store (MonoCompile *cfg, int spill, int reg, int prev_reg, MonoInst *ins, gboolean fp)
517 MONO_INST_NEW (cfg, store, fp ? OP_STORER8_MEMBASE_REG : OP_STORE_MEMBASE_REG);
519 store->inst_destbasereg = cfg->frame_reg;
520 store->inst_offset = mono_spillvar_offset (cfg, spill);
522 store->next = ins->next;
525 DEBUG (g_print ("\tSPILLED STORE (%d at 0x%08lx(%%ebp)) R%d (from %s)\n", spill, (long)store->inst_offset, prev_reg, mono_regname_full (reg, fp)));
530 insert_before_ins (MonoInst *ins, InstList *item, MonoInst* to_insert)
534 prev = item->next->data;
536 while (prev->next != ins)
538 to_insert->next = ins;
539 prev->next = to_insert;
541 to_insert->next = ins;
544 * needed otherwise in the next instruction we can add an ins to the
545 * end and that would get past this instruction.
547 item->data = to_insert;
550 /* flags used in reginfo->flags */
552 MONO_FP_NEEDS_LOAD_SPILL = regmask (0),
553 MONO_FP_NEEDS_SPILL = regmask (1),
554 MONO_FP_NEEDS_LOAD = regmask (2)
558 alloc_int_reg (MonoCompile *cfg, InstList *tmp, MonoInst *ins, regmask_t dest_mask, int sym_reg, RegTrack *info)
562 if (info && info->preferred_mask) {
563 val = mono_regstate_alloc_int (cfg->rs, info->preferred_mask & dest_mask);
565 DEBUG (g_print ("\tallocated preferred reg R%d to %s\n", sym_reg, mono_arch_regname (val)));
570 val = mono_regstate_alloc_int (cfg->rs, dest_mask);
572 val = get_register_spilling (cfg, tmp, ins, dest_mask, sym_reg, FALSE);
578 alloc_float_reg (MonoCompile *cfg, InstList *tmp, MonoInst *ins, regmask_t dest_mask, int sym_reg)
582 val = mono_regstate_alloc_float (cfg->rs, dest_mask);
585 val = get_register_spilling (cfg, tmp, ins, dest_mask, sym_reg, TRUE);
592 alloc_reg (MonoCompile *cfg, InstList *tmp, MonoInst *ins, regmask_t dest_mask, int sym_reg, RegTrack *info, gboolean fp)
595 return alloc_float_reg (cfg, tmp, ins, dest_mask, sym_reg);
597 return alloc_int_reg (cfg, tmp, ins, dest_mask, sym_reg, info);
601 assign_reg (MonoCompile *cfg, MonoRegState *rs, int reg, int hreg, gboolean fp)
604 g_assert (reg >= MONO_MAX_FREGS);
605 g_assert (hreg < MONO_MAX_FREGS);
606 g_assert (! is_global_freg (hreg));
608 rs->fassign [reg] = hreg;
609 rs->fsymbolic [hreg] = reg;
610 rs->ffree_mask &= ~ (regmask (hreg));
613 g_assert (reg >= MONO_MAX_IREGS);
614 g_assert (hreg < MONO_MAX_IREGS);
615 g_assert (! is_global_ireg (hreg));
617 rs->iassign [reg] = hreg;
618 rs->isymbolic [hreg] = reg;
619 rs->ifree_mask &= ~ (regmask (hreg));
624 assign_ireg (MonoCompile *cfg, MonoRegState *rs, int reg, int hreg)
626 assign_reg (cfg, rs, reg, hreg, FALSE);
630 * Local register allocation.
631 * We first scan the list of instructions and we save the liveness info of
632 * each register (when the register is first used, when it's value is set etc.).
633 * We also reverse the list of instructions (in the InstList list) because assigning
634 * registers backwards allows for more tricks to be used.
637 mono_local_regalloc (MonoCompile *cfg, MonoBasicBlock *bb)
640 MonoRegState *rs = cfg->rs;
642 RegTrack *reginfo, *reginfof;
643 RegTrack *reginfo1, *reginfo2, *reginfod;
644 InstList *tmp, *reversed = NULL;
646 GList *fspill_list = NULL;
653 rs->next_vireg = bb->max_ireg;
654 rs->next_vfreg = bb->max_freg;
655 mono_regstate_assign (rs);
656 reginfo = g_malloc0 (sizeof (RegTrack) * rs->next_vireg);
657 reginfof = g_malloc0 (sizeof (RegTrack) * rs->next_vfreg);
658 rs->ifree_mask = MONO_ARCH_CALLEE_REGS;
659 rs->ffree_mask = MONO_ARCH_CALLEE_FREGS;
662 rs->ffree_mask = 0xff & ~(regmask (MONO_ARCH_FPSTACK_SIZE));
666 /*if (cfg->opt & MONO_OPT_COPYPROP)
667 local_copy_prop (cfg, ins);*/
671 DEBUG (g_print ("LOCAL regalloc: basic block: %d\n", bb->block_num));
672 /* forward pass on the instructions to collect register liveness info */
674 spec = ins_spec [ins->opcode];
677 g_error ("Opcode '%s' missing from machine description file.", mono_inst_name (ins->opcode));
680 DEBUG (print_ins (i, ins));
688 if (spec [MONO_INST_SRC1] == 'f') {
689 spill = g_list_first (fspill_list);
690 if (spill && fpcount < MONO_ARCH_FPSTACK_SIZE) {
691 reginfof [ins->sreg1].flags |= MONO_FP_NEEDS_LOAD;
692 fspill_list = g_list_remove (fspill_list, spill->data);
697 if (spec [MONO_INST_SRC2] == 'f') {
698 spill = g_list_first (fspill_list);
700 reginfof [ins->sreg2].flags |= MONO_FP_NEEDS_LOAD;
701 fspill_list = g_list_remove (fspill_list, spill->data);
702 if (fpcount >= MONO_ARCH_FPSTACK_SIZE) {
704 fspill_list = g_list_prepend (fspill_list, GINT_TO_POINTER(fspill));
705 reginfof [ins->sreg2].flags |= MONO_FP_NEEDS_LOAD_SPILL;
711 if (dreg_is_fp (ins)) {
712 if (use_fpstack && (spec [MONO_INST_CLOB] != 'm')) {
713 if (fpcount >= MONO_ARCH_FPSTACK_SIZE) {
714 reginfof [ins->dreg].flags |= MONO_FP_NEEDS_SPILL;
716 fspill_list = g_list_prepend (fspill_list, GINT_TO_POINTER(fspill));
724 if (spec [MONO_INST_SRC1]) {
725 if (spec [MONO_INST_SRC1] == 'f')
729 reginfo1 [ins->sreg1].prev_use = reginfo1 [ins->sreg1].last_use;
730 reginfo1 [ins->sreg1].last_use = i;
731 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_SRC2])) {
732 /* The virtual register is allocated sequentially */
733 reginfo1 [ins->sreg1 + 1].prev_use = reginfo1 [ins->sreg1 + 1].last_use;
734 reginfo1 [ins->sreg1 + 1].last_use = i;
735 if (reginfo1 [ins->sreg1 + 1].born_in == 0 || reginfo1 [ins->sreg1 + 1].born_in > i)
736 reginfo1 [ins->sreg1 + 1].born_in = i;
741 if (spec [MONO_INST_SRC2]) {
742 if (spec [MONO_INST_SRC2] == 'f')
746 reginfo2 [ins->sreg2].prev_use = reginfo2 [ins->sreg2].last_use;
747 reginfo2 [ins->sreg2].last_use = i;
748 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_SRC2])) {
749 /* The virtual register is allocated sequentially */
750 reginfo2 [ins->sreg2 + 1].prev_use = reginfo2 [ins->sreg2 + 1].last_use;
751 reginfo2 [ins->sreg2 + 1].last_use = i;
752 if (reginfo2 [ins->sreg2 + 1].born_in == 0 || reginfo2 [ins->sreg2 + 1].born_in > i)
753 reginfo2 [ins->sreg2 + 1].born_in = i;
758 if (spec [MONO_INST_DEST]) {
761 if (dreg_is_fp (ins))
765 if (spec [MONO_INST_DEST] != 'b') /* it's not just a base register */
766 reginfod [ins->dreg].killed_in = i;
767 reginfod [ins->dreg].prev_use = reginfod [ins->dreg].last_use;
768 reginfod [ins->dreg].last_use = i;
769 if (reginfod [ins->dreg].born_in == 0 || reginfod [ins->dreg].born_in > i)
770 reginfod [ins->dreg].born_in = i;
772 dest_dreg = MONO_ARCH_INST_FIXED_REG (spec [MONO_INST_DEST]);
774 reginfod [ins->dreg].preferred_mask = (regmask (dest_dreg));
776 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_DEST])) {
777 /* The virtual register is allocated sequentially */
778 reginfod [ins->dreg + 1].prev_use = reginfod [ins->dreg + 1].last_use;
779 reginfod [ins->dreg + 1].last_use = i;
780 if (reginfod [ins->dreg + 1].born_in == 0 || reginfod [ins->dreg + 1].born_in > i)
781 reginfod [ins->dreg + 1].born_in = i;
782 if (MONO_ARCH_INST_REGPAIR_REG2 (spec [MONO_INST_DEST], -1) != -1)
783 reginfod [ins->dreg + 1].preferred_mask = regpair_reg2_mask (spec [MONO_INST_DEST], -1);
789 if (spec [MONO_INST_CLOB] == 'c') {
790 /* A call instruction implicitly uses all registers in call->out_ireg_args */
792 MonoCallInst *call = (MonoCallInst*)ins;
795 list = call->out_ireg_args;
801 regpair = (guint32)(gssize)(list->data);
802 hreg = regpair >> 24;
803 reg = regpair & 0xffffff;
805 reginfo [reg].prev_use = reginfo [reg].last_use;
806 reginfo [reg].last_use = i;
808 list = g_slist_next (list);
812 list = call->out_freg_args;
813 if (!use_fpstack && list) {
818 regpair = (guint32)(gssize)(list->data);
819 hreg = regpair >> 24;
820 reg = regpair & 0xffffff;
822 reginfof [reg].prev_use = reginfof [reg].last_use;
823 reginfof [reg].last_use = i;
825 list = g_slist_next (list);
830 reversed = inst_list_prepend (cfg->mempool, reversed, ins);
835 // todo: check if we have anything left on fp stack, in verify mode?
838 DEBUG (print_regtrack (reginfo, rs->next_vireg));
839 DEBUG (print_regtrack (reginfof, rs->next_vfreg));
842 int prev_dreg, prev_sreg1, prev_sreg2, clob_dreg;
843 int dest_dreg, dest_sreg1, dest_sreg2, clob_reg;
844 int dreg_high, sreg1_high;
845 regmask_t dreg_mask, sreg1_mask, sreg2_mask, mask;
846 const unsigned char *ip;
849 spec = ins_spec [ins->opcode];
857 dreg_mask = dreg_is_fp (ins) ? MONO_ARCH_CALLEE_FREGS : MONO_ARCH_CALLEE_REGS;
858 sreg1_mask = sreg1_is_fp (ins) ? MONO_ARCH_CALLEE_FREGS : MONO_ARCH_CALLEE_REGS;
859 sreg2_mask = sreg2_is_fp (ins) ? MONO_ARCH_CALLEE_FREGS : MONO_ARCH_CALLEE_REGS;
861 DEBUG (g_print ("processing:"));
862 DEBUG (print_ins (i, ins));
869 dest_sreg1 = MONO_ARCH_INST_FIXED_REG (spec [MONO_INST_SRC1]);
870 dest_sreg2 = MONO_ARCH_INST_FIXED_REG (spec [MONO_INST_SRC2]);
871 dest_dreg = MONO_ARCH_INST_FIXED_REG (spec [MONO_INST_DEST]);
872 clob_reg = MONO_ARCH_INST_FIXED_REG (spec [MONO_INST_CLOB]);
873 sreg2_mask &= ~ (MONO_ARCH_INST_SREG2_MASK (spec));
878 if (use_fpstack && (spec [MONO_INST_CLOB] != 'm')) {
879 if (dreg_is_fp (ins)) {
880 if (reginfof [ins->dreg].flags & MONO_FP_NEEDS_SPILL) {
883 spill_node = g_list_first (fspill_list);
884 g_assert (spill_node);
886 store = create_spilled_store_float (cfg, GPOINTER_TO_INT (spill_node->data), ins->dreg, ins);
887 insert_before_ins (ins, tmp, store);
888 fspill_list = g_list_remove (fspill_list, spill_node->data);
893 if (spec [MONO_INST_SRC1] == 'f') {
894 if (reginfof [ins->sreg1].flags & MONO_FP_NEEDS_LOAD) {
896 MonoInst *store = NULL;
898 if (reginfof [ins->sreg1].flags & MONO_FP_NEEDS_LOAD_SPILL) {
900 spill_node = g_list_first (fspill_list);
901 g_assert (spill_node);
903 store = create_spilled_store_float (cfg, GPOINTER_TO_INT (spill_node->data), ins->sreg1, ins);
904 fspill_list = g_list_remove (fspill_list, spill_node->data);
908 fspill_list = g_list_prepend (fspill_list, GINT_TO_POINTER(fspill));
909 load = create_spilled_load_float (cfg, fspill, ins->sreg1, ins);
910 insert_before_ins (ins, tmp, load);
912 insert_before_ins (load, tmp, store);
916 if (spec [MONO_INST_SRC2] == 'f') {
917 if (reginfof [ins->sreg2].flags & MONO_FP_NEEDS_LOAD) {
919 MonoInst *store = NULL;
921 if (reginfof [ins->sreg2].flags & MONO_FP_NEEDS_LOAD_SPILL) {
924 spill_node = g_list_first (fspill_list);
925 g_assert (spill_node);
926 if (spec [MONO_INST_SRC1] == 'f' && (reginfof [ins->sreg2].flags & MONO_FP_NEEDS_LOAD_SPILL))
927 spill_node = g_list_next (spill_node);
929 store = create_spilled_store_float (cfg, GPOINTER_TO_INT (spill_node->data), ins->sreg2, ins);
930 fspill_list = g_list_remove (fspill_list, spill_node->data);
934 fspill_list = g_list_prepend (fspill_list, GINT_TO_POINTER(fspill));
935 load = create_spilled_load_float (cfg, fspill, ins->sreg2, ins);
936 insert_before_ins (ins, tmp, load);
938 insert_before_ins (load, tmp, store);
946 if (dest_sreg2 != -1) {
947 if (rs->ifree_mask & (regmask (dest_sreg2))) {
948 if (is_global_ireg (ins->sreg2)) {
949 /* Argument already in hard reg, need to copy */
950 MonoInst *copy = create_copy_ins (cfg, dest_sreg2, ins->sreg2, NULL, ip, FALSE);
951 insert_before_ins (ins, tmp, copy);
954 DEBUG (g_print ("\tshortcut assignment of R%d to %s\n", ins->sreg2, mono_arch_regname (dest_sreg2)));
955 assign_ireg (cfg, rs, ins->sreg2, dest_sreg2);
958 int need_spill = TRUE;
960 dreg_mask &= ~ (regmask (dest_sreg2));
961 sreg1_mask &= ~ (regmask (dest_sreg2));
964 * First check if dreg is assigned to dest_sreg2, since we
965 * can't spill a dreg.
967 val = rs->iassign [ins->dreg];
968 if (val == dest_sreg2 && ins->dreg != ins->sreg2) {
970 * the destination register is already assigned to
971 * dest_sreg2: we need to allocate another register for it
972 * and then copy from this to dest_sreg2.
975 new_dest = alloc_int_reg (cfg, tmp, ins, dreg_mask, ins->dreg, ®info [ins->dreg]);
976 g_assert (new_dest >= 0);
977 DEBUG (g_print ("\tchanging dreg R%d to %s from %s\n", ins->dreg, mono_arch_regname (new_dest), mono_arch_regname (dest_sreg2)));
979 prev_dreg = ins->dreg;
980 assign_ireg (cfg, rs, ins->dreg, new_dest);
981 clob_dreg = ins->dreg;
982 create_copy_ins (cfg, dest_sreg2, new_dest, ins, ip, FALSE);
986 if (is_global_ireg (ins->sreg2)) {
987 MonoInst *copy = create_copy_ins (cfg, dest_sreg2, ins->sreg2, NULL, ip, FALSE);
988 insert_before_ins (ins, tmp, copy);
991 val = rs->iassign [ins->sreg2];
992 if (val == dest_sreg2) {
993 /* sreg2 is already assigned to the correct register */
996 else if ((val >= 0) || (val < -1)) {
997 /* FIXME: sreg2 already assigned to another register */
998 g_assert_not_reached ();
1003 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [dest_sreg2]));
1004 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [dest_sreg2], FALSE);
1005 mono_regstate_free_int (rs, dest_sreg2);
1008 if (!is_global_ireg (ins->sreg2))
1009 /* force-set sreg2 */
1010 assign_ireg (cfg, rs, ins->sreg2, dest_sreg2);
1012 ins->sreg2 = dest_sreg2;
1018 fp = dreg_is_fp (ins);
1019 if (spec [MONO_INST_DEST] && (!fp || (fp && !use_fpstack)) && is_soft_reg (ins->dreg, fp))
1020 prev_dreg = ins->dreg;
1022 if (spec [MONO_INST_DEST] == 'b') {
1024 * The dest reg is read by the instruction, not written, so
1025 * avoid allocating sreg1/sreg2 to the same reg.
1027 if (dest_sreg1 != -1)
1028 dreg_mask &= ~ (regmask (dest_sreg1));
1029 if (dest_sreg2 != -1)
1030 dreg_mask &= ~ (regmask (dest_sreg2));
1034 * If dreg is a fixed regpair, free up both of the needed hregs to avoid
1035 * various complex situations.
1037 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_DEST])) {
1038 guint32 dreg2, dest_dreg2;
1040 g_assert (is_soft_reg (ins->dreg, fp));
1042 if (dest_dreg != -1) {
1043 if (rs->iassign [ins->dreg] != dest_dreg)
1044 free_up_ireg (cfg, tmp, ins, dest_dreg);
1046 dreg2 = ins->dreg + 1;
1047 dest_dreg2 = MONO_ARCH_INST_REGPAIR_REG2 (spec [MONO_INST_DEST], dest_dreg);
1048 if (dest_dreg2 != -1) {
1049 if (rs->iassign [dreg2] != dest_dreg2)
1050 free_up_ireg (cfg, tmp, ins, dest_dreg2);
1055 if ((!fp || (fp && !use_fpstack)) && (is_soft_reg (ins->dreg, fp))) {
1056 if (dest_dreg != -1)
1057 dreg_mask = (regmask (dest_dreg));
1059 val = rassign (cfg, ins->dreg, fp);
1064 /* the register gets spilled after this inst */
1067 val = alloc_reg (cfg, tmp, ins, dreg_mask, ins->dreg, ®info [ins->dreg], fp);
1068 assign_reg (cfg, rs, ins->dreg, val, fp);
1070 create_spilled_store (cfg, spill, val, prev_dreg, ins, fp);
1073 DEBUG (g_print ("\tassigned dreg %s to dest R%d\n", mono_regname_full (val, fp), ins->dreg));
1077 /* Handle regpairs */
1078 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_DEST])) {
1079 int reg2 = prev_dreg + 1;
1082 g_assert (prev_dreg > -1);
1083 g_assert (!is_global_ireg (rs->iassign [prev_dreg]));
1084 mask = regpair_reg2_mask (spec [MONO_INST_DEST], rs->iassign [prev_dreg]);
1085 val = rs->iassign [reg2];
1089 /* the register gets spilled after this inst */
1092 val = mono_regstate_alloc_int (rs, mask);
1094 val = get_register_spilling (cfg, tmp, ins, mask, reg2, fp);
1096 create_spilled_store (cfg, spill, val, reg2, ins, fp);
1099 if (! (mask & (regmask (val)))) {
1100 val = mono_regstate_alloc_int (rs, mask);
1102 val = get_register_spilling (cfg, tmp, ins, mask, reg2, fp);
1104 /* Reallocate hreg to the correct register */
1105 create_copy_ins (cfg, rs->iassign [reg2], val, ins, ip, fp);
1107 mono_regstate_free_int (rs, rs->iassign [reg2]);
1111 DEBUG (g_print ("\tassigned dreg-high %s to dest R%d\n", mono_arch_regname (val), reg2));
1112 assign_reg (cfg, rs, reg2, val, fp);
1117 if (reg_is_freeable (val, fp) && reg2 >= 0 && (reginfo [reg2].born_in >= i)) {
1118 DEBUG (g_print ("\tfreeable %s (R%d)\n", mono_arch_regname (val), reg2));
1119 mono_regstate_free_int (rs, val);
1123 if ((!fp || (fp && !use_fpstack)) && prev_dreg >= 0 && is_soft_reg (prev_dreg, fp) && (fp ? reginfof : reginfo) [prev_dreg].born_in >= i) {
1125 * In theory, we could free up the hreg even if the vreg is alive,
1126 * but branches inside bblocks force us to assign the same hreg
1127 * to a vreg every time it is encountered.
1129 int dreg = rassign (cfg, prev_dreg, fp);
1130 g_assert (dreg >= 0);
1131 DEBUG (g_print ("\tfreeable %s (R%d) (born in %d)\n", mono_regname_full (dreg, fp), prev_dreg, (fp ? reginfof : reginfo) [prev_dreg].born_in));
1133 mono_regstate_free_float (rs, dreg);
1135 mono_regstate_free_int (rs, dreg);
1138 if ((dest_dreg != -1) && (ins->dreg != dest_dreg)) {
1139 /* this instruction only outputs to dest_dreg, need to copy */
1140 create_copy_ins (cfg, ins->dreg, dest_dreg, ins, ip, fp);
1141 ins->dreg = dest_dreg;
1144 if (rs->fsymbolic [dest_dreg] >= MONO_MAX_FREGS)
1145 free_up_reg (cfg, tmp, ins, dest_dreg, fp);
1148 if (rs->isymbolic [dest_dreg] >= MONO_MAX_IREGS)
1149 free_up_reg (cfg, tmp, ins, dest_dreg, fp);
1153 if (spec [MONO_INST_DEST] == 'b') {
1155 * The dest reg is read by the instruction, not written, so
1156 * avoid allocating sreg1/sreg2 to the same reg.
1158 sreg1_mask &= ~ (regmask (ins->dreg));
1159 sreg2_mask &= ~ (regmask (ins->dreg));
1165 if ((clob_reg != -1) && (!(rs->ifree_mask & (regmask (clob_reg))))) {
1166 DEBUG (g_print ("\tforced spill of clobbered reg R%d\n", rs->isymbolic [clob_reg]));
1167 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [clob_reg], FALSE);
1168 mono_regstate_free_int (rs, clob_reg);
1171 if (spec [MONO_INST_CLOB] == 'c') {
1172 int j, s, dreg, dreg2;
1175 clob_mask = MONO_ARCH_CALLEE_REGS;
1178 * Need to avoid spilling the dreg since the dreg is not really
1179 * clobbered by the call.
1181 if ((prev_dreg != -1) && !dreg_is_fp (ins))
1182 dreg = rassign (cfg, prev_dreg, dreg_is_fp (ins));
1186 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_DEST]))
1187 dreg2 = rassign (cfg, prev_dreg + 1, dreg_is_fp (ins));
1191 for (j = 0; j < MONO_MAX_IREGS; ++j) {
1193 if ((clob_mask & s) && !(rs->ifree_mask & s) && (j != ins->sreg1) && (j != dreg) && (j != dreg2)) {
1194 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [j], FALSE);
1195 mono_regstate_free_int (rs, j);
1200 clob_mask = MONO_ARCH_CALLEE_FREGS;
1201 if ((prev_dreg != -1) && dreg_is_fp (ins))
1202 dreg = rassign (cfg, prev_dreg, dreg_is_fp (ins));
1206 for (j = 0; j < MONO_MAX_FREGS; ++j) {
1208 if ((clob_mask & s) && !(rs->ffree_mask & s) && (j != ins->sreg1) && (j != dreg)) {
1209 get_register_force_spilling (cfg, tmp, ins, rs->fsymbolic [j], TRUE);
1210 mono_regstate_free_float (rs, j);
1217 * TRACK ARGUMENT REGS
1219 if (spec [MONO_INST_CLOB] == 'c') {
1220 MonoCallInst *call = (MonoCallInst*)ins;
1224 * This needs to be done before assigning sreg1, so sreg1 will
1225 * not be assigned one of the argument regs.
1229 * Assign all registers in call->out_reg_args to the proper
1230 * argument registers.
1233 list = call->out_ireg_args;
1239 regpair = (guint32)(gssize)(list->data);
1240 hreg = regpair >> 24;
1241 reg = regpair & 0xffffff;
1243 assign_reg (cfg, rs, reg, hreg, FALSE);
1245 sreg1_mask &= ~(regmask (hreg));
1247 DEBUG (g_print ("\tassigned arg reg %s to R%d\n", mono_arch_regname (hreg), reg));
1249 list = g_slist_next (list);
1251 g_slist_free (call->out_ireg_args);
1254 list = call->out_freg_args;
1255 if (list && !use_fpstack) {
1260 regpair = (guint32)(gssize)(list->data);
1261 hreg = regpair >> 24;
1262 reg = regpair & 0xffffff;
1264 assign_reg (cfg, rs, reg, hreg, TRUE);
1266 DEBUG (g_print ("\tassigned arg reg %s to R%d\n", mono_arch_fregname (hreg), reg));
1268 list = g_slist_next (list);
1271 if (call->out_freg_args)
1272 g_slist_free (call->out_freg_args);
1278 fp = sreg1_is_fp (ins);
1279 if ((!fp || (fp && !use_fpstack))) {
1280 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_DEST]) && (spec [MONO_INST_CLOB] == '1')) {
1281 g_assert (is_soft_reg (ins->sreg1, fp));
1283 /* To simplify things, we allocate the same regpair to sreg1 and dreg */
1284 if (dest_sreg1 != -1)
1285 g_assert (dest_sreg1 == ins->dreg);
1286 val = mono_regstate_alloc_int (rs, regmask (ins->dreg));
1287 g_assert (val >= 0);
1288 assign_reg (cfg, rs, ins->sreg1, val, fp);
1290 DEBUG (g_print ("\tassigned sreg1-low %s to R%d\n", mono_regname_full (val, fp), ins->sreg1));
1292 g_assert ((regmask (dreg_high)) & regpair_reg2_mask (spec [MONO_INST_SRC1], ins->dreg));
1293 val = mono_regstate_alloc_int (rs, regmask (dreg_high));
1294 g_assert (val >= 0);
1295 assign_reg (cfg, rs, ins->sreg1 + 1, val, fp);
1297 DEBUG (g_print ("\tassigned sreg1-high %s to R%d\n", mono_regname_full (val, fp), ins->sreg1 + 1));
1299 /* Skip rest of this section */
1303 if (dest_sreg1 != -1) {
1304 sreg1_mask = regmask (dest_sreg1);
1306 if (!(rs->ifree_mask & (regmask (dest_sreg1)))) {
1307 DEBUG (g_print ("\tforced spill of R%d\n", rs->isymbolic [dest_sreg1]));
1308 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [dest_sreg1], FALSE);
1309 mono_regstate_free_int (rs, dest_sreg1);
1311 if (is_global_ireg (ins->sreg1)) {
1312 /* The argument is already in a hard reg, need to copy */
1313 MonoInst *copy = create_copy_ins (cfg, dest_sreg1, ins->sreg1, NULL, ip, FALSE);
1314 insert_before_ins (ins, tmp, copy);
1315 ins->sreg1 = dest_sreg1;
1319 if (is_soft_reg (ins->sreg1, fp)) {
1320 val = rassign (cfg, ins->sreg1, fp);
1321 prev_sreg1 = ins->sreg1;
1325 /* the register gets spilled after this inst */
1329 if (((ins->opcode == OP_MOVE) || (ins->opcode == OP_SETREG)) && !spill && !fp && (!is_global_ireg (ins->dreg) && (rs->ifree_mask & (regmask (ins->dreg))))) {
1331 * Allocate the same hreg to sreg1 as well so the
1332 * peephole can get rid of the move.
1334 sreg1_mask = regmask (ins->dreg);
1337 val = alloc_reg (cfg, tmp, ins, sreg1_mask, ins->sreg1, ®info [ins->sreg1], fp);
1338 assign_reg (cfg, rs, ins->sreg1, val, fp);
1339 DEBUG (g_print ("\tassigned sreg1 %s to R%d\n", mono_regname_full (val, fp), ins->sreg1));
1342 MonoInst *store = create_spilled_store (cfg, spill, val, prev_sreg1, NULL, fp);
1344 * Need to insert before the instruction since it can
1347 insert_before_ins (ins, tmp, store);
1350 else if ((dest_sreg1 != -1) && (dest_sreg1 != val)) {
1351 g_assert_not_reached ();
1359 sreg2_mask &= ~(regmask (ins->sreg1));
1362 /* Handle the case when sreg1 is a regpair but dreg is not */
1363 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_SRC1]) && (spec [MONO_INST_CLOB] != '1')) {
1364 int reg2 = prev_sreg1 + 1;
1367 g_assert (prev_sreg1 > -1);
1368 g_assert (!is_global_ireg (rs->iassign [prev_sreg1]));
1369 mask = regpair_reg2_mask (spec [MONO_INST_SRC1], rs->iassign [prev_sreg1]);
1370 val = rs->iassign [reg2];
1374 /* the register gets spilled after this inst */
1377 val = mono_regstate_alloc_int (rs, mask);
1379 val = get_register_spilling (cfg, tmp, ins, mask, reg2, fp);
1381 g_assert_not_reached ();
1384 if (! (mask & (regmask (val)))) {
1385 /* The vreg is already allocated to a wrong hreg */
1387 g_assert_not_reached ();
1389 val = mono_regstate_alloc_int (rs, mask);
1391 val = get_register_spilling (cfg, tmp, ins, mask, reg2, fp);
1393 /* Reallocate hreg to the correct register */
1394 create_copy_ins (cfg, rs->iassign [reg2], val, ins, ip, fp);
1396 mono_regstate_free_int (rs, rs->iassign [reg2]);
1402 DEBUG (g_print ("\tassigned sreg1 hreg %s to dest R%d\n", mono_arch_regname (val), reg2));
1403 assign_reg (cfg, rs, reg2, val, fp);
1406 /* Handle dreg==sreg1 */
1407 if (((dreg_is_fp (ins) && spec [MONO_INST_SRC1] == 'f' && !use_fpstack) || spec [MONO_INST_CLOB] == '1') && ins->dreg != ins->sreg1) {
1408 MonoInst *sreg2_copy = NULL;
1410 gboolean fp = (spec [MONO_INST_SRC1] == 'f');
1412 if (ins->dreg == ins->sreg2) {
1414 * copying sreg1 to dreg could clobber sreg2, so allocate a new
1417 int reg2 = alloc_reg (cfg, tmp, ins, dreg_mask, ins->sreg2, NULL, fp);
1419 DEBUG (g_print ("\tneed to copy sreg2 %s to reg %s\n", mono_regname_full (ins->sreg2, fp), mono_regname_full (reg2, fp)));
1420 sreg2_copy = create_copy_ins (cfg, reg2, ins->sreg2, NULL, ip, fp);
1421 prev_sreg2 = ins->sreg2 = reg2;
1424 mono_regstate_free_float (rs, reg2);
1426 mono_regstate_free_int (rs, reg2);
1429 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_SRC1])) {
1430 /* Copying sreg1_high to dreg could also clobber sreg2 */
1431 if (rs->iassign [prev_sreg1 + 1] == ins->sreg2)
1433 g_assert_not_reached ();
1436 * sreg1 and dest are already allocated to the same regpair by the
1437 * SREG1 allocation code.
1439 g_assert (ins->sreg1 == ins->dreg);
1440 g_assert (dreg_high == sreg1_high);
1443 DEBUG (g_print ("\tneed to copy sreg1 %s to dreg %s\n", mono_regname_full (ins->sreg1, fp), mono_regname_full (ins->dreg, fp)));
1444 copy = create_copy_ins (cfg, ins->dreg, ins->sreg1, NULL, ip, fp);
1445 insert_before_ins (ins, tmp, copy);
1448 insert_before_ins (copy, tmp, sreg2_copy);
1451 * Need to prevent sreg2 to be allocated to sreg1, since that
1452 * would screw up the previous copy.
1454 sreg2_mask &= ~ (regmask (ins->sreg1));
1455 /* we set sreg1 to dest as well */
1456 prev_sreg1 = ins->sreg1 = ins->dreg;
1457 sreg2_mask &= ~ (regmask (ins->dreg));
1463 fp = sreg2_is_fp (ins);
1464 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_SRC2]))
1465 g_assert_not_reached ();
1466 if ((!fp || (fp && !use_fpstack)) && (is_soft_reg (ins->sreg2, fp))) {
1467 val = rassign (cfg, ins->sreg2, fp);
1472 /* the register gets spilled after this inst */
1475 val = alloc_reg (cfg, tmp, ins, sreg2_mask, ins->sreg2, ®info [ins->sreg2], fp);
1476 assign_reg (cfg, rs, ins->sreg2, val, fp);
1477 DEBUG (g_print ("\tassigned sreg2 %s to R%d\n", mono_regname_full (val, fp), ins->sreg2));
1479 create_spilled_store (cfg, spill, val, prev_sreg2, ins, fp);
1487 /*if (reg_is_freeable (ins->sreg1) && prev_sreg1 >= 0 && reginfo [prev_sreg1].born_in >= i) {
1488 DEBUG (g_print ("freeable %s\n", mono_arch_regname (ins->sreg1)));
1489 mono_regstate_free_int (rs, ins->sreg1);
1491 if (reg_is_freeable (ins->sreg2) && prev_sreg2 >= 0 && reginfo [prev_sreg2].born_in >= i) {
1492 DEBUG (g_print ("freeable %s\n", mono_arch_regname (ins->sreg2)));
1493 mono_regstate_free_int (rs, ins->sreg2);
1496 DEBUG (print_ins (i, ins));
1497 /* this may result from a insert_before call */
1499 bb->code = tmp->data;
1505 g_list_free (fspill_list);