2 * mini-codegen.c: Arch independent code generation functionality
4 * (C) 2003 Ximian, Inc.
11 #include <mono/metadata/appdomain.h>
12 #include <mono/metadata/debug-helpers.h>
13 #include <mono/metadata/threads.h>
14 #include <mono/metadata/profiler-private.h>
15 #include <mono/utils/mono-math.h>
20 #include "mini-arch.h"
22 #define DEBUG(a) MINI_DEBUG(cfg->verbose_level, 2, a;)
24 #define use_fpstack MONO_ARCH_USE_FPSTACK
27 g_slist_append_mempool (MonoMemPool *mp, GSList *list, gpointer data)
32 new_list = mono_mempool_alloc (mp, sizeof (GSList));
33 new_list->data = data;
34 new_list->next = NULL;
40 last->next = new_list;
48 * Duplicated here from regalloc.c so they can be inlined
49 * FIXME: Remove the old one after the new JIT is done
53 mono_regstate2_reset (MonoRegState *rs) {
54 rs->next_vreg = MONO_MAX_IREGS;
57 static inline MonoRegState*
58 mono_regstate2_new (void)
60 MonoRegState* rs = g_new0 (MonoRegState, 1);
62 mono_regstate2_reset (rs);
68 mono_regstate2_free (MonoRegState *rs) {
74 mono_regstate_assign (MonoRegState *rs) {
75 if (rs->next_vreg > rs->vassign_size) {
77 rs->vassign_size = MAX (rs->next_vreg, 256);
78 rs->vassign = g_malloc (rs->vassign_size * sizeof (int));
81 memset (rs->isymbolic, 0, MONO_MAX_IREGS * sizeof (rs->isymbolic [0]));
82 memset (rs->vassign, -1, sizeof (rs->vassign [0]) * rs->next_vreg);
84 memset (rs->fsymbolic, 0, MONO_MAX_FREGS * sizeof (rs->fsymbolic [0]));
88 mono_regstate_alloc_int (MonoRegState *rs, regmask_t allow)
90 regmask_t mask = allow & rs->ifree_mask;
92 #if defined(__x86_64__) && defined(__GNUC__)
99 __asm__("bsfq %1,%0\n\t"
100 : "=r" (i) : "rm" (mask));
102 rs->ifree_mask &= ~ ((regmask_t)1 << i);
108 for (i = 0; i < MONO_MAX_IREGS; ++i) {
109 if (mask & ((regmask_t)1 << i)) {
110 rs->ifree_mask &= ~ ((regmask_t)1 << i);
119 mono_regstate_free_int (MonoRegState *rs, int reg)
122 rs->ifree_mask |= (regmask_t)1 << reg;
123 rs->isymbolic [reg] = 0;
128 mono_regstate_alloc_float (MonoRegState *rs, regmask_t allow)
131 regmask_t mask = allow & rs->ffree_mask;
132 for (i = 0; i < MONO_MAX_FREGS; ++i) {
133 if (mask & ((regmask_t)1 << i)) {
134 rs->ffree_mask &= ~ ((regmask_t)1 << i);
142 mono_regstate_free_float (MonoRegState *rs, int reg)
145 rs->ffree_mask |= (regmask_t)1 << reg;
146 rs->fsymbolic [reg] = 0;
151 mono_regstate2_next_long (MonoRegState *rs)
153 int rval = rs->next_vreg;
161 mono_regname_full (int reg, gboolean fp)
164 return mono_arch_fregname (reg);
166 return mono_arch_regname (reg);
170 mono_call_inst_add_outarg_reg (MonoCompile *cfg, MonoCallInst *call, int vreg, int hreg, gboolean fp)
174 regpair = (((guint32)hreg) << 24) + vreg;
176 g_assert (vreg >= MONO_MAX_FREGS);
177 g_assert (hreg < MONO_MAX_FREGS);
178 call->used_fregs |= 1 << hreg;
179 call->out_freg_args = g_slist_append_mempool (cfg->mempool, call->out_freg_args, (gpointer)(gssize)(regpair));
181 g_assert (vreg >= MONO_MAX_IREGS);
182 g_assert (hreg < MONO_MAX_IREGS);
183 call->used_iregs |= 1 << hreg;
184 call->out_ireg_args = g_slist_append_mempool (cfg->mempool, call->out_ireg_args, (gpointer)(gssize)(regpair));
189 resize_spill_info (MonoCompile *cfg, gboolean fp)
191 MonoSpillInfo *orig_info = fp ? cfg->spill_info_float : cfg->spill_info;
192 int orig_len = fp ? cfg->spill_info_float_len : cfg->spill_info_len;
193 int new_len = orig_len ? orig_len * 2 : 16;
194 MonoSpillInfo *new_info;
197 new_info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo) * new_len);
199 memcpy (new_info, orig_info, sizeof (MonoSpillInfo) * orig_len);
200 for (i = orig_len; i < new_len; ++i)
201 new_info [i].offset = -1;
204 cfg->spill_info = new_info;
205 cfg->spill_info_len = new_len;
207 cfg->spill_info_float = new_info;
208 cfg->spill_info_float_len = new_len;
213 * returns the offset used by spillvar. It allocates a new
214 * spill variable if necessary.
217 mono_spillvar_offset_int (MonoCompile *cfg, int spillvar)
221 #if defined (__mips__)
222 g_assert_not_reached();
224 if (G_UNLIKELY (spillvar >= cfg->spill_info_len)) {
225 resize_spill_info (cfg, FALSE);
226 g_assert (spillvar < cfg->spill_info_len);
229 info = &cfg->spill_info [spillvar];
230 if (info->offset == -1) {
231 cfg->stack_offset += sizeof (gpointer) - 1;
232 cfg->stack_offset &= ~(sizeof (gpointer) - 1);
234 if (cfg->flags & MONO_CFG_HAS_SPILLUP) {
235 info->offset = cfg->stack_offset;
236 cfg->stack_offset += sizeof (gpointer);
238 cfg->stack_offset += sizeof (gpointer);
239 info->offset = - cfg->stack_offset;
247 * returns the offset used by spillvar. It allocates a new
248 * spill float variable if necessary.
249 * (same as mono_spillvar_offset but for float)
252 mono_spillvar_offset_float (MonoCompile *cfg, int spillvar)
256 #if defined (__mips__)
257 g_assert_not_reached();
259 if (G_UNLIKELY (spillvar >= cfg->spill_info_float_len)) {
260 resize_spill_info (cfg, TRUE);
261 g_assert (spillvar < cfg->spill_info_float_len);
264 info = &cfg->spill_info_float [spillvar];
265 if (info->offset == -1) {
266 cfg->stack_offset += sizeof (double) - 1;
267 cfg->stack_offset &= ~(sizeof (double) - 1);
269 if (cfg->flags & MONO_CFG_HAS_SPILLUP) {
270 info->offset = cfg->stack_offset;
271 cfg->stack_offset += sizeof (double);
273 cfg->stack_offset += sizeof (double);
274 info->offset = - cfg->stack_offset;
282 mono_spillvar_offset (MonoCompile *cfg, int spillvar, gboolean fp)
285 return mono_spillvar_offset_float (cfg, spillvar);
287 return mono_spillvar_offset_int (cfg, spillvar);
290 #if MONO_ARCH_USE_FPSTACK
293 * Creates a store for spilled floating point items
296 create_spilled_store_float (MonoCompile *cfg, int spill, int reg, MonoInst *ins)
299 MONO_INST_NEW (cfg, store, OP_STORER8_MEMBASE_REG);
301 store->inst_destbasereg = cfg->frame_reg;
302 store->inst_offset = mono_spillvar_offset_float (cfg, spill);
304 DEBUG (printf ("SPILLED FLOAT STORE (%d at 0x%08lx(%%sp)) (from %d)\n", spill, (long)store->inst_offset, reg));
309 * Creates a load for spilled floating point items
312 create_spilled_load_float (MonoCompile *cfg, int spill, int reg, MonoInst *ins)
315 MONO_INST_NEW (cfg, load, OP_LOADR8_SPILL_MEMBASE);
317 load->inst_basereg = cfg->frame_reg;
318 load->inst_offset = mono_spillvar_offset_float (cfg, spill);
320 DEBUG (printf ("SPILLED FLOAT LOAD (%d at 0x%08lx(%%sp)) (from %d)\n", spill, (long)load->inst_offset, reg));
324 #endif /* MONO_ARCH_USE_FPSTACK */
326 #define regmask(reg) (((regmask_t)1) << (reg))
328 #define is_hard_ireg(r) ((r) >= 0 && (r) < MONO_MAX_IREGS)
329 #define is_hard_freg(r) ((r) >= 0 && (r) < MONO_MAX_FREGS)
330 #define is_global_ireg(r) (is_hard_ireg ((r)) && (MONO_ARCH_CALLEE_SAVED_REGS & (regmask (r))))
331 #define is_local_ireg(r) (is_hard_ireg ((r)) && (MONO_ARCH_CALLEE_REGS & (regmask (r))))
332 #define is_global_freg(r) (is_hard_freg ((r)) && (MONO_ARCH_CALLEE_SAVED_FREGS & (regmask (r))))
333 #define is_local_freg(r) (is_hard_ireg ((r)) && (MONO_ARCH_CALLEE_FREGS & (regmask (r))))
334 #define ireg_is_freeable(r) is_local_ireg ((r))
335 #define freg_is_freeable(r) is_hard_freg ((r))
337 #define reg_is_freeable(r,fp) ((fp) ? freg_is_freeable ((r)) : ireg_is_freeable ((r)))
338 #define is_hard_reg(r,fp) ((fp) ? ((r) < MONO_MAX_FREGS) : ((r) < MONO_MAX_IREGS))
339 #define is_soft_reg(r,fp) (!is_hard_reg((r),(fp)))
340 #define rassign(cfg,reg,fp) ((cfg)->rs->vassign [(reg)])
342 #ifdef MONO_ARCH_INST_IS_FLOAT
343 #define dreg_is_fp(spec) (MONO_ARCH_INST_IS_FLOAT (spec [MONO_INST_DEST]))
344 #define sreg1_is_fp(spec) (MONO_ARCH_INST_IS_FLOAT (spec [MONO_INST_SRC1]))
345 #define sreg2_is_fp(spec) (MONO_ARCH_INST_IS_FLOAT (spec [MONO_INST_SRC2]))
347 #define sreg1_is_fp(spec) (spec [MONO_INST_SRC1] == 'f')
348 #define sreg2_is_fp(spec) (spec [MONO_INST_SRC2] == 'f')
349 #define dreg_is_fp(spec) (spec [MONO_INST_DEST] == 'f')
352 #define sreg1_is_fp_ins(ins) (sreg1_is_fp (ins_get_spec ((ins)->opcode)))
353 #define sreg2_is_fp_ins(ins) (sreg2_is_fp (ins_get_spec ((ins)->opcode)))
354 #define dreg_is_fp_ins(ins) (dreg_is_fp (ins_get_spec ((ins)->opcode)))
356 #define regpair_reg2_mask(desc,hreg1) ((MONO_ARCH_INST_REGPAIR_REG2 (desc,hreg1) != -1) ? (regmask (MONO_ARCH_INST_REGPAIR_REG2 (desc,hreg1))) : MONO_ARCH_CALLEE_REGS)
358 #ifdef MONO_ARCH_IS_GLOBAL_IREG
359 #undef is_global_ireg
360 #define is_global_ireg(reg) MONO_ARCH_IS_GLOBAL_IREG ((reg))
369 #if MONO_ARCH_USE_FPSTACK
370 int flags; /* used to track fp spill/load */
372 regmask_t preferred_mask; /* the hreg where the register should be allocated, or 0 */
375 #ifndef DISABLE_LOGGING
377 mono_print_ins (int i, MonoInst *ins)
379 const char *spec = ins_get_spec (ins->opcode);
380 printf ("\t%-2d %s", i, mono_inst_name (ins->opcode));
382 g_error ("Unknown opcode: %s\n", mono_inst_name (ins->opcode));
384 if (spec [MONO_INST_DEST]) {
385 gboolean fp = dreg_is_fp_ins (ins);
386 if (is_soft_reg (ins->dreg, fp)) {
387 if (spec [MONO_INST_DEST] == 'b') {
388 if (ins->inst_offset == 0)
389 printf (" [R%d] <-", ins->dreg);
391 printf (" [R%d + 0x%lx] <-", ins->dreg, (long)ins->inst_offset);
394 printf (" R%d <-", ins->dreg);
395 } else if (spec [MONO_INST_DEST] == 'b') {
396 if (ins->inst_offset == 0)
397 printf (" [%s] <-", mono_arch_regname (ins->dreg));
399 printf (" [%s + 0x%lx] <-", mono_arch_regname (ins->dreg), (long)ins->inst_offset);
401 printf (" %s <-", mono_regname_full (ins->dreg, fp));
403 if (spec [MONO_INST_SRC1]) {
404 gboolean fp = (spec [MONO_INST_SRC1] == 'f');
405 if (is_soft_reg (ins->sreg1, fp))
406 printf (" R%d", ins->sreg1);
407 else if (spec [MONO_INST_SRC1] == 'b')
408 printf (" [%s + 0x%lx]", mono_arch_regname (ins->sreg1), (long)ins->inst_offset);
410 printf (" %s", mono_regname_full (ins->sreg1, fp));
412 if (spec [MONO_INST_SRC2]) {
413 gboolean fp = (spec [MONO_INST_SRC2] == 'f');
414 if (is_soft_reg (ins->sreg2, fp))
415 printf (" R%d", ins->sreg2);
417 printf (" %s", mono_regname_full (ins->sreg2, fp));
419 if (spec [MONO_INST_CLOB])
420 printf (" clobbers: %c", spec [MONO_INST_CLOB]);
425 print_regtrack (RegTrack *t, int num)
431 for (i = 0; i < num; ++i) {
434 if (i >= MONO_MAX_IREGS) {
435 g_snprintf (buf, sizeof(buf), "R%d", i);
438 r = mono_arch_regname (i);
439 printf ("liveness: %s [%d - %d]\n", r, t [i].born_in, t[i].killed_in);
442 #endif /* DISABLE_LOGGING */
444 typedef struct InstList InstList;
452 static inline InstList*
453 inst_list_prepend (guint8 *mem, InstList *list, MonoInst *data)
455 InstList *item = (InstList*)(gpointer)mem;
465 insert_before_ins (MonoInst *ins, InstList *item, MonoInst* to_insert)
470 * If this function is called multiple times, the new instructions are inserted
471 * in the proper order.
475 prev = item->next->data;
477 while (prev->next != ins)
479 to_insert->next = ins;
480 prev->next = to_insert;
482 to_insert->next = ins;
486 * insert_after_ins insert the new instruction before item->data, so
487 * we have to modify it to point to the first of the prepended instructions.
489 if (item->data == ins)
490 item->data = to_insert;
494 insert_after_ins (MonoInst *ins, InstList *item, MonoInst* to_insert)
497 while (ins->next != item->prev->data)
500 to_insert->next = ins->next;
501 ins->next = to_insert;
505 * Force the spilling of the variable in the symbolic register 'reg'.
508 get_register_force_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, int reg, gboolean fp)
512 int *assign, *symbolic;
514 assign = cfg->rs->vassign;
516 symbolic = cfg->rs->fsymbolic;
518 symbolic = cfg->rs->isymbolic;
520 sel = cfg->rs->vassign [reg];
521 /*i = cfg->rs->isymbolic [sel];
522 g_assert (i == reg);*/
524 spill = ++cfg->spill_count;
525 assign [i] = -spill - 1;
527 mono_regstate_free_float (cfg->rs, sel);
529 mono_regstate_free_int (cfg->rs, sel);
530 /* we need to create a spill var and insert a load to sel after the current instruction */
532 MONO_INST_NEW (cfg, load, OP_LOADR8_MEMBASE);
534 MONO_INST_NEW (cfg, load, OP_LOAD_MEMBASE);
536 load->inst_basereg = cfg->frame_reg;
537 load->inst_offset = mono_spillvar_offset (cfg, spill, fp);
538 insert_after_ins (ins, item, load);
539 DEBUG (printf ("SPILLED LOAD (%d at 0x%08lx(%%ebp)) R%d (freed %s)\n", spill, (long)load->inst_offset, i, mono_regname_full (sel, fp)));
541 i = mono_regstate_alloc_float (cfg->rs, regmask (sel));
543 i = mono_regstate_alloc_int (cfg->rs, regmask (sel));
549 /* This isn't defined on older glib versions and on some platforms */
550 #ifndef G_GUINT64_FORMAT
551 #define G_GUINT64_FORMAT "ul"
555 get_register_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, regmask_t regmask, int reg, gboolean fp)
559 int *assign, *symbolic;
561 assign = cfg->rs->vassign;
563 symbolic = cfg->rs->fsymbolic;
565 symbolic = cfg->rs->isymbolic;
567 DEBUG (printf ("\tstart regmask to assign R%d: 0x%08" G_GUINT64_FORMAT " (R%d <- R%d R%d)\n", reg, (guint64)regmask, ins->dreg, ins->sreg1, ins->sreg2));
568 /* exclude the registers in the current instruction */
569 if ((sreg1_is_fp_ins (ins) == fp) && (reg != ins->sreg1) && (reg_is_freeable (ins->sreg1, fp) || (is_soft_reg (ins->sreg1, fp) && rassign (cfg, ins->sreg1, fp) >= 0))) {
570 if (is_soft_reg (ins->sreg1, fp))
571 regmask &= ~ (regmask (rassign (cfg, ins->sreg1, fp)));
573 regmask &= ~ (regmask (ins->sreg1));
574 DEBUG (printf ("\t\texcluding sreg1 %s\n", mono_regname_full (ins->sreg1, fp)));
576 if ((sreg2_is_fp_ins (ins) == fp) && (reg != ins->sreg2) && (reg_is_freeable (ins->sreg2, fp) || (is_soft_reg (ins->sreg2, fp) && rassign (cfg, ins->sreg2, fp) >= 0))) {
577 if (is_soft_reg (ins->sreg2, fp))
578 regmask &= ~ (regmask (rassign (cfg, ins->sreg2, fp)));
580 regmask &= ~ (regmask (ins->sreg2));
581 DEBUG (printf ("\t\texcluding sreg2 %s %d\n", mono_regname_full (ins->sreg2, fp), ins->sreg2));
583 if ((dreg_is_fp_ins (ins) == fp) && (reg != ins->dreg) && reg_is_freeable (ins->dreg, fp)) {
584 regmask &= ~ (regmask (ins->dreg));
585 DEBUG (printf ("\t\texcluding dreg %s\n", mono_regname_full (ins->dreg, fp)));
588 DEBUG (printf ("\t\tavailable regmask: 0x%08" G_GUINT64_FORMAT "\n", (guint64)regmask));
589 g_assert (regmask); /* need at least a register we can free */
591 /* we should track prev_use and spill the register that's farther */
593 for (i = 0; i < MONO_MAX_FREGS; ++i) {
594 if (regmask & (regmask (i))) {
596 DEBUG (printf ("\t\tselected register %s has assignment %d\n", mono_arch_fregname (sel), cfg->rs->fsymbolic [sel]));
601 i = cfg->rs->fsymbolic [sel];
602 spill = ++cfg->spill_count;
603 cfg->rs->vassign [i] = -spill - 1;
604 mono_regstate_free_float (cfg->rs, sel);
607 for (i = 0; i < MONO_MAX_IREGS; ++i) {
608 if (regmask & (regmask (i))) {
610 DEBUG (printf ("\t\tselected register %s has assignment %d\n", mono_arch_regname (sel), cfg->rs->isymbolic [sel]));
615 i = cfg->rs->isymbolic [sel];
616 spill = ++cfg->spill_count;
617 cfg->rs->vassign [i] = -spill - 1;
618 mono_regstate_free_int (cfg->rs, sel);
621 /* we need to create a spill var and insert a load to sel after the current instruction */
622 MONO_INST_NEW (cfg, load, fp ? OP_LOADR8_MEMBASE : OP_LOAD_MEMBASE);
624 load->inst_basereg = cfg->frame_reg;
625 load->inst_offset = mono_spillvar_offset (cfg, spill, fp);
626 insert_after_ins (ins, item, load);
627 DEBUG (printf ("\tSPILLED LOAD (%d at 0x%08lx(%%ebp)) R%d (freed %s)\n", spill, (long)load->inst_offset, i, mono_regname_full (sel, fp)));
629 i = mono_regstate_alloc_float (cfg->rs, regmask (sel));
631 i = mono_regstate_alloc_int (cfg->rs, regmask (sel));
638 free_up_ireg (MonoCompile *cfg, InstList *item, MonoInst *ins, int hreg)
640 if (!(cfg->rs->ifree_mask & (regmask (hreg)))) {
641 DEBUG (printf ("\tforced spill of R%d\n", cfg->rs->isymbolic [hreg]));
642 get_register_force_spilling (cfg, item, ins, cfg->rs->isymbolic [hreg], FALSE);
643 mono_regstate_free_int (cfg->rs, hreg);
648 free_up_reg (MonoCompile *cfg, InstList *item, MonoInst *ins, int hreg, gboolean fp)
651 if (!(cfg->rs->ffree_mask & (regmask (hreg)))) {
652 DEBUG (printf ("\tforced spill of R%d\n", cfg->rs->isymbolic [hreg]));
653 get_register_force_spilling (cfg, item, ins, cfg->rs->isymbolic [hreg], fp);
654 mono_regstate_free_float (cfg->rs, hreg);
658 if (!(cfg->rs->ifree_mask & (regmask (hreg)))) {
659 DEBUG (printf ("\tforced spill of R%d\n", cfg->rs->isymbolic [hreg]));
660 get_register_force_spilling (cfg, item, ins, cfg->rs->isymbolic [hreg], fp);
661 mono_regstate_free_int (cfg->rs, hreg);
667 create_copy_ins (MonoCompile *cfg, int dest, int src, MonoInst *ins, const unsigned char *ip, gboolean fp)
672 MONO_INST_NEW (cfg, copy, OP_FMOVE);
674 MONO_INST_NEW (cfg, copy, OP_MOVE);
680 copy->next = ins->next;
681 copy->cil_code = ins->cil_code;
684 DEBUG (printf ("\tforced copy from %s to %s\n", mono_regname_full (src, fp), mono_regname_full (dest, fp)));
689 create_spilled_store (MonoCompile *cfg, int spill, int reg, int prev_reg, MonoInst *ins, gboolean fp)
692 MONO_INST_NEW (cfg, store, fp ? OP_STORER8_MEMBASE_REG : OP_STORE_MEMBASE_REG);
694 store->inst_destbasereg = cfg->frame_reg;
695 store->inst_offset = mono_spillvar_offset (cfg, spill, fp);
697 store->next = ins->next;
700 DEBUG (printf ("\tSPILLED STORE (%d at 0x%08lx(%%ebp)) R%d (from %s)\n", spill, (long)store->inst_offset, prev_reg, mono_regname_full (reg, fp)));
704 /* flags used in reginfo->flags */
706 MONO_FP_NEEDS_LOAD_SPILL = regmask (0),
707 MONO_FP_NEEDS_SPILL = regmask (1),
708 MONO_FP_NEEDS_LOAD = regmask (2)
712 alloc_int_reg (MonoCompile *cfg, InstList *tmp, MonoInst *ins, regmask_t dest_mask, int sym_reg, RegTrack *info)
716 if (info && info->preferred_mask) {
717 val = mono_regstate_alloc_int (cfg->rs, info->preferred_mask & dest_mask);
719 DEBUG (printf ("\tallocated preferred reg R%d to %s\n", sym_reg, mono_arch_regname (val)));
724 val = mono_regstate_alloc_int (cfg->rs, dest_mask);
726 val = get_register_spilling (cfg, tmp, ins, dest_mask, sym_reg, FALSE);
732 alloc_float_reg (MonoCompile *cfg, InstList *tmp, MonoInst *ins, regmask_t dest_mask, int sym_reg)
736 val = mono_regstate_alloc_float (cfg->rs, dest_mask);
739 val = get_register_spilling (cfg, tmp, ins, dest_mask, sym_reg, TRUE);
746 alloc_reg (MonoCompile *cfg, InstList *tmp, MonoInst *ins, regmask_t dest_mask, int sym_reg, RegTrack *info, gboolean fp)
749 return alloc_float_reg (cfg, tmp, ins, dest_mask, sym_reg);
751 return alloc_int_reg (cfg, tmp, ins, dest_mask, sym_reg, info);
755 assign_reg (MonoCompile *cfg, MonoRegState *rs, int reg, int hreg, gboolean fp)
758 g_assert (reg >= MONO_MAX_FREGS);
759 g_assert (hreg < MONO_MAX_FREGS);
760 g_assert (! is_global_freg (hreg));
762 rs->vassign [reg] = hreg;
763 rs->fsymbolic [hreg] = reg;
764 rs->ffree_mask &= ~ (regmask (hreg));
767 g_assert (reg >= MONO_MAX_IREGS);
768 g_assert (hreg < MONO_MAX_IREGS);
769 g_assert (! is_global_ireg (hreg));
771 rs->vassign [reg] = hreg;
772 rs->isymbolic [hreg] = reg;
773 rs->ifree_mask &= ~ (regmask (hreg));
778 assign_ireg (MonoCompile *cfg, MonoRegState *rs, int reg, int hreg)
780 assign_reg (cfg, rs, reg, hreg, FALSE);
784 * Local register allocation.
785 * We first scan the list of instructions and we save the liveness info of
786 * each register (when the register is first used, when it's value is set etc.).
787 * We also reverse the list of instructions (in the InstList list) because assigning
788 * registers backwards allows for more tricks to be used.
791 mono_local_regalloc (MonoCompile *cfg, MonoBasicBlock *bb)
794 MonoRegState *rs = cfg->rs;
795 int i, val, fpcount, ins_count;
797 InstList *tmp, *reversed = NULL;
799 GList *fspill_list = NULL;
802 guint8 *inst_list, *mem;
803 #if MONO_ARCH_USE_FPSTACK
804 gboolean need_fpstack = use_fpstack;
810 rs->next_vreg = bb->max_vreg;
811 mono_regstate_assign (rs);
813 rs->ifree_mask = MONO_ARCH_CALLEE_REGS;
814 rs->ffree_mask = MONO_ARCH_CALLEE_FREGS;
817 rs->ffree_mask = 0xff & ~(regmask (MONO_ARCH_FPSTACK_SIZE));
821 /*if (cfg->opt & MONO_OPT_COPYPROP)
822 local_copy_prop (cfg, ins);*/
824 if (cfg->reginfo && cfg->reginfo_len < rs->next_vreg) {
827 reginfo = cfg->reginfo;
829 cfg->reginfo_len = MAX (256, rs->next_vreg * 2);
830 reginfo = cfg->reginfo = mono_mempool_alloc (cfg->mempool, sizeof (RegTrack) * cfg->reginfo_len);
833 g_assert (cfg->reginfo_len >= rs->next_vreg);
835 memset (reginfo, 0, rs->next_vreg * sizeof (RegTrack));
838 for (ins = bb->code; ins; ins = ins->next) {
842 if (cfg->reverse_inst_list && (cfg->reverse_inst_list_len < ins_count)) {
843 cfg->reverse_inst_list = NULL;
846 inst_list = cfg->reverse_inst_list;
848 cfg->reverse_inst_list_len = MAX (ins_count, 1024);
849 inst_list = cfg->reverse_inst_list = mono_mempool_alloc (cfg->mempool, cfg->reverse_inst_list_len * sizeof (InstList));
855 DEBUG (printf ("\nLOCAL REGALLOC: BASIC BLOCK: %d\n", bb->block_num));
856 /* forward pass on the instructions to collect register liveness info */
857 for (ins = bb->code; ins; ins = ins->next) {
858 spec = ins_get_spec (ins->opcode);
860 if (G_UNLIKELY (spec == MONO_ARCH_CPU_SPEC)) {
861 g_error ("Opcode '%s' missing from machine description file.", mono_inst_name (ins->opcode));
864 DEBUG (mono_print_ins (i, ins));
869 #if MONO_ARCH_USE_FPSTACK
873 if (spec [MONO_INST_SRC1] == 'f') {
874 spill = g_list_first (fspill_list);
875 if (spill && fpcount < MONO_ARCH_FPSTACK_SIZE) {
876 reginfo [ins->sreg1].flags |= MONO_FP_NEEDS_LOAD;
877 fspill_list = g_list_remove (fspill_list, spill->data);
882 if (spec [MONO_INST_SRC2] == 'f') {
883 spill = g_list_first (fspill_list);
885 reginfo [ins->sreg2].flags |= MONO_FP_NEEDS_LOAD;
886 fspill_list = g_list_remove (fspill_list, spill->data);
887 if (fpcount >= MONO_ARCH_FPSTACK_SIZE) {
889 fspill_list = g_list_prepend (fspill_list, GINT_TO_POINTER(fspill));
890 reginfo [ins->sreg2].flags |= MONO_FP_NEEDS_LOAD_SPILL;
896 if (dreg_is_fp (spec)) {
897 if (use_fpstack && (spec [MONO_INST_CLOB] != 'm')) {
898 if (fpcount >= MONO_ARCH_FPSTACK_SIZE) {
899 reginfo [ins->dreg].flags |= MONO_FP_NEEDS_SPILL;
901 fspill_list = g_list_prepend (fspill_list, GINT_TO_POINTER(fspill));
910 if (spec [MONO_INST_SRC1]) {
911 //reginfo [ins->sreg1].prev_use = reginfo [ins->sreg1].last_use;
912 //reginfo [ins->sreg1].last_use = i;
913 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_SRC2])) {
914 /* The virtual register is allocated sequentially */
915 //reginfo [ins->sreg1 + 1].prev_use = reginfo [ins->sreg1 + 1].last_use;
916 //reginfo [ins->sreg1 + 1].last_use = i;
917 if (reginfo [ins->sreg1 + 1].born_in == 0 || reginfo [ins->sreg1 + 1].born_in > i)
918 reginfo [ins->sreg1 + 1].born_in = i;
923 if (spec [MONO_INST_SRC2]) {
924 //reginfo [ins->sreg2].prev_use = reginfo [ins->sreg2].last_use;
925 //reginfo [ins->sreg2].last_use = i;
926 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_SRC2])) {
927 /* The virtual register is allocated sequentially */
928 //reginfo [ins->sreg2 + 1].prev_use = reginfo [ins->sreg2 + 1].last_use;
929 //reginfo [ins->sreg2 + 1].last_use = i;
930 if (reginfo [ins->sreg2 + 1].born_in == 0 || reginfo [ins->sreg2 + 1].born_in > i)
931 reginfo [ins->sreg2 + 1].born_in = i;
936 if (spec [MONO_INST_DEST]) {
939 if (spec [MONO_INST_DEST] != 'b') /* it's not just a base register */
940 reginfo [ins->dreg].killed_in = i;
941 //reginfo [ins->dreg].prev_use = reginfo [ins->dreg].last_use;
942 //reginfo [ins->dreg].last_use = i;
943 if (reginfo [ins->dreg].born_in == 0 || reginfo [ins->dreg].born_in > i)
944 reginfo [ins->dreg].born_in = i;
946 dest_dreg = MONO_ARCH_INST_FIXED_REG (spec [MONO_INST_DEST]);
948 reginfo [ins->dreg].preferred_mask = (regmask (dest_dreg));
950 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_DEST])) {
951 /* The virtual register is allocated sequentially */
952 //reginfo [ins->dreg + 1].prev_use = reginfo [ins->dreg + 1].last_use;
953 //reginfo [ins->dreg + 1].last_use = i;
954 if (reginfo [ins->dreg + 1].born_in == 0 || reginfo [ins->dreg + 1].born_in > i)
955 reginfo [ins->dreg + 1].born_in = i;
956 if (MONO_ARCH_INST_REGPAIR_REG2 (spec [MONO_INST_DEST], -1) != -1)
957 reginfo [ins->dreg + 1].preferred_mask = regpair_reg2_mask (spec [MONO_INST_DEST], -1);
963 if (spec [MONO_INST_CLOB] == 'c') {
964 /* A call instruction implicitly uses all registers in call->out_ireg_args */
966 MonoCallInst *call = (MonoCallInst*)ins;
969 list = call->out_ireg_args;
975 regpair = (guint32)(gssize)(list->data);
976 hreg = regpair >> 24;
977 reg = regpair & 0xffffff;
979 //reginfo [reg].prev_use = reginfo [reg].last_use;
980 //reginfo [reg].last_use = i;
982 list = g_slist_next (list);
986 list = call->out_freg_args;
987 if (!use_fpstack && list) {
992 regpair = (guint32)(gssize)(list->data);
993 hreg = regpair >> 24;
994 reg = regpair & 0xffffff;
996 //reginfo [reg].prev_use = reginfo [reg].last_use;
997 //reginfo [reg].last_use = i;
999 list = g_slist_next (list);
1004 reversed = inst_list_prepend (mem, reversed, ins);
1005 mem += sizeof (InstList);
1009 // todo: check if we have anything left on fp stack, in verify mode?
1012 DEBUG (print_regtrack (reginfo, rs->next_vreg));
1015 int prev_dreg, prev_sreg1, prev_sreg2, clob_dreg;
1016 int dest_dreg, dest_sreg1, dest_sreg2, clob_reg;
1017 int dreg_high, sreg1_high;
1018 regmask_t dreg_mask, sreg1_mask, sreg2_mask, mask;
1019 regmask_t dreg_fixed_mask, sreg1_fixed_mask, sreg2_fixed_mask;
1020 const unsigned char *ip;
1023 spec = ins_get_spec (ins->opcode);
1034 dreg_mask = dreg_is_fp (spec) ? MONO_ARCH_CALLEE_FREGS : MONO_ARCH_CALLEE_REGS;
1035 sreg1_mask = sreg1_is_fp (spec) ? MONO_ARCH_CALLEE_FREGS : MONO_ARCH_CALLEE_REGS;
1036 sreg2_mask = sreg2_is_fp (spec) ? MONO_ARCH_CALLEE_FREGS : MONO_ARCH_CALLEE_REGS;
1038 DEBUG (printf ("processing:"));
1039 DEBUG (mono_print_ins (i, ins));
1046 dest_sreg1 = MONO_ARCH_INST_FIXED_REG (spec [MONO_INST_SRC1]);
1047 dest_sreg2 = MONO_ARCH_INST_FIXED_REG (spec [MONO_INST_SRC2]);
1048 dest_dreg = MONO_ARCH_INST_FIXED_REG (spec [MONO_INST_DEST]);
1049 clob_reg = MONO_ARCH_INST_FIXED_REG (spec [MONO_INST_CLOB]);
1050 sreg2_mask &= ~ (MONO_ARCH_INST_SREG2_MASK (spec));
1052 #ifdef MONO_ARCH_INST_FIXED_MASK
1053 sreg1_fixed_mask = MONO_ARCH_INST_FIXED_MASK (spec [MONO_INST_SRC1]);
1054 sreg2_fixed_mask = MONO_ARCH_INST_FIXED_MASK (spec [MONO_INST_SRC2]);
1055 dreg_fixed_mask = MONO_ARCH_INST_FIXED_MASK (spec [MONO_INST_DEST]);
1057 sreg1_fixed_mask = sreg2_fixed_mask = dreg_fixed_mask = 0;
1063 #if MONO_ARCH_USE_FPSTACK
1064 if (need_fpstack && (spec [MONO_INST_CLOB] != 'm')) {
1065 if (dreg_is_fp (spec)) {
1066 if (reginfo [ins->dreg].flags & MONO_FP_NEEDS_SPILL) {
1069 spill_node = g_list_first (fspill_list);
1070 g_assert (spill_node);
1072 store = create_spilled_store_float (cfg, GPOINTER_TO_INT (spill_node->data), ins->dreg, ins);
1073 insert_before_ins (ins, tmp, store);
1074 fspill_list = g_list_remove (fspill_list, spill_node->data);
1079 if (spec [MONO_INST_SRC1] == 'f') {
1080 if (reginfo [ins->sreg1].flags & MONO_FP_NEEDS_LOAD) {
1082 MonoInst *store = NULL;
1084 if (reginfo [ins->sreg1].flags & MONO_FP_NEEDS_LOAD_SPILL) {
1086 spill_node = g_list_first (fspill_list);
1087 g_assert (spill_node);
1089 store = create_spilled_store_float (cfg, GPOINTER_TO_INT (spill_node->data), ins->sreg1, ins);
1090 fspill_list = g_list_remove (fspill_list, spill_node->data);
1094 fspill_list = g_list_prepend (fspill_list, GINT_TO_POINTER(fspill));
1095 load = create_spilled_load_float (cfg, fspill, ins->sreg1, ins);
1096 insert_before_ins (ins, tmp, load);
1098 insert_before_ins (load, tmp, store);
1102 if (spec [MONO_INST_SRC2] == 'f') {
1103 if (reginfo [ins->sreg2].flags & MONO_FP_NEEDS_LOAD) {
1105 MonoInst *store = NULL;
1107 if (reginfo [ins->sreg2].flags & MONO_FP_NEEDS_LOAD_SPILL) {
1110 spill_node = g_list_first (fspill_list);
1111 g_assert (spill_node);
1112 if (spec [MONO_INST_SRC1] == 'f' && (reginfo [ins->sreg2].flags & MONO_FP_NEEDS_LOAD_SPILL))
1113 spill_node = g_list_next (spill_node);
1115 store = create_spilled_store_float (cfg, GPOINTER_TO_INT (spill_node->data), ins->sreg2, ins);
1116 fspill_list = g_list_remove (fspill_list, spill_node->data);
1120 fspill_list = g_list_prepend (fspill_list, GINT_TO_POINTER(fspill));
1121 load = create_spilled_load_float (cfg, fspill, ins->sreg2, ins);
1122 insert_before_ins (ins, tmp, load);
1124 insert_before_ins (load, tmp, store);
1133 if (dest_sreg2 != -1) {
1134 if (rs->ifree_mask & (regmask (dest_sreg2))) {
1135 if (is_global_ireg (ins->sreg2)) {
1136 /* Argument already in hard reg, need to copy */
1137 MonoInst *copy = create_copy_ins (cfg, dest_sreg2, ins->sreg2, NULL, ip, FALSE);
1138 insert_before_ins (ins, tmp, copy);
1141 val = rs->vassign [ins->sreg2];
1143 DEBUG (printf ("\tshortcut assignment of R%d to %s\n", ins->sreg2, mono_arch_regname (dest_sreg2)));
1144 assign_reg (cfg, rs, ins->sreg2, dest_sreg2, FALSE);
1145 } else if (val < -1) {
1147 g_assert_not_reached ();
1149 /* Argument already in hard reg, need to copy */
1150 MonoInst *copy = create_copy_ins (cfg, dest_sreg2, val, NULL, ip, FALSE);
1151 insert_before_ins (ins, tmp, copy);
1155 int need_spill = TRUE;
1157 dreg_mask &= ~ (regmask (dest_sreg2));
1158 sreg1_mask &= ~ (regmask (dest_sreg2));
1161 * First check if dreg is assigned to dest_sreg2, since we
1162 * can't spill a dreg.
1164 val = rs->vassign [ins->dreg];
1165 if (val == dest_sreg2 && ins->dreg != ins->sreg2) {
1167 * the destination register is already assigned to
1168 * dest_sreg2: we need to allocate another register for it
1169 * and then copy from this to dest_sreg2.
1172 new_dest = alloc_int_reg (cfg, tmp, ins, dreg_mask, ins->dreg, ®info [ins->dreg]);
1173 g_assert (new_dest >= 0);
1174 DEBUG (printf ("\tchanging dreg R%d to %s from %s\n", ins->dreg, mono_arch_regname (new_dest), mono_arch_regname (dest_sreg2)));
1176 prev_dreg = ins->dreg;
1177 assign_ireg (cfg, rs, ins->dreg, new_dest);
1178 clob_dreg = ins->dreg;
1179 create_copy_ins (cfg, dest_sreg2, new_dest, ins, ip, FALSE);
1180 mono_regstate_free_int (rs, dest_sreg2);
1184 if (is_global_ireg (ins->sreg2)) {
1185 MonoInst *copy = create_copy_ins (cfg, dest_sreg2, ins->sreg2, NULL, ip, FALSE);
1186 insert_before_ins (ins, tmp, copy);
1189 val = rs->vassign [ins->sreg2];
1190 if (val == dest_sreg2) {
1191 /* sreg2 is already assigned to the correct register */
1194 else if ((val >= 0) || (val < -1)) {
1195 /* FIXME: sreg2 already assigned to another register */
1196 g_assert_not_reached ();
1201 DEBUG (printf ("\tforced spill of R%d\n", rs->isymbolic [dest_sreg2]));
1202 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [dest_sreg2], FALSE);
1203 mono_regstate_free_int (rs, dest_sreg2);
1206 if (!is_global_ireg (ins->sreg2))
1207 /* force-set sreg2 */
1208 assign_ireg (cfg, rs, ins->sreg2, dest_sreg2);
1210 ins->sreg2 = dest_sreg2;
1216 fp = dreg_is_fp (spec);
1217 if (spec [MONO_INST_DEST] && (!fp || (fp && !use_fpstack)) && is_soft_reg (ins->dreg, fp))
1218 prev_dreg = ins->dreg;
1220 if (spec [MONO_INST_DEST] == 'b') {
1222 * The dest reg is read by the instruction, not written, so
1223 * avoid allocating sreg1/sreg2 to the same reg.
1225 if (dest_sreg1 != -1)
1226 dreg_mask &= ~ (regmask (dest_sreg1));
1227 if (dest_sreg2 != -1)
1228 dreg_mask &= ~ (regmask (dest_sreg2));
1230 val = rassign (cfg, ins->dreg, fp);
1231 if (is_soft_reg (ins->dreg, fp) && (val >= 0) && (!(regmask (val) & dreg_mask))) {
1232 /* DREG is already allocated to a register needed for sreg1 */
1233 get_register_force_spilling (cfg, tmp, ins, ins->dreg, FALSE);
1234 mono_regstate_free_int (rs, val);
1239 * If dreg is a fixed regpair, free up both of the needed hregs to avoid
1240 * various complex situations.
1242 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_DEST])) {
1243 guint32 dreg2, dest_dreg2;
1245 g_assert (is_soft_reg (ins->dreg, fp));
1247 if (dest_dreg != -1) {
1248 if (rs->vassign [ins->dreg] != dest_dreg)
1249 free_up_ireg (cfg, tmp, ins, dest_dreg);
1251 dreg2 = ins->dreg + 1;
1252 dest_dreg2 = MONO_ARCH_INST_REGPAIR_REG2 (spec [MONO_INST_DEST], dest_dreg);
1253 if (dest_dreg2 != -1) {
1254 if (rs->vassign [dreg2] != dest_dreg2)
1255 free_up_ireg (cfg, tmp, ins, dest_dreg2);
1260 if (dreg_fixed_mask) {
1262 if (is_global_ireg (ins->dreg)) {
1264 * The argument is already in a hard reg, but that reg is
1265 * not usable by this instruction, so allocate a new one.
1267 val = mono_regstate_alloc_int (rs, dreg_fixed_mask);
1269 val = get_register_spilling (cfg, tmp, ins, dreg_fixed_mask, -1, fp);
1270 mono_regstate_free_int (rs, val);
1276 dreg_mask &= dreg_fixed_mask;
1279 if ((!fp || (fp && !use_fpstack)) && (is_soft_reg (ins->dreg, fp))) {
1280 if (dest_dreg != -1)
1281 dreg_mask = (regmask (dest_dreg));
1283 val = rassign (cfg, ins->dreg, fp);
1288 /* the register gets spilled after this inst */
1291 val = alloc_reg (cfg, tmp, ins, dreg_mask, ins->dreg, ®info [ins->dreg], fp);
1292 assign_reg (cfg, rs, ins->dreg, val, fp);
1294 create_spilled_store (cfg, spill, val, prev_dreg, ins, fp);
1297 DEBUG (printf ("\tassigned dreg %s to dest R%d\n", mono_regname_full (val, fp), ins->dreg));
1301 /* Handle regpairs */
1302 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_DEST])) {
1303 int reg2 = prev_dreg + 1;
1306 g_assert (prev_dreg > -1);
1307 g_assert (!is_global_ireg (rs->vassign [prev_dreg]));
1308 mask = regpair_reg2_mask (spec [MONO_INST_DEST], rs->vassign [prev_dreg]);
1311 mask &= ~regmask (X86_ECX);
1313 val = rs->vassign [reg2];
1317 /* the register gets spilled after this inst */
1320 val = mono_regstate_alloc_int (rs, mask);
1322 val = get_register_spilling (cfg, tmp, ins, mask, reg2, fp);
1324 create_spilled_store (cfg, spill, val, reg2, ins, fp);
1327 if (! (mask & (regmask (val)))) {
1328 val = mono_regstate_alloc_int (rs, mask);
1330 val = get_register_spilling (cfg, tmp, ins, mask, reg2, fp);
1332 /* Reallocate hreg to the correct register */
1333 create_copy_ins (cfg, rs->vassign [reg2], val, ins, ip, fp);
1335 mono_regstate_free_int (rs, rs->vassign [reg2]);
1339 DEBUG (printf ("\tassigned dreg-high %s to dest R%d\n", mono_arch_regname (val), reg2));
1340 assign_reg (cfg, rs, reg2, val, fp);
1343 ins->backend.reg3 = val;
1345 if (reg_is_freeable (val, fp) && reg2 >= 0 && (reginfo [reg2].born_in >= i)) {
1346 DEBUG (printf ("\tfreeable %s (R%d)\n", mono_arch_regname (val), reg2));
1347 mono_regstate_free_int (rs, val);
1351 if ((!fp || (fp && !use_fpstack)) && prev_dreg >= 0 && is_soft_reg (prev_dreg, fp) && reginfo [prev_dreg].born_in >= i) {
1353 * In theory, we could free up the hreg even if the vreg is alive,
1354 * but branches inside bblocks force us to assign the same hreg
1355 * to a vreg every time it is encountered.
1357 int dreg = rassign (cfg, prev_dreg, fp);
1358 g_assert (dreg >= 0);
1359 DEBUG (printf ("\tfreeable %s (R%d) (born in %d)\n", mono_regname_full (dreg, fp), prev_dreg, reginfo [prev_dreg].born_in));
1361 mono_regstate_free_float (rs, dreg);
1363 mono_regstate_free_int (rs, dreg);
1366 if ((dest_dreg != -1) && (ins->dreg != dest_dreg)) {
1367 /* this instruction only outputs to dest_dreg, need to copy */
1368 create_copy_ins (cfg, ins->dreg, dest_dreg, ins, ip, fp);
1369 ins->dreg = dest_dreg;
1372 if (rs->fsymbolic [dest_dreg] >= MONO_MAX_FREGS)
1373 free_up_reg (cfg, tmp, ins, dest_dreg, fp);
1376 if (rs->isymbolic [dest_dreg] >= MONO_MAX_IREGS)
1377 free_up_reg (cfg, tmp, ins, dest_dreg, fp);
1381 if (spec [MONO_INST_DEST] == 'b') {
1383 * The dest reg is read by the instruction, not written, so
1384 * avoid allocating sreg1/sreg2 to the same reg.
1386 sreg1_mask &= ~ (regmask (ins->dreg));
1387 sreg2_mask &= ~ (regmask (ins->dreg));
1393 if ((clob_reg != -1) && (!(rs->ifree_mask & (regmask (clob_reg))))) {
1394 DEBUG (printf ("\tforced spill of clobbered reg R%d\n", rs->isymbolic [clob_reg]));
1395 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [clob_reg], FALSE);
1396 mono_regstate_free_int (rs, clob_reg);
1399 if (spec [MONO_INST_CLOB] == 'c') {
1400 int j, s, dreg, dreg2;
1403 clob_mask = MONO_ARCH_CALLEE_REGS;
1406 * Need to avoid spilling the dreg since the dreg is not really
1407 * clobbered by the call.
1409 if ((prev_dreg != -1) && !dreg_is_fp (spec))
1410 dreg = rassign (cfg, prev_dreg, dreg_is_fp (spec));
1414 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_DEST]))
1415 dreg2 = rassign (cfg, prev_dreg + 1, dreg_is_fp (spec));
1419 for (j = 0; j < MONO_MAX_IREGS; ++j) {
1421 if ((clob_mask & s) && !(rs->ifree_mask & s) && (j != ins->sreg1) && (j != dreg) && (j != dreg2)) {
1422 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [j], FALSE);
1423 mono_regstate_free_int (rs, j);
1428 clob_mask = MONO_ARCH_CALLEE_FREGS;
1429 if ((prev_dreg != -1) && dreg_is_fp (spec))
1430 dreg = rassign (cfg, prev_dreg, dreg_is_fp (spec));
1434 for (j = 0; j < MONO_MAX_FREGS; ++j) {
1436 if ((clob_mask & s) && !(rs->ffree_mask & s) && (j != ins->sreg1) && (j != dreg)) {
1437 get_register_force_spilling (cfg, tmp, ins, rs->fsymbolic [j], TRUE);
1438 mono_regstate_free_float (rs, j);
1445 * TRACK ARGUMENT REGS
1447 if (spec [MONO_INST_CLOB] == 'c') {
1448 MonoCallInst *call = (MonoCallInst*)ins;
1452 * This needs to be done before assigning sreg1, so sreg1 will
1453 * not be assigned one of the argument regs.
1457 * Assign all registers in call->out_reg_args to the proper
1458 * argument registers.
1461 list = call->out_ireg_args;
1467 regpair = (guint32)(gssize)(list->data);
1468 hreg = regpair >> 24;
1469 reg = regpair & 0xffffff;
1471 assign_reg (cfg, rs, reg, hreg, FALSE);
1473 sreg1_mask &= ~(regmask (hreg));
1475 DEBUG (printf ("\tassigned arg reg %s to R%d\n", mono_arch_regname (hreg), reg));
1477 list = g_slist_next (list);
1481 list = call->out_freg_args;
1482 if (list && !use_fpstack) {
1487 regpair = (guint32)(gssize)(list->data);
1488 hreg = regpair >> 24;
1489 reg = regpair & 0xffffff;
1491 assign_reg (cfg, rs, reg, hreg, TRUE);
1493 DEBUG (printf ("\tassigned arg reg %s to R%d\n", mono_arch_fregname (hreg), reg));
1495 list = g_slist_next (list);
1503 fp = sreg1_is_fp (spec);
1504 if ((!fp || (fp && !use_fpstack))) {
1505 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_DEST]) && (spec [MONO_INST_CLOB] == '1')) {
1506 g_assert (is_soft_reg (ins->sreg1, fp));
1508 /* To simplify things, we allocate the same regpair to sreg1 and dreg */
1509 if (dest_sreg1 != -1)
1510 g_assert (dest_sreg1 == ins->dreg);
1511 val = mono_regstate_alloc_int (rs, regmask (ins->dreg));
1512 g_assert (val >= 0);
1513 assign_reg (cfg, rs, ins->sreg1, val, fp);
1515 DEBUG (printf ("\tassigned sreg1-low %s to R%d\n", mono_regname_full (val, fp), ins->sreg1));
1517 g_assert ((regmask (dreg_high)) & regpair_reg2_mask (spec [MONO_INST_SRC1], ins->dreg));
1518 val = mono_regstate_alloc_int (rs, regmask (dreg_high));
1519 g_assert (val >= 0);
1520 assign_reg (cfg, rs, ins->sreg1 + 1, val, fp);
1522 DEBUG (printf ("\tassigned sreg1-high %s to R%d\n", mono_regname_full (val, fp), ins->sreg1 + 1));
1524 /* Skip rest of this section */
1528 if (sreg1_fixed_mask) {
1530 if (is_global_ireg (ins->sreg1)) {
1532 * The argument is already in a hard reg, but that reg is
1533 * not usable by this instruction, so allocate a new one.
1535 val = mono_regstate_alloc_int (rs, sreg1_fixed_mask);
1537 val = get_register_spilling (cfg, tmp, ins, sreg1_fixed_mask, -1, fp);
1538 mono_regstate_free_int (rs, val);
1541 /* Fall through to the dest_sreg1 != -1 case */
1544 sreg1_mask &= sreg1_fixed_mask;
1547 if (dest_sreg1 != -1) {
1548 sreg1_mask = regmask (dest_sreg1);
1550 if (!(rs->ifree_mask & (regmask (dest_sreg1)))) {
1551 DEBUG (printf ("\tforced spill of R%d\n", rs->isymbolic [dest_sreg1]));
1552 get_register_force_spilling (cfg, tmp, ins, rs->isymbolic [dest_sreg1], FALSE);
1553 mono_regstate_free_int (rs, dest_sreg1);
1555 if (is_global_ireg (ins->sreg1)) {
1556 /* The argument is already in a hard reg, need to copy */
1557 MonoInst *copy = create_copy_ins (cfg, dest_sreg1, ins->sreg1, NULL, ip, FALSE);
1558 insert_before_ins (ins, tmp, copy);
1559 ins->sreg1 = dest_sreg1;
1563 if (is_soft_reg (ins->sreg1, fp)) {
1564 val = rassign (cfg, ins->sreg1, fp);
1565 prev_sreg1 = ins->sreg1;
1569 /* the register gets spilled after this inst */
1573 if (((ins->opcode == OP_MOVE) || (ins->opcode == OP_SETREG)) && !spill && !fp && (is_local_ireg (ins->dreg) && (rs->ifree_mask & (regmask (ins->dreg))))) {
1575 * Allocate the same hreg to sreg1 as well so the
1576 * peephole can get rid of the move.
1578 sreg1_mask = regmask (ins->dreg);
1581 val = alloc_reg (cfg, tmp, ins, sreg1_mask, ins->sreg1, ®info [ins->sreg1], fp);
1582 assign_reg (cfg, rs, ins->sreg1, val, fp);
1583 DEBUG (printf ("\tassigned sreg1 %s to R%d\n", mono_regname_full (val, fp), ins->sreg1));
1586 MonoInst *store = create_spilled_store (cfg, spill, val, prev_sreg1, NULL, fp);
1588 * Need to insert before the instruction since it can
1591 insert_before_ins (ins, tmp, store);
1594 else if ((dest_sreg1 != -1) && (dest_sreg1 != val)) {
1595 create_copy_ins (cfg, dest_sreg1, val, ins, ip, fp);
1603 sreg2_mask &= ~(regmask (ins->sreg1));
1606 /* Handle the case when sreg1 is a regpair but dreg is not */
1607 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_SRC1]) && (spec [MONO_INST_CLOB] != '1')) {
1608 int reg2 = prev_sreg1 + 1;
1611 g_assert (prev_sreg1 > -1);
1612 g_assert (!is_global_ireg (rs->vassign [prev_sreg1]));
1613 mask = regpair_reg2_mask (spec [MONO_INST_SRC1], rs->vassign [prev_sreg1]);
1614 val = rs->vassign [reg2];
1618 /* the register gets spilled after this inst */
1621 val = mono_regstate_alloc_int (rs, mask);
1623 val = get_register_spilling (cfg, tmp, ins, mask, reg2, fp);
1625 g_assert_not_reached ();
1628 if (! (mask & (regmask (val)))) {
1629 /* The vreg is already allocated to a wrong hreg */
1631 g_assert_not_reached ();
1633 val = mono_regstate_alloc_int (rs, mask);
1635 val = get_register_spilling (cfg, tmp, ins, mask, reg2, fp);
1637 /* Reallocate hreg to the correct register */
1638 create_copy_ins (cfg, rs->vassign [reg2], val, ins, ip, fp);
1640 mono_regstate_free_int (rs, rs->vassign [reg2]);
1646 DEBUG (printf ("\tassigned sreg1 hreg %s to dest R%d\n", mono_arch_regname (val), reg2));
1647 assign_reg (cfg, rs, reg2, val, fp);
1650 /* Handle dreg==sreg1 */
1651 if (((dreg_is_fp (spec) && spec [MONO_INST_SRC1] == 'f' && !use_fpstack) || spec [MONO_INST_CLOB] == '1') && ins->dreg != ins->sreg1) {
1652 MonoInst *sreg2_copy = NULL;
1654 gboolean fp = (spec [MONO_INST_SRC1] == 'f');
1656 if (ins->dreg == ins->sreg2) {
1658 * copying sreg1 to dreg could clobber sreg2, so allocate a new
1661 int reg2 = alloc_reg (cfg, tmp, ins, dreg_mask, ins->sreg2, NULL, fp);
1663 DEBUG (printf ("\tneed to copy sreg2 %s to reg %s\n", mono_regname_full (ins->sreg2, fp), mono_regname_full (reg2, fp)));
1664 sreg2_copy = create_copy_ins (cfg, reg2, ins->sreg2, NULL, ip, fp);
1665 prev_sreg2 = ins->sreg2 = reg2;
1668 mono_regstate_free_float (rs, reg2);
1670 mono_regstate_free_int (rs, reg2);
1673 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_SRC1])) {
1674 /* Copying sreg1_high to dreg could also clobber sreg2 */
1675 if (rs->vassign [prev_sreg1 + 1] == ins->sreg2)
1677 g_assert_not_reached ();
1680 * sreg1 and dest are already allocated to the same regpair by the
1681 * SREG1 allocation code.
1683 g_assert (ins->sreg1 == ins->dreg);
1684 g_assert (dreg_high == sreg1_high);
1687 DEBUG (printf ("\tneed to copy sreg1 %s to dreg %s\n", mono_regname_full (ins->sreg1, fp), mono_regname_full (ins->dreg, fp)));
1688 copy = create_copy_ins (cfg, ins->dreg, ins->sreg1, NULL, ip, fp);
1689 insert_before_ins (ins, tmp, copy);
1692 insert_before_ins (copy, tmp, sreg2_copy);
1695 * Need to prevent sreg2 to be allocated to sreg1, since that
1696 * would screw up the previous copy.
1698 sreg2_mask &= ~ (regmask (ins->sreg1));
1699 /* we set sreg1 to dest as well */
1700 prev_sreg1 = ins->sreg1 = ins->dreg;
1701 sreg2_mask &= ~ (regmask (ins->dreg));
1707 fp = sreg2_is_fp (spec);
1708 if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_SRC2]))
1709 g_assert_not_reached ();
1710 if ((!fp || (fp && !use_fpstack)) && (is_soft_reg (ins->sreg2, fp))) {
1711 val = rassign (cfg, ins->sreg2, fp);
1716 /* the register gets spilled after this inst */
1719 val = alloc_reg (cfg, tmp, ins, sreg2_mask, ins->sreg2, ®info [ins->sreg2], fp);
1720 assign_reg (cfg, rs, ins->sreg2, val, fp);
1721 DEBUG (printf ("\tassigned sreg2 %s to R%d\n", mono_regname_full (val, fp), ins->sreg2));
1723 MonoInst *store = create_spilled_store (cfg, spill, val, prev_sreg2, NULL, fp);
1725 * Need to insert before the instruction since it can
1728 insert_before_ins (ins, tmp, store);
1737 /*if (reg_is_freeable (ins->sreg1) && prev_sreg1 >= 0 && reginfo [prev_sreg1].born_in >= i) {
1738 DEBUG (printf ("freeable %s\n", mono_arch_regname (ins->sreg1)));
1739 mono_regstate_free_int (rs, ins->sreg1);
1741 if (reg_is_freeable (ins->sreg2) && prev_sreg2 >= 0 && reginfo [prev_sreg2].born_in >= i) {
1742 DEBUG (printf ("freeable %s\n", mono_arch_regname (ins->sreg2)));
1743 mono_regstate_free_int (rs, ins->sreg2);
1746 DEBUG (mono_print_ins (i, ins));
1747 /* this may result from a insert_before call */
1749 bb->code = tmp->data;
1753 g_list_free (fspill_list);
1757 mono_opcode_to_cond (int opcode)
1768 case OP_COND_EXC_EQ:
1769 case OP_COND_EXC_IEQ:
1775 case OP_COND_EXC_NE_UN:
1776 case OP_COND_EXC_INE_UN:
1796 case OP_COND_EXC_LT:
1797 case OP_COND_EXC_ILT:
1807 case OP_COND_EXC_GT:
1808 case OP_COND_EXC_IGT:
1815 case OP_COND_EXC_LE_UN:
1816 case OP_COND_EXC_ILE_UN:
1831 case OP_COND_EXC_LT_UN:
1832 case OP_COND_EXC_ILT_UN:
1842 case OP_COND_EXC_GT_UN:
1843 case OP_COND_EXC_IGT_UN:
1846 printf ("%s\n", mono_inst_name (opcode));
1847 g_assert_not_reached ();
1852 mono_opcode_to_type (int opcode, int cmp_opcode)
1854 if ((opcode >= CEE_BEQ) && (opcode <= CEE_BLT_UN))
1856 else if ((opcode >= OP_CEQ) && (opcode <= OP_CLT_UN))
1858 else if ((opcode >= OP_IBEQ) && (opcode <= OP_IBLE_UN))
1860 else if ((opcode >= OP_ICEQ) && (opcode <= OP_ICLT_UN))
1862 else if ((opcode >= OP_LBEQ) && (opcode <= OP_LBLT_UN))
1864 else if ((opcode >= OP_LCEQ) && (opcode <= OP_LCLT_UN))
1866 else if ((opcode >= OP_FBEQ) && (opcode <= OP_FBLE_UN))
1868 else if ((opcode >= OP_FCEQ) && (opcode <= OP_FCLT_UN))
1870 else if ((opcode >= OP_COND_EXC_IEQ) && (opcode <= OP_COND_EXC_ILT_UN))
1872 else if ((opcode >= OP_COND_EXC_EQ) && (opcode <= OP_COND_EXC_LT_UN)) {
1873 switch (cmp_opcode) {
1875 case OP_ICOMPARE_IMM:
1881 g_error ("Unknown opcode '%s' in opcode_to_type", mono_inst_name (opcode));
1887 mono_is_regsize_var (MonoType *t)
1891 t = mono_type_get_underlying_type (t);
1893 case MONO_TYPE_BOOLEAN:
1894 case MONO_TYPE_CHAR:
1904 case MONO_TYPE_FNPTR:
1905 #if SIZEOF_VOID_P == 8
1910 case MONO_TYPE_OBJECT:
1911 case MONO_TYPE_STRING:
1912 case MONO_TYPE_CLASS:
1913 case MONO_TYPE_SZARRAY:
1914 case MONO_TYPE_ARRAY:
1916 case MONO_TYPE_GENERICINST:
1917 if (!mono_type_generic_inst_is_valuetype (t))
1920 case MONO_TYPE_VALUETYPE: