2 * Copyright 2011 Xamarin Inc
3 * Licensed under the MIT license. See LICENSE file in the project root for full license information.
6 #ifndef __MONO_MINI_ARM_H__
7 #define __MONO_MINI_ARM_H__
9 #include <mono/arch/arm/arm-codegen.h>
10 #include <mono/utils/mono-context.h>
13 #if defined(ARM_FPU_NONE)
14 #define MONO_ARCH_SOFT_FLOAT_FALLBACK 1
17 #if defined(__ARM_EABI__)
18 #if G_BYTE_ORDER == G_LITTLE_ENDIAN
19 #define ARM_ARCHITECTURE "armel"
21 #define ARM_ARCHITECTURE "armeb"
24 #define ARM_ARCHITECTURE "arm"
27 #if defined(ARM_FPU_VFP)
28 #define ARM_FP_MODEL "vfp"
29 #elif defined(ARM_FPU_NONE)
30 #define ARM_FP_MODEL "vfp+fallback"
31 #elif defined(ARM_FPU_VFP_HARD)
32 #define ARM_FP_MODEL "vfp+hard"
34 #error "At least one of ARM_FPU_NONE, ARM_FPU_VFP or ARM_FPU_VFP_HARD must be defined."
37 #define MONO_ARCH_ARCHITECTURE ARM_ARCHITECTURE "," ARM_FP_MODEL
39 #define MONO_ARCH_CPU_SPEC mono_arm_cpu_desc
41 #if G_BYTE_ORDER == G_LITTLE_ENDIAN
42 #define ARM_LSW_REG ARMREG_R0
43 #define ARM_MSW_REG ARMREG_R1
45 #define ARM_LSW_REG ARMREG_R1
46 #define ARM_MSW_REG ARMREG_R0
49 #define MONO_MAX_IREGS 16
51 #define MONO_SAVED_GREGS 10 /* r4-r11, ip, lr */
53 /* r4-r11, ip, lr: registers saved in the LMF */
54 #define MONO_ARM_REGSAVE_MASK 0x5ff0
55 #define MONO_ARM_FIRST_SAVED_REG ARMREG_R4
56 #define MONO_ARM_NUM_SAVED_REGS 10
58 /* Parameters used by the register allocator */
60 #define MONO_ARCH_CALLEE_REGS ((1<<ARMREG_R0) | (1<<ARMREG_R1) | (1<<ARMREG_R2) | (1<<ARMREG_R3) | (1<<ARMREG_IP))
61 #define MONO_ARCH_CALLEE_SAVED_REGS ((1<<ARMREG_V1) | (1<<ARMREG_V2) | (1<<ARMREG_V3) | (1<<ARMREG_V4) | (1<<ARMREG_V5) | (1<<ARMREG_V6) | (1<<ARMREG_V7))
64 * TODO: Make use of VFP v3 registers d16-d31.
68 * TODO: We can't use registers d8-d15 in hard float mode because the
69 * register allocator doesn't allocate floating point registers globally.
72 #if defined(ARM_FPU_VFP_HARD)
73 #define MONO_SAVED_FREGS 16
74 #define MONO_MAX_FREGS 32
77 * d8-d15 must be preserved across function calls. We use d14-d15 as
78 * scratch registers in the JIT. The rest have no meaning tied to them.
80 #define MONO_ARCH_CALLEE_FREGS 0x00005555
81 #define MONO_ARCH_CALLEE_SAVED_FREGS 0x55550000
83 #define MONO_SAVED_FREGS 8
84 #define MONO_MAX_FREGS 16
87 * No registers need to be preserved across function calls. We use d0-d1
88 * as scratch registers in the JIT. The rest have no meaning tied to them.
90 #define MONO_ARCH_CALLEE_FREGS 0x55555550
91 #define MONO_ARCH_CALLEE_SAVED_FREGS 0x00000000
94 #define MONO_ARCH_USE_FPSTACK FALSE
95 #define MONO_ARCH_FPSTACK_SIZE 0
97 #define MONO_ARCH_INST_SREG2_MASK(ins) (0)
99 #define MONO_ARCH_INST_FIXED_REG(desc) \
100 (mono_arch_is_soft_float () ? \
101 ((desc) == 'l' || (desc) == 'f' || (desc) == 'g' ? ARM_LSW_REG : (desc) == 'a' ? ARMREG_R0 : -1) : \
102 ((desc) == 'l' ? ARM_LSW_REG : (desc) == 'a' ? ARMREG_R0 : -1))
104 #define MONO_ARCH_INST_IS_REGPAIR(desc) \
105 (mono_arch_is_soft_float () ? \
106 ((desc) == 'l' || (desc) == 'L' || (desc) == 'f' || (desc) == 'g') : \
107 ((desc) == 'l' || (desc) == 'L'))
109 #define MONO_ARCH_INST_IS_FLOAT(desc) \
110 (mono_arch_is_soft_float () ? \
112 ((desc) == 'f' || (desc) == 'g'))
114 #define MONO_ARCH_INST_REGPAIR_REG2(desc,hreg1) ((desc) == 'l' || (desc) == 'f' || (desc) == 'g' ? ARM_MSW_REG : -1)
116 #ifdef TARGET_WATCHOS
117 #define MONO_ARCH_FRAME_ALIGNMENT 16
119 #define MONO_ARCH_FRAME_ALIGNMENT 8
122 /* fixme: align to 16byte instead of 32byte (we align to 32byte to get
123 * reproduceable results for benchmarks */
124 #define MONO_ARCH_CODE_ALIGNMENT 32
126 /* This needs to hold both a 32 bit int and a 64 bit double */
127 #define mono_unwind_reg_t guint64
129 /* Argument marshallings for calls between gsharedvt and normal code */
131 GSHAREDVT_ARG_NONE = 0,
132 GSHAREDVT_ARG_BYVAL_TO_BYREF = 1,
133 GSHAREDVT_ARG_BYREF_TO_BYVAL = 2,
134 GSHAREDVT_ARG_BYREF_TO_BYVAL_I1 = 3,
135 GSHAREDVT_ARG_BYREF_TO_BYVAL_I2 = 4,
136 GSHAREDVT_ARG_BYREF_TO_BYVAL_U1 = 5,
137 GSHAREDVT_ARG_BYREF_TO_BYVAL_U2 = 6
138 } GSharedVtArgMarshal;
140 /* Return value marshalling for calls between gsharedvt and normal code */
142 GSHAREDVT_RET_NONE = 0,
143 GSHAREDVT_RET_IREG = 1,
144 GSHAREDVT_RET_IREGS = 2,
145 GSHAREDVT_RET_I1 = 3,
146 GSHAREDVT_RET_U1 = 4,
147 GSHAREDVT_RET_I2 = 5,
148 GSHAREDVT_RET_U2 = 6,
149 GSHAREDVT_RET_VFP_R4 = 7,
150 GSHAREDVT_RET_VFP_R8 = 8
151 } GSharedVtRetMarshal;
154 /* Method address to call */
156 /* The trampoline reads this, so keep the size explicit */
158 /* If ret_marshal != NONE, this is the reg of the vret arg, else -1 */
160 /* The stack slot where the return value will be stored */
162 int stack_usage, map_count;
163 /* If not -1, then make a virtual call using this vtable offset */
165 /* If 1, make an indirect call to the address in the rgctx reg */
167 /* Whenever this is a in or an out call */
169 /* Whenever this call uses fp registers */
171 gpointer caller_cinfo, callee_cinfo;
172 /* Maps stack slots/registers in the caller to the stack slots/registers in the callee */
173 /* A negative value means a register, i.e. -1=r0, -2=r1 etc. */
174 int map [MONO_ZERO_LEN_ARRAY];
180 /* Passed/returned in an ireg */
182 /* Passed/returned in a pair of iregs */
184 /* Passed on the stack */
186 /* First word in r3, second word on the stack */
188 /* FP value passed in either an ireg or a vfp reg */
190 /* Struct passed/returned in gregs */
193 RegTypeStructByAddrOnStack,
194 /* gsharedvt argument passed by addr in greg */
195 RegTypeGSharedVtInReg,
196 /* gsharedvt argument passed by addr on stack */
197 RegTypeGSharedVtOnStack,
203 guint16 vtsize; /* in param area */
206 /* RegTypeHFA/RegTypeStructByVal */
210 /* RegTypeStructByVal */
212 guint8 size : 4; /* 1, 2, 4, 8, or regs used by RegTypeStructByVal */
218 /* The index of the vret arg in the argument list for RegTypeStructByAddr */
225 /* Structure used by the sequence points in AOTed code */
227 gpointer ss_trigger_page;
228 gpointer bp_trigger_page;
229 gpointer ss_tramp_addr;
230 guint8* bp_addrs [MONO_ZERO_LEN_ARRAY];
235 #define FP_PARAM_REGS 8
236 #define DYN_CALL_STACK_ARGS 10
239 mgreg_t regs [PARAM_REGS + FP_PARAM_REGS];
240 double fpregs [FP_PARAM_REGS];
246 void arm_patch (guchar *code, const guchar *target);
247 guint8* mono_arm_emit_load_imm (guint8 *code, int dreg, guint32 val);
248 int mono_arm_is_rotated_imm8 (guint32 val, gint *rot_amount);
251 mono_arm_throw_exception_by_token (guint32 type_token, mgreg_t pc, mgreg_t sp, mgreg_t *int_regs, gdouble *fp_regs);
254 mono_arm_start_gsharedvt_call (GSharedVtCallInfo *info, gpointer *caller, gpointer *callee, gpointer mrgctx_reg, double *caller_fregs, double *callee_fregs);
257 MONO_ARM_FPU_NONE = 0,
258 MONO_ARM_FPU_VFP = 1,
259 MONO_ARM_FPU_VFP_HARD = 2
262 /* keep the size of the structure a multiple of 8 */
265 * If the second lowest bit is set to 1, then this is a MonoLMFExt structure, and
266 * the other fields are not valid.
268 gpointer previous_lmf;
270 /* This is only set in trampoline LMF frames */
275 /* Currently only used in trampolines on armhf to hold d0-d15. We don't really
276 * need to put d0-d7 in the LMF, but it simplifies the trampoline code.
279 /* all but sp and pc: matches the PUSH instruction layout in the trampolines
280 * 0-4 should be considered undefined (execpt in the magic tramp)
286 typedef struct MonoCompileArch {
287 gpointer seq_point_info_var, ss_trigger_page_var;
288 gpointer seq_point_ss_method_var;
289 gpointer seq_point_bp_method_var;
290 gpointer vret_addr_loc;
291 gboolean omit_fp, omit_fp_computed;
293 gpointer *vfp_scratch_slots [2];
294 int atomic_tmp_offset;
299 #define MONO_ARCH_EMULATE_FCONV_TO_I8 1
300 #define MONO_ARCH_EMULATE_LCONV_TO_R8 1
301 #define MONO_ARCH_EMULATE_LCONV_TO_R4 1
302 #define MONO_ARCH_EMULATE_LCONV_TO_R8_UN 1
303 #define MONO_ARCH_EMULATE_FREM 1
304 #define MONO_ARCH_EMULATE_DIV 1
305 #define MONO_ARCH_EMULATE_CONV_R8_UN 1
306 #define MONO_ARCH_EMULATE_MUL_OVF 1
308 #define ARM_FIRST_ARG_REG 0
309 #define ARM_LAST_ARG_REG 3
311 #define MONO_ARCH_USE_SIGACTION 1
313 #if defined(HOST_WATCHOS)
314 #undef MONO_ARCH_USE_SIGACTION
317 #define MONO_ARCH_NEED_DIV_CHECK 1
319 #define MONO_ARCH_HAVE_GENERALIZED_IMT_TRAMPOLINE 1
321 #define MONO_ARCH_HAVE_FULL_AOT_TRAMPOLINES 1
322 #define MONO_ARCH_HAVE_DECOMPOSE_LONG_OPTS 1
324 #define MONO_ARCH_AOT_SUPPORTED 1
325 #define MONO_ARCH_LLVM_SUPPORTED 1
327 #define MONO_ARCH_GSHARED_SUPPORTED 1
328 #define MONO_ARCH_DYN_CALL_SUPPORTED 1
329 #define MONO_ARCH_DYN_CALL_PARAM_AREA (DYN_CALL_STACK_ARGS * sizeof (mgreg_t))
331 #ifndef MONO_CROSS_COMPILE
332 #define MONO_ARCH_SOFT_DEBUG_SUPPORTED 1
335 #define MONO_ARCH_HAVE_EXCEPTIONS_INIT 1
336 #define MONO_ARCH_HAVE_GET_TRAMPOLINES 1
337 #define MONO_ARCH_HAVE_CONTEXT_SET_INT_REG 1
338 #define MONO_ARCH_HAVE_SIGCTX_TO_MONOCTX 1
339 #define MONO_ARCH_GC_MAPS_SUPPORTED 1
340 #define MONO_ARCH_HAVE_SETUP_ASYNC_CALLBACK 1
341 #define MONO_ARCH_HAVE_CONTEXT_SET_INT_REG 1
342 #define MONO_ARCH_HAVE_HANDLER_BLOCK_GUARD 1
343 #define MONO_ARCH_HAVE_SETUP_RESUME_FROM_SIGNAL_HANDLER_CTX 1
344 #define MONO_ARCH_GSHAREDVT_SUPPORTED 1
345 #define MONO_ARCH_HAVE_GENERAL_RGCTX_LAZY_FETCH_TRAMPOLINE 1
346 #define MONO_ARCH_HAVE_OPCODE_NEEDS_EMULATION 1
347 #define MONO_ARCH_HAVE_OBJC_GET_SELECTOR 1
348 #define MONO_ARCH_HAVE_OP_TAIL_CALL 1
349 #define MONO_ARCH_HAVE_DUMMY_INIT 1
350 #define MONO_ARCH_HAVE_SDB_TRAMPOLINES 1
351 #define MONO_ARCH_HAVE_PATCH_CODE_NEW 1
352 #define MONO_ARCH_HAVE_OP_GENERIC_CLASS_INIT 1
354 #define MONO_ARCH_HAVE_TLS_GET (mono_arm_have_tls_get ())
355 #define MONO_ARCH_HAVE_TLS_GET_REG 1
357 #ifdef TARGET_WATCHOS
358 #define MONO_ARCH_DISABLE_HW_TRAPS 1
359 #define MONO_ARCH_HAVE_UNWIND_BACKTRACE 1
362 /* ARM doesn't have too many registers, so we have to use a callee saved one */
363 #define MONO_ARCH_RGCTX_REG ARMREG_V5
364 #define MONO_ARCH_IMT_REG MONO_ARCH_RGCTX_REG
365 /* First argument reg */
366 #define MONO_ARCH_VTABLE_REG ARMREG_R0
367 #define MONO_ARCH_EXC_REG ARMREG_R0
369 #define MONO_CONTEXT_SET_LLVM_EXC_REG(ctx, exc) do { (ctx)->regs [0] = (gsize)exc; } while (0)
371 #define MONO_INIT_CONTEXT_FROM_FUNC(ctx,func) do { \
372 MONO_CONTEXT_SET_BP ((ctx), __builtin_frame_address (0)); \
373 MONO_CONTEXT_SET_SP ((ctx), __builtin_frame_address (0)); \
374 MONO_CONTEXT_SET_IP ((ctx), (func)); \
377 #define MONO_ARCH_INIT_TOP_LMF_ENTRY(lmf)
380 mono_arm_throw_exception (MonoObject *exc, mgreg_t pc, mgreg_t sp, mgreg_t *int_regs, gdouble *fp_regs);
383 mono_arm_throw_exception_by_token (guint32 type_token, mgreg_t pc, mgreg_t sp, mgreg_t *int_regs, gdouble *fp_regs);
386 mono_arm_resume_unwind (guint32 dummy1, mgreg_t pc, mgreg_t sp, mgreg_t *int_regs, gdouble *fp_regs);
389 mono_arm_thumb_supported (void);
392 mono_arm_get_exception_trampolines (gboolean aot);
395 mono_arm_get_thumb_plt_entry (guint8 *code);
398 mono_arm_patchable_b (guint8 *code, int cond);
401 mono_arm_patchable_bl (guint8 *code, int cond);
404 mono_arm_is_hard_float (void);
407 mono_arm_have_tls_get (void);
410 mono_arm_unaligned_stack (MonoMethod *method);
413 mono_arch_get_call_info (MonoMemPool *mp, MonoMethodSignature *sig);
415 #endif /* __MONO_MINI_ARM_H__ */