3 * Copyright 2011 Xamarin Inc
4 * Licensed under the MIT license. See LICENSE file in the project root for full license information.
7 #ifndef __MONO_MINI_ARM_H__
8 #define __MONO_MINI_ARM_H__
10 #include <mono/arch/arm/arm-codegen.h>
11 #include <mono/utils/mono-context.h>
14 #if defined(ARM_FPU_NONE)
15 #define MONO_ARCH_SOFT_FLOAT_FALLBACK 1
18 #if defined(__ARM_EABI__)
19 #if G_BYTE_ORDER == G_LITTLE_ENDIAN
20 #define ARM_ARCHITECTURE "armel"
22 #define ARM_ARCHITECTURE "armeb"
25 #define ARM_ARCHITECTURE "arm"
28 #if defined(ARM_FPU_VFP)
29 #define ARM_FP_MODEL "vfp"
30 #elif defined(ARM_FPU_NONE)
31 #define ARM_FP_MODEL "vfp+fallback"
32 #elif defined(ARM_FPU_VFP_HARD)
33 #define ARM_FP_MODEL "vfp+hard"
35 #error "At least one of ARM_FPU_NONE, ARM_FPU_VFP or ARM_FPU_VFP_HARD must be defined."
38 #define MONO_ARCH_ARCHITECTURE ARM_ARCHITECTURE "," ARM_FP_MODEL
40 #define MONO_ARCH_CPU_SPEC mono_arm_cpu_desc
42 #if G_BYTE_ORDER == G_LITTLE_ENDIAN
43 #define ARM_LSW_REG ARMREG_R0
44 #define ARM_MSW_REG ARMREG_R1
46 #define ARM_LSW_REG ARMREG_R1
47 #define ARM_MSW_REG ARMREG_R0
50 #define MONO_MAX_IREGS 16
52 #define MONO_SAVED_GREGS 10 /* r4-r11, ip, lr */
54 /* r4-r11, ip, lr: registers saved in the LMF */
55 #define MONO_ARM_REGSAVE_MASK 0x5ff0
56 #define MONO_ARM_FIRST_SAVED_REG ARMREG_R4
57 #define MONO_ARM_NUM_SAVED_REGS 10
59 /* Parameters used by the register allocator */
61 #define MONO_ARCH_CALLEE_REGS ((1<<ARMREG_R0) | (1<<ARMREG_R1) | (1<<ARMREG_R2) | (1<<ARMREG_R3) | (1<<ARMREG_IP))
62 #define MONO_ARCH_CALLEE_SAVED_REGS ((1<<ARMREG_V1) | (1<<ARMREG_V2) | (1<<ARMREG_V3) | (1<<ARMREG_V4) | (1<<ARMREG_V5) | (1<<ARMREG_V6) | (1<<ARMREG_V7))
65 * TODO: Make use of VFP v3 registers d16-d31.
69 * TODO: We can't use registers d8-d15 in hard float mode because the
70 * register allocator doesn't allocate floating point registers globally.
73 #if defined(ARM_FPU_VFP_HARD)
74 #define MONO_SAVED_FREGS 16
75 #define MONO_MAX_FREGS 32
78 * d8-d15 must be preserved across function calls. We use d14-d15 as
79 * scratch registers in the JIT. The rest have no meaning tied to them.
81 #define MONO_ARCH_CALLEE_FREGS 0x00005555
82 #define MONO_ARCH_CALLEE_SAVED_FREGS 0x55550000
84 #define MONO_SAVED_FREGS 8
85 #define MONO_MAX_FREGS 16
88 * No registers need to be preserved across function calls. We use d0-d1
89 * as scratch registers in the JIT. The rest have no meaning tied to them.
91 #define MONO_ARCH_CALLEE_FREGS 0x55555550
92 #define MONO_ARCH_CALLEE_SAVED_FREGS 0x00000000
95 #define MONO_ARCH_USE_FPSTACK FALSE
96 #define MONO_ARCH_FPSTACK_SIZE 0
98 #define MONO_ARCH_INST_SREG2_MASK(ins) (0)
100 #define MONO_ARCH_INST_FIXED_REG(desc) \
101 (mono_arch_is_soft_float () ? \
102 ((desc) == 'l' || (desc) == 'f' || (desc) == 'g' ? ARM_LSW_REG : (desc) == 'a' ? ARMREG_R0 : -1) : \
103 ((desc) == 'l' ? ARM_LSW_REG : (desc) == 'a' ? ARMREG_R0 : -1))
105 #define MONO_ARCH_INST_IS_REGPAIR(desc) \
106 (mono_arch_is_soft_float () ? \
107 ((desc) == 'l' || (desc) == 'L' || (desc) == 'f' || (desc) == 'g') : \
108 ((desc) == 'l' || (desc) == 'L'))
110 #define MONO_ARCH_INST_IS_FLOAT(desc) \
111 (mono_arch_is_soft_float () ? \
113 ((desc) == 'f' || (desc) == 'g'))
115 #define MONO_ARCH_INST_REGPAIR_REG2(desc,hreg1) ((desc) == 'l' || (desc) == 'f' || (desc) == 'g' ? ARM_MSW_REG : -1)
117 #ifdef TARGET_WATCHOS
118 #define MONO_ARCH_FRAME_ALIGNMENT 16
120 #define MONO_ARCH_FRAME_ALIGNMENT 8
123 /* fixme: align to 16byte instead of 32byte (we align to 32byte to get
124 * reproduceable results for benchmarks */
125 #define MONO_ARCH_CODE_ALIGNMENT 32
127 /* This needs to hold both a 32 bit int and a 64 bit double */
128 #define mono_unwind_reg_t guint64
130 /* Argument marshallings for calls between gsharedvt and normal code */
132 GSHAREDVT_ARG_NONE = 0,
133 GSHAREDVT_ARG_BYVAL_TO_BYREF = 1,
134 GSHAREDVT_ARG_BYREF_TO_BYVAL = 2,
135 GSHAREDVT_ARG_BYREF_TO_BYVAL_I1 = 3,
136 GSHAREDVT_ARG_BYREF_TO_BYVAL_I2 = 4,
137 GSHAREDVT_ARG_BYREF_TO_BYVAL_U1 = 5,
138 GSHAREDVT_ARG_BYREF_TO_BYVAL_U2 = 6
139 } GSharedVtArgMarshal;
141 /* Return value marshalling for calls between gsharedvt and normal code */
143 GSHAREDVT_RET_NONE = 0,
144 GSHAREDVT_RET_IREG = 1,
145 GSHAREDVT_RET_IREGS = 2,
146 GSHAREDVT_RET_I1 = 3,
147 GSHAREDVT_RET_U1 = 4,
148 GSHAREDVT_RET_I2 = 5,
149 GSHAREDVT_RET_U2 = 6,
150 GSHAREDVT_RET_VFP_R4 = 7,
151 GSHAREDVT_RET_VFP_R8 = 8
152 } GSharedVtRetMarshal;
155 /* Method address to call */
157 /* The trampoline reads this, so keep the size explicit */
159 /* If ret_marshal != NONE, this is the reg of the vret arg, else -1 */
161 /* The stack slot where the return value will be stored */
163 int stack_usage, map_count;
164 /* If not -1, then make a virtual call using this vtable offset */
166 /* If 1, make an indirect call to the address in the rgctx reg */
168 /* Whenever this is a in or an out call */
170 /* Whenever this call uses fp registers */
172 gpointer caller_cinfo, callee_cinfo;
173 /* Maps stack slots/registers in the caller to the stack slots/registers in the callee */
174 /* A negative value means a register, i.e. -1=r0, -2=r1 etc. */
175 int map [MONO_ZERO_LEN_ARRAY];
181 /* Passed/returned in an ireg */
183 /* Passed/returned in a pair of iregs */
185 /* Passed on the stack */
187 /* First word in r3, second word on the stack */
189 /* FP value passed in either an ireg or a vfp reg */
191 /* Struct passed/returned in gregs */
194 RegTypeStructByAddrOnStack,
195 /* gsharedvt argument passed by addr in greg */
196 RegTypeGSharedVtInReg,
197 /* gsharedvt argument passed by addr on stack */
198 RegTypeGSharedVtOnStack,
204 guint16 vtsize; /* in param area */
207 /* RegTypeHFA/RegTypeStructByVal */
211 /* RegTypeStructByVal */
212 gint32 struct_size, align;
213 guint8 size : 4; /* 1, 2, 4, 8, or regs used by RegTypeStructByVal */
219 /* The index of the vret arg in the argument list for RegTypeStructByAddr */
226 /* Structure used by the sequence points in AOTed code */
228 gpointer ss_trigger_page;
229 gpointer bp_trigger_page;
230 gpointer ss_tramp_addr;
231 guint8* bp_addrs [MONO_ZERO_LEN_ARRAY];
236 #define FP_PARAM_REGS 8
237 #define DYN_CALL_STACK_ARGS 10
240 mgreg_t regs [PARAM_REGS + FP_PARAM_REGS];
241 double fpregs [FP_PARAM_REGS];
247 void arm_patch (guchar *code, const guchar *target);
248 guint8* mono_arm_emit_load_imm (guint8 *code, int dreg, guint32 val);
249 int mono_arm_is_rotated_imm8 (guint32 val, gint *rot_amount);
252 mono_arm_throw_exception_by_token (guint32 type_token, mgreg_t pc, mgreg_t sp, mgreg_t *int_regs, gdouble *fp_regs);
255 mono_arm_start_gsharedvt_call (GSharedVtCallInfo *info, gpointer *caller, gpointer *callee, gpointer mrgctx_reg, double *caller_fregs, double *callee_fregs);
258 MONO_ARM_FPU_NONE = 0,
259 MONO_ARM_FPU_VFP = 1,
260 MONO_ARM_FPU_VFP_HARD = 2
263 /* keep the size of the structure a multiple of 8 */
266 * If the second lowest bit is set to 1, then this is a MonoLMFExt structure, and
267 * the other fields are not valid.
269 gpointer previous_lmf;
271 /* This is only set in trampoline LMF frames */
276 /* Currently only used in trampolines on armhf to hold d0-d15. We don't really
277 * need to put d0-d7 in the LMF, but it simplifies the trampoline code.
280 /* all but sp and pc: matches the PUSH instruction layout in the trampolines
281 * 0-4 should be considered undefined (execpt in the magic tramp)
287 typedef struct MonoCompileArch {
288 gpointer seq_point_info_var, ss_trigger_page_var;
289 gpointer seq_point_ss_method_var;
290 gpointer seq_point_bp_method_var;
291 gpointer vret_addr_loc;
292 gboolean omit_fp, omit_fp_computed;
294 gpointer *vfp_scratch_slots [2];
295 int atomic_tmp_offset;
300 #define MONO_ARCH_EMULATE_FCONV_TO_I8 1
301 #define MONO_ARCH_EMULATE_LCONV_TO_R8 1
302 #define MONO_ARCH_EMULATE_LCONV_TO_R4 1
303 #define MONO_ARCH_EMULATE_LCONV_TO_R8_UN 1
304 #define MONO_ARCH_EMULATE_FREM 1
305 #define MONO_ARCH_EMULATE_DIV 1
306 #define MONO_ARCH_EMULATE_CONV_R8_UN 1
307 #define MONO_ARCH_EMULATE_MUL_OVF 1
309 #define ARM_FIRST_ARG_REG 0
310 #define ARM_LAST_ARG_REG 3
312 #define MONO_ARCH_USE_SIGACTION 1
314 #if defined(HOST_WATCHOS)
315 #undef MONO_ARCH_USE_SIGACTION
318 #define MONO_ARCH_NEED_DIV_CHECK 1
320 #define MONO_ARCH_HAVE_GENERALIZED_IMT_TRAMPOLINE 1
322 #define MONO_ARCH_HAVE_FULL_AOT_TRAMPOLINES 1
323 #define MONO_ARCH_HAVE_DECOMPOSE_LONG_OPTS 1
325 #define MONO_ARCH_AOT_SUPPORTED 1
326 #define MONO_ARCH_LLVM_SUPPORTED 1
328 #define MONO_ARCH_GSHARED_SUPPORTED 1
329 #define MONO_ARCH_DYN_CALL_SUPPORTED 1
330 #define MONO_ARCH_DYN_CALL_PARAM_AREA (DYN_CALL_STACK_ARGS * sizeof (mgreg_t))
332 #if !(defined(TARGET_ANDROID) && defined(MONO_CROSS_COMPILE))
333 #define MONO_ARCH_SOFT_DEBUG_SUPPORTED 1
336 #define MONO_ARCH_HAVE_EXCEPTIONS_INIT 1
337 #define MONO_ARCH_HAVE_GET_TRAMPOLINES 1
338 #define MONO_ARCH_HAVE_CONTEXT_SET_INT_REG 1
339 #define MONO_ARCH_HAVE_SIGCTX_TO_MONOCTX 1
340 #define MONO_ARCH_GC_MAPS_SUPPORTED 1
341 #define MONO_ARCH_HAVE_SETUP_ASYNC_CALLBACK 1
342 #define MONO_ARCH_HAVE_CONTEXT_SET_INT_REG 1
343 #define MONO_ARCH_HAVE_SETUP_RESUME_FROM_SIGNAL_HANDLER_CTX 1
344 #define MONO_ARCH_GSHAREDVT_SUPPORTED 1
345 #define MONO_ARCH_HAVE_GENERAL_RGCTX_LAZY_FETCH_TRAMPOLINE 1
346 #define MONO_ARCH_HAVE_OPCODE_NEEDS_EMULATION 1
347 #define MONO_ARCH_HAVE_OBJC_GET_SELECTOR 1
348 #define MONO_ARCH_HAVE_OP_TAIL_CALL 1
349 #define MONO_ARCH_HAVE_DUMMY_INIT 1
350 #define MONO_ARCH_HAVE_SDB_TRAMPOLINES 1
351 #define MONO_ARCH_HAVE_PATCH_CODE_NEW 1
352 #define MONO_ARCH_HAVE_OP_GENERIC_CLASS_INIT 1
353 #define MONO_ARCH_HAVE_INIT_LMF_EXT 1
355 #if defined(TARGET_WATCHOS) || (defined(__linux__) && !defined(TARGET_ANDROID))
356 #define MONO_ARCH_DISABLE_HW_TRAPS 1
357 #define MONO_ARCH_HAVE_UNWIND_BACKTRACE 1
360 /* ARM doesn't have too many registers, so we have to use a callee saved one */
361 #define MONO_ARCH_RGCTX_REG ARMREG_V5
362 #define MONO_ARCH_IMT_REG MONO_ARCH_RGCTX_REG
363 /* First argument reg */
364 #define MONO_ARCH_VTABLE_REG ARMREG_R0
365 #define MONO_ARCH_EXC_REG ARMREG_R0
367 #define MONO_CONTEXT_SET_LLVM_EXC_REG(ctx, exc) do { (ctx)->regs [0] = (gsize)exc; } while (0)
369 #define MONO_INIT_CONTEXT_FROM_FUNC(ctx,func) do { \
370 MONO_CONTEXT_SET_BP ((ctx), __builtin_frame_address (0)); \
371 MONO_CONTEXT_SET_SP ((ctx), __builtin_frame_address (0)); \
372 MONO_CONTEXT_SET_IP ((ctx), (func)); \
375 #define MONO_ARCH_INIT_TOP_LMF_ENTRY(lmf)
378 mono_arm_throw_exception (MonoObject *exc, mgreg_t pc, mgreg_t sp, mgreg_t *int_regs, gdouble *fp_regs);
381 mono_arm_throw_exception_by_token (guint32 type_token, mgreg_t pc, mgreg_t sp, mgreg_t *int_regs, gdouble *fp_regs);
384 mono_arm_resume_unwind (guint32 dummy1, mgreg_t pc, mgreg_t sp, mgreg_t *int_regs, gdouble *fp_regs);
387 mono_arm_thumb_supported (void);
390 mono_arm_eabi_supported (void);
393 mono_arm_i8_align (void);
396 mono_arm_get_exception_trampolines (gboolean aot);
399 mono_arm_get_thumb_plt_entry (guint8 *code);
402 mono_arm_patchable_b (guint8 *code, int cond);
405 mono_arm_patchable_bl (guint8 *code, int cond);
408 mono_arm_is_hard_float (void);
411 mono_arm_unaligned_stack (MonoMethod *method);
413 /* MonoJumpInfo **ji */
415 mono_arm_emit_aotconst (gpointer ji, guint8 *code, guint8 *buf, int dreg, int patch_type, gconstpointer data);
418 mono_arch_get_call_info (MonoMemPool *mp, MonoMethodSignature *sig);
420 #endif /* __MONO_MINI_ARM_H__ */