mono/mini/mini-arm.c

   1 /*
   2  * mini-arm.c: ARM backend for the Mono code generator
   3  *
   4  * Authors:
   5  *   Paolo Molaro (lupus@ximian.com)
   6  *   Dietmar Maurer (dietmar@ximian.com)
   7  *
   8  * (C) 2003 Ximian, Inc.
   9  */
  10 #include "mini.h"
  11 #include <string.h>
  12
  13 #include <mono/metadata/appdomain.h>
  14 #include <mono/metadata/debug-helpers.h>
  15
  16 #include "mini-arm.h"
  17 #include "inssel.h"
  18 #include "cpu-arm.h"
  19 #include "trace.h"
  20 #include "mono/arch/arm/arm-fpa-codegen.h"
  21
  22 /*
  23  * TODO:
  24  * floating point support: on ARM it is a mess, there are at least 3
  25  * different setups, each of which binary incompat with the other.
  26  * 1) FPA: old and ugly, but unfortunately what current distros use
  27  *    the double binary format has the two words swapped. 8 double registers.
  28  *    Implemented usually by kernel emulation.
  29  * 2) softfloat: the compiler emulates all the fp ops. Usually uses the
  30  *    ugly swapped double format (I guess a softfloat-vfp exists, too, though).
  31  * 3) VFP: the new and actually sensible and useful FP support. Implemented
  32  *    in HW or kernel-emulated, requires new tools. I think this ios what symbian uses.
  33  *
  34  * The plan is to write the FPA support first. softfloat can be tested in a chroot.
  35  */
  36 int mono_exc_esp_offset = 0;
  37
  38 #define arm_is_imm12(v) ((v) > -4096 && (v) < 4096)
  39 #define arm_is_imm8(v) ((v) > -256 && (v) < 256)
  40 #define arm_is_fpimm8(v) ((v) >= -1020 && (v) <= 1020)
  41
  42 const char*
  43 mono_arch_regname (int reg) {
  44         static const char * rnames[] = {
  45                 "arm_r0", "arm_r1", "arm_r2", "arm_r3", "arm_v1",
  46                 "arm_v2", "arm_v3", "arm_v4", "arm_v5", "arm_v6",
  47                 "arm_v7", "arm_fp", "arm_ip", "arm_sp", "arm_lr",
  48                 "arm_pc"
  49         };
  50         if (reg >= 0 && reg < 16)
  51                 return rnames [reg];
  52         return "unknown";
  53 }
  54
  55 const char*
  56 mono_arch_fregname (int reg) {
  57         static const char * rnames[] = {
  58                 "arm_f0", "arm_f1", "arm_f2", "arm_f3", "arm_f4",
  59                 "arm_f5", "arm_f6", "arm_f7", "arm_f8", "arm_f9",
  60                 "arm_f10", "arm_f11", "arm_f12", "arm_f13", "arm_f14",
  61                 "arm_f15", "arm_f16", "arm_f17", "arm_f18", "arm_f19",
  62                 "arm_f20", "arm_f21", "arm_f22", "arm_f23", "arm_f24",
  63                 "arm_f25", "arm_f26", "arm_f27", "arm_f28", "arm_f29",
  64                 "arm_f30", "arm_f31"
  65         };
  66         if (reg >= 0 && reg < 32)
  67                 return rnames [reg];
  68         return "unknown";
  69 }
  70
  71 static guint8*
  72 emit_memcpy (guint8 *code, int size, int dreg, int doffset, int sreg, int soffset)
  73 {
  74         return code;
  75 }
  76
  77 /*
  78  * mono_arch_get_argument_info:
  79  * @csig:  a method signature
  80  * @param_count: the number of parameters to consider
  81  * @arg_info: an array to store the result infos
  82  *
  83  * Gathers information on parameters such as size, alignment and
  84  * padding. arg_info should be large enought to hold param_count + 1 entries.
  85  *
  86  * Returns the size of the activation frame.
  87  */
  88 int
  89 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
  90 {
  91         int k, frame_size = 0;
  92         int size, align, pad;
  93         int offset = 8;
  94
  95         if (MONO_TYPE_ISSTRUCT (csig->ret)) {
  96                 frame_size += sizeof (gpointer);
  97                 offset += 4;
  98         }
  99
 100         arg_info [0].offset = offset;
 101
 102         if (csig->hasthis) {
 103                 frame_size += sizeof (gpointer);
 104                 offset += 4;
 105         }
 106
 107         arg_info [0].size = frame_size;
 108
 109         for (k = 0; k < param_count; k++) {
 110
 111                 if (csig->pinvoke)
 112                         size = mono_type_native_stack_size (csig->params [k], &align);
 113                 else
 114                         size = mono_type_stack_size (csig->params [k], &align);
 115
 116                 /* ignore alignment for now */
 117                 align = 1;
 118
 119                 frame_size += pad = (align - (frame_size & (align - 1))) & (align - 1);
 120                 arg_info [k].pad = pad;
 121                 frame_size += size;
 122                 arg_info [k + 1].pad = 0;
 123                 arg_info [k + 1].size = size;
 124                 offset += pad;
 125                 arg_info [k + 1].offset = offset;
 126                 offset += size;
 127         }
 128
 129         align = MONO_ARCH_FRAME_ALIGNMENT;
 130         frame_size += pad = (align - (frame_size & (align - 1))) & (align - 1);
 131         arg_info [k].pad = pad;
 132
 133         return frame_size;
 134 }
 135
 136 /*
 137  * Initialize the cpu to execute managed code.
 138  */
 139 void
 140 mono_arch_cpu_init (void)
 141 {
 142 }
 143
 144 /*
 145  * This function returns the optimizations supported on this cpu.
 146  */
 147 guint32
 148 mono_arch_cpu_optimizazions (guint32 *exclude_mask)
 149 {
 150         guint32 opts = 0;
 151
 152         /* no arm-specific optimizations yet */
 153         *exclude_mask = 0;
 154         return opts;
 155 }
 156
 157 static gboolean
 158 is_regsize_var (MonoType *t) {
 159         if (t->byref)
 160                 return TRUE;
 161         t = mono_type_get_underlying_type (t);
 162         switch (t->type) {
 163         case MONO_TYPE_I4:
 164         case MONO_TYPE_U4:
 165         case MONO_TYPE_I:
 166         case MONO_TYPE_U:
 167         case MONO_TYPE_PTR:
 168         case MONO_TYPE_FNPTR:
 169                 return TRUE;
 170         case MONO_TYPE_OBJECT:
 171         case MONO_TYPE_STRING:
 172         case MONO_TYPE_CLASS:
 173         case MONO_TYPE_SZARRAY:
 174         case MONO_TYPE_ARRAY:
 175                 return TRUE;
 176         case MONO_TYPE_VALUETYPE:
 177                 return FALSE;
 178         }
 179         return FALSE;
 180 }
 181
 182 GList *
 183 mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
 184 {
 185         GList *vars = NULL;
 186         int i;
 187
 188         for (i = 0; i < cfg->num_varinfo; i++) {
 189                 MonoInst *ins = cfg->varinfo [i];
 190                 MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
 191
 192                 /* unused vars */
 193                 if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
 194                         continue;
 195
 196                 if (ins->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT) || (ins->opcode != OP_LOCAL && ins->opcode != OP_ARG))
 197                         continue;
 198
 199                 /* we can only allocate 32 bit values */
 200                 if (is_regsize_var (ins->inst_vtype)) {
 201                         g_assert (MONO_VARINFO (cfg, i)->reg == -1);
 202                         g_assert (i == vmv->idx);
 203                         vars = mono_varlist_insert_sorted (cfg, vars, vmv, FALSE);
 204                 }
 205         }
 206
 207         return vars;
 208 }
 209
 210 #define USE_EXTRA_TEMPS 0
 211
 212 GList *
 213 mono_arch_get_global_int_regs (MonoCompile *cfg)
 214 {
 215         GList *regs = NULL;
 216         regs = g_list_prepend (regs, GUINT_TO_POINTER (ARMREG_V1));
 217         regs = g_list_prepend (regs, GUINT_TO_POINTER (ARMREG_V2));
 218         regs = g_list_prepend (regs, GUINT_TO_POINTER (ARMREG_V3));
 219         regs = g_list_prepend (regs, GUINT_TO_POINTER (ARMREG_V4));
 220         regs = g_list_prepend (regs, GUINT_TO_POINTER (ARMREG_V5));
 221         regs = g_list_prepend (regs, GUINT_TO_POINTER (ARMREG_V6));
 222         regs = g_list_prepend (regs, GUINT_TO_POINTER (ARMREG_V7));
 223
 224         return regs;
 225 }
 226
 227 /*
 228  * mono_arch_regalloc_cost:
 229  *
 230  *  Return the cost, in number of memory references, of the action of
 231  * allocating the variable VMV into a register during global register
 232  * allocation.
 233  */
 234 guint32
 235 mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
 236 {
 237         /* FIXME: */
 238         return 2;
 239 }
 240
 241 void
 242 mono_arch_flush_icache (guint8 *code, gint size)
 243 {
 244         __asm __volatile ("mov r0, %0\n"
 245                         "mov r1, %1\n"
 246                         "mov r2, %2\n"
 247                         "swi 0x9f0002       @ sys_cacheflush"
 248                         : /* no outputs */
 249                         : "r" (code), "r" (code + size), "r" (0)
 250                         : "r0", "r1", "r3" );
 251
 252 }
 253
 254 #define NOT_IMPLEMENTED(x) \
 255                 g_error ("FIXME: %s is not yet implemented. (trampoline)", x);
 256
 257 enum {
 258         RegTypeGeneral,
 259         RegTypeBase,
 260         RegTypeFP,
 261         RegTypeStructByVal,
 262         RegTypeStructByAddr
 263 };
 264
 265 typedef struct {
 266         gint32  offset;
 267         guint16 vtsize; /* in param area */
 268         guint8  reg;
 269         guint8  regtype : 4; /* 0 general, 1 basereg, 2 floating point register, see RegType* */
 270         guint8  size    : 4; /* 1, 2, 4, 8, or regs used by RegTypeStructByVal */
 271 } ArgInfo;
 272
 273 typedef struct {
 274         int nargs;
 275         guint32 stack_usage;
 276         guint32 struct_ret;
 277         ArgInfo ret;
 278         ArgInfo sig_cookie;
 279         ArgInfo args [1];
 280 } CallInfo;
 281
 282 #define DEBUG(a)
 283
 284 static void inline
 285 add_general (guint *gr, guint *stack_size, ArgInfo *ainfo, gboolean simple)
 286 {
 287         if (simple) {
 288                 if (*gr > ARMREG_R3) {
 289                         ainfo->offset = *stack_size;
 290                         ainfo->reg = ARMREG_SP; /* in the caller */
 291                         ainfo->regtype = RegTypeBase;
 292                         *stack_size += 4;
 293                 } else {
 294                         ainfo->reg = *gr;
 295                 }
 296         } else {
 297                 if (*gr > ARMREG_R2) {
 298 #ifdef ALIGN_DOUBLES
 299                         //*stack_size += (*stack_size % 8);
 300 #endif
 301                         ainfo->offset = *stack_size;
 302                         ainfo->reg = ARMREG_SP; /* in the caller */
 303                         ainfo->regtype = RegTypeBase;
 304                         *stack_size += 8;
 305                 } else {
 306                         if ((*gr) & 1)
 307                                 (*gr) ++;
 308                         ainfo->reg = *gr;
 309                 }
 310                 (*gr) ++;
 311         }
 312         (*gr) ++;
 313 }
 314
 315 static CallInfo*
 316 calculate_sizes (MonoMethodSignature *sig, gboolean is_pinvoke)
 317 {
 318         guint i, gr;
 319         int n = sig->hasthis + sig->param_count;
 320         guint32 simpletype;
 321         guint32 stack_size = 0;
 322         CallInfo *cinfo = g_malloc0 (sizeof (CallInfo) + sizeof (ArgInfo) * n);
 323
 324         gr = ARMREG_R0;
 325
 326         /* FIXME: handle returning a struct */
 327         if (MONO_TYPE_ISSTRUCT (sig->ret)) {
 328                 add_general (&gr, &stack_size, &cinfo->ret, TRUE);
 329                 cinfo->struct_ret = ARMREG_R0;
 330         }
 331
 332         n = 0;
 333         if (sig->hasthis) {
 334                 add_general (&gr, &stack_size, cinfo->args + n, TRUE);
 335                 n++;
 336         }
 337         DEBUG(printf("params: %d\n", sig->param_count));
 338         for (i = 0; i < sig->param_count; ++i) {
 339                 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
 340                         /* Prevent implicit arguments and sig_cookie from
 341                            being passed in registers */
 342                         gr = ARMREG_R3 + 1;
 343                         /* Emit the signature cookie just before the implicit arguments */
 344                         add_general (&gr, &stack_size, &cinfo->sig_cookie, TRUE);
 345                 }
 346                 DEBUG(printf("param %d: ", i));
 347                 if (sig->params [i]->byref) {
 348                         DEBUG(printf("byref\n"));
 349                         add_general (&gr, &stack_size, cinfo->args + n, TRUE);
 350                         n++;
 351                         continue;
 352                 }
 353                 simpletype = mono_type_get_underlying_type (sig->params [i])->type;
 354         enum_calc_size:
 355                 switch (simpletype) {
 356                 case MONO_TYPE_BOOLEAN:
 357                 case MONO_TYPE_I1:
 358                 case MONO_TYPE_U1:
 359                         cinfo->args [n].size = 1;
 360                         add_general (&gr, &stack_size, cinfo->args + n, TRUE);
 361                         n++;
 362                         break;
 363                 case MONO_TYPE_CHAR:
 364                 case MONO_TYPE_I2:
 365                 case MONO_TYPE_U2:
 366                         cinfo->args [n].size = 2;
 367                         add_general (&gr, &stack_size, cinfo->args + n, TRUE);
 368                         n++;
 369                         break;
 370                 case MONO_TYPE_I4:
 371                 case MONO_TYPE_U4:
 372                         cinfo->args [n].size = 4;
 373                         add_general (&gr, &stack_size, cinfo->args + n, TRUE);
 374                         n++;
 375                         break;
 376                 case MONO_TYPE_I:
 377                 case MONO_TYPE_U:
 378                 case MONO_TYPE_PTR:
 379                 case MONO_TYPE_FNPTR:
 380                 case MONO_TYPE_CLASS:
 381                 case MONO_TYPE_OBJECT:
 382                 case MONO_TYPE_STRING:
 383                 case MONO_TYPE_SZARRAY:
 384                 case MONO_TYPE_ARRAY:
 385                 case MONO_TYPE_R4:
 386                         cinfo->args [n].size = sizeof (gpointer);
 387                         add_general (&gr, &stack_size, cinfo->args + n, TRUE);
 388                         n++;
 389                         break;
 390                 case MONO_TYPE_VALUETYPE: {
 391                         gint size;
 392                         MonoClass *klass;
 393                         klass = mono_class_from_mono_type (sig->params [i]);
 394                         if (is_pinvoke)
 395                             size = mono_class_native_size (klass, NULL);
 396                         else
 397                             size = mono_class_value_size (klass, NULL);
 398                         DEBUG(printf ("load %d bytes struct\n",
 399                                       mono_class_native_size (sig->params [i]->data.klass, NULL)));
 400 #if 0
 401 #if PPC_PASS_STRUCTS_BY_VALUE
 402                         {
 403                                 int align_size = size;
 404                                 int nwords = 0;
 405                                 align_size += (sizeof (gpointer) - 1);
 406                                 align_size &= ~(sizeof (gpointer) - 1);
 407                                 nwords = (align_size + sizeof (gpointer) -1 ) / sizeof (gpointer);
 408                                 cinfo->args [n].regtype = RegTypeStructByVal;
 409                                 if (gr > PPC_LAST_ARG_REG || (size >= 3 && size % 4 != 0)) {
 410                                         cinfo->args [n].size = 0;
 411                                         cinfo->args [n].vtsize = nwords;
 412                                 } else {
 413                                         int rest = PPC_LAST_ARG_REG - gr + 1;
 414                                         int n_in_regs = rest >= nwords? nwords: rest;
 415                                         cinfo->args [n].size = n_in_regs;
 416                                         cinfo->args [n].vtsize = nwords - n_in_regs;
 417                                         cinfo->args [n].reg = gr;
 418                                         gr += n_in_regs;
 419                                 }
 420                                 cinfo->args [n].offset = PPC_STACK_PARAM_OFFSET + stack_size;
 421                                 /*g_print ("offset for arg %d at %d\n", n, PPC_STACK_PARAM_OFFSET + stack_size);*/
 422                                 stack_size += nwords * sizeof (gpointer);
 423                         }
 424 #else
 425                         add_general (&gr, &stack_size, cinfo->args + n, TRUE);
 426                         cinfo->args [n].regtype = RegTypeStructByAddr;
 427 #endif
 428 #endif
 429                         n++;
 430                         break;
 431                 }
 432                 case MONO_TYPE_TYPEDBYREF: {
 433                         int size = sizeof (MonoTypedRef);
 434                         /* keep in sync or merge with the valuetype case */
 435 #if 0
 436 #if PPC_PASS_STRUCTS_BY_VALUE
 437                         {
 438                                 int nwords = (size + sizeof (gpointer) -1 ) / sizeof (gpointer);
 439                                 cinfo->args [n].regtype = RegTypeStructByVal;
 440                                 if (gr <= PPC_LAST_ARG_REG) {
 441                                         int rest = PPC_LAST_ARG_REG - gr + 1;
 442                                         int n_in_regs = rest >= nwords? nwords: rest;
 443                                         cinfo->args [n].size = n_in_regs;
 444                                         cinfo->args [n].vtsize = nwords - n_in_regs;
 445                                         cinfo->args [n].reg = gr;
 446                                         gr += n_in_regs;
 447                                 } else {
 448                                         cinfo->args [n].size = 0;
 449                                         cinfo->args [n].vtsize = nwords;
 450                                 }
 451                                 cinfo->args [n].offset = PPC_STACK_PARAM_OFFSET + stack_size;
 452                                 /*g_print ("offset for arg %d at %d\n", n, PPC_STACK_PARAM_OFFSET + stack_size);*/
 453                                 stack_size += nwords * sizeof (gpointer);
 454                         }
 455 #else
 456                         add_general (&gr, &stack_size, cinfo->args + n, TRUE);
 457                         cinfo->args [n].regtype = RegTypeStructByAddr;
 458 #endif
 459 #endif
 460                         n++;
 461                         break;
 462                 }
 463                 case MONO_TYPE_U8:
 464                 case MONO_TYPE_I8:
 465                 case MONO_TYPE_R8:
 466                         cinfo->args [n].size = 8;
 467                         add_general (&gr, &stack_size, cinfo->args + n, FALSE);
 468                         n++;
 469                         break;
 470                 default:
 471                         g_error ("Can't trampoline 0x%x", sig->params [i]->type);
 472                 }
 473         }
 474
 475         {
 476                 simpletype = mono_type_get_underlying_type (sig->ret)->type;
 477 enum_retvalue:
 478                 switch (simpletype) {
 479                 case MONO_TYPE_BOOLEAN:
 480                 case MONO_TYPE_I1:
 481                 case MONO_TYPE_U1:
 482                 case MONO_TYPE_I2:
 483                 case MONO_TYPE_U2:
 484                 case MONO_TYPE_CHAR:
 485                 case MONO_TYPE_I4:
 486                 case MONO_TYPE_U4:
 487                 case MONO_TYPE_I:
 488                 case MONO_TYPE_U:
 489                 case MONO_TYPE_PTR:
 490                 case MONO_TYPE_FNPTR:
 491                 case MONO_TYPE_CLASS:
 492                 case MONO_TYPE_OBJECT:
 493                 case MONO_TYPE_SZARRAY:
 494                 case MONO_TYPE_ARRAY:
 495                 case MONO_TYPE_STRING:
 496                         cinfo->ret.reg = ARMREG_R0;
 497                         break;
 498                 case MONO_TYPE_U8:
 499                 case MONO_TYPE_I8:
 500                         cinfo->ret.reg = ARMREG_R0;
 501                         break;
 502                 case MONO_TYPE_R4:
 503                 case MONO_TYPE_R8:
 504                         cinfo->ret.reg = ARMREG_R0;
 505                         /* FIXME: cinfo->ret.reg = ???;
 506                         cinfo->ret.regtype = RegTypeFP;*/
 507                         break;
 508                 case MONO_TYPE_VALUETYPE:
 509                         break;
 510                 case MONO_TYPE_TYPEDBYREF:
 511                 case MONO_TYPE_VOID:
 512                         break;
 513                 default:
 514                         g_error ("Can't handle as return value 0x%x", sig->ret->type);
 515                 }
 516         }
 517
 518         /* align stack size to 8 */
 519         DEBUG (printf ("      stack size: %d (%d)\n", (stack_size + 15) & ~15, stack_size));
 520         stack_size = (stack_size + 7) & ~7;
 521
 522         cinfo->stack_usage = stack_size;
 523         return cinfo;
 524 }
 525
 526
 527 /*
 528  * Set var information according to the calling convention. arm version.
 529  * The locals var stuff should most likely be split in another method.
 530  */
 531 void
 532 mono_arch_allocate_vars (MonoCompile *m)
 533 {
 534         MonoMethodSignature *sig;
 535         MonoMethodHeader *header;
 536         MonoInst *inst;
 537         int i, offset, size, align, curinst;
 538         int frame_reg = ARMREG_SP;
 539
 540
 541         /* allow room for the vararg method args: void* and long/double */
 542         if (mono_jit_trace_calls != NULL && mono_trace_eval (m->method))
 543                 m->param_area = MAX (m->param_area, sizeof (gpointer)*8);
 544         /* this is bug #60332: remove when #59509 is fixed, so no weird vararg
 545          * call convs needs to be handled this way.
 546          */
 547         if (m->flags & MONO_CFG_HAS_VARARGS)
 548                 m->param_area = MAX (m->param_area, sizeof (gpointer)*8);
 549         /* gtk-sharp and other broken code will dllimport vararg functions even with
 550          * non-varargs signatures. Since there is little hope people will get this right
 551          * we assume they won't.
 552          */
 553         if (m->method->wrapper_type == MONO_WRAPPER_MANAGED_TO_NATIVE)
 554                 m->param_area = MAX (m->param_area, sizeof (gpointer)*8);
 555
 556         header = mono_method_get_header (m->method);
 557
 558         /*
 559          * We use the frame register also for any method that has
 560          * exception clauses. This way, when the handlers are called,
 561          * the code will reference local variables using the frame reg instead of
 562          * the stack pointer: if we had to restore the stack pointer, we'd
 563          * corrupt the method frames that are already on the stack (since
 564          * filters get called before stack unwinding happens) when the filter
 565          * code would call any method (this also applies to finally etc.).
 566          */
 567         if ((m->flags & MONO_CFG_HAS_ALLOCA) || header->num_clauses)
 568                 frame_reg = ARMREG_FP;
 569         m->frame_reg = frame_reg;
 570         if (frame_reg != ARMREG_SP) {
 571                 m->used_int_regs |= 1 << frame_reg;
 572         }
 573
 574         sig = mono_method_signature (m->method);
 575
 576         offset = 0;
 577         curinst = 0;
 578         if (MONO_TYPE_ISSTRUCT (sig->ret)) {
 579                 m->ret->opcode = OP_REGVAR;
 580                 m->ret->inst_c0 = ARMREG_R0;
 581         } else {
 582                 /* FIXME: handle long and FP values */
 583                 switch (mono_type_get_underlying_type (sig->ret)->type) {
 584                 case MONO_TYPE_VOID:
 585                         break;
 586                 default:
 587                         m->ret->opcode = OP_REGVAR;
 588                         m->ret->inst_c0 = ARMREG_R0;
 589                         break;
 590                 }
 591         }
 592         /* local vars are at a positive offset from the stack pointer */
 593         /*
 594          * also note that if the function uses alloca, we use FP
 595          * to point at the local variables.
 596          */
 597         offset = 0; /* linkage area */
 598         /* align the offset to 16 bytes: not sure this is needed here  */
 599         //offset += 8 - 1;
 600         //offset &= ~(8 - 1);
 601
 602         /* add parameter area size for called functions */
 603         offset += m->param_area;
 604         offset += 8 - 1;
 605         offset &= ~(8 - 1);
 606
 607         /* allow room to save the return value */
 608         if (mono_jit_trace_calls != NULL && mono_trace_eval (m->method))
 609                 offset += 8;
 610
 611         /* the MonoLMF structure is stored just below the stack pointer */
 612
 613         if (sig->call_convention == MONO_CALL_VARARG) {
 614                 m->sig_cookie = 0;
 615         }
 616
 617         if (MONO_TYPE_ISSTRUCT (sig->ret)) {
 618                 inst = m->ret;
 619                 offset += sizeof(gpointer) - 1;
 620                 offset &= ~(sizeof(gpointer) - 1);
 621                 inst->inst_offset = offset;
 622                 inst->opcode = OP_REGOFFSET;
 623                 inst->inst_basereg = frame_reg;
 624                 offset += sizeof(gpointer);
 625                 if (sig->call_convention == MONO_CALL_VARARG)
 626                         m->sig_cookie += sizeof (gpointer);
 627         }
 628
 629         curinst = m->locals_start;
 630         for (i = curinst; i < m->num_varinfo; ++i) {
 631                 inst = m->varinfo [i];
 632                 if ((inst->flags & MONO_INST_IS_DEAD) || inst->opcode == OP_REGVAR)
 633                         continue;
 634
 635                 /* inst->unused indicates native sized value types, this is used by the
 636                 * pinvoke wrappers when they call functions returning structure */
 637                 if (inst->unused && MONO_TYPE_ISSTRUCT (inst->inst_vtype) && inst->inst_vtype->type != MONO_TYPE_TYPEDBYREF)
 638                         size = mono_class_native_size (mono_class_from_mono_type (inst->inst_vtype), &align);
 639                 else
 640                         size = mono_type_size (inst->inst_vtype, &align);
 641
 642                 offset += align - 1;
 643                 offset &= ~(align - 1);
 644                 inst->inst_offset = offset;
 645                 inst->opcode = OP_REGOFFSET;
 646                 inst->inst_basereg = frame_reg;
 647                 offset += size;
 648                 //g_print ("allocating local %d to %d\n", i, inst->inst_offset);
 649         }
 650
 651         curinst = 0;
 652         if (sig->hasthis) {
 653                 inst = m->varinfo [curinst];
 654                 if (inst->opcode != OP_REGVAR) {
 655                         inst->opcode = OP_REGOFFSET;
 656                         inst->inst_basereg = frame_reg;
 657                         offset += sizeof (gpointer) - 1;
 658                         offset &= ~(sizeof (gpointer) - 1);
 659                         inst->inst_offset = offset;
 660                         offset += sizeof (gpointer);
 661                         if (sig->call_convention == MONO_CALL_VARARG)
 662                                 m->sig_cookie += sizeof (gpointer);
 663                 }
 664                 curinst++;
 665         }
 666
 667         for (i = 0; i < sig->param_count; ++i) {
 668                 inst = m->varinfo [curinst];
 669                 if (inst->opcode != OP_REGVAR) {
 670                         inst->opcode = OP_REGOFFSET;
 671                         inst->inst_basereg = frame_reg;
 672                         size = mono_type_size (sig->params [i], &align);
 673                         offset += align - 1;
 674                         offset &= ~(align - 1);
 675                         inst->inst_offset = offset;
 676                         offset += size;
 677                         if ((sig->call_convention == MONO_CALL_VARARG) && (i < sig->sentinelpos))
 678                                 m->sig_cookie += size;
 679                 }
 680                 curinst++;
 681         }
 682
 683         /* align the offset to 8 bytes */
 684         offset += 8 - 1;
 685         offset &= ~(8 - 1);
 686
 687         /* change sign? */
 688         m->stack_offset = offset;
 689
 690 }
 691
 692 /* Fixme: we need an alignment solution for enter_method and mono_arch_call_opcode,
 693  * currently alignment in mono_arch_call_opcode is computed without arch_get_argument_info
 694  */
 695
 696 /*
 697  * take the arguments and generate the arch-specific
 698  * instructions to properly call the function in call.
 699  * This includes pushing, moving arguments to the right register
 700  * etc.
 701  * Issue: who does the spilling if needed, and when?
 702  */
 703 MonoCallInst*
 704 mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
 705         MonoInst *arg, *in;
 706         MonoMethodSignature *sig;
 707         int i, n;
 708         CallInfo *cinfo;
 709         ArgInfo *ainfo;
 710
 711         sig = call->signature;
 712         n = sig->param_count + sig->hasthis;
 713
 714         cinfo = calculate_sizes (sig, sig->pinvoke);
 715         if (cinfo->struct_ret)
 716                 call->used_iregs |= 1 << cinfo->struct_ret;
 717
 718         for (i = 0; i < n; ++i) {
 719                 ainfo = cinfo->args + i;
 720                 if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
 721                         MonoInst *sig_arg;
 722                         cfg->disable_aot = TRUE;
 723
 724                         MONO_INST_NEW (cfg, sig_arg, OP_ICONST);
 725                         sig_arg->inst_p0 = call->signature;
 726
 727                         MONO_INST_NEW (cfg, arg, OP_OUTARG);
 728                         arg->inst_imm = cinfo->sig_cookie.offset;
 729                         arg->inst_left = sig_arg;
 730
 731                         /* prepend, so they get reversed */
 732                         arg->next = call->out_args;
 733                         call->out_args = arg;
 734                 }
 735                 if (is_virtual && i == 0) {
 736                         /* the argument will be attached to the call instrucion */
 737                         in = call->args [i];
 738                         call->used_iregs |= 1 << ainfo->reg;
 739                 } else {
 740                         MONO_INST_NEW (cfg, arg, OP_OUTARG);
 741                         in = call->args [i];
 742                         arg->cil_code = in->cil_code;
 743                         arg->inst_left = in;
 744                         arg->inst_right = (MonoInst*)call;
 745                         arg->type = in->type;
 746                         /* prepend, we'll need to reverse them later */
 747                         arg->next = call->out_args;
 748                         call->out_args = arg;
 749                         if (ainfo->regtype == RegTypeGeneral) {
 750                                 arg->unused = ainfo->reg;
 751                                 call->used_iregs |= 1 << ainfo->reg;
 752                                 if (arg->type == STACK_I8)
 753                                         call->used_iregs |= 1 << (ainfo->reg + 1);
 754                         } else if (ainfo->regtype == RegTypeStructByAddr) {
 755                                 /* FIXME: where si the data allocated? */
 756                                 arg->unused = ainfo->reg;
 757                                 call->used_iregs |= 1 << ainfo->reg;
 758                         } else if (ainfo->regtype == RegTypeStructByVal) {
 759                                 int cur_reg;
 760                                 /* mark the used regs */
 761                                 for (cur_reg = 0; cur_reg < ainfo->size; ++cur_reg) {
 762                                         call->used_iregs |= 1 << (ainfo->reg + cur_reg);
 763                                 }
 764                                 arg->opcode = OP_OUTARG_VT;
 765                                 arg->unused = ainfo->reg | (ainfo->size << 8) | (ainfo->vtsize << 16);
 766                                 arg->inst_imm = ainfo->offset;
 767                         } else if (ainfo->regtype == RegTypeBase) {
 768                                 arg->opcode = OP_OUTARG_MEMBASE;
 769                                 arg->unused = ainfo->reg | (ainfo->size << 8);
 770                                 arg->inst_imm = ainfo->offset;
 771                         } else if (ainfo->regtype == RegTypeFP) {
 772                                 arg->opcode = OP_OUTARG_R8;
 773                                 arg->unused = ainfo->reg;
 774                                 call->used_fregs |= 1 << ainfo->reg;
 775                                 if (ainfo->size == 4) {
 776                                         arg->opcode = OP_OUTARG_R8;
 777                                         /* we reduce the precision */
 778                                         /*MonoInst *conv;
 779                                         MONO_INST_NEW (cfg, conv, OP_FCONV_TO_R4);
 780                                         conv->inst_left = arg->inst_left;
 781                                         arg->inst_left = conv;*/
 782                                 }
 783                         } else {
 784                                 g_assert_not_reached ();
 785                         }
 786                 }
 787         }
 788         /*
 789          * Reverse the call->out_args list.
 790          */
 791         {
 792                 MonoInst *prev = NULL, *list = call->out_args, *next;
 793                 while (list) {
 794                         next = list->next;
 795                         list->next = prev;
 796                         prev = list;
 797                         list = next;
 798                 }
 799                 call->out_args = prev;
 800         }
 801         call->stack_usage = cinfo->stack_usage;
 802         cfg->param_area = MAX (cfg->param_area, cinfo->stack_usage);
 803         cfg->flags |= MONO_CFG_HAS_CALLS;
 804         /*
 805          * should set more info in call, such as the stack space
 806          * used by the args that needs to be added back to esp
 807          */
 808
 809         g_free (cinfo);
 810         return call;
 811 }
 812
 813 /*
 814  * Allow tracing to work with this interface (with an optional argument)
 815  */
 816
 817 void*
 818 mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
 819 {
 820         guchar *code = p;
 821
 822         code = mono_arm_emit_load_imm (code, ARMREG_R0, (guint32)cfg->method);
 823         ARM_MOV_REG_IMM8 (code, ARMREG_R1, 0); /* NULL ebp for now */
 824         code = mono_arm_emit_load_imm (code, ARMREG_R2, (guint32)func);
 825         ARM_MOV_REG_REG (code, ARMREG_LR, ARMREG_PC);
 826         ARM_MOV_REG_REG (code, ARMREG_PC, ARMREG_R2);
 827         return code;
 828 }
 829
 830 enum {
 831         SAVE_NONE,
 832         SAVE_STRUCT,
 833         SAVE_ONE,
 834         SAVE_TWO,
 835         SAVE_FP
 836 };
 837
 838 void*
 839 mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
 840 {
 841         guchar *code = p;
 842         int save_mode = SAVE_NONE;
 843         int offset;
 844         MonoMethod *method = cfg->method;
 845         int rtype = mono_type_get_underlying_type (mono_method_signature (method)->ret)->type;
 846         int save_offset = cfg->param_area;
 847         save_offset += 7;
 848         save_offset &= ~7;
 849
 850         offset = code - cfg->native_code;
 851         /* we need about 16 instructions */
 852         if (offset > (cfg->code_size - 16 * 4)) {
 853                 cfg->code_size *= 2;
 854                 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
 855                 code = cfg->native_code + offset;
 856         }
 857 handle_enum:
 858         switch (rtype) {
 859         case MONO_TYPE_VOID:
 860                 /* special case string .ctor icall */
 861                 if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
 862                         save_mode = SAVE_ONE;
 863                 else
 864                         save_mode = SAVE_NONE;
 865                 break;
 866         case MONO_TYPE_I8:
 867         case MONO_TYPE_U8:
 868                 save_mode = SAVE_TWO;
 869                 break;
 870         case MONO_TYPE_R4:
 871         case MONO_TYPE_R8:
 872                 save_mode = SAVE_FP;
 873                 break;
 874         case MONO_TYPE_VALUETYPE:
 875                 save_mode = SAVE_STRUCT;
 876                 break;
 877         default:
 878                 save_mode = SAVE_ONE;
 879                 break;
 880         }
 881
 882         switch (save_mode) {
 883         case SAVE_TWO:
 884                 ARM_STR_IMM (code, ARMREG_R0, cfg->frame_reg, save_offset);
 885                 ARM_STR_IMM (code, ARMREG_R1, cfg->frame_reg, save_offset + 4);
 886                 if (enable_arguments) {
 887                         ARM_MOV_REG_REG (code, ARMREG_R2, ARMREG_R1);
 888                         ARM_MOV_REG_REG (code, ARMREG_R1, ARMREG_R0);
 889                 }
 890                 break;
 891         case SAVE_ONE:
 892                 ARM_STR_IMM (code, ARMREG_R0, cfg->frame_reg, save_offset);
 893                 if (enable_arguments) {
 894                         ARM_MOV_REG_REG (code, ARMREG_R1, ARMREG_R0);
 895                 }
 896                 break;
 897         case SAVE_FP:
 898                 /* FIXME: what reg?  */
 899                 if (enable_arguments) {
 900                         /* FIXME: what reg?  */
 901                 }
 902                 break;
 903         case SAVE_STRUCT:
 904                 if (enable_arguments) {
 905                         /* FIXME: get the actual address  */
 906                         ARM_MOV_REG_REG (code, ARMREG_R1, ARMREG_R0);
 907                 }
 908                 break;
 909         case SAVE_NONE:
 910         default:
 911                 break;
 912         }
 913
 914         code = mono_arm_emit_load_imm (code, ARMREG_R0, (guint32)cfg->method);
 915         code = mono_arm_emit_load_imm (code, ARMREG_IP, (guint32)func);
 916         ARM_MOV_REG_REG (code, ARMREG_LR, ARMREG_PC);
 917         ARM_MOV_REG_REG (code, ARMREG_PC, ARMREG_IP);
 918
 919         switch (save_mode) {
 920         case SAVE_TWO:
 921                 ARM_LDR_IMM (code, ARMREG_R0, cfg->frame_reg, save_offset);
 922                 ARM_LDR_IMM (code, ARMREG_R1, cfg->frame_reg, save_offset + 4);
 923                 break;
 924         case SAVE_ONE:
 925                 ARM_LDR_IMM (code, ARMREG_R0, cfg->frame_reg, save_offset);
 926                 break;
 927         case SAVE_FP:
 928                 /* FIXME */
 929                 break;
 930         case SAVE_NONE:
 931         default:
 932                 break;
 933         }
 934
 935         return code;
 936 }
 937
 938 /*
 939  * The immediate field for cond branches is big enough for all reasonable methods
 940  */
 941 #define EMIT_COND_BRANCH_FLAGS(ins,condcode) \
 942 if (ins->flags & MONO_INST_BRLABEL) { \
 943         if (0 && ins->inst_i0->inst_c0) { \
 944                 ARM_B_COND (code, (condcode), (code - cfg->native_code + ins->inst_i0->inst_c0) & 0xffffff);    \
 945         } else { \
 946                 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
 947                 ARM_B_COND (code, (condcode), 0);       \
 948         } \
 949 } else { \
 950         if (0 && ins->inst_true_bb->native_offset) { \
 951                 ARM_B_COND (code, (condcode), (code - cfg->native_code + ins->inst_true_bb->native_offset) & 0xffffff); \
 952         } else { \
 953                 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
 954                 ARM_B_COND (code, (condcode), 0);       \
 955         } \
 956 }
 957
 958 #define EMIT_COND_BRANCH(ins,cond) EMIT_COND_BRANCH_FLAGS(ins, branch_cc_table [(cond)])
 959
 960 /* emit an exception if condition is fail
 961  *
 962  * We assign the extra code used to throw the implicit exceptions
 963  * to cfg->bb_exit as far as the big branch handling is concerned
 964  */
 965 #define EMIT_COND_SYSTEM_EXCEPTION_FLAGS(condcode,exc_name)            \
 966         do {                                                        \
 967                 mono_add_patch_info (cfg, code - cfg->native_code,   \
 968                                     MONO_PATCH_INFO_EXC, exc_name);  \
 969                 ARM_BL_COND (code, (condcode), 0);      \
 970         } while (0);
 971
 972 #define EMIT_COND_SYSTEM_EXCEPTION(cond,exc_name) EMIT_COND_SYSTEM_EXCEPTION_FLAGS(branch_cc_table [(cond)], (exc_name))
 973
 974 static void
 975 peephole_pass (MonoCompile *cfg, MonoBasicBlock *bb)
 976 {
 977         MonoInst *ins, *last_ins = NULL;
 978         ins = bb->code;
 979
 980         while (ins) {
 981
 982                 switch (ins->opcode) {
 983                 case OP_MUL_IMM:
 984                         /* remove unnecessary multiplication with 1 */
 985                         if (ins->inst_imm == 1) {
 986                                 if (ins->dreg != ins->sreg1) {
 987                                         ins->opcode = OP_MOVE;
 988                                 } else {
 989                                         last_ins->next = ins->next;
 990                                         ins = ins->next;
 991                                         continue;
 992                                 }
 993                         } else {
 994                                 int power2 = mono_is_power_of_two (ins->inst_imm);
 995                                 if (power2 > 0) {
 996                                         ins->opcode = OP_SHL_IMM;
 997                                         ins->inst_imm = power2;
 998                                 }
 999                         }
1000                         break;
1001                 case OP_LOAD_MEMBASE:
1002                 case OP_LOADI4_MEMBASE:
1003                         /*
1004                          * OP_STORE_MEMBASE_REG reg, offset(basereg)
1005                          * OP_LOAD_MEMBASE offset(basereg), reg
1006                          */
1007                         if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_REG
1008                                          || last_ins->opcode == OP_STORE_MEMBASE_REG) &&
1009                             ins->inst_basereg == last_ins->inst_destbasereg &&
1010                             ins->inst_offset == last_ins->inst_offset) {
1011                                 if (ins->dreg == last_ins->sreg1) {
1012                                         last_ins->next = ins->next;
1013                                         ins = ins->next;
1014                                         continue;
1015                                 } else {
1016                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1017                                         ins->opcode = OP_MOVE;
1018                                         ins->sreg1 = last_ins->sreg1;
1019                                 }
1020
1021                         /*
1022                          * Note: reg1 must be different from the basereg in the second load
1023                          * OP_LOAD_MEMBASE offset(basereg), reg1
1024                          * OP_LOAD_MEMBASE offset(basereg), reg2
1025                          * -->
1026                          * OP_LOAD_MEMBASE offset(basereg), reg1
1027                          * OP_MOVE reg1, reg2
1028                          */
1029                         } if (last_ins && (last_ins->opcode == OP_LOADI4_MEMBASE
1030                                            || last_ins->opcode == OP_LOAD_MEMBASE) &&
1031                               ins->inst_basereg != last_ins->dreg &&
1032                               ins->inst_basereg == last_ins->inst_basereg &&
1033                               ins->inst_offset == last_ins->inst_offset) {
1034
1035                                 if (ins->dreg == last_ins->dreg) {
1036                                         last_ins->next = ins->next;
1037                                         ins = ins->next;
1038                                         continue;
1039                                 } else {
1040                                         ins->opcode = OP_MOVE;
1041                                         ins->sreg1 = last_ins->dreg;
1042                                 }
1043
1044                                 //g_assert_not_reached ();
1045
1046 #if 0
1047                         /*
1048                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1049                          * OP_LOAD_MEMBASE offset(basereg), reg
1050                          * -->
1051                          * OP_STORE_MEMBASE_IMM imm, offset(basereg)
1052                          * OP_ICONST reg, imm
1053                          */
1054                         } else if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM
1055                                                 || last_ins->opcode == OP_STORE_MEMBASE_IMM) &&
1056                                    ins->inst_basereg == last_ins->inst_destbasereg &&
1057                                    ins->inst_offset == last_ins->inst_offset) {
1058                                 //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1059                                 ins->opcode = OP_ICONST;
1060                                 ins->inst_c0 = last_ins->inst_imm;
1061                                 g_assert_not_reached (); // check this rule
1062 #endif
1063                         }
1064                         break;
1065                 case OP_LOADU1_MEMBASE:
1066                 case OP_LOADI1_MEMBASE:
1067                         if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
1068                                         ins->inst_basereg == last_ins->inst_destbasereg &&
1069                                         ins->inst_offset == last_ins->inst_offset) {
1070                                 if (ins->dreg == last_ins->sreg1) {
1071                                         last_ins->next = ins->next;
1072                                         ins = ins->next;
1073                                         continue;
1074                                 } else {
1075                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1076                                         ins->opcode = OP_MOVE;
1077                                         ins->sreg1 = last_ins->sreg1;
1078                                 }
1079                         }
1080                         break;
1081                 case OP_LOADU2_MEMBASE:
1082                 case OP_LOADI2_MEMBASE:
1083                         if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
1084                                         ins->inst_basereg == last_ins->inst_destbasereg &&
1085                                         ins->inst_offset == last_ins->inst_offset) {
1086                                 if (ins->dreg == last_ins->sreg1) {
1087                                         last_ins->next = ins->next;
1088                                         ins = ins->next;
1089                                         continue;
1090                                 } else {
1091                                         //static int c = 0; printf ("MATCHX %s %d\n", cfg->method->name,c++);
1092                                         ins->opcode = OP_MOVE;
1093                                         ins->sreg1 = last_ins->sreg1;
1094                                 }
1095                         }
1096                         break;
1097                 case CEE_CONV_I4:
1098                 case CEE_CONV_U4:
1099                 case OP_MOVE:
1100                 case OP_SETREG:
1101                         ins->opcode = OP_MOVE;
1102                         /*
1103                          * OP_MOVE reg, reg
1104                          */
1105                         if (ins->dreg == ins->sreg1) {
1106                                 if (last_ins)
1107                                         last_ins->next = ins->next;
1108                                 ins = ins->next;
1109                                 continue;
1110                         }
1111                         /*
1112                          * OP_MOVE sreg, dreg
1113                          * OP_MOVE dreg, sreg
1114                          */
1115                         if (last_ins && last_ins->opcode == OP_MOVE &&
1116                             ins->sreg1 == last_ins->dreg &&
1117                             ins->dreg == last_ins->sreg1) {
1118                                 last_ins->next = ins->next;
1119                                 ins = ins->next;
1120                                 continue;
1121                         }
1122                         break;
1123                 }
1124                 last_ins = ins;
1125                 ins = ins->next;
1126         }
1127         bb->last_ins = last_ins;
1128 }
1129
1130 /*
1131  * the branch_cc_table should maintain the order of these
1132  * opcodes.
1133 case CEE_BEQ:
1134 case CEE_BGE:
1135 case CEE_BGT:
1136 case CEE_BLE:
1137 case CEE_BLT:
1138 case CEE_BNE_UN:
1139 case CEE_BGE_UN:
1140 case CEE_BGT_UN:
1141 case CEE_BLE_UN:
1142 case CEE_BLT_UN:
1143  */
1144 static const guchar
1145 branch_cc_table [] = {
1146         ARMCOND_EQ,
1147         ARMCOND_GE,
1148         ARMCOND_GT,
1149         ARMCOND_LE,
1150         ARMCOND_LT,
1151
1152         ARMCOND_NE,
1153         ARMCOND_HS,
1154         ARMCOND_HI,
1155         ARMCOND_LS,
1156         ARMCOND_LO
1157 };
1158
1159
1160 static void
1161 insert_after_ins (MonoBasicBlock *bb, MonoInst *ins, MonoInst *to_insert)
1162 {
1163         if (ins == NULL) {
1164                 ins = bb->code;
1165                 bb->code = to_insert;
1166                 to_insert->next = ins;
1167         } else {
1168                 to_insert->next = ins->next;
1169                 ins->next = to_insert;
1170         }
1171 }
1172
1173 #define NEW_INS(cfg,dest,op) do {       \
1174                 (dest) = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst));       \
1175                 (dest)->opcode = (op);  \
1176                 insert_after_ins (bb, last_ins, (dest)); \
1177         } while (0)
1178
1179 static int
1180 map_to_reg_reg_op (int op)
1181 {
1182         switch (op) {
1183         case OP_ADD_IMM:
1184                 return CEE_ADD;
1185         case OP_SUB_IMM:
1186                 return CEE_SUB;
1187         case OP_AND_IMM:
1188                 return CEE_AND;
1189         case OP_COMPARE_IMM:
1190                 return OP_COMPARE;
1191         case OP_ADDCC_IMM:
1192                 return OP_ADDCC;
1193         case OP_ADC_IMM:
1194                 return OP_ADC;
1195         case OP_SUBCC_IMM:
1196                 return OP_SUBCC;
1197         case OP_SBB_IMM:
1198                 return OP_SBB;
1199         case OP_OR_IMM:
1200                 return CEE_OR;
1201         case OP_XOR_IMM:
1202                 return CEE_XOR;
1203         }
1204         g_assert_not_reached ();
1205 }
1206
1207 /*
1208  * Remove from the instruction list the instructions that can't be
1209  * represented with very simple instructions with no register
1210  * requirements.
1211  */
1212 static void
1213 mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb)
1214 {
1215         MonoInst *ins, *next, *temp, *last_ins = NULL;
1216         int rot_amount, imm8;
1217
1218         /* setup the virtual reg allocator */
1219         if (bb->max_ireg > cfg->rs->next_vireg)
1220                 cfg->rs->next_vireg = bb->max_ireg;
1221
1222         ins = bb->code;
1223         while (ins) {
1224                 switch (ins->opcode) {
1225                 case OP_ADD_IMM:
1226                 case OP_SUB_IMM:
1227                 case OP_AND_IMM:
1228                 case OP_COMPARE_IMM:
1229                 case OP_ADDCC_IMM:
1230                 case OP_ADC_IMM:
1231                 case OP_SUBCC_IMM:
1232                 case OP_SBB_IMM:
1233                 case OP_OR_IMM:
1234                 case OP_XOR_IMM:
1235                         if ((imm8 = mono_arm_is_rotated_imm8 (ins->inst_imm, &rot_amount)) < 0) {
1236                                 NEW_INS (cfg, temp, OP_ICONST);
1237                                 temp->inst_c0 = ins->inst_imm;
1238                                 temp->dreg = mono_regstate_next_int (cfg->rs);
1239                                 ins->sreg2 = temp->dreg;
1240                                 ins->opcode = map_to_reg_reg_op (ins->opcode);
1241                         }
1242                         break;
1243                 case OP_MUL_IMM:
1244                         NEW_INS (cfg, temp, OP_ICONST);
1245                         temp->inst_c0 = ins->inst_imm;
1246                         temp->dreg = mono_regstate_next_int (cfg->rs);
1247                         ins->sreg2 = temp->dreg;
1248                         ins->opcode = CEE_MUL;
1249                         break;
1250                 }
1251                 last_ins = ins;
1252                 ins = ins->next;
1253         }
1254         bb->last_ins = last_ins;
1255         bb->max_ireg = cfg->rs->next_vireg;
1256
1257 }
1258
1259 void
1260 mono_arch_local_regalloc (MonoCompile *cfg, MonoBasicBlock *bb)
1261 {
1262         if (!bb->code)
1263                 return;
1264         mono_arch_lowering_pass (cfg, bb);
1265         mono_local_regalloc (cfg, bb);
1266 }
1267
1268 static guchar*
1269 emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int sreg, int size, gboolean is_signed)
1270 {
1271         /* sreg is a float, dreg is an integer reg  */
1272         ARM_FIXZ (code, dreg, sreg);
1273         if (!is_signed) {
1274                 if (size == 1)
1275                         ARM_AND_REG_IMM8 (code, dreg, dreg, 0xff);
1276                 else if (size == 2) {
1277                         ARM_SHL_IMM (code, dreg, dreg, 16);
1278                         ARM_SHR_IMM (code, dreg, dreg, 16);
1279                 }
1280         } else {
1281                 if (size == 1) {
1282                         ARM_SHL_IMM (code, dreg, dreg, 24);
1283                         ARM_SAR_IMM (code, dreg, dreg, 24);
1284                 } else if (size == 2) {
1285                         ARM_SHL_IMM (code, dreg, dreg, 16);
1286                         ARM_SAR_IMM (code, dreg, dreg, 16);
1287                 }
1288         }
1289         return code;
1290 }
1291
1292 typedef struct {
1293         guchar *code;
1294         guchar *target;
1295         int absolute;
1296         int found;
1297 } PatchData;
1298
1299 #define is_call_imm(diff) ((gint)(diff) >= -33554432 && (gint)(diff) <= 33554431)
1300
1301 static int
1302 search_thunk_slot (void *data, int csize, int bsize, void *user_data) {
1303         PatchData *pdata = (PatchData*)user_data;
1304         guchar *code = data;
1305         guint32 *thunks = data;
1306         guint32 *endthunks = (guint32*)(code + bsize);
1307         int i, count = 0;
1308         int difflow, diffhigh;
1309
1310         /* always ensure a call from pdata->code can reach to the thunks without further thunks */
1311         difflow = (char*)pdata->code - (char*)thunks;
1312         diffhigh = (char*)pdata->code - (char*)endthunks;
1313         if (!((is_call_imm (thunks) && is_call_imm (endthunks)) || (is_call_imm (difflow) && is_call_imm (diffhigh))))
1314                 return 0;
1315
1316         /*
1317          * The thunk is composed of 3 words:
1318          * load constant from thunks [2] into ARM_IP
1319          * bx to ARM_IP
1320          * address constant
1321          * Note that the LR register is already setup
1322          */
1323         //g_print ("thunk nentries: %d\n", ((char*)endthunks - (char*)thunks)/16);
1324         if ((pdata->found == 2) || (pdata->code >= code && pdata->code <= code + csize)) {
1325                 while (thunks < endthunks) {
1326                         //g_print ("looking for target: %p at %p (%08x-%08x)\n", pdata->target, thunks, thunks [0], thunks [1]);
1327                         if (thunks [2] == (guint32)pdata->target) {
1328                                 arm_patch (pdata->code, (guchar*)thunks);
1329                                 mono_arch_flush_icache (pdata->code, 4);
1330                                 pdata->found = 1;
1331                                 return 1;
1332                         } else if ((thunks [0] == 0) && (thunks [1] == 0) && (thunks [2] == 0)) {
1333                                 /* found a free slot instead: emit thunk */
1334                                 code = (guchar*)thunks;
1335                                 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 0);
1336                                 ARM_MOV_REG_REG (code, ARMREG_PC, ARMREG_IP);
1337                                 thunks [2] = (guint32)pdata->target;
1338                                 mono_arch_flush_icache ((guchar*)thunks, 12);
1339
1340                                 arm_patch (pdata->code, (guchar*)thunks);
1341                                 mono_arch_flush_icache (pdata->code, 4);
1342                                 pdata->found = 1;
1343                                 return 1;
1344                         }
1345                         /* skip 12 bytes, the size of the thunk */
1346                         thunks += 3;
1347                         count++;
1348                 }
1349                 //g_print ("failed thunk lookup for %p from %p at %p (%d entries)\n", pdata->target, pdata->code, data, count);
1350         }
1351         return 0;
1352 }
1353
1354 static void
1355 handle_thunk (int absolute, guchar *code, guchar *target) {
1356         MonoDomain *domain = mono_domain_get ();
1357         PatchData pdata;
1358
1359         pdata.code = code;
1360         pdata.target = target;
1361         pdata.absolute = absolute;
1362         pdata.found = 0;
1363
1364         mono_domain_lock (domain);
1365         mono_code_manager_foreach (domain->code_mp, search_thunk_slot, &pdata);
1366
1367         if (!pdata.found) {
1368                 /* this uses the first available slot */
1369                 pdata.found = 2;
1370                 mono_code_manager_foreach (domain->code_mp, search_thunk_slot, &pdata);
1371         }
1372         mono_domain_unlock (domain);
1373
1374         if (pdata.found != 1)
1375                 g_print ("thunk failed for %p from %p\n", target, code);
1376         g_assert (pdata.found == 1);
1377 }
1378
1379 void
1380 arm_patch (guchar *code, guchar *target)
1381 {
1382         guint32 ins = *(guint32*)code;
1383         guint32 prim = (ins >> 25) & 7;
1384         guint32 ovf;
1385
1386         //g_print ("patching 0x%08x (0x%08x) to point to 0x%08x\n", code, ins, target);
1387         if (prim == 5) { /* 101b */
1388                 /* the diff starts 8 bytes from the branch opcode */
1389                 gint diff = target - code - 8;
1390                 if (diff >= 0) {
1391                         if (diff <= 33554431) {
1392                                 diff >>= 2;
1393                                 ins = (ins & 0xff000000) | diff;
1394                                 *(guint32*)code = ins;
1395                                 return;
1396                         }
1397                 } else {
1398                         /* diff between 0 and -33554432 */
1399                         if (diff >= -33554432) {
1400                                 diff >>= 2;
1401                                 ins = (ins & 0xff000000) | (diff & ~0xff000000);
1402                                 *(guint32*)code = ins;
1403                                 return;
1404                         }
1405                 }
1406
1407                 handle_thunk (TRUE, code, target);
1408                 return;
1409         }
1410
1411
1412         if ((ins & 0x0ffffff0) == 0x12fff10) {
1413                 /* branch and exchange: the address is constructed in a reg */
1414                 g_assert_not_reached ();
1415         } else {
1416                 g_assert_not_reached ();
1417         }
1418 //      g_print ("patched with 0x%08x\n", ins);
1419 }
1420
1421 /*
1422  * Return the >= 0 uimm8 value if val can be represented with a byte + rotation
1423  * (with the rotation amount in *rot_amount. rot_amount is already adjusted
1424  * to be used with the emit macros.
1425  * Return -1 otherwise.
1426  */
1427 int
1428 mono_arm_is_rotated_imm8 (guint32 val, gint *rot_amount)
1429 {
1430         guint32 res, i;
1431         for (i = 0; i < 31; i+= 2) {
1432                 res = (val << (32 - i)) | (val >> i);
1433                 if (res & ~0xff)
1434                         continue;
1435                 *rot_amount = i? 32 - i: 0;
1436                 return res;
1437         }
1438         return -1;
1439 }
1440
1441 /*
1442  * Emits in code a sequence of instructions that load the value 'val'
1443  * into the dreg register. Uses at most 4 instructions.
1444  */
1445 guint8*
1446 mono_arm_emit_load_imm (guint8 *code, int dreg, guint32 val)
1447 {
1448         int imm8, rot_amount;
1449         if ((imm8 = mono_arm_is_rotated_imm8 (val, &rot_amount)) >= 0) {
1450                 ARM_MOV_REG_IMM (code, dreg, imm8, rot_amount);
1451         } else if ((imm8 = mono_arm_is_rotated_imm8 (~val, &rot_amount)) >= 0) {
1452                 ARM_MVN_REG_IMM (code, dreg, imm8, rot_amount);
1453         } else {
1454                 if (val & 0xFF) {
1455                         ARM_MOV_REG_IMM8 (code, dreg, (val & 0xFF));
1456                         if (val & 0xFF00) {
1457                                 ARM_ADD_REG_IMM (code, dreg, dreg, (val & 0xFF00) >> 8, 24);
1458                         }
1459                         if (val & 0xFF0000) {
1460                                 ARM_ADD_REG_IMM (code, dreg, dreg, (val & 0xFF0000) >> 16, 16);
1461                         }
1462                         if (val & 0xFF000000) {
1463                                 ARM_ADD_REG_IMM (code, dreg, dreg, (val & 0xFF000000) >> 24, 8);
1464                         }
1465                 } else if (val & 0xFF00) {
1466                         ARM_MOV_REG_IMM (code, dreg, (val & 0xFF00) >> 8, 24);
1467                         if (val & 0xFF0000) {
1468                                 ARM_ADD_REG_IMM (code, dreg, dreg, (val & 0xFF0000) >> 16, 16);
1469                         }
1470                         if (val & 0xFF000000) {
1471                                 ARM_ADD_REG_IMM (code, dreg, dreg, (val & 0xFF000000) >> 24, 8);
1472                         }
1473                 } else if (val & 0xFF0000) {
1474                         ARM_MOV_REG_IMM (code, dreg, (val & 0xFF0000) >> 16, 16);
1475                         if (val & 0xFF000000) {
1476                                 ARM_ADD_REG_IMM (code, dreg, dreg, (val & 0xFF000000) >> 24, 8);
1477                         }
1478                 }
1479                 //g_assert_not_reached ();
1480         }
1481         return code;
1482 }
1483
1484 void
1485 mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
1486 {
1487         MonoInst *ins;
1488         MonoCallInst *call;
1489         guint offset;
1490         guint8 *code = cfg->native_code + cfg->code_len;
1491         MonoInst *last_ins = NULL;
1492         guint last_offset = 0;
1493         int max_len, cpos;
1494         int imm8, rot_amount;
1495
1496         if (cfg->opt & MONO_OPT_PEEPHOLE)
1497                 peephole_pass (cfg, bb);
1498
1499         /* we don't align basic blocks of loops on arm */
1500
1501         if (cfg->verbose_level > 2)
1502                 g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
1503
1504         cpos = bb->max_offset;
1505
1506         if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
1507                 //MonoCoverageInfo *cov = mono_get_coverage_info (cfg->method);
1508                 //g_assert (!mono_compile_aot);
1509                 //cpos += 6;
1510                 //if (bb->cil_code)
1511                 //      cov->data [bb->dfn].iloffset = bb->cil_code - cfg->cil_code;
1512                 /* this is not thread save, but good enough */
1513                 /* fixme: howto handle overflows? */
1514                 //x86_inc_mem (code, &cov->data [bb->dfn].count);
1515         }
1516
1517         ins = bb->code;
1518         while (ins) {
1519                 offset = code - cfg->native_code;
1520
1521                 max_len = ((guint8 *)arm_cpu_desc [ins->opcode])[MONO_INST_LEN];
1522
1523                 if (offset > (cfg->code_size - max_len - 16)) {
1524                         cfg->code_size *= 2;
1525                         cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
1526                         code = cfg->native_code + offset;
1527                 }
1528         //      if (ins->cil_code)
1529         //              g_print ("cil code\n");
1530                 mono_debug_record_line_number (cfg, ins, offset);
1531
1532                 switch (ins->opcode) {
1533                 case OP_TLS_GET:
1534                         g_assert_not_reached ();
1535                         break;
1536                 /*case OP_BIGMUL:
1537                         ppc_mullw (code, ppc_r4, ins->sreg1, ins->sreg2);
1538                         ppc_mulhw (code, ppc_r3, ins->sreg1, ins->sreg2);
1539                         break;
1540                 case OP_BIGMUL_UN:
1541                         ppc_mullw (code, ppc_r4, ins->sreg1, ins->sreg2);
1542                         ppc_mulhwu (code, ppc_r3, ins->sreg1, ins->sreg2);
1543                         break;*/
1544                 case OP_STOREI1_MEMBASE_IMM:
1545                         code = mono_arm_emit_load_imm (code, ARMREG_LR, ins->inst_imm & 0xFF);
1546                         g_assert (arm_is_imm12 (ins->inst_offset));
1547                         ARM_STRB_IMM (code, ARMREG_LR, ins->inst_destbasereg, ins->inst_offset);
1548                         break;
1549                 case OP_STOREI2_MEMBASE_IMM:
1550                         code = mono_arm_emit_load_imm (code, ARMREG_LR, ins->inst_imm & 0xFFFF);
1551                         g_assert (arm_is_imm8 (ins->inst_offset));
1552                         ARM_STRH_IMM (code, ARMREG_LR, ins->inst_destbasereg, ins->inst_offset);
1553                         break;
1554                 case OP_STORE_MEMBASE_IMM:
1555                 case OP_STOREI4_MEMBASE_IMM:
1556                         code = mono_arm_emit_load_imm (code, ARMREG_LR, ins->inst_imm);
1557                         g_assert (arm_is_imm12 (ins->inst_offset));
1558                         ARM_STR_IMM (code, ARMREG_LR, ins->inst_destbasereg, ins->inst_offset);
1559                         break;
1560                 case OP_STOREI1_MEMBASE_REG:
1561                         g_assert (arm_is_imm12 (ins->inst_offset));
1562                         ARM_STRB_IMM (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
1563                         break;
1564                 case OP_STOREI2_MEMBASE_REG:
1565                         g_assert (arm_is_imm8 (ins->inst_offset));
1566                         ARM_STRH_IMM (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
1567                         break;
1568                 case OP_STORE_MEMBASE_REG:
1569                 case OP_STOREI4_MEMBASE_REG:
1570                         g_assert (arm_is_imm12 (ins->inst_offset));
1571                         ARM_STR_IMM (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
1572                         break;
1573                 case CEE_LDIND_I:
1574                 case CEE_LDIND_I4:
1575                 case CEE_LDIND_U4:
1576                         g_assert_not_reached ();
1577                         break;
1578                 case OP_LOADU4_MEM:
1579                         g_assert_not_reached ();
1580                         break;
1581                 case OP_LOAD_MEMBASE:
1582                 case OP_LOADI4_MEMBASE:
1583                 case OP_LOADU4_MEMBASE:
1584                         g_assert (arm_is_imm12 (ins->inst_offset));
1585                         ARM_LDR_IMM (code, ins->dreg, ins->inst_basereg, ins->inst_offset);
1586                         break;
1587                 case OP_LOADI1_MEMBASE:
1588                         g_assert (arm_is_imm8 (ins->inst_offset));
1589                         ARM_LDRSB_IMM (code, ins->dreg, ins->inst_basereg, ins->inst_offset);
1590                         break;
1591                 case OP_LOADU1_MEMBASE:
1592                         g_assert (arm_is_imm12 (ins->inst_offset));
1593                         ARM_LDRB_IMM (code, ins->dreg, ins->inst_basereg, ins->inst_offset);
1594                         break;
1595                 case OP_LOADU2_MEMBASE:
1596                         g_assert (arm_is_imm8 (ins->inst_offset));
1597                         ARM_LDRH_IMM (code, ins->dreg, ins->inst_basereg, ins->inst_offset);
1598                         break;
1599                 case OP_LOADI2_MEMBASE:
1600                         g_assert (arm_is_imm8 (ins->inst_offset));
1601                         ARM_LDRSH_IMM (code, ins->dreg, ins->inst_basereg, ins->inst_offset);
1602                         break;
1603                 case CEE_CONV_I1:
1604                         ARM_SHL_IMM (code, ins->dreg, ins->sreg1, 24);
1605                         ARM_SAR_IMM (code, ins->dreg, ins->dreg, 24);
1606                         break;
1607                 case CEE_CONV_I2:
1608                         ARM_SHL_IMM (code, ins->dreg, ins->sreg1, 16);
1609                         ARM_SAR_IMM (code, ins->dreg, ins->dreg, 16);
1610                         break;
1611                 case CEE_CONV_U1:
1612                         ARM_AND_REG_IMM8 (code, ins->dreg, ins->sreg1, 0xff);
1613                         break;
1614                 case CEE_CONV_U2:
1615                         ARM_SHL_IMM (code, ins->dreg, ins->sreg1, 16);
1616                         ARM_SHR_IMM (code, ins->dreg, ins->dreg, 16);
1617                         break;
1618                 case OP_COMPARE:
1619                         ARM_CMP_REG_REG (code, ins->sreg1, ins->sreg2);
1620                         break;
1621                 case OP_COMPARE_IMM:
1622                         imm8 = mono_arm_is_rotated_imm8 (ins->inst_imm, &rot_amount);
1623                         g_assert (imm8 >= 0);
1624                         ARM_CMP_REG_IMM (code, ins->sreg1, imm8, rot_amount);
1625                         break;
1626                 case OP_X86_TEST_NULL:
1627                         g_assert_not_reached ();
1628                         break;
1629                 case CEE_BREAK:
1630                         ARM_DBRK (code);
1631                         break;
1632                 case OP_ADDCC:
1633                         ARM_ADDS_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1634                         break;
1635                 case CEE_ADD:
1636                         ARM_ADD_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1637                         break;
1638                 case OP_ADC:
1639                         ARM_ADCS_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1640                         break;
1641                 case OP_ADDCC_IMM:
1642                         imm8 = mono_arm_is_rotated_imm8 (ins->inst_imm, &rot_amount);
1643                         g_assert (imm8 >= 0);
1644                         ARM_ADDS_REG_IMM (code, ins->dreg, ins->sreg1, imm8, rot_amount);
1645                         break;
1646                 case OP_ADD_IMM:
1647                         imm8 = mono_arm_is_rotated_imm8 (ins->inst_imm, &rot_amount);
1648                         g_assert (imm8 >= 0);
1649                         ARM_ADD_REG_IMM (code, ins->dreg, ins->sreg1, imm8, rot_amount);
1650                         break;
1651                 case OP_ADC_IMM:
1652                         imm8 = mono_arm_is_rotated_imm8 (ins->inst_imm, &rot_amount);
1653                         g_assert (imm8 >= 0);
1654                         ARM_ADCS_REG_IMM (code, ins->dreg, ins->sreg1, imm8, rot_amount);
1655                         break;
1656                 case CEE_ADD_OVF:
1657                         ARM_ADD_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1658                         //EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
1659                         break;
1660                 case CEE_ADD_OVF_UN:
1661                         ARM_ADD_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1662                         //EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
1663                         break;
1664                 case CEE_SUB_OVF:
1665                         ARM_SUB_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1666                         //EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
1667                         break;
1668                 case CEE_SUB_OVF_UN:
1669                         ARM_SUB_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1670                         //EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_TRUE, PPC_BR_EQ, "OverflowException");
1671                         break;
1672                 case OP_ADD_OVF_CARRY:
1673                         ARM_ADCS_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1674                         //EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
1675                         break;
1676                 case OP_ADD_OVF_UN_CARRY:
1677                         ARM_ADCS_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1678                         //EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
1679                         break;
1680                 case OP_SUB_OVF_CARRY:
1681                         ARM_SBCS_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1682                         //EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_FALSE, PPC_BR_EQ, "OverflowException");
1683                         break;
1684                 case OP_SUB_OVF_UN_CARRY:
1685                         ARM_SBCS_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1686                         //EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_TRUE, PPC_BR_EQ, "OverflowException");
1687                         break;
1688                 case OP_SUBCC:
1689                         ARM_SUBS_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1690                         break;
1691                 case OP_SUBCC_IMM:
1692                         imm8 = mono_arm_is_rotated_imm8 (ins->inst_imm, &rot_amount);
1693                         g_assert (imm8 >= 0);
1694                         ARM_SUBS_REG_IMM (code, ins->dreg, ins->sreg1, imm8, rot_amount);
1695                         break;
1696                 case CEE_SUB:
1697                         ARM_SUB_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1698                         break;
1699                 case OP_SBB:
1700                         ARM_SBCS_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1701                         break;
1702                 case OP_SUB_IMM:
1703                         imm8 = mono_arm_is_rotated_imm8 (ins->inst_imm, &rot_amount);
1704                         g_assert (imm8 >= 0);
1705                         ARM_SUB_REG_IMM (code, ins->dreg, ins->sreg1, imm8, rot_amount);
1706                         break;
1707                 case OP_SBB_IMM:
1708                         imm8 = mono_arm_is_rotated_imm8 (ins->inst_imm, &rot_amount);
1709                         g_assert (imm8 >= 0);
1710                         ARM_SBCS_REG_IMM (code, ins->dreg, ins->sreg1, imm8, rot_amount);
1711                         break;
1712                 case OP_ARM_RSBS_IMM:
1713                         imm8 = mono_arm_is_rotated_imm8 (ins->inst_imm, &rot_amount);
1714                         g_assert (imm8 >= 0);
1715                         ARM_RSBS_REG_IMM (code, ins->dreg, ins->sreg1, imm8, rot_amount);
1716                         break;
1717                 case OP_ARM_RSC_IMM:
1718                         imm8 = mono_arm_is_rotated_imm8 (ins->inst_imm, &rot_amount);
1719                         g_assert (imm8 >= 0);
1720                         ARM_RSC_REG_IMM (code, ins->dreg, ins->sreg1, imm8, rot_amount);
1721                         break;
1722                 case CEE_AND:
1723                         ARM_AND_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1724                         break;
1725                 case OP_AND_IMM:
1726                         imm8 = mono_arm_is_rotated_imm8 (ins->inst_imm, &rot_amount);
1727                         g_assert (imm8 >= 0);
1728                         ARM_AND_REG_IMM (code, ins->dreg, ins->sreg1, imm8, rot_amount);
1729                         break;
1730                 case CEE_DIV:
1731                 case CEE_DIV_UN:
1732                 case OP_DIV_IMM:
1733                 case CEE_REM:
1734                 case CEE_REM_UN:
1735                 case OP_REM_IMM:
1736                         /* crappy ARM arch doesn't have a DIV instruction */
1737                         g_assert_not_reached ();
1738                 case CEE_OR:
1739                         ARM_ORR_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1740                         break;
1741                 case OP_OR_IMM:
1742                         imm8 = mono_arm_is_rotated_imm8 (ins->inst_imm, &rot_amount);
1743                         g_assert (imm8 >= 0);
1744                         ARM_ORR_REG_IMM (code, ins->dreg, ins->sreg1, imm8, rot_amount);
1745                         break;
1746                 case CEE_XOR:
1747                         ARM_EOR_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1748                         break;
1749                 case OP_XOR_IMM:
1750                         imm8 = mono_arm_is_rotated_imm8 (ins->inst_imm, &rot_amount);
1751                         g_assert (imm8 >= 0);
1752                         ARM_EOR_REG_IMM (code, ins->dreg, ins->sreg1, imm8, rot_amount);
1753                         break;
1754                 case CEE_SHL:
1755                         ARM_SHL_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1756                         break;
1757                 case OP_SHL_IMM:
1758                         ARM_SHL_IMM (code, ins->dreg, ins->sreg1, (ins->inst_imm & 0x1f));
1759                         break;
1760                 case CEE_SHR:
1761                         ARM_SAR_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1762                         break;
1763                 case OP_SHR_IMM:
1764                         ARM_SAR_IMM (code, ins->dreg, ins->sreg1, (ins->inst_imm & 0x1f));
1765                         break;
1766                 case OP_SHR_UN_IMM:
1767                         ARM_SHR_IMM (code, ins->dreg, ins->sreg1, (ins->inst_imm & 0x1f));
1768                         break;
1769                 case CEE_SHR_UN:
1770                         ARM_SHR_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1771                         break;
1772                 case CEE_NOT:
1773                         ARM_MVN_REG_REG (code, ins->dreg, ins->sreg1);
1774                         break;
1775                 case CEE_NEG:
1776                         ARM_RSB_REG_IMM8 (code, ins->dreg, ins->sreg1, 0);
1777                         break;
1778                 case CEE_MUL:
1779                         if (ins->dreg == ins->sreg2)
1780                                 ARM_MUL_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1781                         else
1782                                 ARM_MUL_REG_REG (code, ins->dreg, ins->sreg2, ins->sreg1);
1783                         break;
1784                 case OP_MUL_IMM:
1785                         g_assert_not_reached ();
1786                         break;
1787                 case CEE_MUL_OVF:
1788                         /* FIXME: handle ovf/ sreg2 != dreg */
1789                         ARM_MUL_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1790                         break;
1791                 case CEE_MUL_OVF_UN:
1792                         /* FIXME: handle ovf/ sreg2 != dreg */
1793                         ARM_MUL_REG_REG (code, ins->dreg, ins->sreg1, ins->sreg2);
1794                         break;
1795                 case OP_ICONST:
1796                 case OP_SETREGIMM:
1797                         code = mono_arm_emit_load_imm (code, ins->dreg, ins->inst_c0);
1798                         break;
1799                 case OP_AOTCONST:
1800                         g_assert_not_reached ();
1801                         mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
1802                         break;
1803                 case CEE_CONV_I4:
1804                 case CEE_CONV_U4:
1805                 case OP_MOVE:
1806                 case OP_SETREG:
1807                         ARM_MOV_REG_REG (code, ins->dreg, ins->sreg1);
1808                         break;
1809                 case OP_SETLRET: {
1810                         int saved = ins->sreg2;
1811                         if (ins->sreg2 == ARMREG_R0) {
1812                                 ARM_MOV_REG_REG (code, ARMREG_LR, ins->sreg2);
1813                                 saved = ARMREG_LR;
1814                         }
1815                         if (ins->sreg1 != ARMREG_R0)
1816                                 ARM_MOV_REG_REG (code, ARMREG_R0, ins->sreg1);
1817                         if (saved != ARMREG_R1)
1818                                 ARM_MOV_REG_REG (code, ARMREG_R1, saved);
1819                         break;
1820                 }
1821                 case OP_SETFREG:
1822                 case OP_FMOVE:
1823                         ARM_MVFD (code, ins->dreg, ins->sreg1);
1824                         break;
1825                 case OP_FCONV_TO_R4:
1826                         ARM_MVFS (code, ins->dreg, ins->sreg1);
1827                         break;
1828                 case CEE_JMP: {
1829 #if ARM_PORT
1830                         int i, pos = 0;
1831
1832                         /*
1833                          * Keep in sync with mono_arch_emit_epilog
1834                          */
1835                         g_assert (!cfg->method->save_lmf);
1836                         if (1 || cfg->flags & MONO_CFG_HAS_CALLS) {
1837                                 if (ppc_is_imm16 (cfg->stack_usage + PPC_RET_ADDR_OFFSET)) {
1838                                         ppc_lwz (code, ppc_r0, cfg->stack_usage + PPC_RET_ADDR_OFFSET, cfg->frame_reg);
1839                                 } else {
1840                                         ppc_load (code, ppc_r11, cfg->stack_usage + PPC_RET_ADDR_OFFSET);
1841                                         ppc_lwzx (code, ppc_r0, cfg->frame_reg, ppc_r11);
1842                                 }
1843                                 ppc_mtlr (code, ppc_r0);
1844                         }
1845                         if (ppc_is_imm16 (cfg->stack_usage)) {
1846                                 ppc_addic (code, ppc_sp, cfg->frame_reg, cfg->stack_usage);
1847                         } else {
1848                                 ppc_load (code, ppc_r11, cfg->stack_usage);
1849                                 ppc_add (code, ppc_sp, cfg->frame_reg, ppc_r11);
1850                         }
1851                         if (!cfg->method->save_lmf) {
1852                                 /*for (i = 31; i >= 14; --i) {
1853                                         if (cfg->used_float_regs & (1 << i)) {
1854                                                 pos += sizeof (double);
1855                                                 ppc_lfd (code, i, -pos, cfg->frame_reg);
1856                                         }
1857                                 }*/
1858                                 for (i = 31; i >= 13; --i) {
1859                                         if (cfg->used_int_regs & (1 << i)) {
1860                                                 pos += sizeof (gulong);
1861                                                 ppc_lwz (code, i, -pos, cfg->frame_reg);
1862                                         }
1863                                 }
1864                         } else {
1865                                 /* FIXME restore from MonoLMF: though this can't happen yet */
1866                         }
1867                         mono_add_patch_info (cfg, (guint8*) code - cfg->native_code, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
1868                         ppc_b (code, 0);
1869 #endif
1870                         break;
1871                 }
1872                 case OP_CHECK_THIS:
1873                         /* ensure ins->sreg1 is not NULL */
1874                         ARM_LDR_IMM (code, ARMREG_LR, ins->sreg1, 0);
1875                         break;
1876                 case OP_ARGLIST: {
1877 #if ARM_PORT
1878                         if (ppc_is_imm16 (cfg->sig_cookie + cfg->stack_usage)) {
1879                                 ppc_addi (code, ppc_r11, cfg->frame_reg, cfg->sig_cookie + cfg->stack_usage);
1880                         } else {
1881                                 ppc_load (code, ppc_r11, cfg->sig_cookie + cfg->stack_usage);
1882                                 ppc_add (code, ppc_r11, cfg->frame_reg, ppc_r11);
1883                         }
1884                         ppc_stw (code, ppc_r11, 0, ins->sreg1);
1885 #endif
1886                         break;
1887                 }
1888                 case OP_FCALL:
1889                 case OP_LCALL:
1890                 case OP_VCALL:
1891                 case OP_VOIDCALL:
1892                 case CEE_CALL:
1893                         call = (MonoCallInst*)ins;
1894                         if (ins->flags & MONO_INST_HAS_METHOD)
1895                                 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_METHOD, call->method);
1896                         else
1897                                 mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, call->fptr);
1898                         if (cfg->method->dynamic) {
1899                                 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 0);
1900                                 ARM_B (code, 0);
1901                                 *(gpointer*)code = NULL;
1902                                 code += 4;
1903                                 ARM_MOV_REG_REG (code, ARMREG_LR, ARMREG_PC);
1904                                 ARM_MOV_REG_REG (code, ARMREG_PC, ARMREG_IP);
1905                         } else {
1906                                 ARM_BL (code, 0);
1907                         }
1908                         break;
1909                 case OP_FCALL_REG:
1910                 case OP_LCALL_REG:
1911                 case OP_VCALL_REG:
1912                 case OP_VOIDCALL_REG:
1913                 case OP_CALL_REG:
1914                         ARM_MOV_REG_REG (code, ARMREG_LR, ARMREG_PC);
1915                         ARM_MOV_REG_REG (code, ARMREG_PC, ins->sreg1);
1916                         break;
1917                 case OP_FCALL_MEMBASE:
1918                 case OP_LCALL_MEMBASE:
1919                 case OP_VCALL_MEMBASE:
1920                 case OP_VOIDCALL_MEMBASE:
1921                 case OP_CALL_MEMBASE:
1922                         g_assert (ins->inst_offset >= 0 && ins->inst_offset < 4096);
1923                         ARM_LDR_IMM (code, ARMREG_IP, ins->sreg1, ins->inst_offset);
1924                         ARM_MOV_REG_REG (code, ARMREG_LR, ARMREG_PC);
1925                         ARM_MOV_REG_REG (code, ARMREG_PC, ARMREG_IP);
1926                         break;
1927                 case OP_OUTARG:
1928                         g_assert_not_reached ();
1929                         break;
1930                 case OP_LOCALLOC: {
1931                         /* keep alignment */
1932                         int alloca_waste = cfg->param_area;
1933                         alloca_waste += 7;
1934                         alloca_waste &= ~7;
1935                         /* round the size to 8 bytes */
1936                         ARM_ADD_REG_IMM8 (code, ins->dreg, ins->sreg1, 7);
1937                         ARM_SHL_IMM (code, ins->dreg, ins->dreg, 3);
1938                         ARM_SHR_IMM (code, ins->dreg, ins->dreg, 3);
1939                         ARM_ADD_REG_IMM8 (code, ins->dreg, ins->dreg, alloca_waste);
1940                         ARM_SUB_REG_REG (code, ARMREG_SP, ARMREG_SP, ins->dreg);
1941                         /* memzero the area */
1942                         if (ins->flags & MONO_INST_INIT) {
1943                                 guint8 *start_loop, *branch_to_cond;
1944                                 ARM_MOV_REG_IMM8 (code, ARMREG_LR, 0);
1945                                 branch_to_cond = code;
1946                                 ARM_B (code, 0);
1947                                 start_loop = code;
1948                                 ARM_STR_REG_REG (code, ARMREG_LR, ARMREG_SP, ins->dreg);
1949                                 arm_patch (branch_to_cond, code);
1950                                 /* decrement by 4 and set flags */
1951                                 ARM_SUBS_REG_IMM8 (code, ins->dreg, ins->dreg, 4);
1952                                 ARM_B_COND (code, ARMCOND_LT, 0);
1953                                 arm_patch (code - 4, start_loop);
1954                         }
1955                         ARM_ADD_REG_IMM8 (code, ins->dreg, ARMREG_SP, alloca_waste);
1956                         break;
1957                 }
1958                 case CEE_RET:
1959                         ARM_MOV_REG_REG (code, ARMREG_PC, ARMREG_LR);
1960                         break;
1961                 case CEE_THROW: {
1962                         if (ins->sreg1 != ARMREG_R0)
1963                                 ARM_MOV_REG_REG (code, ARMREG_R0, ins->sreg1);
1964                         mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
1965                                              (gpointer)"mono_arch_throw_exception");
1966                         if (cfg->method->dynamic) {
1967                                 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 0);
1968                                 ARM_B (code, 0);
1969                                 *(gpointer*)code = NULL;
1970                                 code += 4;
1971                                 ARM_MOV_REG_REG (code, ARMREG_LR, ARMREG_PC);
1972                                 ARM_MOV_REG_REG (code, ARMREG_PC, ARMREG_IP);
1973                         } else {
1974                                 ARM_BL (code, 0);
1975                         }
1976                         break;
1977                 }
1978                 case OP_RETHROW: {
1979                         if (ins->sreg1 != ARMREG_R0)
1980                                 ARM_MOV_REG_REG (code, ARMREG_R0, ins->sreg1);
1981                         mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
1982                                              (gpointer)"mono_arch_rethrow_exception");
1983                         if (cfg->method->dynamic) {
1984                                 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 0);
1985                                 ARM_B (code, 0);
1986                                 *(gpointer*)code = NULL;
1987                                 code += 4;
1988                                 ARM_MOV_REG_REG (code, ARMREG_LR, ARMREG_PC);
1989                                 ARM_MOV_REG_REG (code, ARMREG_PC, ARMREG_IP);
1990                         } else {
1991                                 ARM_BL (code, 0);
1992                         }
1993                         break;
1994                 }
1995                 case OP_START_HANDLER:
1996 #if ARM_PORT
1997                         ppc_mflr (code, ppc_r0);
1998                         if (ppc_is_imm16 (ins->inst_left->inst_offset)) {
1999                                 ppc_stw (code, ppc_r0, ins->inst_left->inst_offset, ins->inst_left->inst_basereg);
2000                         } else {
2001                                 ppc_load (code, ppc_r11, ins->inst_left->inst_offset);
2002                                 ppc_stwx (code, ppc_r0, ppc_r11, ins->inst_left->inst_basereg);
2003                         }
2004                         break;
2005 #endif
2006                 case OP_ENDFILTER:
2007 #if ARM_PORT
2008                         if (ins->sreg1 != ARMREG_R0)
2009                                 ARM_MOV_REG_REG (code, ARMREG_R0, ins->sreg1);
2010                         if (ppc_is_imm16 (ins->inst_left->inst_offset)) {
2011                                 ppc_lwz (code, ppc_r0, ins->inst_left->inst_offset, ins->inst_left->inst_basereg);
2012                         } else {
2013                                 ppc_load (code, ppc_r11, ins->inst_left->inst_offset);
2014                                 ppc_lwzx (code, ppc_r0, ins->inst_left->inst_basereg, ppc_r11);
2015                         }
2016                         ppc_mtlr (code, ppc_r0);
2017                         ppc_blr (code);
2018 #endif
2019                         break;
2020                 case CEE_ENDFINALLY:
2021 #if ARM_PORT
2022                         ppc_lwz (code, ppc_r0, ins->inst_left->inst_offset, ins->inst_left->inst_basereg);
2023                         ppc_mtlr (code, ppc_r0);
2024                         ppc_blr (code);
2025 #endif
2026                         break;
2027                 case OP_CALL_HANDLER:
2028                         mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2029                         ARM_BL (code, 0);
2030                         break;
2031                 case OP_LABEL:
2032                         ins->inst_c0 = code - cfg->native_code;
2033                         break;
2034                 case CEE_BR:
2035                         if (ins->flags & MONO_INST_BRLABEL) {
2036                                 /*if (ins->inst_i0->inst_c0) {
2037                                         ARM_B (code, 0);
2038                                         //x86_jump_code (code, cfg->native_code + ins->inst_i0->inst_c0);
2039                                 } else*/ {
2040                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
2041                                         ARM_B (code, 0);
2042                                 }
2043                         } else {
2044                                 /*if (ins->inst_target_bb->native_offset) {
2045                                         ARM_B (code, 0);
2046                                         //x86_jump_code (code, cfg->native_code + ins->inst_target_bb->native_offset);
2047                                 } else*/ {
2048                                         mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
2049                                         ARM_B (code, 0);
2050                                 }
2051                         }
2052                         break;
2053                 case OP_BR_REG:
2054                         ARM_MOV_REG_REG (code, ARMREG_PC, ins->sreg1);
2055                         break;
2056                 case CEE_SWITCH:
2057                         /*
2058                          * In the normal case we have:
2059                          *      ldr pc, [pc, ins->sreg1 << 2]
2060                          *      nop
2061                          * If aot, we have:
2062                          *      ldr lr, [pc, ins->sreg1 << 2]
2063                          *      add pc, pc, lr
2064                          * After follows the data.
2065                          * FIXME: add aot support.
2066                          */
2067                         max_len += 4 * GPOINTER_TO_INT (ins->klass);
2068                         if (offset > (cfg->code_size - max_len - 16)) {
2069                                 cfg->code_size += max_len;
2070                                 cfg->code_size *= 2;
2071                                 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
2072                                 code = cfg->native_code + offset;
2073                         }
2074                         ARM_LDR_REG_REG_SHIFT (code, ARMREG_PC, ARMREG_PC, ins->sreg1, ARMSHIFT_LSL, 2);
2075                         ARM_NOP (code);
2076                         code += 4 * GPOINTER_TO_INT (ins->klass);
2077                         break;
2078                 case OP_CEQ:
2079                         ARM_MOV_REG_IMM8 (code, ins->dreg, 0);
2080                         ARM_MOV_REG_IMM8_COND (code, ins->dreg, 1, ARMCOND_EQ);
2081                         break;
2082                 case OP_CLT:
2083                         ARM_MOV_REG_IMM8 (code, ins->dreg, 0);
2084                         ARM_MOV_REG_IMM8_COND (code, ins->dreg, 1, ARMCOND_LT);
2085                         break;
2086                 case OP_CLT_UN:
2087                         ARM_MOV_REG_IMM8 (code, ins->dreg, 0);
2088                         ARM_MOV_REG_IMM8_COND (code, ins->dreg, 1, ARMCOND_LO);
2089                         break;
2090                 case OP_CGT:
2091                         ARM_MOV_REG_IMM8 (code, ins->dreg, 0);
2092                         ARM_MOV_REG_IMM8_COND (code, ins->dreg, 1, ARMCOND_GT);
2093                         break;
2094                 case OP_CGT_UN:
2095                         ARM_MOV_REG_IMM8 (code, ins->dreg, 0);
2096                         ARM_MOV_REG_IMM8_COND (code, ins->dreg, 1, ARMCOND_HI);
2097                         break;
2098                 case OP_COND_EXC_EQ:
2099                 case OP_COND_EXC_NE_UN:
2100                 case OP_COND_EXC_LT:
2101                 case OP_COND_EXC_LT_UN:
2102                 case OP_COND_EXC_GT:
2103                 case OP_COND_EXC_GT_UN:
2104                 case OP_COND_EXC_GE:
2105                 case OP_COND_EXC_GE_UN:
2106                 case OP_COND_EXC_LE:
2107                 case OP_COND_EXC_LE_UN:
2108                         EMIT_COND_SYSTEM_EXCEPTION (ins->opcode - OP_COND_EXC_EQ, ins->inst_p1);
2109                         break;
2110                 case OP_COND_EXC_C:
2111                 case OP_COND_EXC_OV:
2112                 case OP_COND_EXC_NC:
2113                 case OP_COND_EXC_NO:
2114                         g_assert_not_reached ();
2115                         break;
2116                 case CEE_BEQ:
2117                 case CEE_BNE_UN:
2118                 case CEE_BLT:
2119                 case CEE_BLT_UN:
2120                 case CEE_BGT:
2121                 case CEE_BGT_UN:
2122                 case CEE_BGE:
2123                 case CEE_BGE_UN:
2124                 case CEE_BLE:
2125                 case CEE_BLE_UN:
2126                         EMIT_COND_BRANCH (ins, ins->opcode - CEE_BEQ);
2127                         break;
2128
2129                 /* floating point opcodes */
2130                 case OP_R8CONST:
2131                         /* FIXME: we can optimize the imm load by dealing with part of
2132                          * the displacement in LDFD (aligning to 512).
2133                          */
2134                         code = mono_arm_emit_load_imm (code, ARMREG_LR, (guint32)ins->inst_p0);
2135                         ARM_LDFD (code, ins->dreg, ARMREG_LR, 0);
2136                         break;
2137                 case OP_R4CONST:
2138                         code = mono_arm_emit_load_imm (code, ARMREG_LR, (guint32)ins->inst_p0);
2139                         ARM_LDFS (code, ins->dreg, ARMREG_LR, 0);
2140                         break;
2141                 case OP_STORER8_MEMBASE_REG:
2142                         g_assert (arm_is_fpimm8 (ins->inst_offset));
2143                         ARM_STFD (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
2144                         break;
2145                 case OP_LOADR8_MEMBASE:
2146                         g_assert (arm_is_fpimm8 (ins->inst_offset));
2147                         ARM_LDFD (code, ins->dreg, ins->inst_basereg, ins->inst_offset);
2148                         break;
2149                 case OP_STORER4_MEMBASE_REG:
2150                         g_assert (arm_is_fpimm8 (ins->inst_offset));
2151                         ARM_STFS (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
2152                         break;
2153                 case OP_LOADR4_MEMBASE:
2154                         g_assert (arm_is_fpimm8 (ins->inst_offset));
2155                         ARM_LDFS (code, ins->dreg, ins->inst_basereg, ins->inst_offset);
2156                         break;
2157                 case CEE_CONV_R_UN: {
2158                         /*static const guint64 adjust_val = 0x4330000000000000ULL;
2159                         ppc_addis (code, ppc_r0, ppc_r0, 0x4330);
2160                         ppc_stw (code, ppc_r0, -8, ppc_sp);
2161                         ppc_stw (code, ins->sreg1, -4, ppc_sp);
2162                         ppc_load (code, ppc_r11, &adjust_val);
2163                         ppc_lfd (code, ins->dreg, -8, ppc_sp);
2164                         ppc_lfd (code, ppc_f0, 0, ppc_r11);
2165                         ppc_fsub (code, ins->dreg, ins->dreg, ppc_f0);*/
2166                         g_assert_not_reached ();
2167                         break;
2168                 }
2169                 case CEE_CONV_R4:
2170                         ARM_FLTS (code, ins->dreg, ins->sreg1);
2171                         break;
2172                 case CEE_CONV_R8:
2173                         ARM_FLTD (code, ins->dreg, ins->sreg1);
2174                         break;
2175                 case OP_X86_FP_LOAD_I8:
2176                         g_assert_not_reached ();
2177                         /*x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);*/
2178                         break;
2179                 case OP_X86_FP_LOAD_I4:
2180                         g_assert_not_reached ();
2181                         /*x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);*/
2182                         break;
2183                 case OP_FCONV_TO_I1:
2184                         code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 1, TRUE);
2185                         break;
2186                 case OP_FCONV_TO_U1:
2187                         code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 1, FALSE);
2188                         break;
2189                 case OP_FCONV_TO_I2:
2190                         code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 2, TRUE);
2191                         break;
2192                 case OP_FCONV_TO_U2:
2193                         code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 2, FALSE);
2194                         break;
2195                 case OP_FCONV_TO_I4:
2196                 case OP_FCONV_TO_I:
2197                         code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 4, TRUE);
2198                         break;
2199                 case OP_FCONV_TO_U4:
2200                 case OP_FCONV_TO_U:
2201                         code = emit_float_to_int (cfg, code, ins->dreg, ins->sreg1, 4, FALSE);
2202                         break;
2203                 case OP_FCONV_TO_I8:
2204                 case OP_FCONV_TO_U8:
2205                         g_assert_not_reached ();
2206                         /* Implemented as helper calls */
2207                         break;
2208                 case OP_LCONV_TO_R_UN:
2209                         g_assert_not_reached ();
2210                         /* Implemented as helper calls */
2211                         break;
2212                 case OP_LCONV_TO_OVF_I: {
2213 #if ARM_PORT
2214                         guint32 *negative_branch, *msword_positive_branch, *msword_negative_branch, *ovf_ex_target;
2215                         // Check if its negative
2216                         ppc_cmpi (code, 0, 0, ins->sreg1, 0);
2217                         negative_branch = code;
2218                         ppc_bc (code, PPC_BR_TRUE, PPC_BR_LT, 0);
2219                         // Its positive msword == 0
2220                         ppc_cmpi (code, 0, 0, ins->sreg2, 0);
2221                         msword_positive_branch = code;
2222                         ppc_bc (code, PPC_BR_TRUE, PPC_BR_EQ, 0);
2223
2224                         ovf_ex_target = code;
2225                         //EMIT_COND_SYSTEM_EXCEPTION_FLAGS (PPC_BR_ALWAYS, 0, "OverflowException");
2226                         // Negative
2227                         ppc_patch (negative_branch, code);
2228                         ppc_cmpi (code, 0, 0, ins->sreg2, -1);
2229                         msword_negative_branch = code;
2230                         ppc_bc (code, PPC_BR_FALSE, PPC_BR_EQ, 0);
2231                         ppc_patch (msword_negative_branch, ovf_ex_target);
2232
2233                         ppc_patch (msword_positive_branch, code);
2234                         if (ins->dreg != ins->sreg1)
2235                                 ppc_mr (code, ins->dreg, ins->sreg1);
2236 #endif
2237                         g_assert_not_reached ();
2238                         break;
2239                 }
2240                 case OP_FADD:
2241                         ARM_FPA_ADFD (code, ins->dreg, ins->sreg1, ins->sreg2);
2242                         break;
2243                 case OP_FSUB:
2244                         ARM_FPA_SUFD (code, ins->dreg, ins->sreg1, ins->sreg2);
2245                         break;
2246                 case OP_FMUL:
2247                         ARM_FPA_MUFD (code, ins->dreg, ins->sreg1, ins->sreg2);
2248                         break;
2249                 case OP_FDIV:
2250                         ARM_FPA_DVFD (code, ins->dreg, ins->sreg1, ins->sreg2);
2251                         break;
2252                 case OP_FNEG:
2253                         ARM_MNFD (code, ins->dreg, ins->sreg1);
2254                         break;
2255                 case OP_FREM:
2256                         /* emulated */
2257                         g_assert_not_reached ();
2258                         break;
2259                 case OP_FCOMPARE:
2260                         ARM_FCMP (code, ARM_FPA_CMF, ins->sreg1, ins->sreg2);
2261                         break;
2262                 case OP_FCEQ:
2263                         g_assert_not_reached ();
2264                         /*ppc_fcmpo (code, 0, ins->sreg1, ins->sreg2);
2265                         ppc_li (code, ins->dreg, 0);
2266                         ppc_bc (code, PPC_BR_FALSE, PPC_BR_EQ, 2);
2267                         ppc_li (code, ins->dreg, 1);*/
2268                         break;
2269                 case OP_FCLT:
2270                         g_assert_not_reached ();
2271                         /*ppc_fcmpo (code, 0, ins->sreg1, ins->sreg2);
2272                         ppc_li (code, ins->dreg, 1);
2273                         ppc_bc (code, PPC_BR_TRUE, PPC_BR_LT, 2);
2274                         ppc_li (code, ins->dreg, 0);*/
2275                         break;
2276                 case OP_FCLT_UN:
2277                         g_assert_not_reached ();
2278                         /*ppc_fcmpu (code, 0, ins->sreg1, ins->sreg2);
2279                         ppc_li (code, ins->dreg, 1);
2280                         ppc_bc (code, PPC_BR_TRUE, PPC_BR_SO, 3);
2281                         ppc_bc (code, PPC_BR_TRUE, PPC_BR_LT, 2);
2282                         ppc_li (code, ins->dreg, 0);*/
2283                         break;
2284                 case OP_FCGT:
2285                         g_assert_not_reached ();
2286                         /*ppc_fcmpo (code, 0, ins->sreg1, ins->sreg2);
2287                         ppc_li (code, ins->dreg, 1);
2288                         ppc_bc (code, PPC_BR_TRUE, PPC_BR_GT, 2);
2289                         ppc_li (code, ins->dreg, 0);*/
2290                         break;
2291                 case OP_FCGT_UN:
2292                         g_assert_not_reached ();
2293                         /*ppc_fcmpu (code, 0, ins->sreg1, ins->sreg2);
2294                         ppc_li (code, ins->dreg, 1);
2295                         ppc_bc (code, PPC_BR_TRUE, PPC_BR_SO, 3);
2296                         ppc_bc (code, PPC_BR_TRUE, PPC_BR_GT, 2);
2297                         ppc_li (code, ins->dreg, 0);*/
2298                         break;
2299                 case OP_FBEQ:
2300                         EMIT_COND_BRANCH (ins, CEE_BEQ - CEE_BEQ);
2301                         break;
2302                 case OP_FBNE_UN:
2303                         EMIT_COND_BRANCH (ins, CEE_BNE_UN - CEE_BEQ);
2304                         break;
2305                 case OP_FBLT:
2306                         EMIT_COND_BRANCH (ins, CEE_BLT - CEE_BEQ);
2307                         break;
2308                 case OP_FBLT_UN:
2309                         //EMIT_COND_BRANCH_FLAGS (ins, PPC_BR_TRUE, PPC_BR_SO);
2310                         EMIT_COND_BRANCH (ins, CEE_BLT_UN - CEE_BEQ);
2311                         break;
2312                 case OP_FBGT:
2313                         EMIT_COND_BRANCH (ins, CEE_BGT - CEE_BEQ);
2314                         break;
2315                 case OP_FBGT_UN:
2316                         //EMIT_COND_BRANCH_FLAGS (ins, PPC_BR_TRUE, PPC_BR_SO);
2317                         EMIT_COND_BRANCH (ins, CEE_BGT_UN - CEE_BEQ);
2318                         break;
2319                 case OP_FBGE:
2320                         EMIT_COND_BRANCH (ins, CEE_BGE - CEE_BEQ);
2321                         break;
2322                 case OP_FBGE_UN:
2323                         EMIT_COND_BRANCH (ins, CEE_BGE_UN - CEE_BEQ);
2324                         break;
2325                 case OP_FBLE:
2326                         EMIT_COND_BRANCH (ins, CEE_BLE - CEE_BEQ);
2327                         break;
2328                 case OP_FBLE_UN:
2329                         EMIT_COND_BRANCH (ins, CEE_BLE_UN - CEE_BEQ);
2330                         break;
2331                 case CEE_CKFINITE: {
2332                         /*ppc_stfd (code, ins->sreg1, -8, ppc_sp);
2333                         ppc_lwz (code, ppc_r11, -8, ppc_sp);
2334                         ppc_rlwinm (code, ppc_r11, ppc_r11, 0, 1, 31);
2335                         ppc_addis (code, ppc_r11, ppc_r11, -32752);
2336                         ppc_rlwinmd (code, ppc_r11, ppc_r11, 1, 31, 31);
2337                         EMIT_COND_SYSTEM_EXCEPTION (CEE_BEQ - CEE_BEQ, "ArithmeticException");*/
2338                         g_assert_not_reached ();
2339                         break;
2340                 }
2341                 default:
2342                         g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
2343                         g_assert_not_reached ();
2344                 }
2345
2346                 if ((cfg->opt & MONO_OPT_BRANCH) && ((code - cfg->native_code - offset) > max_len)) {
2347                         g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
2348                                    mono_inst_name (ins->opcode), max_len, code - cfg->native_code - offset);
2349                         g_assert_not_reached ();
2350                 }
2351
2352                 cpos += max_len;
2353
2354                 last_ins = ins;
2355                 last_offset = offset;
2356
2357                 ins = ins->next;
2358         }
2359
2360         cfg->code_len = code - cfg->native_code;
2361 }
2362
2363 void
2364 mono_arch_register_lowlevel_calls (void)
2365 {
2366 }
2367
2368 #define patch_lis_ori(ip,val) do {\
2369                 guint16 *__lis_ori = (guint16*)(ip);    \
2370                 __lis_ori [1] = (((guint32)(val)) >> 16) & 0xffff;      \
2371                 __lis_ori [3] = ((guint32)(val)) & 0xffff;      \
2372         } while (0)
2373
2374 void
2375 mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
2376 {
2377         MonoJumpInfo *patch_info;
2378
2379         for (patch_info = ji; patch_info; patch_info = patch_info->next) {
2380                 unsigned char *ip = patch_info->ip.i + code;
2381                 const unsigned char *target;
2382
2383                 if (patch_info->type == MONO_PATCH_INFO_SWITCH) {
2384                         gpointer *table = (gpointer *)patch_info->data.table->table;
2385                         gpointer *jt = (gpointer*)(ip + 8);
2386                         int i;
2387                         /* jt is the inlined jump table, 2 instructions after ip
2388                          * In the normal case we store the absolute addresses,
2389                          * otherwise the displacements.
2390                          */
2391                         for (i = 0; i < patch_info->data.table->table_size; i++) {
2392                                 jt [i] = code + (int)patch_info->data.table->table [i];
2393                         }
2394                         continue;
2395                 }
2396                 target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
2397
2398                 switch (patch_info->type) {
2399                 case MONO_PATCH_INFO_IP:
2400                         patch_lis_ori (ip, ip);
2401                         continue;
2402                 case MONO_PATCH_INFO_METHOD_REL:
2403                         g_assert_not_reached ();
2404                         *((gpointer *)(ip)) = code + patch_info->data.offset;
2405                         continue;
2406                 case MONO_PATCH_INFO_METHODCONST:
2407                 case MONO_PATCH_INFO_CLASS:
2408                 case MONO_PATCH_INFO_IMAGE:
2409                 case MONO_PATCH_INFO_FIELD:
2410                 case MONO_PATCH_INFO_VTABLE:
2411                 case MONO_PATCH_INFO_IID:
2412                 case MONO_PATCH_INFO_SFLDA:
2413                 case MONO_PATCH_INFO_LDSTR:
2414                 case MONO_PATCH_INFO_TYPE_FROM_HANDLE:
2415                 case MONO_PATCH_INFO_LDTOKEN:
2416                         /* from OP_AOTCONST : lis + ori */
2417                         patch_lis_ori (ip, target);
2418                         continue;
2419                 case MONO_PATCH_INFO_R4:
2420                 case MONO_PATCH_INFO_R8:
2421                         g_assert_not_reached ();
2422                         *((gconstpointer *)(ip + 2)) = patch_info->data.target;
2423                         continue;
2424                 case MONO_PATCH_INFO_EXC_NAME:
2425                         g_assert_not_reached ();
2426                         *((gconstpointer *)(ip + 1)) = patch_info->data.name;
2427                         continue;
2428                 case MONO_PATCH_INFO_NONE:
2429                 case MONO_PATCH_INFO_BB_OVF:
2430                 case MONO_PATCH_INFO_EXC_OVF:
2431                         /* everything is dealt with at epilog output time */
2432                         continue;
2433                 default:
2434                         break;
2435                 }
2436                 arm_patch (ip, target);
2437         }
2438 }
2439
2440 /*
2441  * Stack frame layout:
2442  *
2443  *   ------------------- fp
2444  *      MonoLMF structure or saved registers
2445  *   -------------------
2446  *      locals
2447  *   -------------------
2448  *      spilled regs
2449  *   -------------------
2450  *      optional 8 bytes for tracing
2451  *   -------------------
2452  *      param area             size is cfg->param_area
2453  *   ------------------- sp
2454  */
2455 guint8 *
2456 mono_arch_emit_prolog (MonoCompile *cfg)
2457 {
2458         MonoMethod *method = cfg->method;
2459         MonoBasicBlock *bb;
2460         MonoMethodSignature *sig;
2461         MonoInst *inst;
2462         int alloc_size, pos, max_offset, i;
2463         guint8 *code;
2464         CallInfo *cinfo;
2465         int tracing = 0;
2466         int lmf_offset = 0;
2467
2468         if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
2469                 tracing = 1;
2470
2471         sig = mono_method_signature (method);
2472         cfg->code_size = 256 + sig->param_count * 20;
2473         code = cfg->native_code = g_malloc (cfg->code_size);
2474
2475         if (cfg->max_ireg >= 29)
2476                 cfg->used_int_regs |= USE_EXTRA_TEMPS;
2477         ARM_MOV_REG_REG (code, ARMREG_IP, ARMREG_SP);
2478         ARM_PUSH (code, (cfg->used_int_regs | (1 << ARMREG_IP) | (1 << ARMREG_LR)));
2479
2480         alloc_size = cfg->stack_offset;
2481         pos = 0;
2482
2483         if (!method->save_lmf) {
2484                 /*for (i = 31; i >= 14; --i) {
2485                         if (cfg->used_float_regs & (1 << i)) {
2486                                 pos += sizeof (gdouble);
2487                                 ppc_stfd (code, i, -pos, ppc_sp);
2488                         }
2489                 }*/
2490         } else {
2491                 /*int ofs;
2492                 pos += sizeof (MonoLMF);
2493                 lmf_offset = pos;
2494                 ofs = -pos + G_STRUCT_OFFSET(MonoLMF, iregs);
2495                 ppc_stmw (code, ppc_r13, ppc_r1, ofs);
2496                 for (i = 14; i < 32; i++) {
2497                         ppc_stfd (code, i, (-pos + G_STRUCT_OFFSET(MonoLMF, fregs) + ((i-14) * sizeof (gdouble))), ppc_r1);
2498                 }*/
2499         }
2500         alloc_size += pos;
2501         // align to MONO_ARCH_FRAME_ALIGNMENT bytes
2502         if (alloc_size & (MONO_ARCH_FRAME_ALIGNMENT - 1)) {
2503                 alloc_size += MONO_ARCH_FRAME_ALIGNMENT - 1;
2504                 alloc_size &= ~(MONO_ARCH_FRAME_ALIGNMENT - 1);
2505         }
2506
2507         cfg->stack_usage = alloc_size;
2508         g_assert ((alloc_size & (MONO_ARCH_FRAME_ALIGNMENT-1)) == 0);
2509         if (alloc_size) {
2510                 ARM_SUB_REG_IMM8 (code, ARMREG_SP, ARMREG_SP, alloc_size);
2511         }
2512         if (cfg->frame_reg != ARMREG_SP)
2513                 ARM_MOV_REG_REG (code, cfg->frame_reg, ARMREG_SP);
2514
2515         /* compute max_offset in order to use short forward jumps
2516          * we always do it on ppc because the immediate displacement
2517          * for jumps is too small
2518          */
2519         max_offset = 0;
2520         for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
2521                 MonoInst *ins = bb->code;
2522                 bb->max_offset = max_offset;
2523
2524                 if (cfg->prof_options & MONO_PROFILE_COVERAGE)
2525                         max_offset += 6;
2526
2527                 while (ins) {
2528                         max_offset += ((guint8 *)arm_cpu_desc [ins->opcode])[MONO_INST_LEN];
2529                         ins = ins->next;
2530                 }
2531         }
2532
2533         /* load arguments allocated to register from the stack */
2534         pos = 0;
2535
2536         cinfo = calculate_sizes (sig, sig->pinvoke);
2537
2538         if (MONO_TYPE_ISSTRUCT (sig->ret)) {
2539                 ArgInfo *ainfo = &cinfo->ret;
2540                 inst = cfg->ret;
2541                 g_assert (arm_is_imm12 (inst->inst_offset));
2542                 ARM_STR_IMM (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
2543         }
2544         for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
2545                 ArgInfo *ainfo = cinfo->args + i;
2546                 inst = cfg->varinfo [pos];
2547
2548                 if (cfg->verbose_level > 2)
2549                         g_print ("Saving argument %d (type: %d)\n", i, ainfo->regtype);
2550                 if (inst->opcode == OP_REGVAR) {
2551                         if (ainfo->regtype == RegTypeGeneral)
2552                                 ARM_MOV_REG_REG (code, inst->dreg, ainfo->reg);
2553                         else if (ainfo->regtype == RegTypeFP) {
2554                                 g_assert_not_reached ();
2555                                 //ppc_fmr (code, inst->dreg, ainfo->reg);
2556                         } else if (ainfo->regtype == RegTypeBase) {
2557                                 g_assert_not_reached ();
2558                                 //ppc_lwz (code, ppc_r11, 0, ppc_sp);
2559                                 //ppc_lwz (code, inst->dreg, ainfo->offset, ppc_r11);
2560                         } else
2561                                 g_assert_not_reached ();
2562
2563                         if (cfg->verbose_level > 2)
2564                                 g_print ("Argument %d assigned to register %s\n", pos, mono_arch_regname (inst->dreg));
2565                 } else {
2566 #if ARM_PORT
2567                         /* the argument should be put on the stack: FIXME handle size != word  */
2568                         if (ainfo->regtype == RegTypeGeneral) {
2569                                 switch (ainfo->size) {
2570                                 case 1:
2571                                         if (ppc_is_imm16 (inst->inst_offset)) {
2572                                                 ppc_stb (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
2573                                         } else {
2574                                                 ppc_load (code, ppc_r11, inst->inst_offset);
2575                                                 ppc_stbx (code, ainfo->reg, ppc_r11, inst->inst_basereg);
2576                                         }
2577                                         break;
2578                                 case 2:
2579                                         if (ppc_is_imm16 (inst->inst_offset)) {
2580                                                 ppc_sth (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
2581                                         } else {
2582                                                 ppc_load (code, ppc_r11, inst->inst_offset);
2583                                                 ppc_sthx (code, ainfo->reg, ppc_r11, inst->inst_basereg);
2584                                         }
2585                                         break;
2586                                 case 8:
2587                                         if (ppc_is_imm16 (inst->inst_offset + 4)) {
2588                                                 ppc_stw (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
2589                                                 ppc_stw (code, ainfo->reg + 1, inst->inst_offset + 4, inst->inst_basereg);
2590                                         } else {
2591                                                 ppc_load (code, ppc_r11, inst->inst_offset);
2592                                                 ppc_add (code, ppc_r11, ppc_r11, inst->inst_basereg);
2593                                                 ppc_stw (code, ainfo->reg, 0, ppc_r11);
2594                                                 ppc_stw (code, ainfo->reg + 1, 4, ppc_r11);
2595                                         }
2596                                         break;
2597                                 default:
2598                                         if (ppc_is_imm16 (inst->inst_offset)) {
2599                                                 ppc_stw (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
2600                                         } else {
2601                                                 ppc_load (code, ppc_r11, inst->inst_offset);
2602                                                 ppc_stwx (code, ainfo->reg, ppc_r11, inst->inst_basereg);
2603                                         }
2604                                         break;
2605                                 }
2606                         } else if (ainfo->regtype == RegTypeBase) {
2607                                 /* load the previous stack pointer in r11 */
2608                                 ppc_lwz (code, ppc_r11, 0, ppc_sp);
2609                                 ppc_lwz (code, ppc_r0, ainfo->offset, ppc_r11);
2610                                 switch (ainfo->size) {
2611                                 case 1:
2612                                         if (ppc_is_imm16 (inst->inst_offset)) {
2613                                                 ppc_stb (code, ppc_r0, inst->inst_offset, inst->inst_basereg);
2614                                         } else {
2615                                                 ppc_load (code, ppc_r11, inst->inst_offset);
2616                                                 ppc_stbx (code, ppc_r0, ppc_r11, inst->inst_basereg);
2617                                         }
2618                                         break;
2619                                 case 2:
2620                                         if (ppc_is_imm16 (inst->inst_offset)) {
2621                                                 ppc_sth (code, ppc_r0, inst->inst_offset, inst->inst_basereg);
2622                                         } else {
2623                                                 ppc_load (code, ppc_r11, inst->inst_offset);
2624                                                 ppc_sthx (code, ppc_r0, ppc_r11, inst->inst_basereg);
2625                                         }
2626                                         break;
2627                                 case 8:
2628                                         if (ppc_is_imm16 (inst->inst_offset + 4)) {
2629                                                 ppc_stw (code, ppc_r0, inst->inst_offset, inst->inst_basereg);
2630                                                 ppc_lwz (code, ppc_r0, ainfo->offset + 4, ppc_r11);
2631                                                 ppc_stw (code, ppc_r0, inst->inst_offset + 4, inst->inst_basereg);
2632                                         } else {
2633                                                 /* FIXME */
2634                                                 g_assert_not_reached ();
2635                                         }
2636                                         break;
2637                                 default:
2638                                         if (ppc_is_imm16 (inst->inst_offset)) {
2639                                                 ppc_stw (code, ppc_r0, inst->inst_offset, inst->inst_basereg);
2640                                         } else {
2641                                                 ppc_load (code, ppc_r11, inst->inst_offset);
2642                                                 ppc_stwx (code, ppc_r0, ppc_r11, inst->inst_basereg);
2643                                         }
2644                                         break;
2645                                 }
2646                         } else if (ainfo->regtype == RegTypeFP) {
2647                                 g_assert (ppc_is_imm16 (inst->inst_offset));
2648                                 if (ainfo->size == 8)
2649                                         ppc_stfd (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
2650                                 else if (ainfo->size == 4)
2651                                         ppc_stfs (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
2652                                 else
2653                                         g_assert_not_reached ();
2654                         } else if (ainfo->regtype == RegTypeStructByVal) {
2655                                 int doffset = inst->inst_offset;
2656                                 int soffset = 0;
2657                                 int cur_reg;
2658                                 int size = 0;
2659                                 g_assert (ppc_is_imm16 (inst->inst_offset));
2660                                 g_assert (ppc_is_imm16 (inst->inst_offset + ainfo->size * sizeof (gpointer)));
2661                                 if (mono_class_from_mono_type (inst->inst_vtype))
2662                                         size = mono_class_native_size (mono_class_from_mono_type (inst->inst_vtype), NULL);
2663                                 for (cur_reg = 0; cur_reg < ainfo->size; ++cur_reg) {
2664 /*
2665 Darwin handles 1 and 2 byte structs specially by loading h/b into the arg
2666 register.  Should this case include linux/ppc?
2667 */
2668 #if __APPLE__
2669                                         if (size == 2)
2670                                                 ppc_sth (code, ainfo->reg + cur_reg, doffset, inst->inst_basereg);
2671                                         else if (size == 1)
2672                                                 ppc_stb (code, ainfo->reg + cur_reg, doffset, inst->inst_basereg);
2673                                         else
2674 #endif
2675                                                 ppc_stw (code, ainfo->reg + cur_reg, doffset, inst->inst_basereg);
2676                                         soffset += sizeof (gpointer);
2677                                         doffset += sizeof (gpointer);
2678                                 }
2679                                 if (ainfo->vtsize) {
2680                                         /* load the previous stack pointer in r11 (r0 gets overwritten by the memcpy) */
2681                                         ppc_lwz (code, ppc_r11, 0, ppc_sp);
2682                                         /* FIXME: handle overrun! with struct sizes not multiple of 4 */
2683                                         code = emit_memcpy (code, ainfo->vtsize * sizeof (gpointer), inst->inst_basereg, doffset, ppc_r11, ainfo->offset + soffset);
2684                                 }
2685                         } else if (ainfo->regtype == RegTypeStructByAddr) {
2686                                 g_assert (ppc_is_imm16 (inst->inst_offset));
2687                                 /* FIXME: handle overrun! with struct sizes not multiple of 4 */
2688                                 code = emit_memcpy (code, ainfo->vtsize * sizeof (gpointer), inst->inst_basereg, inst->inst_offset, ainfo->reg, 0);
2689                         } else
2690                                 g_assert_not_reached ();
2691 #endif
2692                 }
2693                 pos++;
2694         }
2695
2696         if (method->save_lmf) {
2697
2698                 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
2699                              (gpointer)"mono_get_lmf_addr");
2700                 if (cfg->method->dynamic) {
2701                         /*ppc_lis (code, ppc_r0, 0);
2702                         ppc_ori (code, ppc_r0, ppc_r0, 0);
2703                         ppc_mtlr (code, ppc_r0);
2704                         ppc_blrl (code);*/
2705                 } else {
2706                         ARM_BL (code, 0);
2707                 }
2708 #if ARM_PORT
2709                 /* we build the MonoLMF structure on the stack - see mini-ppc.h */
2710                 /* lmf_offset is the offset from the previous stack pointer,
2711                  * alloc_size is the total stack space allocated, so the offset
2712                  * of MonoLMF from the current stack ptr is alloc_size - lmf_offset.
2713                  * The pointer to the struct is put in ppc_r11 (new_lmf).
2714                  * The callee-saved registers are already in the MonoLMF structure
2715                  */
2716                 ppc_addi (code, ppc_r11, ppc_sp, alloc_size - lmf_offset);
2717                 /* ppc_r3 is the result from mono_get_lmf_addr () */
2718                 ppc_stw (code, ppc_r3, G_STRUCT_OFFSET(MonoLMF, lmf_addr), ppc_r11);
2719                 /* new_lmf->previous_lmf = *lmf_addr */
2720                 ppc_lwz (code, ppc_r0, G_STRUCT_OFFSET(MonoLMF, previous_lmf), ppc_r3);
2721                 ppc_stw (code, ppc_r0, G_STRUCT_OFFSET(MonoLMF, previous_lmf), ppc_r11);
2722                 /* *(lmf_addr) = r11 */
2723                 ppc_stw (code, ppc_r11, G_STRUCT_OFFSET(MonoLMF, previous_lmf), ppc_r3);
2724                 /* save method info */
2725                 ppc_load (code, ppc_r0, method);
2726                 ppc_stw (code, ppc_r0, G_STRUCT_OFFSET(MonoLMF, method), ppc_r11);
2727                 ppc_stw (code, ppc_sp, G_STRUCT_OFFSET(MonoLMF, ebp), ppc_r11);
2728                 /* save the current IP */
2729                 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
2730                 ppc_load (code, ppc_r0, 0x01010101);
2731                 ppc_stw (code, ppc_r0, G_STRUCT_OFFSET(MonoLMF, eip), ppc_r11);
2732 #endif
2733         }
2734
2735         if (tracing)
2736                 code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
2737
2738         cfg->code_len = code - cfg->native_code;
2739         g_assert (cfg->code_len < cfg->code_size);
2740         g_free (cinfo);
2741
2742         return code;
2743 }
2744
2745 void
2746 mono_arch_emit_epilog (MonoCompile *cfg)
2747 {
2748         MonoJumpInfo *patch_info;
2749         MonoMethod *method = cfg->method;
2750         int pos, i;
2751         int max_epilog_size = 16 + 20*4;
2752         guint8 *code;
2753
2754         if (cfg->method->save_lmf)
2755                 max_epilog_size += 128;
2756
2757         if (mono_jit_trace_calls != NULL)
2758                 max_epilog_size += 50;
2759
2760         if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
2761                 max_epilog_size += 50;
2762
2763         while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
2764                 cfg->code_size *= 2;
2765                 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
2766                 mono_jit_stats.code_reallocs++;
2767         }
2768
2769         /*
2770          * Keep in sync with CEE_JMP
2771          */
2772         code = cfg->native_code + cfg->code_len;
2773
2774         if (mono_jit_trace_calls != NULL && mono_trace_eval (method)) {
2775                 code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
2776         }
2777         pos = 0;
2778
2779         if (method->save_lmf) {
2780 #if ARM_PORT
2781                 int lmf_offset;
2782                 pos +=  sizeof (MonoLMF);
2783                 lmf_offset = pos;
2784                 /* save the frame reg in r8 */
2785                 ppc_mr (code, ppc_r8, cfg->frame_reg);
2786                 ppc_addi (code, ppc_r11, cfg->frame_reg, cfg->stack_usage - lmf_offset);
2787                 /* r5 = previous_lmf */
2788                 ppc_lwz (code, ppc_r5, G_STRUCT_OFFSET(MonoLMF, previous_lmf), ppc_r11);
2789                 /* r6 = lmf_addr */
2790                 ppc_lwz (code, ppc_r6, G_STRUCT_OFFSET(MonoLMF, lmf_addr), ppc_r11);
2791                 /* *(lmf_addr) = previous_lmf */
2792                 ppc_stw (code, ppc_r5, G_STRUCT_OFFSET(MonoLMF, previous_lmf), ppc_r6);
2793                 /* FIXME: speedup: there is no actual need to restore the registers if
2794                  * we didn't actually change them (idea from Zoltan).
2795                  */
2796                 /* restore iregs */
2797                 ppc_lmw (code, ppc_r13, ppc_r11, G_STRUCT_OFFSET(MonoLMF, iregs));
2798                 /* restore fregs */
2799                 /*for (i = 14; i < 32; i++) {
2800                         ppc_lfd (code, i, G_STRUCT_OFFSET(MonoLMF, fregs) + ((i-14) * sizeof (gdouble)), ppc_r11);
2801                 }*/
2802                 g_assert (ppc_is_imm16 (cfg->stack_usage + PPC_RET_ADDR_OFFSET));
2803                 /* use the saved copy of the frame reg in r8 */
2804                 if (1 || cfg->flags & MONO_CFG_HAS_CALLS) {
2805                         ppc_lwz (code, ppc_r0, cfg->stack_usage + PPC_RET_ADDR_OFFSET, ppc_r8);
2806                         ppc_mtlr (code, ppc_r0);
2807                 }
2808                 ppc_addic (code, ppc_sp, ppc_r8, cfg->stack_usage);
2809 #endif
2810                 ARM_ADD_REG_IMM8 (code, ARMREG_SP, ARMREG_SP, cfg->stack_usage);
2811                 ARM_POP_NWB (code, cfg->used_int_regs | ((1 << ARMREG_SP) | (1 << ARMREG_PC)));
2812         } else {
2813                 ARM_ADD_REG_IMM8 (code, ARMREG_SP, ARMREG_SP, cfg->stack_usage);
2814                 ARM_POP_NWB (code, cfg->used_int_regs | ((1 << ARMREG_SP) | (1 << ARMREG_PC)));
2815         }
2816
2817         cfg->code_len = code - cfg->native_code;
2818
2819         g_assert (cfg->code_len < cfg->code_size);
2820
2821 }
2822
2823 /* remove once throw_exception_by_name is eliminated */
2824 static int
2825 exception_id_by_name (const char *name)
2826 {
2827         if (strcmp (name, "IndexOutOfRangeException") == 0)
2828                 return MONO_EXC_INDEX_OUT_OF_RANGE;
2829         if (strcmp (name, "OverflowException") == 0)
2830                 return MONO_EXC_OVERFLOW;
2831         if (strcmp (name, "ArithmeticException") == 0)
2832                 return MONO_EXC_ARITHMETIC;
2833         if (strcmp (name, "DivideByZeroException") == 0)
2834                 return MONO_EXC_DIVIDE_BY_ZERO;
2835         if (strcmp (name, "InvalidCastException") == 0)
2836                 return MONO_EXC_INVALID_CAST;
2837         if (strcmp (name, "NullReferenceException") == 0)
2838                 return MONO_EXC_NULL_REF;
2839         if (strcmp (name, "ArrayTypeMismatchException") == 0)
2840                 return MONO_EXC_ARRAY_TYPE_MISMATCH;
2841         g_error ("Unknown intrinsic exception %s\n", name);
2842 }
2843
2844 void
2845 mono_arch_emit_exceptions (MonoCompile *cfg)
2846 {
2847         MonoJumpInfo *patch_info;
2848         int nthrows, i;
2849         guint8 *code;
2850         const guint8* exc_throw_pos [MONO_EXC_INTRINS_NUM] = {NULL};
2851         guint8 exc_throw_found [MONO_EXC_INTRINS_NUM] = {0};
2852         guint32 code_size;
2853         int exc_count = 0;
2854         int max_epilog_size = 50;
2855
2856         /* count the number of exception infos */
2857
2858         /*
2859          * make sure we have enough space for exceptions
2860          * 12 is the simulated call to throw_exception_by_name
2861          */
2862         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
2863                 if (patch_info->type == MONO_PATCH_INFO_EXC) {
2864                         i = exception_id_by_name (patch_info->data.target);
2865                         if (!exc_throw_found [i]) {
2866                                 max_epilog_size += 12;
2867                                 exc_throw_found [i] = TRUE;
2868                         }
2869                 }
2870         }
2871
2872         while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
2873                 cfg->code_size *= 2;
2874                 cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
2875                 mono_jit_stats.code_reallocs++;
2876         }
2877
2878         code = cfg->native_code + cfg->code_len;
2879
2880         /* add code to raise exceptions */
2881         for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
2882                 switch (patch_info->type) {
2883                 case MONO_PATCH_INFO_EXC: {
2884                         unsigned char *ip = patch_info->ip.i + cfg->native_code;
2885                         i = exception_id_by_name (patch_info->data.target);
2886                         if (exc_throw_pos [i]) {
2887                                 arm_patch (ip, exc_throw_pos [i]);
2888                                 patch_info->type = MONO_PATCH_INFO_NONE;
2889                                 break;
2890                         } else {
2891                                 exc_throw_pos [i] = code;
2892                         }
2893                         arm_patch (ip, code);
2894                         /*mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_EXC_NAME, patch_info->data.target);*/
2895                         ARM_LDR_IMM (code, ARMREG_R0, ARMREG_PC, 0);
2896                         /* we got here from a conditional call, so the calling ip is set in lr already */
2897                         patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
2898                         patch_info->data.name = "mono_arch_throw_exception_by_name";
2899                         patch_info->ip.i = code - cfg->native_code;
2900                         ARM_B (code, 0);
2901                         *(gpointer*)code = patch_info->data.target;
2902                         code += 4;
2903                         break;
2904                 }
2905                 default:
2906                         /* do nothing */
2907                         break;
2908                 }
2909         }
2910
2911         cfg->code_len = code - cfg->native_code;
2912
2913         g_assert (cfg->code_len < cfg->code_size);
2914
2915 }
2916
2917 void
2918 mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
2919 {
2920 }
2921
2922 void
2923 mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
2924 {
2925 }
2926
2927 void
2928 mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *inst, int this_reg, int this_type, int vt_reg)
2929 {
2930
2931         int this_dreg = ARMREG_R0;
2932
2933         if (vt_reg != -1)
2934                 this_dreg = ARMREG_R1;
2935
2936         /* add the this argument */
2937         if (this_reg != -1) {
2938                 MonoInst *this;
2939                 MONO_INST_NEW (cfg, this, OP_SETREG);
2940                 this->type = this_type;
2941                 this->sreg1 = this_reg;
2942                 this->dreg = mono_regstate_next_int (cfg->rs);
2943                 mono_bblock_add_inst (cfg->cbb, this);
2944                 mono_call_inst_add_outarg_reg (inst, this->dreg, this_dreg, FALSE);
2945         }
2946
2947         if (vt_reg != -1) {
2948                 MonoInst *vtarg;
2949                 MONO_INST_NEW (cfg, vtarg, OP_SETREG);
2950                 vtarg->type = STACK_MP;
2951                 vtarg->sreg1 = vt_reg;
2952                 vtarg->dreg = mono_regstate_next_int (cfg->rs);
2953                 mono_bblock_add_inst (cfg->cbb, vtarg);
2954                 mono_call_inst_add_outarg_reg (inst, vtarg->dreg, ARMREG_R0, FALSE);
2955         }
2956 }
2957
2958 MonoInst*
2959 mono_arch_get_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
2960 {
2961         return NULL;
2962 }
2963
2964 gboolean
2965 mono_arch_print_tree (MonoInst *tree, int arity)
2966 {
2967         return 0;
2968 }
2969
2970 MonoInst* mono_arch_get_domain_intrinsic (MonoCompile* cfg)
2971 {
2972         return NULL;
2973 }
2974
2975 MonoInst*
2976 mono_arch_get_thread_intrinsic (MonoCompile* cfg)
2977 {
2978         return NULL;
2979 }
2980
2981 void
2982 mono_arch_flush_register_windows (void)
2983 {
2984 }
2985