mono/mini/local-propagation.c

   1 /*
   2  * local-propagation.c: Local constant, copy and tree propagation.
   3  *
   4  * To make some sense of the tree mover, read mono/docs/tree-mover.txt
   5  *
   6  * Author:
   7  *   Paolo Molaro (lupus@ximian.com)
   8  *   Dietmar Maurer (dietmar@ximian.com)
   9  *   Massimiliano Mantione (massi@ximian.com)
  10  *
  11  * (C) 2006 Novell, Inc.  http://www.novell.com
  12  * Copyright 2011 Xamarin, Inc (http://www.xamarin.com)
  13  */
  14
  15 #include <config.h>
  16 #ifndef DISABLE_JIT
  17
  18 #include <string.h>
  19 #include <stdio.h>
  20 #ifdef HAVE_ALLOCA_H
  21 #include <alloca.h>
  22 #endif
  23
  24 #include <mono/metadata/debug-helpers.h>
  25 #include <mono/metadata/mempool.h>
  26 #include <mono/metadata/opcodes.h>
  27 #include "mini.h"
  28 #include "ir-emit.h"
  29
  30 #ifndef MONO_ARCH_IS_OP_MEMBASE
  31 #define MONO_ARCH_IS_OP_MEMBASE(opcode) FALSE
  32 #endif
  33
  34 static inline MonoBitSet*
  35 mono_bitset_mp_new_noinit (MonoMemPool *mp,  guint32 max_size)
  36 {
  37         int size = mono_bitset_alloc_size (max_size, 0);
  38         gpointer mem;
  39
  40         mem = mono_mempool_alloc (mp, size);
  41         return mono_bitset_mem_new (mem, max_size, MONO_BITSET_DONT_FREE);
  42 }
  43
  44 /*
  45  * Replaces ins with optimized opcodes.
  46  *
  47  * We can emit to cbb the equivalent instructions which will be used as
  48  * replacement for ins, or simply change the fields of ins. Spec needs to
  49  * be updated if we silently change the opcode of ins.
  50  *
  51  * Returns TRUE if additional vregs were allocated.
  52  */
  53 static gboolean
  54 mono_strength_reduction_ins (MonoCompile *cfg, MonoInst *ins, const char **spec)
  55 {
  56         gboolean allocated_vregs = FALSE;
  57
  58         /* FIXME: Add long/float */
  59         switch (ins->opcode) {
  60         case OP_MOVE:
  61         case OP_XMOVE:
  62                 if (ins->dreg == ins->sreg1) {
  63                         NULLIFY_INS (ins);
  64                 }
  65                 break;
  66         case OP_ADD_IMM:
  67         case OP_IADD_IMM:
  68         case OP_SUB_IMM:
  69         case OP_ISUB_IMM:
  70 #if SIZEOF_REGISTER == 8
  71         case OP_LADD_IMM:
  72         case OP_LSUB_IMM:
  73 #endif
  74                 if (ins->inst_imm == 0) {
  75                         ins->opcode = OP_MOVE;
  76                 }
  77                 break;
  78         case OP_MUL_IMM:
  79         case OP_IMUL_IMM:
  80 #if SIZEOF_REGISTER == 8
  81         case OP_LMUL_IMM:
  82 #endif
  83                 if (ins->inst_imm == 0) {
  84                         ins->opcode = (ins->opcode == OP_LMUL_IMM) ? OP_I8CONST : OP_ICONST;
  85                         ins->inst_c0 = 0;
  86                         ins->sreg1 = -1;
  87                 } else if (ins->inst_imm == 1) {
  88                         ins->opcode = OP_MOVE;
  89                 } else if ((ins->opcode == OP_IMUL_IMM) && (ins->inst_imm == -1)) {
  90                         ins->opcode = OP_INEG;
  91                 } else if ((ins->opcode == OP_LMUL_IMM) && (ins->inst_imm == -1)) {
  92                         ins->opcode = OP_LNEG;
  93                 } else {
  94                         int power2 = mono_is_power_of_two (ins->inst_imm);
  95                         if (power2 >= 0) {
  96                                 ins->opcode = (ins->opcode == OP_MUL_IMM) ? OP_SHL_IMM : ((ins->opcode == OP_LMUL_IMM) ? OP_LSHL_IMM : OP_ISHL_IMM);
  97                                 ins->inst_imm = power2;
  98                         }
  99                 }
 100                 break;
 101         case OP_IREM_UN_IMM:
 102         case OP_IDIV_UN_IMM: {
 103                 int c = ins->inst_imm;
 104                 int power2 = mono_is_power_of_two (c);
 105
 106                 if (power2 >= 0) {
 107                         if (ins->opcode == OP_IREM_UN_IMM) {
 108                                 ins->opcode = OP_IAND_IMM;
 109                                 ins->sreg2 = -1;
 110                                 ins->inst_imm = (1 << power2) - 1;
 111                         } else if (ins->opcode == OP_IDIV_UN_IMM) {
 112                                 ins->opcode = OP_ISHR_UN_IMM;
 113                                 ins->sreg2 = -1;
 114                                 ins->inst_imm = power2;
 115                         }
 116                 }
 117                 break;
 118         }
 119         case OP_IDIV_IMM: {
 120                 int c = ins->inst_imm;
 121                 int power2 = mono_is_power_of_two (c);
 122
 123                 if (power2 == 1) {
 124                         int r1 = mono_alloc_ireg (cfg);
 125
 126                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, r1, ins->sreg1, 31);
 127                         MONO_EMIT_NEW_BIALU (cfg, OP_IADD, r1, r1, ins->sreg1);
 128                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, ins->dreg, r1, 1);
 129
 130                         allocated_vregs = TRUE;
 131                 } else if (power2 > 0 && power2 < 31) {
 132                         int r1 = mono_alloc_ireg (cfg);
 133
 134                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, r1, ins->sreg1, 31);
 135                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, r1, r1, (32 - power2));
 136                         MONO_EMIT_NEW_BIALU (cfg, OP_IADD, r1, r1, ins->sreg1);
 137                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, ins->dreg, r1, power2);
 138
 139                         allocated_vregs = TRUE;
 140                 }
 141                 break;
 142         }
 143 #if SIZEOF_REGISTER == 8
 144         case OP_LREM_IMM:
 145 #endif
 146         case OP_IREM_IMM: {
 147                 int power = mono_is_power_of_two (ins->inst_imm);
 148                 if (ins->inst_imm == 1) {
 149                         ins->opcode = OP_ICONST;
 150                         MONO_INST_NULLIFY_SREGS (ins);
 151                         ins->inst_c0 = 0;
 152 #if __s390__
 153                 }
 154 #else
 155                 } else if ((ins->inst_imm > 0) && (ins->inst_imm < (1LL << 32)) && (power != -1)) {
 156                         gboolean is_long = ins->opcode == OP_LREM_IMM;
 157                         int compensator_reg = alloc_ireg (cfg);
 158                         int intermediate_reg;
 159
 160                         /* Based on gcc code */
 161
 162                         /* Add compensation for negative numerators */
 163
 164                         if (power > 1) {
 165                                 intermediate_reg = compensator_reg;
 166                                 MONO_EMIT_NEW_BIALU_IMM (cfg, is_long ? OP_LSHR_IMM : OP_ISHR_IMM, intermediate_reg, ins->sreg1, is_long ? 63 : 31);
 167                         } else {
 168                                 intermediate_reg = ins->sreg1;
 169                         }
 170
 171                         MONO_EMIT_NEW_BIALU_IMM (cfg, is_long ? OP_LSHR_UN_IMM : OP_ISHR_UN_IMM, compensator_reg, intermediate_reg, (is_long ? 64 : 32) - power);
 172                         MONO_EMIT_NEW_BIALU (cfg, is_long ? OP_LADD : OP_IADD, ins->dreg, ins->sreg1, compensator_reg);
 173                         /* Compute remainder */
 174                         MONO_EMIT_NEW_BIALU_IMM (cfg, is_long ? OP_LAND_IMM : OP_AND_IMM, ins->dreg, ins->dreg, (1 << power) - 1);
 175                         /* Remove compensation */
 176                         MONO_EMIT_NEW_BIALU (cfg, is_long ? OP_LSUB : OP_ISUB, ins->dreg, ins->dreg, compensator_reg);
 177
 178                         allocated_vregs = TRUE;
 179                 }
 180 #endif
 181                 break;
 182         }
 183 #if SIZEOF_REGISTER == 4
 184         case OP_LSHR_IMM: {
 185                 if (ins->inst_c1 == 32) {
 186                         MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_LS (ins->dreg), MONO_LVREG_MS (ins->sreg1));
 187                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1), 31);
 188                 } else if (ins->inst_c1 == 0) {
 189                         MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->sreg1));
 190                         MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1));
 191                 } else if (ins->inst_c1 > 32) {
 192                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, MONO_LVREG_LS (ins->dreg), MONO_LVREG_MS (ins->sreg1), ins->inst_c1 - 32);
 193                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1), 31);
 194                 } else {
 195                         guint32 tmpreg = alloc_ireg (cfg);
 196                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHL_IMM, tmpreg, MONO_LVREG_MS (ins->sreg1), 32 - ins->inst_c1);
 197                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1), ins->inst_c1);
 198                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->sreg1), ins->inst_c1);
 199                         MONO_EMIT_NEW_BIALU (cfg, OP_IOR, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->dreg), tmpreg);
 200                         allocated_vregs = TRUE;
 201                 }
 202                 break;
 203         }
 204         case OP_LSHR_UN_IMM: {
 205                 if (ins->inst_c1 == 32) {
 206                         MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_LS (ins->dreg), MONO_LVREG_MS (ins->sreg1));
 207                         MONO_EMIT_NEW_ICONST (cfg, MONO_LVREG_MS (ins->dreg), 0);
 208                 } else if (ins->inst_c1 == 0) {
 209                         MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->sreg1));
 210                         MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1));
 211                 } else if (ins->inst_c1 > 32) {
 212                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, MONO_LVREG_LS (ins->dreg), MONO_LVREG_MS (ins->sreg1), ins->inst_c1 - 32);
 213                         MONO_EMIT_NEW_ICONST (cfg, MONO_LVREG_MS (ins->dreg), 0);
 214                 } else {
 215                         guint32 tmpreg = alloc_ireg (cfg);
 216                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHL_IMM, tmpreg, MONO_LVREG_MS (ins->sreg1), 32 - ins->inst_c1);
 217                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1), ins->inst_c1);
 218                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->sreg1), ins->inst_c1);
 219                         MONO_EMIT_NEW_BIALU (cfg, OP_IOR, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->dreg), tmpreg);
 220                         allocated_vregs = TRUE;
 221                 }
 222                 break;
 223         }
 224         case OP_LSHL_IMM: {
 225                 if (ins->inst_c1 == 32) {
 226                         /* just move the lower half to the upper and zero the lower word */
 227                         MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_MS (ins->dreg), MONO_LVREG_LS (ins->sreg1));
 228                         MONO_EMIT_NEW_ICONST (cfg, MONO_LVREG_LS (ins->dreg), 0);
 229                 } else if (ins->inst_c1 == 0) {
 230                         MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->sreg1));
 231                         MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1));
 232                 } else if (ins->inst_c1 > 32) {
 233                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHL_IMM, MONO_LVREG_MS (ins->dreg), MONO_LVREG_LS (ins->sreg1), ins->inst_c1 - 32);
 234                         MONO_EMIT_NEW_ICONST (cfg, MONO_LVREG_LS (ins->dreg), 0);
 235                 } else {
 236                         guint32 tmpreg = alloc_ireg (cfg);
 237                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, tmpreg, MONO_LVREG_LS (ins->sreg1), 32 - ins->inst_c1);
 238                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHL_IMM, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1), ins->inst_c1);
 239                         MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHL_IMM, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->sreg1), ins->inst_c1);
 240                         MONO_EMIT_NEW_BIALU (cfg, OP_IOR, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->dreg), tmpreg);
 241                         allocated_vregs = TRUE;
 242                 }
 243                 break;
 244         }
 245 #endif
 246
 247         default:
 248                 break;
 249         }
 250
 251         *spec = INS_INFO (ins->opcode);
 252         return allocated_vregs;
 253 }
 254
 255 /*
 256  * mono_local_cprop:
 257  *
 258  *  A combined local copy and constant propagation pass.
 259  */
 260 void
 261 mono_local_cprop (MonoCompile *cfg)
 262 {
 263         MonoBasicBlock *bb, *bb_opt;
 264         MonoInst **defs;
 265         gint32 *def_index;
 266         int max;
 267         int filter = FILTER_IL_SEQ_POINT;
 268         int initial_max_vregs = cfg->next_vreg;
 269
 270         max = cfg->next_vreg;
 271         defs = (MonoInst **)mono_mempool_alloc (cfg->mempool, sizeof (MonoInst*) * cfg->next_vreg);
 272         def_index = (gint32 *)mono_mempool_alloc (cfg->mempool, sizeof (guint32) * cfg->next_vreg);
 273         cfg->cbb = bb_opt = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoBasicBlock));
 274
 275         for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
 276                 MonoInst *ins;
 277                 int ins_index;
 278                 int last_call_index;
 279
 280                 /* Manually init the defs entries used by the bblock */
 281                 MONO_BB_FOR_EACH_INS (bb, ins) {
 282                         int sregs [MONO_MAX_SRC_REGS];
 283                         int num_sregs, i;
 284
 285                         if (ins->dreg != -1) {
 286 #if SIZEOF_REGISTER == 4
 287                                 const char *spec = INS_INFO (ins->opcode);
 288                                 if (spec [MONO_INST_DEST] == 'l') {
 289                                         defs [ins->dreg + 1] = NULL;
 290                                         defs [ins->dreg + 2] = NULL;
 291                                 }
 292 #endif
 293                                 defs [ins->dreg] = NULL;
 294                         }
 295
 296                         num_sregs = mono_inst_get_src_registers (ins, sregs);
 297                         for (i = 0; i < num_sregs; ++i) {
 298                                 int sreg = sregs [i];
 299 #if SIZEOF_REGISTER == 4
 300                                 const char *spec = INS_INFO (ins->opcode);
 301                                 if (spec [MONO_INST_SRC1 + i] == 'l') {
 302                                         defs [sreg + 1] = NULL;
 303                                         defs [sreg + 2] = NULL;
 304                                 }
 305 #endif
 306                                 defs [sreg] = NULL;
 307                         }
 308                 }
 309
 310                 ins_index = 0;
 311                 last_call_index = -1;
 312                 MONO_BB_FOR_EACH_INS (bb, ins) {
 313                         const char *spec = INS_INFO (ins->opcode);
 314                         int regtype, srcindex, sreg;
 315                         int num_sregs;
 316                         int sregs [MONO_MAX_SRC_REGS];
 317
 318                         if (ins->opcode == OP_NOP) {
 319                                 MONO_DELETE_INS (bb, ins);
 320                                 continue;
 321                         }
 322
 323                         g_assert (ins->opcode > MONO_CEE_LAST);
 324
 325                         /* FIXME: Optimize this */
 326                         if (ins->opcode == OP_LDADDR) {
 327                                 MonoInst *var = (MonoInst *)ins->inst_p0;
 328
 329                                 defs [var->dreg] = NULL;
 330                                 /*
 331                                 if (!MONO_TYPE_ISSTRUCT (var->inst_vtype))
 332                                         break;
 333                                 */
 334                         }
 335
 336                         if (MONO_IS_STORE_MEMBASE (ins)) {
 337                                 sreg = ins->dreg;
 338                                 regtype = 'i';
 339
 340                                 if ((regtype == 'i') && (sreg != -1) && defs [sreg]) {
 341                                         MonoInst *def = defs [sreg];
 342
 343                                         if ((def->opcode == OP_MOVE) && (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg])) && !vreg_is_volatile (cfg, def->sreg1)) {
 344                                                 int vreg = def->sreg1;
 345                                                 if (cfg->verbose_level > 2) printf ("CCOPY: R%d -> R%d\n", sreg, vreg);
 346                                                 ins->dreg = vreg;
 347                                         }
 348                                 }
 349                         }
 350
 351                         num_sregs = mono_inst_get_src_registers (ins, sregs);
 352                         for (srcindex = 0; srcindex < num_sregs; ++srcindex) {
 353                                 MonoInst *def;
 354
 355                                 mono_inst_get_src_registers (ins, sregs);
 356
 357                                 regtype = spec [MONO_INST_SRC1 + srcindex];
 358                                 sreg = sregs [srcindex];
 359
 360                                 if ((regtype == ' ') || (sreg == -1) || (!defs [sreg]))
 361                                         continue;
 362
 363                                 def = defs [sreg];
 364
 365                                 /* Copy propagation */
 366                                 /*
 367                                  * The first check makes sure the source of the copy did not change since
 368                                  * the copy was made.
 369                                  * The second check avoids volatile variables.
 370                                  * The third check avoids copy propagating local vregs through a call,
 371                                  * since the lvreg will be spilled
 372                                  * The fourth check avoids copy propagating a vreg in cases where
 373                                  * it would be eliminated anyway by reverse copy propagation later,
 374                                  * because propagating it would create another use for it, thus making
 375                                  * it impossible to use reverse copy propagation.
 376                                  */
 377                                 /* Enabling this for floats trips up the fp stack */
 378                                 /*
 379                                  * Enabling this for floats on amd64 seems to cause a failure in
 380                                  * basic-math.cs, most likely because it gets rid of some r8->r4
 381                                  * conversions.
 382                                  */
 383                                 if (MONO_IS_MOVE (def) &&
 384                                         (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg])) &&
 385                                         !vreg_is_volatile (cfg, def->sreg1) &&
 386                                         /* This avoids propagating local vregs across calls */
 387                                         ((get_vreg_to_inst (cfg, def->sreg1) || !defs [def->sreg1] || (def_index [def->sreg1] >= last_call_index) || (def->opcode == OP_VMOVE))) &&
 388                                         !(defs [def->sreg1] && mono_inst_next (defs [def->sreg1], filter) == def) &&
 389                                         (!MONO_ARCH_USE_FPSTACK || (def->opcode != OP_FMOVE)) &&
 390                                         (def->opcode != OP_FMOVE)) {
 391                                         int vreg = def->sreg1;
 392
 393                                         if (cfg->verbose_level > 2) printf ("CCOPY/2: R%d -> R%d\n", sreg, vreg);
 394                                         sregs [srcindex] = vreg;
 395                                         mono_inst_set_src_registers (ins, sregs);
 396
 397                                         /* Allow further iterations */
 398                                         srcindex = -1;
 399                                         continue;
 400                                 }
 401
 402                                 /* Constant propagation */
 403                                 /* FIXME: Make is_inst_imm a macro */
 404                                 /* FIXME: Make is_inst_imm take an opcode argument */
 405                                 /* is_inst_imm is only needed for binops */
 406                                 if ((((def->opcode == OP_ICONST) || ((sizeof (gpointer) == 8) && (def->opcode == OP_I8CONST))) &&
 407                                          (((srcindex == 0) && (ins->sreg2 == -1)) || mono_arch_is_inst_imm (def->inst_c0))) ||
 408                                         (!MONO_ARCH_USE_FPSTACK && (def->opcode == OP_R8CONST))) {
 409                                         guint32 opcode2;
 410
 411                                         /* srcindex == 1 -> binop, ins->sreg2 == -1 -> unop */
 412                                         if ((srcindex == 1) && (ins->sreg1 != -1) && defs [ins->sreg1] && (defs [ins->sreg1]->opcode == OP_ICONST) && defs [ins->sreg2]) {
 413                                                 /* Both arguments are constants, perform cfold */
 414                                                 mono_constant_fold_ins (cfg, ins, defs [ins->sreg1], defs [ins->sreg2], TRUE);
 415                                         } else if ((srcindex == 0) && (ins->sreg2 != -1) && defs [ins->sreg2]) {
 416                                                 /* Arg 1 is constant, swap arguments if possible */
 417                                                 int opcode = ins->opcode;
 418                                                 mono_constant_fold_ins (cfg, ins, defs [ins->sreg1], defs [ins->sreg2], TRUE);
 419                                                 if (ins->opcode != opcode) {
 420                                                         /* Allow further iterations */
 421                                                         srcindex = -1;
 422                                                         continue;
 423                                                 }
 424                                         } else if ((srcindex == 0) && (ins->sreg2 == -1)) {
 425                                                 /* Constant unop, perform cfold */
 426                                                 mono_constant_fold_ins (cfg, ins, defs [ins->sreg1], NULL, TRUE);
 427                                         }
 428
 429                                         opcode2 = mono_op_to_op_imm (ins->opcode);
 430                                         if ((opcode2 != -1) && mono_arch_is_inst_imm (def->inst_c0) && ((srcindex == 1) || (ins->sreg2 == -1))) {
 431                                                 ins->opcode = opcode2;
 432                                                 if ((def->opcode == OP_I8CONST) && (sizeof (gpointer) == 4)) {
 433                                                         ins->inst_ls_word = def->inst_ls_word;
 434                                                         ins->inst_ms_word = def->inst_ms_word;
 435                                                 } else {
 436                                                         ins->inst_imm = def->inst_c0;
 437                                                 }
 438                                                 sregs [srcindex] = -1;
 439                                                 mono_inst_set_src_registers (ins, sregs);
 440
 441                                                 if ((opcode2 == OP_VOIDCALL) || (opcode2 == OP_CALL) || (opcode2 == OP_LCALL) || (opcode2 == OP_FCALL))
 442                                                         ((MonoCallInst*)ins)->fptr = (gpointer)ins->inst_imm;
 443
 444                                                 /* Allow further iterations */
 445                                                 srcindex = -1;
 446                                                 continue;
 447                                         }
 448                                         else {
 449                                                 /* Special cases */
 450 #if defined(TARGET_X86) || defined(TARGET_AMD64)
 451                                                 if ((ins->opcode == OP_X86_LEA) && (srcindex == 1)) {
 452 #if SIZEOF_REGISTER == 8
 453                                                         /* FIXME: Use OP_PADD_IMM when the new JIT is done */
 454                                                         ins->opcode = OP_LADD_IMM;
 455 #else
 456                                                         ins->opcode = OP_ADD_IMM;
 457 #endif
 458                                                         ins->inst_imm += def->inst_c0 << ins->backend.shift_amount;
 459                                                         ins->sreg2 = -1;
 460                                                 }
 461 #endif
 462                                                 opcode2 = mono_load_membase_to_load_mem (ins->opcode);
 463                                                 if ((srcindex == 0) && (opcode2 != -1) && mono_arch_is_inst_imm (def->inst_c0)) {
 464                                                         ins->opcode = opcode2;
 465                                                         ins->inst_imm = def->inst_c0 + ins->inst_offset;
 466                                                         ins->sreg1 = -1;
 467                                                 }
 468                                         }
 469                                 }
 470                                 else if (((def->opcode == OP_ADD_IMM) || (def->opcode == OP_LADD_IMM)) && (MONO_IS_LOAD_MEMBASE (ins) || MONO_ARCH_IS_OP_MEMBASE (ins->opcode))) {
 471                                         /* ADD_IMM is created by spill_global_vars */
 472                                         /*
 473                                          * We have to guarantee that def->sreg1 haven't changed since def->dreg
 474                                          * was defined. cfg->frame_reg is assumed to remain constant.
 475                                          */
 476                                         if ((def->sreg1 == cfg->frame_reg) || ((mono_inst_next (def, filter) == ins) && (def->dreg != def->sreg1))) {
 477                                                 ins->inst_basereg = def->sreg1;
 478                                                 ins->inst_offset += def->inst_imm;
 479                                         }
 480                                 } else if ((ins->opcode == OP_ISUB_IMM) && (def->opcode == OP_IADD_IMM) && (mono_inst_next (def, filter) == ins) && (def->dreg != def->sreg1)) {
 481                                         ins->sreg1 = def->sreg1;
 482                                         ins->inst_imm -= def->inst_imm;
 483                                 } else if ((ins->opcode == OP_IADD_IMM) && (def->opcode == OP_ISUB_IMM) && (mono_inst_next (def, filter) == ins) && (def->dreg != def->sreg1)) {
 484                                         ins->sreg1 = def->sreg1;
 485                                         ins->inst_imm -= def->inst_imm;
 486                                 } else if (ins->opcode == OP_STOREI1_MEMBASE_REG &&
 487                                                    (def->opcode == OP_ICONV_TO_U1 || def->opcode == OP_ICONV_TO_I1 || def->opcode == OP_SEXT_I4 || (SIZEOF_REGISTER == 8 && def->opcode == OP_LCONV_TO_U1)) &&
 488                                                    (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg]))) {
 489                                         /* Avoid needless sign extension */
 490                                         ins->sreg1 = def->sreg1;
 491                                 } else if (ins->opcode == OP_STOREI2_MEMBASE_REG &&
 492                                                    (def->opcode == OP_ICONV_TO_U2 || def->opcode == OP_ICONV_TO_I2 || def->opcode == OP_SEXT_I4 || (SIZEOF_REGISTER == 8 && def->opcode == OP_LCONV_TO_I2)) &&
 493                                                    (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg]))) {
 494                                         /* Avoid needless sign extension */
 495                                         ins->sreg1 = def->sreg1;
 496                                 } else if (ins->opcode == OP_COMPARE_IMM && def->opcode == OP_LDADDR && ins->inst_imm == 0) {
 497                                         MonoInst dummy_arg1;
 498
 499                                         memset (&dummy_arg1, 0, sizeof (MonoInst));
 500                                         dummy_arg1.opcode = OP_ICONST;
 501                                         dummy_arg1.inst_c0 = 1;
 502
 503                                         mono_constant_fold_ins (cfg, ins, &dummy_arg1, NULL, TRUE);
 504                                 }
 505                         }
 506
 507                         g_assert (cfg->cbb == bb_opt);
 508                         g_assert (!bb_opt->code);
 509                         /* Do strength reduction here */
 510                         if (mono_strength_reduction_ins (cfg, ins, &spec) && max < cfg->next_vreg) {
 511                                 MonoInst **defs_prev = defs;
 512                                 gint32 *def_index_prev = def_index;
 513                                 guint32 prev_max = max;
 514                                 guint32 additional_vregs = cfg->next_vreg - initial_max_vregs;
 515
 516                                 /* We have more vregs so we need to reallocate defs and def_index arrays */
 517                                 max  = initial_max_vregs + additional_vregs * 2;
 518                                 defs = (MonoInst **)mono_mempool_alloc (cfg->mempool, sizeof (MonoInst*) * max);
 519                                 def_index = (gint32 *)mono_mempool_alloc (cfg->mempool, sizeof (guint32) * max);
 520
 521                                 /* Keep the entries for the previous vregs, zero the rest */
 522                                 memcpy (defs, defs_prev, sizeof (MonoInst*) * prev_max);
 523                                 memset (defs + prev_max, 0, sizeof (MonoInst*) * (max - prev_max));
 524                                 memcpy (def_index, def_index_prev, sizeof (guint32) * prev_max);
 525                                 memset (def_index + prev_max, 0, sizeof (guint32) * (max - prev_max));
 526                         }
 527
 528                         if (cfg->cbb->code || (cfg->cbb != bb_opt)) {
 529                                 MonoInst *saved_prev = ins->prev;
 530
 531                                 /* If we have code in cbb, we need to replace ins with the decomposition */
 532                                 mono_replace_ins (cfg, bb, ins, &ins->prev, bb_opt, cfg->cbb);
 533                                 bb_opt->code = bb_opt->last_ins = NULL;
 534                                 bb_opt->in_count = bb_opt->out_count = 0;
 535                                 cfg->cbb = bb_opt;
 536
 537                                 /* ins is hanging, continue scanning the emitted code */
 538                                 ins = saved_prev;
 539                                 continue;
 540                         }
 541
 542                         if (spec [MONO_INST_DEST] != ' ') {
 543                                 MonoInst *def = defs [ins->dreg];
 544
 545                                 if (def && (def->opcode == OP_ADD_IMM) && (def->sreg1 == cfg->frame_reg) && (MONO_IS_STORE_MEMBASE (ins))) {
 546                                         /* ADD_IMM is created by spill_global_vars */
 547                                         /* cfg->frame_reg is assumed to remain constant */
 548                                         ins->inst_destbasereg = def->sreg1;
 549                                         ins->inst_offset += def->inst_imm;
 550                                 }
 551                         }
 552
 553                         if ((spec [MONO_INST_DEST] != ' ') && !MONO_IS_STORE_MEMBASE (ins) && !vreg_is_volatile (cfg, ins->dreg)) {
 554                                 defs [ins->dreg] = ins;
 555                                 def_index [ins->dreg] = ins_index;
 556                         }
 557
 558                         if (MONO_IS_CALL (ins))
 559                                 last_call_index = ins_index;
 560
 561                         ins_index ++;
 562                 }
 563         }
 564 }
 565
 566 static inline gboolean
 567 reg_is_softreg_no_fpstack (int reg, const char spec)
 568 {
 569         return (spec == 'i' && reg >= MONO_MAX_IREGS)
 570                 || ((spec == 'f' && reg >= MONO_MAX_FREGS) && !MONO_ARCH_USE_FPSTACK)
 571 #ifdef MONO_ARCH_SIMD_INTRINSICS
 572                 || (spec == 'x' && reg >= MONO_MAX_XREGS)
 573 #endif
 574                 || (spec == 'v');
 575 }
 576
 577 static inline gboolean
 578 reg_is_softreg (int reg, const char spec)
 579 {
 580         return (spec == 'i' && reg >= MONO_MAX_IREGS)
 581                 || (spec == 'f' && reg >= MONO_MAX_FREGS)
 582 #ifdef MONO_ARCH_SIMD_INTRINSICS
 583                 || (spec == 'x' && reg >= MONO_MAX_XREGS)
 584 #endif
 585                 || (spec == 'v');
 586 }
 587
 588 static inline gboolean
 589 mono_is_simd_accessor (MonoInst *ins)
 590 {
 591         switch (ins->opcode) {
 592 #ifdef MONO_ARCH_SIMD_INTRINSICS
 593         case OP_INSERT_I1:
 594         case OP_INSERT_I2:
 595         case OP_INSERT_I4:
 596         case OP_INSERT_I8:
 597         case OP_INSERT_R4:
 598         case OP_INSERT_R8:
 599
 600         case OP_INSERTX_U1_SLOW:
 601         case OP_INSERTX_I4_SLOW:
 602         case OP_INSERTX_R4_SLOW:
 603         case OP_INSERTX_R8_SLOW:
 604         case OP_INSERTX_I8_SLOW:
 605                 return TRUE;
 606 #endif
 607         default:
 608                 return FALSE;
 609         }
 610 }
 611
 612 /**
 613  * mono_local_deadce:
 614  *
 615  *   Get rid of the dead assignments to local vregs like the ones created by the
 616  * copyprop pass.
 617  */
 618 void
 619 mono_local_deadce (MonoCompile *cfg)
 620 {
 621         MonoBasicBlock *bb;
 622         MonoInst *ins, *prev;
 623         MonoBitSet *used, *defined;
 624
 625         //mono_print_code (cfg, "BEFORE LOCAL-DEADCE");
 626
 627         /*
 628          * Assignments to global vregs can't be eliminated so this pass must come
 629          * after the handle_global_vregs () pass.
 630          */
 631
 632         used = mono_bitset_mp_new_noinit (cfg->mempool, cfg->next_vreg + 1);
 633         defined = mono_bitset_mp_new_noinit (cfg->mempool, cfg->next_vreg + 1);
 634
 635         /* First pass: collect liveness info */
 636         for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
 637                 /* Manually init the defs entries used by the bblock */
 638                 MONO_BB_FOR_EACH_INS (bb, ins) {
 639                         const char *spec = INS_INFO (ins->opcode);
 640                         int sregs [MONO_MAX_SRC_REGS];
 641                         int num_sregs, i;
 642
 643                         if (spec [MONO_INST_DEST] != ' ') {
 644                                 mono_bitset_clear_fast (used, ins->dreg);
 645                                 mono_bitset_clear_fast (defined, ins->dreg);
 646 #if SIZEOF_REGISTER == 4
 647                                 /* Regpairs */
 648                                 mono_bitset_clear_fast (used, ins->dreg + 1);
 649                                 mono_bitset_clear_fast (defined, ins->dreg + 1);
 650 #endif
 651                         }
 652                         num_sregs = mono_inst_get_src_registers (ins, sregs);
 653                         for (i = 0; i < num_sregs; ++i) {
 654                                 mono_bitset_clear_fast (used, sregs [i]);
 655 #if SIZEOF_REGISTER == 4
 656                                 mono_bitset_clear_fast (used, sregs [i] + 1);
 657 #endif
 658                         }
 659                 }
 660
 661                 /*
 662                  * Make a reverse pass over the instruction list
 663                  */
 664                 MONO_BB_FOR_EACH_INS_REVERSE_SAFE (bb, prev, ins) {
 665                         const char *spec = INS_INFO (ins->opcode);
 666                         int sregs [MONO_MAX_SRC_REGS];
 667                         int num_sregs, i;
 668                         MonoInst *prev_f = mono_inst_prev (ins, FILTER_NOP | FILTER_IL_SEQ_POINT);
 669
 670                         if (ins->opcode == OP_NOP) {
 671                                 MONO_DELETE_INS (bb, ins);
 672                                 continue;
 673                         }
 674
 675                         g_assert (ins->opcode > MONO_CEE_LAST);
 676
 677                         if (MONO_IS_NON_FP_MOVE (ins) && prev_f) {
 678                                 MonoInst *def;
 679                                 const char *spec2;
 680
 681                                 def = prev_f;
 682                                 spec2 = INS_INFO (def->opcode);
 683
 684                                 /*
 685                                  * Perform a limited kind of reverse copy propagation, i.e.
 686                                  * transform B <- FOO; A <- B into A <- FOO
 687                                  * This isn't copyprop, not deadce, but it can only be performed
 688                                  * after handle_global_vregs () has run.
 689                                  */
 690                                 if (!get_vreg_to_inst (cfg, ins->sreg1) && (spec2 [MONO_INST_DEST] != ' ') && (def->dreg == ins->sreg1) && !mono_bitset_test_fast (used, ins->sreg1) && !MONO_IS_STORE_MEMBASE (def) && reg_is_softreg (ins->sreg1, spec [MONO_INST_DEST]) && !mono_is_simd_accessor (def)) {
 691                                         if (cfg->verbose_level > 2) {
 692                                                 printf ("\tReverse copyprop in BB%d on ", bb->block_num);
 693                                                 mono_print_ins (ins);
 694                                         }
 695
 696                                         def->dreg = ins->dreg;
 697                                         MONO_DELETE_INS (bb, ins);
 698                                         spec = INS_INFO (ins->opcode);
 699                                 }
 700                         }
 701
 702                         /* Enabling this on x86 could screw up the fp stack */
 703                         if (reg_is_softreg_no_fpstack (ins->dreg, spec [MONO_INST_DEST])) {
 704                                 /*
 705                                  * Assignments to global vregs can only be eliminated if there is another
 706                                  * assignment to the same vreg later in the same bblock.
 707                                  */
 708                                 if (!mono_bitset_test_fast (used, ins->dreg) &&
 709                                         (!get_vreg_to_inst (cfg, ins->dreg) || (!bb->extended && !vreg_is_volatile (cfg, ins->dreg) && mono_bitset_test_fast (defined, ins->dreg))) &&
 710                                         MONO_INS_HAS_NO_SIDE_EFFECT (ins)) {
 711                                         /* Happens with CMOV instructions */
 712                                         if (prev_f && prev_f->opcode == OP_ICOMPARE_IMM) {
 713                                                 MonoInst *prev = prev_f;
 714                                                 /*
 715                                                  * Can't use DELETE_INS since that would interfere with the
 716                                                  * FOR_EACH_INS loop.
 717                                                  */
 718                                                 NULLIFY_INS (prev);
 719                                         }
 720                                         //printf ("DEADCE: "); mono_print_ins (ins);
 721                                         MONO_DELETE_INS (bb, ins);
 722                                         spec = INS_INFO (ins->opcode);
 723                                 }
 724
 725                                 if (spec [MONO_INST_DEST] != ' ')
 726                                         mono_bitset_clear_fast (used, ins->dreg);
 727                         }
 728
 729                         if (spec [MONO_INST_DEST] != ' ')
 730                                 mono_bitset_set_fast (defined, ins->dreg);
 731                         num_sregs = mono_inst_get_src_registers (ins, sregs);
 732                         for (i = 0; i < num_sregs; ++i)
 733                                 mono_bitset_set_fast (used, sregs [i]);
 734                         if (MONO_IS_STORE_MEMBASE (ins))
 735                                 mono_bitset_set_fast (used, ins->dreg);
 736
 737                         if (MONO_IS_CALL (ins)) {
 738                                 MonoCallInst *call = (MonoCallInst*)ins;
 739                                 GSList *l;
 740
 741                                 if (call->out_ireg_args) {
 742                                         for (l = call->out_ireg_args; l; l = l->next) {
 743                                                 guint32 regpair, reg;
 744
 745                                                 regpair = (guint32)(gssize)(l->data);
 746                                                 reg = regpair & 0xffffff;
 747
 748                                                 mono_bitset_set_fast (used, reg);
 749                                         }
 750                                 }
 751
 752                                 if (call->out_freg_args) {
 753                                         for (l = call->out_freg_args; l; l = l->next) {
 754                                                 guint32 regpair, reg;
 755
 756                                                 regpair = (guint32)(gssize)(l->data);
 757                                                 reg = regpair & 0xffffff;
 758
 759                                                 mono_bitset_set_fast (used, reg);
 760                                         }
 761                                 }
 762                         }
 763                 }
 764         }
 765
 766         //mono_print_code (cfg, "AFTER LOCAL-DEADCE");
 767 }
 768
 769 #endif /* DISABLE_JIT */