2 * local-propagation.c: Local constant, copy and tree propagation.
4 * To make some sense of the tree mover, read mono/docs/tree-mover.txt
7 * Paolo Molaro (lupus@ximian.com)
8 * Dietmar Maurer (dietmar@ximian.com)
9 * Massimiliano Mantione (massi@ximian.com)
11 * (C) 2006 Novell, Inc. http://www.novell.com
12 * Copyright 2011 Xamarin, Inc (http://www.xamarin.com)
13 * Licensed under the MIT license. See LICENSE file in the project root for full license information.
25 #include <mono/metadata/debug-helpers.h>
26 #include <mono/metadata/mempool.h>
27 #include <mono/metadata/opcodes.h>
31 #ifndef MONO_ARCH_IS_OP_MEMBASE
32 #define MONO_ARCH_IS_OP_MEMBASE(opcode) FALSE
35 static inline MonoBitSet*
36 mono_bitset_mp_new_noinit (MonoMemPool *mp, guint32 max_size)
38 int size = mono_bitset_alloc_size (max_size, 0);
41 mem = mono_mempool_alloc (mp, size);
42 return mono_bitset_mem_new (mem, max_size, MONO_BITSET_DONT_FREE);
46 * Replaces ins with optimized opcodes.
48 * We can emit to cbb the equivalent instructions which will be used as
49 * replacement for ins, or simply change the fields of ins. Spec needs to
50 * be updated if we silently change the opcode of ins.
52 * Returns TRUE if additional vregs were allocated.
55 mono_strength_reduction_ins (MonoCompile *cfg, MonoInst *ins, const char **spec)
57 gboolean allocated_vregs = FALSE;
59 /* FIXME: Add long/float */
60 switch (ins->opcode) {
63 if (ins->dreg == ins->sreg1) {
71 #if SIZEOF_REGISTER == 8
75 if (ins->inst_imm == 0) {
76 ins->opcode = OP_MOVE;
81 #if SIZEOF_REGISTER == 8
84 if (ins->inst_imm == 0) {
85 ins->opcode = (ins->opcode == OP_LMUL_IMM) ? OP_I8CONST : OP_ICONST;
88 } else if (ins->inst_imm == 1) {
89 ins->opcode = OP_MOVE;
90 } else if ((ins->opcode == OP_IMUL_IMM) && (ins->inst_imm == -1)) {
91 ins->opcode = OP_INEG;
92 } else if ((ins->opcode == OP_LMUL_IMM) && (ins->inst_imm == -1)) {
93 ins->opcode = OP_LNEG;
95 int power2 = mono_is_power_of_two (ins->inst_imm);
97 ins->opcode = (ins->opcode == OP_MUL_IMM) ? OP_SHL_IMM : ((ins->opcode == OP_LMUL_IMM) ? OP_LSHL_IMM : OP_ISHL_IMM);
98 ins->inst_imm = power2;
103 case OP_IDIV_UN_IMM: {
104 int c = ins->inst_imm;
105 int power2 = mono_is_power_of_two (c);
108 if (ins->opcode == OP_IREM_UN_IMM) {
109 ins->opcode = OP_IAND_IMM;
111 ins->inst_imm = (1 << power2) - 1;
112 } else if (ins->opcode == OP_IDIV_UN_IMM) {
113 ins->opcode = OP_ISHR_UN_IMM;
115 ins->inst_imm = power2;
121 int c = ins->inst_imm;
122 int power2 = mono_is_power_of_two (c);
125 int r1 = mono_alloc_ireg (cfg);
127 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, r1, ins->sreg1, 31);
128 MONO_EMIT_NEW_BIALU (cfg, OP_IADD, r1, r1, ins->sreg1);
129 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, ins->dreg, r1, 1);
131 allocated_vregs = TRUE;
132 } else if (power2 > 0 && power2 < 31) {
133 int r1 = mono_alloc_ireg (cfg);
135 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, r1, ins->sreg1, 31);
136 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, r1, r1, (32 - power2));
137 MONO_EMIT_NEW_BIALU (cfg, OP_IADD, r1, r1, ins->sreg1);
138 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, ins->dreg, r1, power2);
140 allocated_vregs = TRUE;
144 #if SIZEOF_REGISTER == 8
148 int power = mono_is_power_of_two (ins->inst_imm);
149 if (ins->inst_imm == 1) {
150 ins->opcode = OP_ICONST;
151 MONO_INST_NULLIFY_SREGS (ins);
156 } else if ((ins->inst_imm > 0) && (ins->inst_imm < (1LL << 32)) && (power != -1)) {
157 gboolean is_long = ins->opcode == OP_LREM_IMM;
158 int compensator_reg = alloc_ireg (cfg);
159 int intermediate_reg;
161 /* Based on gcc code */
163 /* Add compensation for negative numerators */
166 intermediate_reg = compensator_reg;
167 MONO_EMIT_NEW_BIALU_IMM (cfg, is_long ? OP_LSHR_IMM : OP_ISHR_IMM, intermediate_reg, ins->sreg1, is_long ? 63 : 31);
169 intermediate_reg = ins->sreg1;
172 MONO_EMIT_NEW_BIALU_IMM (cfg, is_long ? OP_LSHR_UN_IMM : OP_ISHR_UN_IMM, compensator_reg, intermediate_reg, (is_long ? 64 : 32) - power);
173 MONO_EMIT_NEW_BIALU (cfg, is_long ? OP_LADD : OP_IADD, ins->dreg, ins->sreg1, compensator_reg);
174 /* Compute remainder */
175 MONO_EMIT_NEW_BIALU_IMM (cfg, is_long ? OP_LAND_IMM : OP_AND_IMM, ins->dreg, ins->dreg, (1 << power) - 1);
176 /* Remove compensation */
177 MONO_EMIT_NEW_BIALU (cfg, is_long ? OP_LSUB : OP_ISUB, ins->dreg, ins->dreg, compensator_reg);
179 allocated_vregs = TRUE;
184 #if SIZEOF_REGISTER == 4
186 if (ins->inst_c1 == 32) {
187 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_LS (ins->dreg), MONO_LVREG_MS (ins->sreg1));
188 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1), 31);
189 } else if (ins->inst_c1 == 0) {
190 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->sreg1));
191 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1));
192 } else if (ins->inst_c1 > 32) {
193 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, MONO_LVREG_LS (ins->dreg), MONO_LVREG_MS (ins->sreg1), ins->inst_c1 - 32);
194 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1), 31);
196 guint32 tmpreg = alloc_ireg (cfg);
197 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHL_IMM, tmpreg, MONO_LVREG_MS (ins->sreg1), 32 - ins->inst_c1);
198 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1), ins->inst_c1);
199 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->sreg1), ins->inst_c1);
200 MONO_EMIT_NEW_BIALU (cfg, OP_IOR, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->dreg), tmpreg);
201 allocated_vregs = TRUE;
205 case OP_LSHR_UN_IMM: {
206 if (ins->inst_c1 == 32) {
207 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_LS (ins->dreg), MONO_LVREG_MS (ins->sreg1));
208 MONO_EMIT_NEW_ICONST (cfg, MONO_LVREG_MS (ins->dreg), 0);
209 } else if (ins->inst_c1 == 0) {
210 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->sreg1));
211 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1));
212 } else if (ins->inst_c1 > 32) {
213 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, MONO_LVREG_LS (ins->dreg), MONO_LVREG_MS (ins->sreg1), ins->inst_c1 - 32);
214 MONO_EMIT_NEW_ICONST (cfg, MONO_LVREG_MS (ins->dreg), 0);
216 guint32 tmpreg = alloc_ireg (cfg);
217 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHL_IMM, tmpreg, MONO_LVREG_MS (ins->sreg1), 32 - ins->inst_c1);
218 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1), ins->inst_c1);
219 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->sreg1), ins->inst_c1);
220 MONO_EMIT_NEW_BIALU (cfg, OP_IOR, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->dreg), tmpreg);
221 allocated_vregs = TRUE;
226 if (ins->inst_c1 == 32) {
227 /* just move the lower half to the upper and zero the lower word */
228 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_MS (ins->dreg), MONO_LVREG_LS (ins->sreg1));
229 MONO_EMIT_NEW_ICONST (cfg, MONO_LVREG_LS (ins->dreg), 0);
230 } else if (ins->inst_c1 == 0) {
231 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->sreg1));
232 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1));
233 } else if (ins->inst_c1 > 32) {
234 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHL_IMM, MONO_LVREG_MS (ins->dreg), MONO_LVREG_LS (ins->sreg1), ins->inst_c1 - 32);
235 MONO_EMIT_NEW_ICONST (cfg, MONO_LVREG_LS (ins->dreg), 0);
237 guint32 tmpreg = alloc_ireg (cfg);
238 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, tmpreg, MONO_LVREG_LS (ins->sreg1), 32 - ins->inst_c1);
239 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHL_IMM, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->sreg1), ins->inst_c1);
240 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHL_IMM, MONO_LVREG_LS (ins->dreg), MONO_LVREG_LS (ins->sreg1), ins->inst_c1);
241 MONO_EMIT_NEW_BIALU (cfg, OP_IOR, MONO_LVREG_MS (ins->dreg), MONO_LVREG_MS (ins->dreg), tmpreg);
242 allocated_vregs = TRUE;
252 *spec = INS_INFO (ins->opcode);
253 return allocated_vregs;
259 * A combined local copy and constant propagation pass.
262 mono_local_cprop (MonoCompile *cfg)
264 MonoBasicBlock *bb, *bb_opt;
268 int filter = FILTER_IL_SEQ_POINT;
269 int initial_max_vregs = cfg->next_vreg;
271 max = cfg->next_vreg;
272 defs = (MonoInst **)mono_mempool_alloc (cfg->mempool, sizeof (MonoInst*) * cfg->next_vreg);
273 def_index = (gint32 *)mono_mempool_alloc (cfg->mempool, sizeof (guint32) * cfg->next_vreg);
274 cfg->cbb = bb_opt = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoBasicBlock));
276 for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
281 /* Manually init the defs entries used by the bblock */
282 MONO_BB_FOR_EACH_INS (bb, ins) {
283 int sregs [MONO_MAX_SRC_REGS];
286 if (ins->dreg != -1) {
287 #if SIZEOF_REGISTER == 4
288 const char *spec = INS_INFO (ins->opcode);
289 if (spec [MONO_INST_DEST] == 'l') {
290 defs [ins->dreg + 1] = NULL;
291 defs [ins->dreg + 2] = NULL;
294 defs [ins->dreg] = NULL;
297 num_sregs = mono_inst_get_src_registers (ins, sregs);
298 for (i = 0; i < num_sregs; ++i) {
299 int sreg = sregs [i];
300 #if SIZEOF_REGISTER == 4
301 const char *spec = INS_INFO (ins->opcode);
302 if (spec [MONO_INST_SRC1 + i] == 'l') {
303 defs [sreg + 1] = NULL;
304 defs [sreg + 2] = NULL;
312 last_call_index = -1;
313 MONO_BB_FOR_EACH_INS (bb, ins) {
314 const char *spec = INS_INFO (ins->opcode);
315 int regtype, srcindex, sreg;
317 int sregs [MONO_MAX_SRC_REGS];
319 if (ins->opcode == OP_NOP) {
320 MONO_DELETE_INS (bb, ins);
324 g_assert (ins->opcode > MONO_CEE_LAST);
326 /* FIXME: Optimize this */
327 if (ins->opcode == OP_LDADDR) {
328 MonoInst *var = (MonoInst *)ins->inst_p0;
330 defs [var->dreg] = NULL;
332 if (!MONO_TYPE_ISSTRUCT (var->inst_vtype))
337 if (MONO_IS_STORE_MEMBASE (ins)) {
341 if ((regtype == 'i') && (sreg != -1) && defs [sreg]) {
342 MonoInst *def = defs [sreg];
344 if ((def->opcode == OP_MOVE) && (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg])) && !vreg_is_volatile (cfg, def->sreg1)) {
345 int vreg = def->sreg1;
346 if (cfg->verbose_level > 2) printf ("CCOPY: R%d -> R%d\n", sreg, vreg);
352 num_sregs = mono_inst_get_src_registers (ins, sregs);
353 for (srcindex = 0; srcindex < num_sregs; ++srcindex) {
356 mono_inst_get_src_registers (ins, sregs);
358 regtype = spec [MONO_INST_SRC1 + srcindex];
359 sreg = sregs [srcindex];
361 if ((regtype == ' ') || (sreg == -1) || (!defs [sreg]))
366 /* Copy propagation */
368 * The first check makes sure the source of the copy did not change since
370 * The second check avoids volatile variables.
371 * The third check avoids copy propagating local vregs through a call,
372 * since the lvreg will be spilled
373 * The fourth check avoids copy propagating a vreg in cases where
374 * it would be eliminated anyway by reverse copy propagation later,
375 * because propagating it would create another use for it, thus making
376 * it impossible to use reverse copy propagation.
378 /* Enabling this for floats trips up the fp stack */
380 * Enabling this for floats on amd64 seems to cause a failure in
381 * basic-math.cs, most likely because it gets rid of some r8->r4
384 if (MONO_IS_MOVE (def) &&
385 (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg])) &&
386 !vreg_is_volatile (cfg, def->sreg1) &&
387 /* This avoids propagating local vregs across calls */
388 ((get_vreg_to_inst (cfg, def->sreg1) || !defs [def->sreg1] || (def_index [def->sreg1] >= last_call_index) || (def->opcode == OP_VMOVE))) &&
389 !(defs [def->sreg1] && mono_inst_next (defs [def->sreg1], filter) == def) &&
390 (!MONO_ARCH_USE_FPSTACK || (def->opcode != OP_FMOVE)) &&
391 (def->opcode != OP_FMOVE)) {
392 int vreg = def->sreg1;
394 if (cfg->verbose_level > 2) printf ("CCOPY/2: R%d -> R%d\n", sreg, vreg);
395 sregs [srcindex] = vreg;
396 mono_inst_set_src_registers (ins, sregs);
398 /* Allow further iterations */
403 /* Constant propagation */
404 /* FIXME: Make is_inst_imm a macro */
405 /* FIXME: Make is_inst_imm take an opcode argument */
406 /* is_inst_imm is only needed for binops */
407 if ((((def->opcode == OP_ICONST) || ((sizeof (gpointer) == 8) && (def->opcode == OP_I8CONST))) &&
408 (((srcindex == 0) && (ins->sreg2 == -1)) || mono_arch_is_inst_imm (def->inst_c0))) ||
409 (!MONO_ARCH_USE_FPSTACK && (def->opcode == OP_R8CONST))) {
412 /* srcindex == 1 -> binop, ins->sreg2 == -1 -> unop */
413 if ((srcindex == 1) && (ins->sreg1 != -1) && defs [ins->sreg1] && (defs [ins->sreg1]->opcode == OP_ICONST) && defs [ins->sreg2]) {
414 /* Both arguments are constants, perform cfold */
415 mono_constant_fold_ins (cfg, ins, defs [ins->sreg1], defs [ins->sreg2], TRUE);
416 } else if ((srcindex == 0) && (ins->sreg2 != -1) && defs [ins->sreg2]) {
417 /* Arg 1 is constant, swap arguments if possible */
418 int opcode = ins->opcode;
419 mono_constant_fold_ins (cfg, ins, defs [ins->sreg1], defs [ins->sreg2], TRUE);
420 if (ins->opcode != opcode) {
421 /* Allow further iterations */
425 } else if ((srcindex == 0) && (ins->sreg2 == -1)) {
426 /* Constant unop, perform cfold */
427 mono_constant_fold_ins (cfg, ins, defs [ins->sreg1], NULL, TRUE);
430 opcode2 = mono_op_to_op_imm (ins->opcode);
431 if ((opcode2 != -1) && mono_arch_is_inst_imm (def->inst_c0) && ((srcindex == 1) || (ins->sreg2 == -1))) {
432 ins->opcode = opcode2;
433 if ((def->opcode == OP_I8CONST) && (sizeof (gpointer) == 4)) {
434 ins->inst_ls_word = def->inst_ls_word;
435 ins->inst_ms_word = def->inst_ms_word;
437 ins->inst_imm = def->inst_c0;
439 sregs [srcindex] = -1;
440 mono_inst_set_src_registers (ins, sregs);
442 if ((opcode2 == OP_VOIDCALL) || (opcode2 == OP_CALL) || (opcode2 == OP_LCALL) || (opcode2 == OP_FCALL))
443 ((MonoCallInst*)ins)->fptr = (gpointer)ins->inst_imm;
445 /* Allow further iterations */
451 #if defined(TARGET_X86) || defined(TARGET_AMD64)
452 if ((ins->opcode == OP_X86_LEA) && (srcindex == 1)) {
453 #if SIZEOF_REGISTER == 8
454 /* FIXME: Use OP_PADD_IMM when the new JIT is done */
455 ins->opcode = OP_LADD_IMM;
457 ins->opcode = OP_ADD_IMM;
459 ins->inst_imm += def->inst_c0 << ins->backend.shift_amount;
463 opcode2 = mono_load_membase_to_load_mem (ins->opcode);
464 if ((srcindex == 0) && (opcode2 != -1) && mono_arch_is_inst_imm (def->inst_c0)) {
465 ins->opcode = opcode2;
466 ins->inst_imm = def->inst_c0 + ins->inst_offset;
471 else if (((def->opcode == OP_ADD_IMM) || (def->opcode == OP_LADD_IMM)) && (MONO_IS_LOAD_MEMBASE (ins) || MONO_ARCH_IS_OP_MEMBASE (ins->opcode))) {
472 /* ADD_IMM is created by spill_global_vars */
474 * We have to guarantee that def->sreg1 haven't changed since def->dreg
475 * was defined. cfg->frame_reg is assumed to remain constant.
477 if ((def->sreg1 == cfg->frame_reg) || ((mono_inst_next (def, filter) == ins) && (def->dreg != def->sreg1))) {
478 ins->inst_basereg = def->sreg1;
479 ins->inst_offset += def->inst_imm;
481 } else if ((ins->opcode == OP_ISUB_IMM) && (def->opcode == OP_IADD_IMM) && (mono_inst_next (def, filter) == ins) && (def->dreg != def->sreg1)) {
482 ins->sreg1 = def->sreg1;
483 ins->inst_imm -= def->inst_imm;
484 } else if ((ins->opcode == OP_IADD_IMM) && (def->opcode == OP_ISUB_IMM) && (mono_inst_next (def, filter) == ins) && (def->dreg != def->sreg1)) {
485 ins->sreg1 = def->sreg1;
486 ins->inst_imm -= def->inst_imm;
487 } else if (ins->opcode == OP_STOREI1_MEMBASE_REG &&
488 (def->opcode == OP_ICONV_TO_U1 || def->opcode == OP_ICONV_TO_I1 || def->opcode == OP_SEXT_I4 || (SIZEOF_REGISTER == 8 && def->opcode == OP_LCONV_TO_U1)) &&
489 (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg]))) {
490 /* Avoid needless sign extension */
491 ins->sreg1 = def->sreg1;
492 } else if (ins->opcode == OP_STOREI2_MEMBASE_REG &&
493 (def->opcode == OP_ICONV_TO_U2 || def->opcode == OP_ICONV_TO_I2 || def->opcode == OP_SEXT_I4 || (SIZEOF_REGISTER == 8 && def->opcode == OP_LCONV_TO_I2)) &&
494 (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg]))) {
495 /* Avoid needless sign extension */
496 ins->sreg1 = def->sreg1;
497 } else if (ins->opcode == OP_COMPARE_IMM && def->opcode == OP_LDADDR && ins->inst_imm == 0) {
500 memset (&dummy_arg1, 0, sizeof (MonoInst));
501 dummy_arg1.opcode = OP_ICONST;
502 dummy_arg1.inst_c0 = 1;
504 mono_constant_fold_ins (cfg, ins, &dummy_arg1, NULL, TRUE);
508 g_assert (cfg->cbb == bb_opt);
509 g_assert (!bb_opt->code);
510 /* Do strength reduction here */
511 if (mono_strength_reduction_ins (cfg, ins, &spec) && max < cfg->next_vreg) {
512 MonoInst **defs_prev = defs;
513 gint32 *def_index_prev = def_index;
514 guint32 prev_max = max;
515 guint32 additional_vregs = cfg->next_vreg - initial_max_vregs;
517 /* We have more vregs so we need to reallocate defs and def_index arrays */
518 max = initial_max_vregs + additional_vregs * 2;
519 defs = (MonoInst **)mono_mempool_alloc (cfg->mempool, sizeof (MonoInst*) * max);
520 def_index = (gint32 *)mono_mempool_alloc (cfg->mempool, sizeof (guint32) * max);
522 /* Keep the entries for the previous vregs, zero the rest */
523 memcpy (defs, defs_prev, sizeof (MonoInst*) * prev_max);
524 memset (defs + prev_max, 0, sizeof (MonoInst*) * (max - prev_max));
525 memcpy (def_index, def_index_prev, sizeof (guint32) * prev_max);
526 memset (def_index + prev_max, 0, sizeof (guint32) * (max - prev_max));
529 if (cfg->cbb->code || (cfg->cbb != bb_opt)) {
530 MonoInst *saved_prev = ins->prev;
532 /* If we have code in cbb, we need to replace ins with the decomposition */
533 mono_replace_ins (cfg, bb, ins, &ins->prev, bb_opt, cfg->cbb);
534 bb_opt->code = bb_opt->last_ins = NULL;
535 bb_opt->in_count = bb_opt->out_count = 0;
538 /* ins is hanging, continue scanning the emitted code */
543 if (spec [MONO_INST_DEST] != ' ') {
544 MonoInst *def = defs [ins->dreg];
546 if (def && (def->opcode == OP_ADD_IMM) && (def->sreg1 == cfg->frame_reg) && (MONO_IS_STORE_MEMBASE (ins))) {
547 /* ADD_IMM is created by spill_global_vars */
548 /* cfg->frame_reg is assumed to remain constant */
549 ins->inst_destbasereg = def->sreg1;
550 ins->inst_offset += def->inst_imm;
554 if ((spec [MONO_INST_DEST] != ' ') && !MONO_IS_STORE_MEMBASE (ins) && !vreg_is_volatile (cfg, ins->dreg)) {
555 defs [ins->dreg] = ins;
556 def_index [ins->dreg] = ins_index;
559 if (MONO_IS_CALL (ins))
560 last_call_index = ins_index;
567 static inline gboolean
568 reg_is_softreg_no_fpstack (int reg, const char spec)
570 return (spec == 'i' && reg >= MONO_MAX_IREGS)
571 || ((spec == 'f' && reg >= MONO_MAX_FREGS) && !MONO_ARCH_USE_FPSTACK)
572 #ifdef MONO_ARCH_SIMD_INTRINSICS
573 || (spec == 'x' && reg >= MONO_MAX_XREGS)
578 static inline gboolean
579 reg_is_softreg (int reg, const char spec)
581 return (spec == 'i' && reg >= MONO_MAX_IREGS)
582 || (spec == 'f' && reg >= MONO_MAX_FREGS)
583 #ifdef MONO_ARCH_SIMD_INTRINSICS
584 || (spec == 'x' && reg >= MONO_MAX_XREGS)
589 static inline gboolean
590 mono_is_simd_accessor (MonoInst *ins)
592 switch (ins->opcode) {
593 #ifdef MONO_ARCH_SIMD_INTRINSICS
601 case OP_INSERTX_U1_SLOW:
602 case OP_INSERTX_I4_SLOW:
603 case OP_INSERTX_R4_SLOW:
604 case OP_INSERTX_R8_SLOW:
605 case OP_INSERTX_I8_SLOW:
616 * Get rid of the dead assignments to local vregs like the ones created by the
620 mono_local_deadce (MonoCompile *cfg)
623 MonoInst *ins, *prev;
624 MonoBitSet *used, *defined;
626 //mono_print_code (cfg, "BEFORE LOCAL-DEADCE");
629 * Assignments to global vregs can't be eliminated so this pass must come
630 * after the handle_global_vregs () pass.
633 used = mono_bitset_mp_new_noinit (cfg->mempool, cfg->next_vreg + 1);
634 defined = mono_bitset_mp_new_noinit (cfg->mempool, cfg->next_vreg + 1);
636 /* First pass: collect liveness info */
637 for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
638 /* Manually init the defs entries used by the bblock */
639 MONO_BB_FOR_EACH_INS (bb, ins) {
640 const char *spec = INS_INFO (ins->opcode);
641 int sregs [MONO_MAX_SRC_REGS];
644 if (spec [MONO_INST_DEST] != ' ') {
645 mono_bitset_clear_fast (used, ins->dreg);
646 mono_bitset_clear_fast (defined, ins->dreg);
647 #if SIZEOF_REGISTER == 4
649 mono_bitset_clear_fast (used, ins->dreg + 1);
650 mono_bitset_clear_fast (defined, ins->dreg + 1);
653 num_sregs = mono_inst_get_src_registers (ins, sregs);
654 for (i = 0; i < num_sregs; ++i) {
655 mono_bitset_clear_fast (used, sregs [i]);
656 #if SIZEOF_REGISTER == 4
657 mono_bitset_clear_fast (used, sregs [i] + 1);
663 * Make a reverse pass over the instruction list
665 MONO_BB_FOR_EACH_INS_REVERSE_SAFE (bb, prev, ins) {
666 const char *spec = INS_INFO (ins->opcode);
667 int sregs [MONO_MAX_SRC_REGS];
669 MonoInst *prev_f = mono_inst_prev (ins, FILTER_NOP | FILTER_IL_SEQ_POINT);
671 if (ins->opcode == OP_NOP) {
672 MONO_DELETE_INS (bb, ins);
676 g_assert (ins->opcode > MONO_CEE_LAST);
678 if (MONO_IS_NON_FP_MOVE (ins) && prev_f) {
683 spec2 = INS_INFO (def->opcode);
686 * Perform a limited kind of reverse copy propagation, i.e.
687 * transform B <- FOO; A <- B into A <- FOO
688 * This isn't copyprop, not deadce, but it can only be performed
689 * after handle_global_vregs () has run.
691 if (!get_vreg_to_inst (cfg, ins->sreg1) && (spec2 [MONO_INST_DEST] != ' ') && (def->dreg == ins->sreg1) && !mono_bitset_test_fast (used, ins->sreg1) && !MONO_IS_STORE_MEMBASE (def) && reg_is_softreg (ins->sreg1, spec [MONO_INST_DEST]) && !mono_is_simd_accessor (def)) {
692 if (cfg->verbose_level > 2) {
693 printf ("\tReverse copyprop in BB%d on ", bb->block_num);
694 mono_print_ins (ins);
697 def->dreg = ins->dreg;
698 MONO_DELETE_INS (bb, ins);
699 spec = INS_INFO (ins->opcode);
703 /* Enabling this on x86 could screw up the fp stack */
704 if (reg_is_softreg_no_fpstack (ins->dreg, spec [MONO_INST_DEST])) {
706 * Assignments to global vregs can only be eliminated if there is another
707 * assignment to the same vreg later in the same bblock.
709 if (!mono_bitset_test_fast (used, ins->dreg) &&
710 (!get_vreg_to_inst (cfg, ins->dreg) || (!bb->extended && !vreg_is_volatile (cfg, ins->dreg) && mono_bitset_test_fast (defined, ins->dreg))) &&
711 MONO_INS_HAS_NO_SIDE_EFFECT (ins)) {
712 /* Happens with CMOV instructions */
713 if (prev_f && prev_f->opcode == OP_ICOMPARE_IMM) {
714 MonoInst *prev = prev_f;
716 * Can't use DELETE_INS since that would interfere with the
721 //printf ("DEADCE: "); mono_print_ins (ins);
722 MONO_DELETE_INS (bb, ins);
723 spec = INS_INFO (ins->opcode);
726 if (spec [MONO_INST_DEST] != ' ')
727 mono_bitset_clear_fast (used, ins->dreg);
730 if (spec [MONO_INST_DEST] != ' ')
731 mono_bitset_set_fast (defined, ins->dreg);
732 num_sregs = mono_inst_get_src_registers (ins, sregs);
733 for (i = 0; i < num_sregs; ++i)
734 mono_bitset_set_fast (used, sregs [i]);
735 if (MONO_IS_STORE_MEMBASE (ins))
736 mono_bitset_set_fast (used, ins->dreg);
738 if (MONO_IS_CALL (ins)) {
739 MonoCallInst *call = (MonoCallInst*)ins;
742 if (call->out_ireg_args) {
743 for (l = call->out_ireg_args; l; l = l->next) {
744 guint32 regpair, reg;
746 regpair = (guint32)(gssize)(l->data);
747 reg = regpair & 0xffffff;
749 mono_bitset_set_fast (used, reg);
753 if (call->out_freg_args) {
754 for (l = call->out_freg_args; l; l = l->next) {
755 guint32 regpair, reg;
757 regpair = (guint32)(gssize)(l->data);
758 reg = regpair & 0xffffff;
760 mono_bitset_set_fast (used, reg);
767 //mono_print_code (cfg, "AFTER LOCAL-DEADCE");
770 #endif /* DISABLE_JIT */