2 * local-propagation.c: Local constant, copy and tree propagation.
4 * To make some sense of the tree mover, read mono/docs/tree-mover.txt
7 * Paolo Molaro (lupus@ximian.com)
8 * Dietmar Maurer (dietmar@ximian.com)
9 * Massimiliano Mantione (massi@ximian.com)
11 * (C) 2006 Novell, Inc. http://www.novell.com
12 * Copyright 2011 Xamarin, Inc (http://www.xamarin.com)
13 * Licensed under the MIT license. See LICENSE file in the project root for full license information.
25 #include <mono/metadata/debug-helpers.h>
26 #include <mono/metadata/mempool.h>
27 #include <mono/metadata/opcodes.h>
31 #ifndef MONO_ARCH_IS_OP_MEMBASE
32 #define MONO_ARCH_IS_OP_MEMBASE(opcode) FALSE
35 static inline MonoBitSet*
36 mono_bitset_mp_new_noinit (MonoMemPool *mp, guint32 max_size)
38 int size = mono_bitset_alloc_size (max_size, 0);
41 mem = mono_mempool_alloc (mp, size);
42 return mono_bitset_mem_new (mem, max_size, MONO_BITSET_DONT_FREE);
46 * Replaces ins with optimized opcodes.
48 * We can emit to cbb the equivalent instructions which will be used as
49 * replacement for ins, or simply change the fields of ins. Spec needs to
50 * be updated if we silently change the opcode of ins.
52 * Returns TRUE if additional vregs were allocated.
55 mono_strength_reduction_ins (MonoCompile *cfg, MonoInst *ins, const char **spec)
57 gboolean allocated_vregs = FALSE;
59 /* FIXME: Add long/float */
60 switch (ins->opcode) {
63 if (ins->dreg == ins->sreg1) {
71 #if SIZEOF_REGISTER == 8
75 if (ins->inst_imm == 0) {
76 ins->opcode = OP_MOVE;
81 #if SIZEOF_REGISTER == 8
84 if (ins->inst_imm == 0) {
85 ins->opcode = (ins->opcode == OP_LMUL_IMM) ? OP_I8CONST : OP_ICONST;
88 } else if (ins->inst_imm == 1) {
89 ins->opcode = OP_MOVE;
90 } else if ((ins->opcode == OP_IMUL_IMM) && (ins->inst_imm == -1)) {
91 ins->opcode = OP_INEG;
92 } else if ((ins->opcode == OP_LMUL_IMM) && (ins->inst_imm == -1)) {
93 ins->opcode = OP_LNEG;
95 int power2 = mono_is_power_of_two (ins->inst_imm);
97 ins->opcode = (ins->opcode == OP_MUL_IMM) ? OP_SHL_IMM : ((ins->opcode == OP_LMUL_IMM) ? OP_LSHL_IMM : OP_ISHL_IMM);
98 ins->inst_imm = power2;
103 case OP_IDIV_UN_IMM: {
104 int c = ins->inst_imm;
105 int power2 = mono_is_power_of_two (c);
108 if (ins->opcode == OP_IREM_UN_IMM) {
109 ins->opcode = OP_IAND_IMM;
111 ins->inst_imm = (1 << power2) - 1;
112 } else if (ins->opcode == OP_IDIV_UN_IMM) {
113 ins->opcode = OP_ISHR_UN_IMM;
115 ins->inst_imm = power2;
121 int c = ins->inst_imm;
122 int power2 = mono_is_power_of_two (c);
125 int r1 = mono_alloc_ireg (cfg);
127 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, r1, ins->sreg1, 31);
128 MONO_EMIT_NEW_BIALU (cfg, OP_IADD, r1, r1, ins->sreg1);
129 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, ins->dreg, r1, 1);
131 allocated_vregs = TRUE;
132 } else if (power2 > 0 && power2 < 31) {
133 int r1 = mono_alloc_ireg (cfg);
135 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, r1, ins->sreg1, 31);
136 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_UN_IMM, r1, r1, (32 - power2));
137 MONO_EMIT_NEW_BIALU (cfg, OP_IADD, r1, r1, ins->sreg1);
138 MONO_EMIT_NEW_BIALU_IMM (cfg, OP_ISHR_IMM, ins->dreg, r1, power2);
140 allocated_vregs = TRUE;
144 #if SIZEOF_REGISTER == 8
148 int power = mono_is_power_of_two (ins->inst_imm);
149 if (ins->inst_imm == 1) {
150 ins->opcode = OP_ICONST;
151 MONO_INST_NULLIFY_SREGS (ins);
156 } else if ((ins->inst_imm > 0) && (ins->inst_imm < (1LL << 32)) && (power != -1)) {
157 gboolean is_long = ins->opcode == OP_LREM_IMM;
158 int compensator_reg = alloc_ireg (cfg);
159 int intermediate_reg;
161 /* Based on gcc code */
163 /* Add compensation for negative numerators */
166 intermediate_reg = compensator_reg;
167 MONO_EMIT_NEW_BIALU_IMM (cfg, is_long ? OP_LSHR_IMM : OP_ISHR_IMM, intermediate_reg, ins->sreg1, is_long ? 63 : 31);
169 intermediate_reg = ins->sreg1;
172 MONO_EMIT_NEW_BIALU_IMM (cfg, is_long ? OP_LSHR_UN_IMM : OP_ISHR_UN_IMM, compensator_reg, intermediate_reg, (is_long ? 64 : 32) - power);
173 MONO_EMIT_NEW_BIALU (cfg, is_long ? OP_LADD : OP_IADD, ins->dreg, ins->sreg1, compensator_reg);
174 /* Compute remainder */
175 MONO_EMIT_NEW_BIALU_IMM (cfg, is_long ? OP_LAND_IMM : OP_AND_IMM, ins->dreg, ins->dreg, (1 << power) - 1);
176 /* Remove compensation */
177 MONO_EMIT_NEW_BIALU (cfg, is_long ? OP_LSUB : OP_ISUB, ins->dreg, ins->dreg, compensator_reg);
179 allocated_vregs = TRUE;
189 *spec = INS_INFO (ins->opcode);
190 return allocated_vregs;
196 * A combined local copy and constant propagation pass.
199 mono_local_cprop (MonoCompile *cfg)
201 MonoBasicBlock *bb, *bb_opt;
205 int filter = FILTER_IL_SEQ_POINT;
206 int initial_max_vregs = cfg->next_vreg;
208 max = cfg->next_vreg;
209 defs = (MonoInst **)mono_mempool_alloc (cfg->mempool, sizeof (MonoInst*) * cfg->next_vreg);
210 def_index = (gint32 *)mono_mempool_alloc (cfg->mempool, sizeof (guint32) * cfg->next_vreg);
211 cfg->cbb = bb_opt = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoBasicBlock));
213 for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
218 /* Manually init the defs entries used by the bblock */
219 MONO_BB_FOR_EACH_INS (bb, ins) {
220 int sregs [MONO_MAX_SRC_REGS];
223 if (ins->dreg != -1) {
224 #if SIZEOF_REGISTER == 4
225 const char *spec = INS_INFO (ins->opcode);
226 if (spec [MONO_INST_DEST] == 'l') {
227 defs [ins->dreg + 1] = NULL;
228 defs [ins->dreg + 2] = NULL;
231 defs [ins->dreg] = NULL;
234 num_sregs = mono_inst_get_src_registers (ins, sregs);
235 for (i = 0; i < num_sregs; ++i) {
236 int sreg = sregs [i];
237 #if SIZEOF_REGISTER == 4
238 const char *spec = INS_INFO (ins->opcode);
239 if (spec [MONO_INST_SRC1 + i] == 'l') {
240 defs [sreg + 1] = NULL;
241 defs [sreg + 2] = NULL;
249 last_call_index = -1;
250 MONO_BB_FOR_EACH_INS (bb, ins) {
251 const char *spec = INS_INFO (ins->opcode);
252 int regtype, srcindex, sreg;
254 int sregs [MONO_MAX_SRC_REGS];
256 if (ins->opcode == OP_NOP) {
257 MONO_DELETE_INS (bb, ins);
261 g_assert (ins->opcode > MONO_CEE_LAST);
263 /* FIXME: Optimize this */
264 if (ins->opcode == OP_LDADDR) {
265 MonoInst *var = (MonoInst *)ins->inst_p0;
267 defs [var->dreg] = NULL;
269 if (!MONO_TYPE_ISSTRUCT (var->inst_vtype))
274 if (MONO_IS_STORE_MEMBASE (ins)) {
278 if ((regtype == 'i') && (sreg != -1) && defs [sreg]) {
279 MonoInst *def = defs [sreg];
281 if ((def->opcode == OP_MOVE) && (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg])) && !vreg_is_volatile (cfg, def->sreg1)) {
282 int vreg = def->sreg1;
283 if (cfg->verbose_level > 2) printf ("CCOPY: R%d -> R%d\n", sreg, vreg);
289 num_sregs = mono_inst_get_src_registers (ins, sregs);
290 for (srcindex = 0; srcindex < num_sregs; ++srcindex) {
293 mono_inst_get_src_registers (ins, sregs);
295 regtype = spec [MONO_INST_SRC1 + srcindex];
296 sreg = sregs [srcindex];
298 if ((regtype == ' ') || (sreg == -1) || (!defs [sreg]))
303 /* Copy propagation */
305 * The first check makes sure the source of the copy did not change since
307 * The second check avoids volatile variables.
308 * The third check avoids copy propagating local vregs through a call,
309 * since the lvreg will be spilled
310 * The fourth check avoids copy propagating a vreg in cases where
311 * it would be eliminated anyway by reverse copy propagation later,
312 * because propagating it would create another use for it, thus making
313 * it impossible to use reverse copy propagation.
315 /* Enabling this for floats trips up the fp stack */
317 * Enabling this for floats on amd64 seems to cause a failure in
318 * basic-math.cs, most likely because it gets rid of some r8->r4
321 if (MONO_IS_MOVE (def) &&
322 (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg])) &&
323 !vreg_is_volatile (cfg, def->sreg1) &&
324 /* This avoids propagating local vregs across calls */
325 ((get_vreg_to_inst (cfg, def->sreg1) || !defs [def->sreg1] || (def_index [def->sreg1] >= last_call_index) || (def->opcode == OP_VMOVE))) &&
326 !(defs [def->sreg1] && mono_inst_next (defs [def->sreg1], filter) == def) &&
327 (!MONO_ARCH_USE_FPSTACK || (def->opcode != OP_FMOVE)) &&
328 (def->opcode != OP_FMOVE)) {
329 int vreg = def->sreg1;
331 if (cfg->verbose_level > 2) printf ("CCOPY/2: R%d -> R%d\n", sreg, vreg);
332 sregs [srcindex] = vreg;
333 mono_inst_set_src_registers (ins, sregs);
335 /* Allow further iterations */
340 /* Constant propagation */
341 /* FIXME: Make is_inst_imm a macro */
342 /* FIXME: Make is_inst_imm take an opcode argument */
343 /* is_inst_imm is only needed for binops */
344 if ((((def->opcode == OP_ICONST) || ((sizeof (gpointer) == 8) && (def->opcode == OP_I8CONST))) &&
345 (((srcindex == 0) && (ins->sreg2 == -1)) || mono_arch_is_inst_imm (def->inst_c0))) ||
346 (!MONO_ARCH_USE_FPSTACK && (def->opcode == OP_R8CONST))) {
349 /* srcindex == 1 -> binop, ins->sreg2 == -1 -> unop */
350 if ((srcindex == 1) && (ins->sreg1 != -1) && defs [ins->sreg1] && (defs [ins->sreg1]->opcode == OP_ICONST) && defs [ins->sreg2]) {
351 /* Both arguments are constants, perform cfold */
352 mono_constant_fold_ins (cfg, ins, defs [ins->sreg1], defs [ins->sreg2], TRUE);
353 } else if ((srcindex == 0) && (ins->sreg2 != -1) && defs [ins->sreg2]) {
354 /* Arg 1 is constant, swap arguments if possible */
355 int opcode = ins->opcode;
356 mono_constant_fold_ins (cfg, ins, defs [ins->sreg1], defs [ins->sreg2], TRUE);
357 if (ins->opcode != opcode) {
358 /* Allow further iterations */
362 } else if ((srcindex == 0) && (ins->sreg2 == -1)) {
363 /* Constant unop, perform cfold */
364 mono_constant_fold_ins (cfg, ins, defs [ins->sreg1], NULL, TRUE);
367 opcode2 = mono_op_to_op_imm (ins->opcode);
368 if ((opcode2 != -1) && mono_arch_is_inst_imm (def->inst_c0) && ((srcindex == 1) || (ins->sreg2 == -1))) {
369 ins->opcode = opcode2;
370 if ((def->opcode == OP_I8CONST) && (sizeof (gpointer) == 4)) {
371 ins->inst_ls_word = def->inst_ls_word;
372 ins->inst_ms_word = def->inst_ms_word;
374 ins->inst_imm = def->inst_c0;
376 sregs [srcindex] = -1;
377 mono_inst_set_src_registers (ins, sregs);
379 if ((opcode2 == OP_VOIDCALL) || (opcode2 == OP_CALL) || (opcode2 == OP_LCALL) || (opcode2 == OP_FCALL))
380 ((MonoCallInst*)ins)->fptr = (gpointer)ins->inst_imm;
382 /* Allow further iterations */
388 #if defined(TARGET_X86) || defined(TARGET_AMD64)
389 if ((ins->opcode == OP_X86_LEA) && (srcindex == 1)) {
390 #if SIZEOF_REGISTER == 8
391 /* FIXME: Use OP_PADD_IMM when the new JIT is done */
392 ins->opcode = OP_LADD_IMM;
394 ins->opcode = OP_ADD_IMM;
396 ins->inst_imm += def->inst_c0 << ins->backend.shift_amount;
400 opcode2 = mono_load_membase_to_load_mem (ins->opcode);
401 if ((srcindex == 0) && (opcode2 != -1) && mono_arch_is_inst_imm (def->inst_c0)) {
402 ins->opcode = opcode2;
403 ins->inst_imm = def->inst_c0 + ins->inst_offset;
408 else if (((def->opcode == OP_ADD_IMM) || (def->opcode == OP_LADD_IMM)) && (MONO_IS_LOAD_MEMBASE (ins) || MONO_ARCH_IS_OP_MEMBASE (ins->opcode))) {
409 /* ADD_IMM is created by spill_global_vars */
411 * We have to guarantee that def->sreg1 haven't changed since def->dreg
412 * was defined. cfg->frame_reg is assumed to remain constant.
414 if ((def->sreg1 == cfg->frame_reg) || ((mono_inst_next (def, filter) == ins) && (def->dreg != def->sreg1))) {
415 ins->inst_basereg = def->sreg1;
416 ins->inst_offset += def->inst_imm;
418 } else if ((ins->opcode == OP_ISUB_IMM) && (def->opcode == OP_IADD_IMM) && (mono_inst_next (def, filter) == ins) && (def->dreg != def->sreg1)) {
419 ins->sreg1 = def->sreg1;
420 ins->inst_imm -= def->inst_imm;
421 } else if ((ins->opcode == OP_IADD_IMM) && (def->opcode == OP_ISUB_IMM) && (mono_inst_next (def, filter) == ins) && (def->dreg != def->sreg1)) {
422 ins->sreg1 = def->sreg1;
423 ins->inst_imm -= def->inst_imm;
424 } else if (ins->opcode == OP_STOREI1_MEMBASE_REG &&
425 (def->opcode == OP_ICONV_TO_U1 || def->opcode == OP_ICONV_TO_I1 || def->opcode == OP_SEXT_I4 || (SIZEOF_REGISTER == 8 && def->opcode == OP_LCONV_TO_U1)) &&
426 (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg]))) {
427 /* Avoid needless sign extension */
428 ins->sreg1 = def->sreg1;
429 } else if (ins->opcode == OP_STOREI2_MEMBASE_REG &&
430 (def->opcode == OP_ICONV_TO_U2 || def->opcode == OP_ICONV_TO_I2 || def->opcode == OP_SEXT_I4 || (SIZEOF_REGISTER == 8 && def->opcode == OP_LCONV_TO_I2)) &&
431 (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg]))) {
432 /* Avoid needless sign extension */
433 ins->sreg1 = def->sreg1;
434 } else if (ins->opcode == OP_COMPARE_IMM && def->opcode == OP_LDADDR && ins->inst_imm == 0) {
437 memset (&dummy_arg1, 0, sizeof (MonoInst));
438 dummy_arg1.opcode = OP_ICONST;
439 dummy_arg1.inst_c0 = 1;
441 mono_constant_fold_ins (cfg, ins, &dummy_arg1, NULL, TRUE);
445 g_assert (cfg->cbb == bb_opt);
446 g_assert (!bb_opt->code);
447 /* Do strength reduction here */
448 if (mono_strength_reduction_ins (cfg, ins, &spec) && max < cfg->next_vreg) {
449 MonoInst **defs_prev = defs;
450 gint32 *def_index_prev = def_index;
451 guint32 prev_max = max;
452 guint32 additional_vregs = cfg->next_vreg - initial_max_vregs;
454 /* We have more vregs so we need to reallocate defs and def_index arrays */
455 max = initial_max_vregs + additional_vregs * 2;
456 defs = (MonoInst **)mono_mempool_alloc (cfg->mempool, sizeof (MonoInst*) * max);
457 def_index = (gint32 *)mono_mempool_alloc (cfg->mempool, sizeof (guint32) * max);
459 /* Keep the entries for the previous vregs, zero the rest */
460 memcpy (defs, defs_prev, sizeof (MonoInst*) * prev_max);
461 memset (defs + prev_max, 0, sizeof (MonoInst*) * (max - prev_max));
462 memcpy (def_index, def_index_prev, sizeof (guint32) * prev_max);
463 memset (def_index + prev_max, 0, sizeof (guint32) * (max - prev_max));
466 if (cfg->cbb->code || (cfg->cbb != bb_opt)) {
467 MonoInst *saved_prev = ins->prev;
469 /* If we have code in cbb, we need to replace ins with the decomposition */
470 mono_replace_ins (cfg, bb, ins, &ins->prev, bb_opt, cfg->cbb);
471 bb_opt->code = bb_opt->last_ins = NULL;
472 bb_opt->in_count = bb_opt->out_count = 0;
475 /* ins is hanging, continue scanning the emitted code */
480 if (spec [MONO_INST_DEST] != ' ') {
481 MonoInst *def = defs [ins->dreg];
483 if (def && (def->opcode == OP_ADD_IMM) && (def->sreg1 == cfg->frame_reg) && (MONO_IS_STORE_MEMBASE (ins))) {
484 /* ADD_IMM is created by spill_global_vars */
485 /* cfg->frame_reg is assumed to remain constant */
486 ins->inst_destbasereg = def->sreg1;
487 ins->inst_offset += def->inst_imm;
491 if ((spec [MONO_INST_DEST] != ' ') && !MONO_IS_STORE_MEMBASE (ins) && !vreg_is_volatile (cfg, ins->dreg)) {
492 defs [ins->dreg] = ins;
493 def_index [ins->dreg] = ins_index;
496 if (MONO_IS_CALL (ins))
497 last_call_index = ins_index;
504 static inline gboolean
505 reg_is_softreg_no_fpstack (int reg, const char spec)
507 return (spec == 'i' && reg >= MONO_MAX_IREGS)
508 || ((spec == 'f' && reg >= MONO_MAX_FREGS) && !MONO_ARCH_USE_FPSTACK)
509 #ifdef MONO_ARCH_SIMD_INTRINSICS
510 || (spec == 'x' && reg >= MONO_MAX_XREGS)
515 static inline gboolean
516 reg_is_softreg (int reg, const char spec)
518 return (spec == 'i' && reg >= MONO_MAX_IREGS)
519 || (spec == 'f' && reg >= MONO_MAX_FREGS)
520 #ifdef MONO_ARCH_SIMD_INTRINSICS
521 || (spec == 'x' && reg >= MONO_MAX_XREGS)
526 static inline gboolean
527 mono_is_simd_accessor (MonoInst *ins)
529 switch (ins->opcode) {
530 #ifdef MONO_ARCH_SIMD_INTRINSICS
538 case OP_INSERTX_U1_SLOW:
539 case OP_INSERTX_I4_SLOW:
540 case OP_INSERTX_R4_SLOW:
541 case OP_INSERTX_R8_SLOW:
542 case OP_INSERTX_I8_SLOW:
553 * Get rid of the dead assignments to local vregs like the ones created by the
557 mono_local_deadce (MonoCompile *cfg)
560 MonoInst *ins, *prev;
561 MonoBitSet *used, *defined;
563 //mono_print_code (cfg, "BEFORE LOCAL-DEADCE");
566 * Assignments to global vregs can't be eliminated so this pass must come
567 * after the handle_global_vregs () pass.
570 used = mono_bitset_mp_new_noinit (cfg->mempool, cfg->next_vreg + 1);
571 defined = mono_bitset_mp_new_noinit (cfg->mempool, cfg->next_vreg + 1);
573 /* First pass: collect liveness info */
574 for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
575 /* Manually init the defs entries used by the bblock */
576 MONO_BB_FOR_EACH_INS (bb, ins) {
577 const char *spec = INS_INFO (ins->opcode);
578 int sregs [MONO_MAX_SRC_REGS];
581 if (spec [MONO_INST_DEST] != ' ') {
582 mono_bitset_clear_fast (used, ins->dreg);
583 mono_bitset_clear_fast (defined, ins->dreg);
584 #if SIZEOF_REGISTER == 4
586 mono_bitset_clear_fast (used, ins->dreg + 1);
587 mono_bitset_clear_fast (defined, ins->dreg + 1);
590 num_sregs = mono_inst_get_src_registers (ins, sregs);
591 for (i = 0; i < num_sregs; ++i) {
592 mono_bitset_clear_fast (used, sregs [i]);
593 #if SIZEOF_REGISTER == 4
594 mono_bitset_clear_fast (used, sregs [i] + 1);
600 * Make a reverse pass over the instruction list
602 MONO_BB_FOR_EACH_INS_REVERSE_SAFE (bb, prev, ins) {
603 const char *spec = INS_INFO (ins->opcode);
604 int sregs [MONO_MAX_SRC_REGS];
606 MonoInst *prev_f = mono_inst_prev (ins, FILTER_NOP | FILTER_IL_SEQ_POINT);
608 if (ins->opcode == OP_NOP) {
609 MONO_DELETE_INS (bb, ins);
613 g_assert (ins->opcode > MONO_CEE_LAST);
615 if (MONO_IS_NON_FP_MOVE (ins) && prev_f) {
620 spec2 = INS_INFO (def->opcode);
623 * Perform a limited kind of reverse copy propagation, i.e.
624 * transform B <- FOO; A <- B into A <- FOO
625 * This isn't copyprop, not deadce, but it can only be performed
626 * after handle_global_vregs () has run.
628 if (!get_vreg_to_inst (cfg, ins->sreg1) && (spec2 [MONO_INST_DEST] != ' ') && (def->dreg == ins->sreg1) && !mono_bitset_test_fast (used, ins->sreg1) && !MONO_IS_STORE_MEMBASE (def) && reg_is_softreg (ins->sreg1, spec [MONO_INST_DEST]) && !mono_is_simd_accessor (def)) {
629 if (cfg->verbose_level > 2) {
630 printf ("\tReverse copyprop in BB%d on ", bb->block_num);
631 mono_print_ins (ins);
634 def->dreg = ins->dreg;
635 MONO_DELETE_INS (bb, ins);
636 spec = INS_INFO (ins->opcode);
640 /* Enabling this on x86 could screw up the fp stack */
641 if (reg_is_softreg_no_fpstack (ins->dreg, spec [MONO_INST_DEST])) {
643 * Assignments to global vregs can only be eliminated if there is another
644 * assignment to the same vreg later in the same bblock.
646 if (!mono_bitset_test_fast (used, ins->dreg) &&
647 (!get_vreg_to_inst (cfg, ins->dreg) || (!bb->extended && !vreg_is_volatile (cfg, ins->dreg) && mono_bitset_test_fast (defined, ins->dreg))) &&
648 MONO_INS_HAS_NO_SIDE_EFFECT (ins)) {
649 /* Happens with CMOV instructions */
650 if (prev_f && prev_f->opcode == OP_ICOMPARE_IMM) {
651 MonoInst *prev = prev_f;
653 * Can't use DELETE_INS since that would interfere with the
658 //printf ("DEADCE: "); mono_print_ins (ins);
659 MONO_DELETE_INS (bb, ins);
660 spec = INS_INFO (ins->opcode);
663 if (spec [MONO_INST_DEST] != ' ')
664 mono_bitset_clear_fast (used, ins->dreg);
667 if (spec [MONO_INST_DEST] != ' ')
668 mono_bitset_set_fast (defined, ins->dreg);
669 num_sregs = mono_inst_get_src_registers (ins, sregs);
670 for (i = 0; i < num_sregs; ++i)
671 mono_bitset_set_fast (used, sregs [i]);
672 if (MONO_IS_STORE_MEMBASE (ins))
673 mono_bitset_set_fast (used, ins->dreg);
675 if (MONO_IS_CALL (ins)) {
676 MonoCallInst *call = (MonoCallInst*)ins;
679 if (call->out_ireg_args) {
680 for (l = call->out_ireg_args; l; l = l->next) {
681 guint32 regpair, reg;
683 regpair = (guint32)(gssize)(l->data);
684 reg = regpair & 0xffffff;
686 mono_bitset_set_fast (used, reg);
690 if (call->out_freg_args) {
691 for (l = call->out_freg_args; l; l = l->next) {
692 guint32 regpair, reg;
694 regpair = (guint32)(gssize)(l->data);
695 reg = regpair & 0xffffff;
697 mono_bitset_set_fast (used, reg);
704 //mono_print_code (cfg, "AFTER LOCAL-DEADCE");
707 #endif /* DISABLE_JIT */