2 * local-propagation.c: Local constant, copy and tree propagation.
4 * To make some sense of the tree mover, read mono/docs/tree-mover.txt
7 * Paolo Molaro (lupus@ximian.com)
8 * Dietmar Maurer (dietmar@ximian.com)
9 * Massimiliano Mantione (massi@ximian.com)
11 * (C) 2006 Novell, Inc. http://www.novell.com
12 * Copyright 2011 Xamarin, Inc (http://www.xamarin.com)
22 #include <mono/metadata/debug-helpers.h>
23 #include <mono/metadata/mempool.h>
24 #include <mono/metadata/opcodes.h>
28 #ifndef MONO_ARCH_IS_OP_MEMBASE
29 #define MONO_ARCH_IS_OP_MEMBASE(opcode) FALSE
32 static inline MonoBitSet*
33 mono_bitset_mp_new_noinit (MonoMemPool *mp, guint32 max_size)
35 int size = mono_bitset_alloc_size (max_size, 0);
38 mem = mono_mempool_alloc (mp, size);
39 return mono_bitset_mem_new (mem, max_size, MONO_BITSET_DONT_FREE);
45 * A combined local copy and constant propagation pass.
48 mono_local_cprop (MonoCompile *cfg)
58 defs = mono_mempool_alloc (cfg->mempool, sizeof (MonoInst*) * (cfg->next_vreg + 1));
59 def_index = mono_mempool_alloc (cfg->mempool, sizeof (guint32) * (cfg->next_vreg + 1));
61 for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
66 /* Manually init the defs entries used by the bblock */
67 MONO_BB_FOR_EACH_INS (bb, ins) {
68 int sregs [MONO_MAX_SRC_REGS];
71 if ((ins->dreg != -1) && (ins->dreg < max)) {
72 defs [ins->dreg] = NULL;
73 #if SIZEOF_REGISTER == 4
74 defs [ins->dreg + 1] = NULL;
78 num_sregs = mono_inst_get_src_registers (ins, sregs);
79 for (i = 0; i < num_sregs; ++i) {
83 #if SIZEOF_REGISTER == 4
84 defs [sreg + 1] = NULL;
92 MONO_BB_FOR_EACH_INS (bb, ins) {
93 const char *spec = INS_INFO (ins->opcode);
94 int regtype, srcindex, sreg;
96 int sregs [MONO_MAX_SRC_REGS];
98 if (ins->opcode == OP_NOP) {
99 MONO_DELETE_INS (bb, ins);
103 g_assert (ins->opcode > MONO_CEE_LAST);
105 /* FIXME: Optimize this */
106 if (ins->opcode == OP_LDADDR) {
107 MonoInst *var = ins->inst_p0;
109 defs [var->dreg] = NULL;
111 if (!MONO_TYPE_ISSTRUCT (var->inst_vtype))
116 if (MONO_IS_STORE_MEMBASE (ins)) {
120 if ((regtype == 'i') && (sreg != -1) && defs [sreg]) {
121 MonoInst *def = defs [sreg];
123 if ((def->opcode == OP_MOVE) && (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg])) && !vreg_is_volatile (cfg, def->sreg1)) {
124 int vreg = def->sreg1;
125 if (cfg->verbose_level > 2) printf ("CCOPY: R%d -> R%d\n", sreg, vreg);
131 num_sregs = mono_inst_get_src_registers (ins, sregs);
132 for (srcindex = 0; srcindex < num_sregs; ++srcindex) {
136 nregs = mono_inst_get_src_registers (ins, sregs);
138 regtype = spec [MONO_INST_SRC1 + srcindex];
139 sreg = sregs [srcindex];
141 if ((regtype == ' ') || (sreg == -1) || (!defs [sreg]))
146 /* Copy propagation */
148 * The first check makes sure the source of the copy did not change since
150 * The second check avoids volatile variables.
151 * The third check avoids copy propagating local vregs through a call,
152 * since the lvreg will be spilled
153 * The fourth check avoids copy propagating a vreg in cases where
154 * it would be eliminated anyway by reverse copy propagation later,
155 * because propagating it would create another use for it, thus making
156 * it impossible to use reverse copy propagation.
158 /* Enabling this for floats trips up the fp stack */
160 * Enabling this for floats on amd64 seems to cause a failure in
161 * basic-math.cs, most likely because it gets rid of some r8->r4
164 if (MONO_IS_MOVE (def) &&
165 (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg])) &&
166 !vreg_is_volatile (cfg, def->sreg1) &&
167 /* This avoids propagating local vregs across calls */
168 ((get_vreg_to_inst (cfg, def->sreg1) || !defs [def->sreg1] || (def_index [def->sreg1] >= last_call_index) || (def->opcode == OP_VMOVE))) &&
169 !(defs [def->sreg1] && defs [def->sreg1]->next == def) &&
170 (!MONO_ARCH_USE_FPSTACK || (def->opcode != OP_FMOVE)) &&
171 (def->opcode != OP_FMOVE)) {
172 int vreg = def->sreg1;
174 if (cfg->verbose_level > 2) printf ("CCOPY/2: R%d -> R%d\n", sreg, vreg);
175 sregs [srcindex] = vreg;
176 mono_inst_set_src_registers (ins, sregs);
178 /* Allow further iterations */
183 /* Constant propagation */
184 /* FIXME: Make is_inst_imm a macro */
185 /* FIXME: Make is_inst_imm take an opcode argument */
186 /* is_inst_imm is only needed for binops */
187 if ((((def->opcode == OP_ICONST) || ((sizeof (gpointer) == 8) && (def->opcode == OP_I8CONST))) &&
188 (((srcindex == 0) && (ins->sreg2 == -1)) || mono_arch_is_inst_imm (def->inst_c0))) ||
189 (!MONO_ARCH_USE_FPSTACK && (def->opcode == OP_R8CONST))) {
192 /* srcindex == 1 -> binop, ins->sreg2 == -1 -> unop */
193 if ((srcindex == 1) && (ins->sreg1 != -1) && defs [ins->sreg1] && (defs [ins->sreg1]->opcode == OP_ICONST) && defs [ins->sreg2]) {
194 /* Both arguments are constants, perform cfold */
195 mono_constant_fold_ins (cfg, ins, defs [ins->sreg1], defs [ins->sreg2], TRUE);
196 } else if ((srcindex == 0) && (ins->sreg2 != -1) && defs [ins->sreg2]) {
197 /* Arg 1 is constant, swap arguments if possible */
198 int opcode = ins->opcode;
199 mono_constant_fold_ins (cfg, ins, defs [ins->sreg1], defs [ins->sreg2], TRUE);
200 if (ins->opcode != opcode) {
201 /* Allow further iterations */
205 } else if ((srcindex == 0) && (ins->sreg2 == -1)) {
206 /* Constant unop, perform cfold */
207 mono_constant_fold_ins (cfg, ins, defs [ins->sreg1], NULL, TRUE);
210 opcode2 = mono_op_to_op_imm (ins->opcode);
211 if ((opcode2 != -1) && mono_arch_is_inst_imm (def->inst_c0) && ((srcindex == 1) || (ins->sreg2 == -1))) {
212 ins->opcode = opcode2;
213 if ((def->opcode == OP_I8CONST) && (sizeof (gpointer) == 4)) {
214 ins->inst_ls_word = def->inst_ls_word;
215 ins->inst_ms_word = def->inst_ms_word;
217 ins->inst_imm = def->inst_c0;
219 sregs [srcindex] = -1;
220 mono_inst_set_src_registers (ins, sregs);
222 if ((opcode2 == OP_VOIDCALL) || (opcode2 == OP_CALL) || (opcode2 == OP_LCALL) || (opcode2 == OP_FCALL))
223 ((MonoCallInst*)ins)->fptr = (gpointer)ins->inst_imm;
225 /* Allow further iterations */
231 #if defined(TARGET_X86) || defined(TARGET_AMD64)
232 if ((ins->opcode == OP_X86_LEA) && (srcindex == 1)) {
233 #if SIZEOF_REGISTER == 8
234 /* FIXME: Use OP_PADD_IMM when the new JIT is done */
235 ins->opcode = OP_LADD_IMM;
237 ins->opcode = OP_ADD_IMM;
239 ins->inst_imm += def->inst_c0 << ins->backend.shift_amount;
243 opcode2 = mono_load_membase_to_load_mem (ins->opcode);
244 if ((srcindex == 0) && (opcode2 != -1) && mono_arch_is_inst_imm (def->inst_c0)) {
245 ins->opcode = opcode2;
246 ins->inst_imm = def->inst_c0 + ins->inst_offset;
251 else if (((def->opcode == OP_ADD_IMM) || (def->opcode == OP_LADD_IMM)) && (MONO_IS_LOAD_MEMBASE (ins) || MONO_ARCH_IS_OP_MEMBASE (ins->opcode))) {
252 /* ADD_IMM is created by spill_global_vars */
254 * We have to guarantee that def->sreg1 haven't changed since def->dreg
255 * was defined. cfg->frame_reg is assumed to remain constant.
257 if ((def->sreg1 == cfg->frame_reg) || ((def->next == ins) && (def->dreg != def->sreg1))) {
258 ins->inst_basereg = def->sreg1;
259 ins->inst_offset += def->inst_imm;
261 } else if ((ins->opcode == OP_ISUB_IMM) && (def->opcode == OP_IADD_IMM) && (def->next == ins) && (def->dreg != def->sreg1)) {
262 ins->sreg1 = def->sreg1;
263 ins->inst_imm -= def->inst_imm;
264 } else if ((ins->opcode == OP_IADD_IMM) && (def->opcode == OP_ISUB_IMM) && (def->next == ins) && (def->dreg != def->sreg1)) {
265 ins->sreg1 = def->sreg1;
266 ins->inst_imm -= def->inst_imm;
267 } else if (ins->opcode == OP_STOREI1_MEMBASE_REG &&
268 (def->opcode == OP_ICONV_TO_U1 || def->opcode == OP_ICONV_TO_I1 || def->opcode == OP_SEXT_I4 || (SIZEOF_REGISTER == 8 && def->opcode == OP_LCONV_TO_U1)) &&
269 (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg]))) {
270 /* Avoid needless sign extension */
271 ins->sreg1 = def->sreg1;
272 } else if (ins->opcode == OP_STOREI2_MEMBASE_REG &&
273 (def->opcode == OP_ICONV_TO_U2 || def->opcode == OP_ICONV_TO_I2 || def->opcode == OP_SEXT_I4 || (SIZEOF_REGISTER == 8 && def->opcode == OP_LCONV_TO_I2)) &&
274 (!defs [def->sreg1] || (def_index [def->sreg1] < def_index [sreg]))) {
275 /* Avoid needless sign extension */
276 ins->sreg1 = def->sreg1;
280 /* Do strength reduction here */
281 /* FIXME: Add long/float */
282 switch (ins->opcode) {
285 if (ins->dreg == ins->sreg1) {
286 MONO_DELETE_INS (bb, ins);
287 spec = INS_INFO (ins->opcode);
294 #if SIZEOF_REGISTER == 8
298 if (ins->inst_imm == 0) {
299 ins->opcode = OP_MOVE;
300 spec = INS_INFO (ins->opcode);
305 #if SIZEOF_REGISTER == 8
308 if (ins->inst_imm == 0) {
309 ins->opcode = (ins->opcode == OP_LMUL_IMM) ? OP_I8CONST : OP_ICONST;
312 } else if (ins->inst_imm == 1) {
313 ins->opcode = OP_MOVE;
314 } else if ((ins->opcode == OP_IMUL_IMM) && (ins->inst_imm == -1)) {
315 ins->opcode = OP_INEG;
316 } else if ((ins->opcode == OP_LMUL_IMM) && (ins->inst_imm == -1)) {
317 ins->opcode = OP_LNEG;
319 int power2 = mono_is_power_of_two (ins->inst_imm);
321 ins->opcode = (ins->opcode == OP_MUL_IMM) ? OP_SHL_IMM : ((ins->opcode == OP_LMUL_IMM) ? OP_LSHL_IMM : OP_ISHL_IMM);
322 ins->inst_imm = power2;
325 spec = INS_INFO (ins->opcode);
328 case OP_IDIV_UN_IMM: {
329 int c = ins->inst_imm;
330 int power2 = mono_is_power_of_two (c);
333 if (ins->opcode == OP_IREM_UN_IMM) {
334 ins->opcode = OP_IAND_IMM;
336 ins->inst_imm = (1 << power2) - 1;
337 } else if (ins->opcode == OP_IDIV_UN_IMM) {
338 ins->opcode = OP_ISHR_UN_IMM;
340 ins->inst_imm = power2;
343 spec = INS_INFO (ins->opcode);
347 int c = ins->inst_imm;
348 int power2 = mono_is_power_of_two (c);
349 MonoInst *tmp1, *tmp2, *tmp3, *tmp4;
351 /* FIXME: Move this elsewhere cause its hard to implement it here */
353 int r1 = mono_alloc_ireg (cfg);
355 NEW_BIALU_IMM (cfg, tmp1, OP_ISHR_UN_IMM, r1, ins->sreg1, 31);
356 mono_bblock_insert_after_ins (bb, ins, tmp1);
357 NEW_BIALU (cfg, tmp2, OP_IADD, r1, r1, ins->sreg1);
358 mono_bblock_insert_after_ins (bb, tmp1, tmp2);
359 NEW_BIALU_IMM (cfg, tmp3, OP_ISHR_IMM, ins->dreg, r1, 1);
360 mono_bblock_insert_after_ins (bb, tmp2, tmp3);
364 // We allocated a new vreg, so need to restart
366 } else if (power2 > 0) {
367 int r1 = mono_alloc_ireg (cfg);
369 NEW_BIALU_IMM (cfg, tmp1, OP_ISHR_IMM, r1, ins->sreg1, 31);
370 mono_bblock_insert_after_ins (bb, ins, tmp1);
371 NEW_BIALU_IMM (cfg, tmp2, OP_ISHR_UN_IMM, r1, r1, (32 - power2));
372 mono_bblock_insert_after_ins (bb, tmp1, tmp2);
373 NEW_BIALU (cfg, tmp3, OP_IADD, r1, r1, ins->sreg1);
374 mono_bblock_insert_after_ins (bb, tmp2, tmp3);
375 NEW_BIALU_IMM (cfg, tmp4, OP_ISHR_IMM, ins->dreg, r1, power2);
376 mono_bblock_insert_after_ins (bb, tmp3, tmp4);
380 // We allocated a new vreg, so need to restart
387 if (spec [MONO_INST_DEST] != ' ') {
388 MonoInst *def = defs [ins->dreg];
390 if (def && (def->opcode == OP_ADD_IMM) && (def->sreg1 == cfg->frame_reg) && (MONO_IS_STORE_MEMBASE (ins))) {
391 /* ADD_IMM is created by spill_global_vars */
392 /* cfg->frame_reg is assumed to remain constant */
393 ins->inst_destbasereg = def->sreg1;
394 ins->inst_offset += def->inst_imm;
398 if ((spec [MONO_INST_DEST] != ' ') && !MONO_IS_STORE_MEMBASE (ins) && !vreg_is_volatile (cfg, ins->dreg)) {
399 defs [ins->dreg] = ins;
400 def_index [ins->dreg] = ins_index;
403 if (MONO_IS_CALL (ins))
404 last_call_index = ins_index;
411 static inline gboolean
412 reg_is_softreg_no_fpstack (int reg, const char spec)
414 return (spec == 'i' && reg >= MONO_MAX_IREGS)
415 || ((spec == 'f' && reg >= MONO_MAX_FREGS) && !MONO_ARCH_USE_FPSTACK)
416 #ifdef MONO_ARCH_SIMD_INTRINSICS
417 || (spec == 'x' && reg >= MONO_MAX_XREGS)
422 static inline gboolean
423 reg_is_softreg (int reg, const char spec)
425 return (spec == 'i' && reg >= MONO_MAX_IREGS)
426 || (spec == 'f' && reg >= MONO_MAX_FREGS)
427 #ifdef MONO_ARCH_SIMD_INTRINSICS
428 || (spec == 'x' && reg >= MONO_MAX_XREGS)
433 static inline gboolean
434 mono_is_simd_accessor (MonoInst *ins)
436 switch (ins->opcode) {
437 #ifdef MONO_ARCH_SIMD_INTRINSICS
445 case OP_INSERTX_U1_SLOW:
446 case OP_INSERTX_I4_SLOW:
447 case OP_INSERTX_R4_SLOW:
448 case OP_INSERTX_R8_SLOW:
449 case OP_INSERTX_I8_SLOW:
460 * Get rid of the dead assignments to local vregs like the ones created by the
464 mono_local_deadce (MonoCompile *cfg)
467 MonoInst *ins, *prev;
468 MonoBitSet *used, *defined;
470 //mono_print_code (cfg, "BEFORE LOCAL-DEADCE");
473 * Assignments to global vregs can't be eliminated so this pass must come
474 * after the handle_global_vregs () pass.
477 used = mono_bitset_mp_new_noinit (cfg->mempool, cfg->next_vreg + 1);
478 defined = mono_bitset_mp_new_noinit (cfg->mempool, cfg->next_vreg + 1);
480 /* First pass: collect liveness info */
481 for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
482 /* Manually init the defs entries used by the bblock */
483 MONO_BB_FOR_EACH_INS (bb, ins) {
484 const char *spec = INS_INFO (ins->opcode);
485 int sregs [MONO_MAX_SRC_REGS];
488 if (spec [MONO_INST_DEST] != ' ') {
489 mono_bitset_clear_fast (used, ins->dreg);
490 mono_bitset_clear_fast (defined, ins->dreg);
491 #if SIZEOF_REGISTER == 4
493 mono_bitset_clear_fast (used, ins->dreg + 1);
494 mono_bitset_clear_fast (defined, ins->dreg + 1);
497 num_sregs = mono_inst_get_src_registers (ins, sregs);
498 for (i = 0; i < num_sregs; ++i) {
499 mono_bitset_clear_fast (used, sregs [i]);
500 #if SIZEOF_REGISTER == 4
501 mono_bitset_clear_fast (used, sregs [i] + 1);
507 * Make a reverse pass over the instruction list
509 MONO_BB_FOR_EACH_INS_REVERSE_SAFE (bb, prev, ins) {
510 const char *spec = INS_INFO (ins->opcode);
511 int sregs [MONO_MAX_SRC_REGS];
514 if (ins->opcode == OP_NOP) {
515 MONO_DELETE_INS (bb, ins);
519 g_assert (ins->opcode > MONO_CEE_LAST);
521 if (MONO_IS_NON_FP_MOVE (ins) && ins->prev) {
526 while (def->prev && (def->opcode == OP_NOP))
528 spec2 = INS_INFO (def->opcode);
531 * Perform a limited kind of reverse copy propagation, i.e.
532 * transform B <- FOO; A <- B into A <- FOO
533 * This isn't copyprop, not deadce, but it can only be performed
534 * after handle_global_vregs () has run.
536 if (!get_vreg_to_inst (cfg, ins->sreg1) && (spec2 [MONO_INST_DEST] != ' ') && (def->dreg == ins->sreg1) && !mono_bitset_test_fast (used, ins->sreg1) && !MONO_IS_STORE_MEMBASE (def) && reg_is_softreg (ins->sreg1, spec [MONO_INST_DEST]) && !mono_is_simd_accessor (def)) {
537 if (cfg->verbose_level > 2) {
538 printf ("\tReverse copyprop in BB%d on ", bb->block_num);
539 mono_print_ins (ins);
542 def->dreg = ins->dreg;
543 MONO_DELETE_INS (bb, ins);
544 spec = INS_INFO (ins->opcode);
548 /* Enabling this on x86 could screw up the fp stack */
549 if (reg_is_softreg_no_fpstack (ins->dreg, spec [MONO_INST_DEST])) {
551 * Assignments to global vregs can only be eliminated if there is another
552 * assignment to the same vreg later in the same bblock.
554 if (!mono_bitset_test_fast (used, ins->dreg) &&
555 (!get_vreg_to_inst (cfg, ins->dreg) || (!bb->extended && !vreg_is_volatile (cfg, ins->dreg) && mono_bitset_test_fast (defined, ins->dreg))) &&
556 MONO_INS_HAS_NO_SIDE_EFFECT (ins)) {
557 /* Happens with CMOV instructions */
558 if (ins->prev && ins->prev->opcode == OP_ICOMPARE_IMM) {
559 MonoInst *prev = ins->prev;
561 * Can't use DELETE_INS since that would interfere with the
566 //printf ("DEADCE: "); mono_print_ins (ins);
567 MONO_DELETE_INS (bb, ins);
568 spec = INS_INFO (ins->opcode);
571 if (spec [MONO_INST_DEST] != ' ')
572 mono_bitset_clear_fast (used, ins->dreg);
575 if (spec [MONO_INST_DEST] != ' ')
576 mono_bitset_set_fast (defined, ins->dreg);
577 num_sregs = mono_inst_get_src_registers (ins, sregs);
578 for (i = 0; i < num_sregs; ++i)
579 mono_bitset_set_fast (used, sregs [i]);
580 if (MONO_IS_STORE_MEMBASE (ins))
581 mono_bitset_set_fast (used, ins->dreg);
583 if (MONO_IS_CALL (ins)) {
584 MonoCallInst *call = (MonoCallInst*)ins;
587 if (call->out_ireg_args) {
588 for (l = call->out_ireg_args; l; l = l->next) {
589 guint32 regpair, reg;
591 regpair = (guint32)(gssize)(l->data);
592 reg = regpair & 0xffffff;
594 mono_bitset_set_fast (used, reg);
598 if (call->out_freg_args) {
599 for (l = call->out_freg_args; l; l = l->next) {
600 guint32 regpair, reg;
602 regpair = (guint32)(gssize)(l->data);
603 reg = regpair & 0xffffff;
605 mono_bitset_set_fast (used, reg);
612 //mono_print_code (cfg, "AFTER LOCAL-DEADCE");