mono/mini/inssel-x86.brg

   1 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG(cfg,basereg,offset,operand) do { \
   2                 MonoInst *inst; \
   3                 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
   4                 inst->opcode = OP_X86_COMPARE_MEMBASE_REG; \
   5                 inst->inst_basereg = basereg; \
   6                 inst->inst_offset = offset; \
   7                 inst->sreg2 = operand; \
   8                 mono_bblock_add_inst (cfg->cbb, inst); \
   9         } while (0)
  10
  11 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM(cfg,basereg,offset,operand) do { \
  12                 MonoInst *inst; \
  13                 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
  14                 inst->opcode = OP_X86_COMPARE_MEMBASE_IMM; \
  15                 inst->inst_basereg = basereg; \
  16                 inst->inst_offset = offset; \
  17                 inst->inst_imm = operand; \
  18                 mono_bblock_add_inst (cfg->cbb, inst); \
  19         } while (0)
  20
  21 /* override the arch independant versions with fast x86 versions */
  22
  23 #undef MONO_EMIT_BOUNDS_CHECK
  24 #undef MONO_EMIT_BOUNDS_CHECK_IMM
  25
  26 #define MONO_EMIT_BOUNDS_CHECK(cfg, array_reg, array_type, array_length_field, index_reg) do { \
  27                 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
  28                         MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_reg); \
  29                         MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
  30                 } \
  31         } while (0)
  32
  33 #define MONO_EMIT_BOUNDS_CHECK_IMM(cfg, array_reg, array_type, array_length_field, index_imm) do { \
  34                 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
  35                         MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_imm); \
  36                         MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
  37                 } \
  38         } while (0)
  39
  40
  41 %%
  42
  43 #
  44 # inssel-x86.brg: burg file for special x86 instructions
  45 #
  46 # Author:
  47 #   Dietmar Maurer (dietmar@ximian.com)
  48 #   Paolo Molaro (lupus@ximian.com)
  49 #
  50 # (C) 2002 Ximian, Inc.
  51 #
  52
  53 stmt: OP_START_HANDLER {
  54         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
  55         MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP);
  56 }
  57
  58 stmt: CEE_ENDFINALLY {
  59         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
  60         MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
  61         tree->opcode = CEE_RET;
  62         mono_bblock_add_inst (s->cbb, tree);
  63 }
  64
  65 stmt: OP_ENDFILTER (reg) {
  66         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
  67         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->left->reg1);
  68         MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
  69         tree->opcode = CEE_RET;
  70         mono_bblock_add_inst (s->cbb, tree);
  71 }
  72
  73 stmt: CEE_STIND_I8 (OP_REGVAR, lreg) {
  74         /* this should only happen for methods returning a long */
  75         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->right->reg1);
  76         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->right->reg2);
  77 }
  78
  79 lreg: OP_LNEG (lreg) "3" {
  80         int tmpr = mono_regstate_next_int (s->rs);
  81         MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg1, state->left->reg1);
  82         MONO_EMIT_BIALU_IMM (s, tree, OP_ADC_IMM, tmpr, state->left->reg2, 0);
  83         MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg2, tmpr);
  84 }
  85
  86 freg: OP_LCONV_TO_R8 (lreg) {
  87         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
  88         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
  89         tree->opcode = OP_X86_FP_LOAD_I8;
  90         tree->inst_basereg = X86_ESP;
  91         tree->inst_offset = 0;
  92         mono_bblock_add_inst (s->cbb, tree);
  93         MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
  94 }
  95
  96 freg: OP_LCONV_TO_R4 (lreg) {
  97         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
  98         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
  99         tree->opcode = OP_X86_FP_LOAD_I8;
 100         tree->inst_basereg = X86_ESP;
 101         tree->inst_offset = 0;
 102         mono_bblock_add_inst (s->cbb, tree);
 103         /* change precision */
 104         MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORER4_MEMBASE_REG, X86_ESP, 0, state->reg1);
 105         MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADR4_MEMBASE, state->reg1, X86_ESP, 0);
 106         MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
 107 }
 108
 109 freg: CEE_CONV_R_UN (reg) {
 110         MONO_EMIT_NEW_BIALU_IMM (s, OP_X86_PUSH_IMM, -1, -1, 0);
 111         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
 112         tree->opcode = OP_X86_FP_LOAD_I8;
 113         tree->inst_basereg = X86_ESP;
 114         tree->inst_offset = 0;
 115         mono_bblock_add_inst (s->cbb, tree);
 116         MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
 117 }
 118
 119 cflags: OP_COMPARE (CEE_LDIND_I4 (base), reg) {
 120         tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
 121         tree->inst_basereg = state->left->left->tree->inst_basereg;
 122         tree->inst_offset = state->left->left->tree->inst_offset;
 123         tree->sreg2 = state->right->reg1;
 124         mono_bblock_add_inst (s->cbb, tree);
 125 }
 126
 127 cflags: OP_COMPARE (CEE_LDIND_I4 (base), OP_ICONST) {
 128         tree->opcode = OP_X86_COMPARE_MEMBASE_IMM;
 129         tree->inst_basereg = state->left->left->tree->inst_basereg;
 130         tree->inst_offset = state->left->left->tree->inst_offset;
 131         tree->inst_imm = state->right->tree->inst_c0;
 132         mono_bblock_add_inst (s->cbb, tree);
 133 }
 134
 135 cflags: OP_COMPARE (reg, CEE_LDIND_I4 (base)) {
 136         tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
 137         tree->sreg2 = state->right->left->tree->inst_basereg;
 138         tree->inst_offset = state->right->left->tree->inst_offset;
 139         tree->sreg1 = state->left->reg1;
 140         mono_bblock_add_inst (s->cbb, tree);
 141 }
 142
 143 stmt: CEE_STIND_I1 (base, OP_CEQ (cflags)) {
 144         tree->opcode = OP_X86_SETEQ_MEMBASE;
 145         tree->inst_offset = state->left->tree->inst_offset;
 146         tree->inst_basereg = state->left->tree->inst_basereg;
 147         mono_bblock_add_inst (s->cbb, tree);
 148 }
 149
 150 reg: OP_LOCALLOC (OP_ICONST) {
 151         if (tree->flags & MONO_INST_INIT) {
 152                 /* microcoded in mini-x86.c */
 153                 tree->sreg1 = mono_regstate_next_int (s->rs);
 154                 tree->dreg = state->reg1;
 155                 MONO_EMIT_NEW_ICONST (s, tree->sreg1, state->left->tree->inst_c0);
 156                 mono_bblock_add_inst (s->cbb, tree);
 157         } else {
 158                 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, state->left->tree->inst_c0);
 159                 MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
 160         }
 161 }
 162
 163 reg: OP_LOCALLOC (reg) {
 164         tree->sreg1 = state->left->tree->dreg;
 165         mono_bblock_add_inst (s->cbb, tree);
 166 }
 167
 168 stmt: OP_SETRET (reg) {
 169         tree->opcode = OP_MOVE;
 170         tree->sreg1 = state->left->reg1;
 171         tree->dreg = X86_EAX;
 172         mono_bblock_add_inst (s->cbb, tree);
 173 }
 174
 175 stmt: OP_SETRET (lreg) {
 176         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->left->reg2);
 177         tree->opcode = OP_MOVE;
 178         tree->sreg1 = state->left->reg1;
 179         tree->dreg = X86_EAX;
 180         mono_bblock_add_inst (s->cbb, tree);
 181 }
 182
 183 stmt: OP_SETRET (CEE_LDIND_REF (OP_REGVAR)) {
 184         tree->opcode = OP_MOVE;
 185         tree->sreg1 = state->left->left->tree->dreg;
 186         tree->dreg = X86_EAX;
 187         mono_bblock_add_inst (s->cbb, tree);
 188 }
 189
 190 stmt: OP_SETRET (freg) {
 191         /* nothing to do */
 192 }
 193
 194 stmt: OP_SETRET (OP_ICONST) {
 195         tree->opcode = OP_ICONST;
 196         tree->inst_c0 = state->left->tree->inst_c0;
 197         tree->dreg = X86_EAX;
 198         mono_bblock_add_inst (s->cbb, tree);
 199 }
 200
 201 stmt: OP_OUTARG (reg) {
 202         tree->opcode = OP_X86_PUSH;
 203         tree->sreg1 = state->left->reg1;
 204         mono_bblock_add_inst (s->cbb, tree);
 205 }
 206
 207 # we need to reduce this code duplication with some burg syntax extension
 208 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)) {
 209         tree->opcode = OP_X86_PUSH;
 210         tree->sreg1 = state->left->left->tree->dreg;
 211         mono_bblock_add_inst (s->cbb, tree);
 212 }
 213
 214 stmt: OP_OUTARG (CEE_LDIND_I4 (OP_REGVAR)) {
 215         tree->opcode = OP_X86_PUSH;
 216         tree->sreg1 = state->left->left->tree->dreg;
 217         mono_bblock_add_inst (s->cbb, tree);
 218 }
 219
 220 stmt: OP_OUTARG (CEE_LDIND_U4 (OP_REGVAR)) {
 221         tree->opcode = OP_X86_PUSH;
 222         tree->sreg1 = state->left->left->tree->dreg;
 223         mono_bblock_add_inst (s->cbb, tree);
 224 }
 225
 226 stmt: OP_OUTARG (CEE_LDIND_I (OP_REGVAR)) {
 227         tree->opcode = OP_X86_PUSH;
 228         tree->sreg1 = state->left->left->tree->dreg;
 229         mono_bblock_add_inst (s->cbb, tree);
 230 }
 231
 232 stmt: OP_OUTARG (lreg) {
 233         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
 234         tree->opcode = OP_X86_PUSH;
 235         tree->sreg1 = state->left->reg1;
 236         mono_bblock_add_inst (s->cbb, tree);
 237 }
 238
 239 stmt: OP_OUTARG (CEE_LDIND_I8 (base)) {
 240         MonoInst *ins;
 241         ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
 242         ins->opcode = OP_X86_PUSH_MEMBASE;
 243         ins->inst_basereg = state->left->left->tree->inst_basereg;
 244         ins->inst_offset = state->left->left->tree->inst_offset + 4;
 245         mono_bblock_add_inst (s->cbb, ins);
 246
 247         tree->opcode = OP_X86_PUSH_MEMBASE;
 248         tree->inst_basereg = state->left->left->tree->inst_basereg;
 249         tree->inst_offset = state->left->left->tree->inst_offset;
 250         mono_bblock_add_inst (s->cbb, tree);
 251 }
 252
 253 stmt: OP_OUTARG (OP_ICONST) {
 254         tree->opcode = OP_X86_PUSH_IMM;
 255         tree->inst_imm = state->left->tree->inst_c0;
 256         mono_bblock_add_inst (s->cbb, tree);
 257 }
 258
 259 stmt: OP_OUTARG (CEE_LDIND_I4 (base)) {
 260         tree->opcode = OP_X86_PUSH_MEMBASE;
 261         tree->inst_basereg = state->left->left->tree->inst_basereg;
 262         tree->inst_offset = state->left->left->tree->inst_offset;
 263         mono_bblock_add_inst (s->cbb, tree);
 264 }
 265
 266 stmt: OP_OUTARG (CEE_LDIND_U4 (base)) {
 267         tree->opcode = OP_X86_PUSH_MEMBASE;
 268         tree->inst_basereg = state->left->left->tree->inst_basereg;
 269         tree->inst_offset = state->left->left->tree->inst_offset;
 270         mono_bblock_add_inst (s->cbb, tree);
 271 }
 272
 273 stmt: OP_OUTARG (CEE_LDIND_I (base)) {
 274         tree->opcode = OP_X86_PUSH_MEMBASE;
 275         tree->inst_basereg = state->left->left->tree->inst_basereg;
 276         tree->inst_offset = state->left->left->tree->inst_offset;
 277         mono_bblock_add_inst (s->cbb, tree);
 278 }
 279
 280 stmt: OP_OUTARG (CEE_LDIND_REF (base)) {
 281         tree->opcode = OP_X86_PUSH_MEMBASE;
 282         tree->inst_basereg = state->left->left->tree->inst_basereg;
 283         tree->inst_offset = state->left->left->tree->inst_offset;
 284         mono_bblock_add_inst (s->cbb, tree);
 285 }
 286
 287 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)) {
 288         tree->opcode = OP_X86_PUSH;
 289         tree->sreg1 = state->left->left->tree->dreg;
 290         mono_bblock_add_inst (s->cbb, tree);
 291 }
 292
 293 stmt: OP_OUTARG (CEE_LDOBJ (reg)) {
 294         tree->opcode = OP_X86_PUSH;
 295         tree->sreg1 = state->left->reg1;
 296         mono_bblock_add_inst (s->cbb, tree);
 297 }
 298
 299 stmt: OP_OUTARG (freg) {
 300         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
 301         tree->opcode = OP_STORER8_MEMBASE_REG;
 302         tree->sreg1 = state->left->reg1;
 303         tree->inst_destbasereg = X86_ESP;
 304         tree->inst_offset = 0;
 305         mono_bblock_add_inst (s->cbb, tree);
 306 }
 307
 308 stmt: OP_OUTARG_R4 (freg) {
 309         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 4);
 310         tree->opcode = OP_STORER4_MEMBASE_REG;
 311         tree->sreg1 = state->left->reg1;
 312         tree->inst_destbasereg = X86_ESP;
 313         tree->inst_offset = 0;
 314         mono_bblock_add_inst (s->cbb, tree);
 315 }
 316
 317 stmt: OP_OUTARG_R8 (freg) {
 318         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
 319         tree->opcode = OP_STORER8_MEMBASE_REG;
 320         tree->sreg1 = state->left->reg1;
 321         tree->inst_destbasereg = X86_ESP;
 322         tree->inst_offset = 0;
 323         mono_bblock_add_inst (s->cbb, tree);
 324 }
 325
 326 stmt: OP_OUTARG_VT (CEE_LDOBJ (base)) {
 327         MonoInst *vt = state->left->left->tree;
 328         //g_print ("vt size: %d at R%d + %d\n", tree->inst_imm, vt->inst_basereg, vt->inst_offset);
 329
 330         if (!tree->inst_imm)
 331                 return;
 332
 333         if (tree->inst_imm <= 4) {
 334                 tree->opcode = OP_X86_PUSH_MEMBASE;
 335                 tree->inst_basereg = vt->inst_basereg;
 336                 tree->inst_offset = vt->inst_offset;
 337                 mono_bblock_add_inst (s->cbb, tree);
 338         } else if (tree->inst_imm <= 20) {
 339                 int sz = tree->inst_imm;
 340                 sz += 3;
 341                 sz &= ~3;
 342                 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, sz);
 343                 mini_emit_memcpy (s, X86_ESP, 0, vt->inst_basereg, vt->inst_offset, tree->inst_imm, 0);
 344         } else {
 345                 tree->opcode = OP_X86_PUSH_OBJ;
 346                 tree->inst_basereg = vt->inst_basereg;
 347                 tree->inst_offset = vt->inst_offset;
 348                 mono_bblock_add_inst (s->cbb, tree);
 349         }
 350 }
 351
 352 stmt: OP_OUTARG_VT (OP_ICONST) {
 353         tree->opcode = OP_X86_PUSH_IMM;
 354         tree->inst_imm = state->left->tree->inst_c0;
 355         mono_bblock_add_inst (s->cbb, tree);
 356 }
 357
 358 stmt: OP_OUTARG_VT (reg) {
 359         tree->opcode = OP_X86_PUSH;
 360         tree->sreg1 = state->left->tree->dreg;
 361         mono_bblock_add_inst (s->cbb, tree);
 362 }
 363
 364 reg: OP_LDADDR (OP_REGOFFSET) "1" {
 365         if (state->left->tree->inst_offset) {
 366                 tree->opcode = OP_X86_LEA_MEMBASE;
 367                 tree->sreg1 = state->left->tree->inst_basereg;
 368                 tree->inst_imm = state->left->tree->inst_offset;
 369                 tree->dreg = state->reg1;
 370         } else {
 371                 tree->opcode = OP_MOVE;
 372                 tree->sreg1 = state->left->tree->inst_basereg;
 373                 tree->dreg = state->reg1;
 374         }
 375         mono_bblock_add_inst (s->cbb, tree);
 376 }
 377
 378 reg: CEE_LDOBJ (OP_REGOFFSET) "1" {
 379         if (state->left->tree->inst_offset) {
 380                 tree->opcode = OP_X86_LEA_MEMBASE;
 381                 tree->sreg1 = state->left->tree->inst_basereg;
 382                 tree->inst_imm = state->left->tree->inst_offset;
 383                 tree->dreg = state->reg1;
 384         } else {
 385                 tree->opcode = OP_MOVE;
 386                 tree->sreg1 = state->left->tree->inst_basereg;
 387                 tree->dreg = state->reg1;
 388         }
 389         mono_bblock_add_inst (s->cbb, tree);
 390 }
 391
 392 reg: CEE_LDELEMA (reg, reg) "15" {
 393         guint32 size = mono_class_array_element_size (tree->klass);
 394
 395         MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoArray, max_length, state->right->reg1);
 396
 397         if (size == 1 || size == 2 || size == 4 || size == 8) {
 398                 static const int fast_log2 [] = { 1, 0, 1, -1, 2, -1, -1, -1, 3 };
 399                 tree->opcode = OP_X86_LEA;
 400                 tree->dreg = state->reg1;
 401                 tree->sreg1 = state->left->reg1;
 402                 tree->sreg2 = state->right->reg1;
 403                 tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
 404                 tree->unused = fast_log2 [size];
 405                 mono_bblock_add_inst (s->cbb, tree);
 406         } else {
 407                 int mult_reg = mono_regstate_next_int (s->rs);
 408                 int add_reg = mono_regstate_next_int (s->rs);
 409                 MONO_EMIT_NEW_BIALU_IMM (s, OP_MUL_IMM, mult_reg, state->right->reg1, size);
 410                 MONO_EMIT_NEW_BIALU (s, CEE_ADD, add_reg, mult_reg, state->left->reg1);
 411                 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, state->reg1, add_reg, G_STRUCT_OFFSET (MonoArray, vector));
 412         }
 413 }
 414
 415 stmt: CEE_STIND_R8 (OP_REGVAR, freg) {
 416         /* nothing to do: the value is already on the FP stack */
 417 }
 418
 419 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
 420         int con = state->right->right->tree->inst_c0;
 421
 422         if (con == 1) {
 423                 tree->opcode = OP_X86_INC_MEMBASE;
 424         } else {
 425                 tree->opcode = OP_X86_ADD_MEMBASE_IMM;
 426                 tree->inst_imm = con;
 427         }
 428
 429         tree->inst_basereg = state->left->tree->inst_basereg;
 430         tree->inst_offset = state->left->tree->inst_offset;
 431         mono_bblock_add_inst (s->cbb, tree);
 432 } cost {
 433         MBTREE_TYPE *t1 = state->right->left->left->tree;
 434         MBTREE_TYPE *t2 = state->left->tree;
 435         MBCOND (t1->inst_basereg == t2->inst_basereg &&
 436                 t1->inst_offset == t2->inst_offset);
 437         return 2;
 438 }
 439
 440 stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)) {
 441         int con = state->right->right->tree->inst_c0;
 442
 443         if (con == 1) {
 444                 tree->opcode = OP_X86_DEC_MEMBASE;
 445         } else {
 446                 tree->opcode = OP_X86_SUB_MEMBASE_IMM;
 447                 tree->inst_imm = con;
 448         }
 449
 450         tree->inst_basereg = state->left->tree->inst_basereg;
 451         tree->inst_offset = state->left->tree->inst_offset;
 452         mono_bblock_add_inst (s->cbb, tree);
 453 } cost {
 454         MBTREE_TYPE *t1 = state->right->left->left->tree;
 455         MBTREE_TYPE *t2 = state->left->tree;
 456         MBCOND (t1->inst_basereg == t2->inst_basereg &&
 457                 t1->inst_offset == t2->inst_offset);
 458         return 2;
 459 }
 460
 461 #
 462 # this rules is incorrect, it needs to do an indirect inc (inc_membase)
 463 #stmt: CEE_STIND_I4 (reg, CEE_ADD (reg, OP_ICONST)) {
 464 #       tree->opcode = OP_X86_INC_REG;
 465 #       tree->dreg = state->left->reg1;
 466 #       mono_bblock_add_inst (s->cbb, tree);
 467 #} cost {
 468 #       MBState *s1 = state->left;
 469 #       MBState *s2 = state->right->left;
 470 #       int con = state->right->right->tree->inst_c0;
 471 #       MBCOND (con == 1 && s1->reg1 == s2->reg1);
 472 #       return 1;
 473 #}
 474
 475 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_SUB (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
 476         int con = state->right->right->tree->inst_c0;
 477         int dreg = state->left->tree->dreg;
 478         int sreg = state->right->left->left->tree->dreg;
 479
 480         if (con == 1) {
 481                 if (dreg != sreg)
 482                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 483                 tree->opcode = OP_X86_DEC_REG;
 484                 tree->dreg = tree->sreg1 = dreg;
 485         } else if (con == -1) {
 486                 if (dreg != sreg)
 487                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 488                 tree->opcode = OP_X86_INC_REG;
 489                 tree->dreg = tree->sreg1 = dreg;
 490         } else {
 491                 tree->opcode = OP_SUB_IMM;
 492                 tree->inst_imm = con;
 493                 tree->sreg1 = sreg;
 494                 tree->dreg = dreg;
 495         }
 496         mono_bblock_add_inst (s->cbb, tree);
 497 }
 498
 499 stmt: CEE_STIND_I (OP_REGVAR, CEE_ADD (CEE_LDIND_I (OP_REGVAR), OP_ICONST)),
 500 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_ADD (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
 501         int con = state->right->right->tree->inst_c0;
 502         int dreg = state->left->tree->dreg;
 503         int sreg = state->right->left->left->tree->dreg;
 504
 505         if (con == 1) {
 506                 if (dreg != sreg)
 507                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 508                 tree->opcode = OP_X86_INC_REG;
 509                 tree->dreg = tree->sreg1 = dreg;
 510         } else if (con == -1) {
 511                 if (dreg != sreg)
 512                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 513                 tree->opcode = OP_X86_DEC_REG;
 514                 tree->dreg = tree->sreg1 = dreg;
 515         } else {
 516                 tree->opcode = OP_ADD_IMM;
 517                 tree->inst_imm = con;
 518                 tree->sreg1 = sreg;
 519                 tree->dreg = dreg;
 520         }
 521         mono_bblock_add_inst (s->cbb, tree);
 522 }
 523
 524 reg: CEE_LDIND_I2 (OP_REGVAR) {
 525         MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);
 526 }
 527
 528 # on x86, fp compare overwrites EAX, so we must
 529 # either improve the local register allocator or
 530 # emit coarse opcodes which saves EAX for us.
 531
 532 reg: OP_CEQ (OP_COMPARE (freg, freg)) {
 533         MONO_EMIT_BIALU (s, tree, OP_FCEQ, state->reg1, state->left->left->reg1,
 534                          state->left->right->reg1);
 535 }
 536
 537 reg: OP_CLT (OP_COMPARE (freg, freg)) {
 538         MONO_EMIT_BIALU (s, tree, OP_FCLT, state->reg1, state->left->left->reg1,
 539                          state->left->right->reg1);
 540 }
 541
 542 reg: OP_CLT_UN (OP_COMPARE (freg, freg)) {
 543         MONO_EMIT_BIALU (s, tree, OP_FCLT_UN, state->reg1, state->left->left->reg1,
 544                          state->left->right->reg1);
 545 }
 546
 547 reg: OP_CGT (OP_COMPARE (freg, freg)) {
 548         MONO_EMIT_BIALU (s, tree, OP_FCGT, state->reg1, state->left->left->reg1,
 549                          state->left->right->reg1);
 550 }
 551
 552 reg: OP_CGT_UN (OP_COMPARE (freg, freg)) {
 553         MONO_EMIT_BIALU (s, tree, OP_FCGT_UN, state->reg1, state->left->left->reg1,
 554                          state->left->right->reg1);
 555 }
 556
 557 # fpcflags overwrites EAX, but this does not matter for statements
 558 # because we are the last operation in the tree.
 559
 560 stmt: CEE_BNE_UN (fpcflags) {
 561         tree->opcode = OP_FBNE_UN;
 562         mono_bblock_add_inst (s->cbb, tree);
 563 }
 564
 565 stmt: CEE_BEQ (fpcflags) {
 566         tree->opcode = OP_FBEQ;
 567         mono_bblock_add_inst (s->cbb, tree);
 568 }
 569
 570 stmt: CEE_BLT (fpcflags) {
 571         tree->opcode = OP_FBLT;
 572         mono_bblock_add_inst (s->cbb, tree);
 573 }
 574
 575 stmt: CEE_BLT_UN (fpcflags) {
 576         tree->opcode = OP_FBLT_UN;
 577         mono_bblock_add_inst (s->cbb, tree);
 578 }
 579
 580 stmt: CEE_BGT (fpcflags) {
 581         tree->opcode = OP_FBGT;
 582         mono_bblock_add_inst (s->cbb, tree);
 583 }
 584
 585 stmt: CEE_BGT_UN (fpcflags) {
 586         tree->opcode = OP_FBGT_UN;
 587         mono_bblock_add_inst (s->cbb, tree);
 588 }
 589
 590 stmt: CEE_BGE  (fpcflags) {
 591         tree->opcode = OP_FBGE;
 592         mono_bblock_add_inst (s->cbb, tree);
 593 }
 594
 595 stmt: CEE_BGE_UN (fpcflags) {
 596         tree->opcode = OP_FBGE_UN;
 597         mono_bblock_add_inst (s->cbb, tree);
 598 }
 599
 600 stmt: CEE_BLE  (fpcflags) {
 601         tree->opcode = OP_FBLE;
 602         mono_bblock_add_inst (s->cbb, tree);
 603 }
 604
 605 stmt: CEE_BLE_UN (fpcflags) {
 606         tree->opcode = OP_FBLE_UN;
 607         mono_bblock_add_inst (s->cbb, tree);
 608 }
 609
 610 stmt: CEE_POP (freg) "0" {
 611         /* we need to pop the value from the x86 FP stack */
 612         MONO_EMIT_UNALU (s, tree, OP_X86_FPOP, -1, state->left->reg1);
 613 }
 614
 615 # override the rules in inssel-float.brg that work for machines with FP registers
 616
 617 freg: OP_FCONV_TO_R8 (freg) "0" {
 618         /* nothing to do */
 619 }
 620
 621 freg: OP_FCONV_TO_R4 (freg) "0" {
 622         /* fixme: nothing to do ??*/
 623 }
 624
 625 reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) {
 626         MonoInst *base = state->right->left->tree;
 627
 628         tree->dreg = state->reg1;
 629         tree->sreg1 = state->left->reg1;
 630         tree->sreg2 = base->inst_basereg;
 631         tree->inst_offset = base->inst_offset;
 632         tree->opcode = OP_X86_ADD_MEMBASE;
 633         mono_bblock_add_inst (s->cbb, tree);
 634 }
 635
 636 reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) {
 637         MonoInst *base = state->right->left->tree;
 638
 639         tree->dreg = state->reg1;
 640         tree->sreg1 = state->left->reg1;
 641         tree->sreg2 = base->inst_basereg;
 642         tree->inst_offset = base->inst_offset;
 643         tree->opcode = OP_X86_SUB_MEMBASE;
 644         mono_bblock_add_inst (s->cbb, tree);
 645 }
 646
 647 reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) {
 648         MonoInst *base = state->right->left->tree;
 649
 650         tree->dreg = state->reg1;
 651         tree->sreg1 = state->left->reg1;
 652         tree->sreg2 = base->inst_basereg;
 653         tree->inst_offset = base->inst_offset;
 654         tree->opcode = OP_X86_MUL_MEMBASE;
 655         mono_bblock_add_inst (s->cbb, tree);
 656 }
 657
 658 lreg: OP_LSHL (lreg, reg) "0" {
 659         MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
 660 }
 661
 662 lreg: OP_LSHL (lreg, OP_ICONST) "0" {
 663         MONO_EMIT_BIALU_IMM (s, tree, OP_LSHL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
 664 }
 665
 666 lreg: OP_LSHR (lreg, reg) "0" {
 667         MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
 668 }
 669
 670 lreg: OP_LSHR (lreg, OP_ICONST) "0" {
 671         MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
 672 }
 673
 674 lreg: OP_LSHR_UN (lreg, reg) "0" {
 675         MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
 676 }
 677
 678 lreg: OP_LSHR_UN (lreg, OP_ICONST) "0" {
 679         MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
 680 }
 681 %%