1 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG(cfg,basereg,offset,operand) do { \
3 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
4 inst->opcode = OP_X86_COMPARE_MEMBASE_REG; \
5 inst->inst_basereg = basereg; \
6 inst->inst_offset = offset; \
7 inst->sreg2 = operand; \
8 mono_bblock_add_inst (cfg->cbb, inst); \
11 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM(cfg,basereg,offset,operand) do { \
13 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
14 inst->opcode = OP_X86_COMPARE_MEMBASE_IMM; \
15 inst->inst_basereg = basereg; \
16 inst->inst_offset = offset; \
17 inst->inst_imm = operand; \
18 mono_bblock_add_inst (cfg->cbb, inst); \
21 /* override the arch independant versions with fast x86 versions */
23 #undef MONO_EMIT_BOUNDS_CHECK
24 #undef MONO_EMIT_BOUNDS_CHECK_IMM
26 #define MONO_EMIT_BOUNDS_CHECK(cfg, array_reg, array_type, array_length_field, index_reg) do { \
27 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
28 MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_reg); \
29 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
33 #define MONO_EMIT_BOUNDS_CHECK_IMM(cfg, array_reg, array_type, array_length_field, index_imm) do { \
34 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
35 MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_imm); \
36 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
44 # inssel-x86.brg: burg file for special x86 instructions
47 # Dietmar Maurer (dietmar@ximian.com)
48 # Paolo Molaro (lupus@ximian.com)
50 # (C) 2002 Ximian, Inc.
53 stmt: OP_START_HANDLER {
54 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
55 MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP);
58 stmt: CEE_ENDFINALLY {
59 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
60 MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
61 tree->opcode = CEE_RET;
62 mono_bblock_add_inst (s->cbb, tree);
65 stmt: OP_ENDFILTER (reg) {
66 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
67 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->left->reg1);
68 MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
69 tree->opcode = CEE_RET;
70 mono_bblock_add_inst (s->cbb, tree);
73 stmt: CEE_STIND_I8 (OP_REGVAR, lreg) {
74 /* this should only happen for methods returning a long */
75 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->right->reg1);
76 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->right->reg2);
79 lreg: OP_LNEG (lreg) "3" {
80 int tmpr = mono_regstate_next_int (s->rs);
81 MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg1, state->left->reg1);
82 MONO_EMIT_BIALU_IMM (s, tree, OP_ADC_IMM, tmpr, state->left->reg2, 0);
83 MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg2, tmpr);
86 freg: OP_LCONV_TO_R8 (lreg) {
87 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
88 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
89 tree->opcode = OP_X86_FP_LOAD_I8;
90 tree->inst_basereg = X86_ESP;
91 tree->inst_offset = 0;
92 mono_bblock_add_inst (s->cbb, tree);
93 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
96 freg: OP_LCONV_TO_R4 (lreg) {
97 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
98 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
99 tree->opcode = OP_X86_FP_LOAD_I8;
100 tree->inst_basereg = X86_ESP;
101 tree->inst_offset = 0;
102 mono_bblock_add_inst (s->cbb, tree);
103 /* change precision */
104 MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORER4_MEMBASE_REG, X86_ESP, 0, state->reg1);
105 MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADR4_MEMBASE, state->reg1, X86_ESP, 0);
106 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
109 freg: CEE_CONV_R_UN (reg) {
110 MONO_EMIT_NEW_BIALU_IMM (s, OP_X86_PUSH_IMM, -1, -1, 0);
111 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
112 tree->opcode = OP_X86_FP_LOAD_I8;
113 tree->inst_basereg = X86_ESP;
114 tree->inst_offset = 0;
115 mono_bblock_add_inst (s->cbb, tree);
116 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
119 cflags: OP_COMPARE (CEE_LDIND_REF (base), reg),
120 cflags: OP_COMPARE (CEE_LDIND_I (base), reg),
121 cflags: OP_COMPARE (CEE_LDIND_I4 (base), reg),
122 cflags: OP_COMPARE (CEE_LDIND_U4 (base), reg) {
123 tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
124 tree->inst_basereg = state->left->left->tree->inst_basereg;
125 tree->inst_offset = state->left->left->tree->inst_offset;
126 tree->sreg2 = state->right->reg1;
127 mono_bblock_add_inst (s->cbb, tree);
130 cflags: OP_COMPARE (CEE_LDIND_REF (base), CEE_LDIND_REF (OP_REGVAR)),
131 cflags: OP_COMPARE (CEE_LDIND_I (base), CEE_LDIND_REF (OP_REGVAR)),
132 cflags: OP_COMPARE (CEE_LDIND_I4 (base), CEE_LDIND_REF (OP_REGVAR)),
133 cflags: OP_COMPARE (CEE_LDIND_U4 (base), CEE_LDIND_REF (OP_REGVAR)) {
134 tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
135 tree->inst_basereg = state->left->left->tree->inst_basereg;
136 tree->inst_offset = state->left->left->tree->inst_offset;
137 tree->sreg2 = state->right->left->tree->dreg;
138 mono_bblock_add_inst (s->cbb, tree);
141 cflags: OP_COMPARE (CEE_LDIND_REF (base), OP_ICONST),
142 cflags: OP_COMPARE (CEE_LDIND_I (base), OP_ICONST),
143 cflags: OP_COMPARE (CEE_LDIND_I4 (base), OP_ICONST),
144 cflags: OP_COMPARE (CEE_LDIND_U4 (base), OP_ICONST) {
145 tree->opcode = OP_X86_COMPARE_MEMBASE_IMM;
146 tree->inst_basereg = state->left->left->tree->inst_basereg;
147 tree->inst_offset = state->left->left->tree->inst_offset;
148 tree->inst_imm = state->right->tree->inst_c0;
149 mono_bblock_add_inst (s->cbb, tree);
153 cflags: OP_COMPARE (CEE_LDIND_REF (OP_ICONST), OP_ICONST),
154 cflags: OP_COMPARE (CEE_LDIND_I (OP_ICONST), OP_ICONST),
155 cflags: OP_COMPARE (CEE_LDIND_I4 (OP_ICONST), OP_ICONST),
156 cflags: OP_COMPARE (CEE_LDIND_U4 (OP_ICONST), OP_ICONST) {
157 tree->opcode = OP_X86_COMPARE_MEM_IMM;
158 tree->inst_offset = state->left->left->tree->inst_c0;
159 tree->inst_imm = state->right->tree->inst_c0;
160 mono_bblock_add_inst (s->cbb, tree);
163 cflags: OP_COMPARE (reg, CEE_LDIND_REF (base)),
164 cflags: OP_COMPARE (reg, CEE_LDIND_I (base)),
165 cflags: OP_COMPARE (reg, CEE_LDIND_I4 (base)),
166 cflags: OP_COMPARE (reg, CEE_LDIND_U4 (base)) {
167 tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
168 tree->sreg2 = state->right->left->tree->inst_basereg;
169 tree->inst_offset = state->right->left->tree->inst_offset;
170 tree->sreg1 = state->left->reg1;
171 mono_bblock_add_inst (s->cbb, tree);
174 cflags: OP_COMPARE (CEE_LDIND_REF (OP_REGVAR), CEE_LDIND_REF (base)),
175 cflags: OP_COMPARE (CEE_LDIND_I (OP_REGVAR), CEE_LDIND_I (base)),
176 cflags: OP_COMPARE (CEE_LDIND_I4 (OP_REGVAR), CEE_LDIND_I4 (base)),
177 cflags: OP_COMPARE (CEE_LDIND_U4 (OP_REGVAR), CEE_LDIND_U4 (base)) {
178 tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
179 tree->sreg2 = state->right->left->tree->inst_basereg;
180 tree->inst_offset = state->right->left->tree->inst_offset;
181 tree->sreg1 = state->left->left->tree->dreg;
182 mono_bblock_add_inst (s->cbb, tree);
185 cflags : OP_CEQ (OP_COMPARE (OP_CEQ (cflags), OP_ICONST)) {
186 tree->opcode = OP_CNE;
187 tree->dreg = state->reg1;
188 mono_bblock_add_inst (s->cbb, tree);
190 MBCOND (!state->left->right->tree->inst_c0);
194 stmt: CEE_STIND_I1 (base, OP_CEQ (OP_COMPARE (OP_CEQ (cflags), OP_ICONST))) {
195 tree->opcode = OP_X86_SETNE_MEMBASE;
196 tree->inst_offset = state->left->tree->inst_offset;
197 tree->inst_basereg = state->left->tree->inst_basereg;
198 mono_bblock_add_inst (s->cbb, tree);
200 MBCOND (!state->right->left->right->tree->inst_c0);
204 stmt: CEE_STIND_I1 (base, OP_CEQ (cflags)) {
205 tree->opcode = OP_X86_SETEQ_MEMBASE;
206 tree->inst_offset = state->left->tree->inst_offset;
207 tree->inst_basereg = state->left->tree->inst_basereg;
208 mono_bblock_add_inst (s->cbb, tree);
211 reg: OP_LOCALLOC (OP_ICONST) {
212 if (tree->flags & MONO_INST_INIT) {
213 /* microcoded in mini-x86.c */
214 tree->sreg1 = mono_regstate_next_int (s->rs);
215 tree->dreg = state->reg1;
216 MONO_EMIT_NEW_ICONST (s, tree->sreg1, state->left->tree->inst_c0);
217 mono_bblock_add_inst (s->cbb, tree);
219 guint32 size = state->left->tree->inst_c0;
220 size = (size + (MONO_ARCH_FRAME_ALIGNMENT - 1)) & ~ (MONO_ARCH_FRAME_ALIGNMENT - 1);
221 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, size);
222 MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
226 reg: OP_LOCALLOC (reg) {
227 tree->sreg1 = state->left->tree->dreg;
228 tree->dreg = state->reg1;
229 mono_bblock_add_inst (s->cbb, tree);
232 stmt: OP_SETRET (reg) {
233 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->reg1);
236 stmt: OP_SETRET (lreg) {
237 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->left->reg2);
238 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->reg1);
241 stmt: OP_SETRET (CEE_LDIND_REF (OP_REGVAR)),
242 stmt: OP_SETRET (CEE_LDIND_I (OP_REGVAR)),
243 stmt: OP_SETRET (CEE_LDIND_I4 (OP_REGVAR)),
244 stmt: OP_SETRET (CEE_LDIND_U4 (OP_REGVAR)) {
245 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->left->tree->dreg);
248 stmt: OP_SETRET (freg) {
252 stmt: OP_SETRET (OP_ICONST) {
253 tree->opcode = OP_ICONST;
254 tree->inst_c0 = state->left->tree->inst_c0;
255 tree->dreg = X86_EAX;
256 mono_bblock_add_inst (s->cbb, tree);
259 stmt: OP_SETRET (i8con) {
260 MONO_EMIT_NEW_ICONST (s, X86_EAX, state->left->tree->inst_ls_word);
261 MONO_EMIT_NEW_ICONST (s, X86_EDX, state->left->tree->inst_ms_word);
264 stmt: OP_OUTARG (reg) {
265 tree->opcode = OP_X86_PUSH;
266 tree->sreg1 = state->left->reg1;
267 mono_bblock_add_inst (s->cbb, tree);
270 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)),
271 stmt: OP_OUTARG (CEE_LDIND_I4 (OP_REGVAR)),
272 stmt: OP_OUTARG (CEE_LDIND_U4 (OP_REGVAR)),
273 stmt: OP_OUTARG (CEE_LDIND_I (OP_REGVAR)) {
274 tree->opcode = OP_X86_PUSH;
275 tree->sreg1 = state->left->left->tree->dreg;
276 mono_bblock_add_inst (s->cbb, tree);
279 stmt: OP_OUTARG (OP_GOT_ENTRY (CEE_LDIND_I (OP_REGVAR), OP_PATCH_INFO)) {
281 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
282 ins->opcode = OP_X86_PUSH_GOT_ENTRY;
283 ins->inst_right = state->left->right->tree;
284 ins->inst_basereg = state->left->left->left->tree->dreg;
285 mono_bblock_add_inst (s->cbb, ins);
288 stmt: OP_OUTARG (lreg) {
289 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
290 tree->opcode = OP_X86_PUSH;
291 tree->sreg1 = state->left->reg1;
292 mono_bblock_add_inst (s->cbb, tree);
295 stmt: OP_OUTARG (CEE_LDIND_I8 (base)) {
297 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
298 ins->opcode = OP_X86_PUSH_MEMBASE;
299 ins->inst_basereg = state->left->left->tree->inst_basereg;
300 ins->inst_offset = state->left->left->tree->inst_offset + 4;
301 mono_bblock_add_inst (s->cbb, ins);
303 tree->opcode = OP_X86_PUSH_MEMBASE;
304 tree->inst_basereg = state->left->left->tree->inst_basereg;
305 tree->inst_offset = state->left->left->tree->inst_offset;
306 mono_bblock_add_inst (s->cbb, tree);
309 stmt: OP_OUTARG (OP_ICONST) {
310 tree->opcode = OP_X86_PUSH_IMM;
311 tree->inst_imm = state->left->tree->inst_c0;
312 mono_bblock_add_inst (s->cbb, tree);
315 stmt: OP_OUTARG (i8con) {
317 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
318 ins->opcode = OP_X86_PUSH_IMM;
319 ins->inst_imm = state->left->tree->inst_ms_word;
320 mono_bblock_add_inst (s->cbb, ins);
322 tree->opcode = OP_X86_PUSH_IMM;
323 tree->inst_imm = state->left->tree->inst_ls_word;
324 mono_bblock_add_inst (s->cbb, tree);
327 stmt: OP_OUTARG (CEE_LDIND_I4 (base)),
328 stmt: OP_OUTARG (CEE_LDIND_U4 (base)),
329 stmt: OP_OUTARG (CEE_LDIND_I (base)),
330 stmt: OP_OUTARG (CEE_LDIND_REF (base)) {
331 tree->opcode = OP_X86_PUSH_MEMBASE;
332 tree->inst_basereg = state->left->left->tree->inst_basereg;
333 tree->inst_offset = state->left->left->tree->inst_offset;
334 mono_bblock_add_inst (s->cbb, tree);
337 stmt: OP_OUTARG (CEE_LDOBJ (reg)) {
338 tree->opcode = OP_X86_PUSH;
339 tree->sreg1 = state->left->reg1;
340 mono_bblock_add_inst (s->cbb, tree);
343 stmt: OP_OUTARG (freg) {
344 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
345 tree->opcode = OP_STORER8_MEMBASE_REG;
346 tree->sreg1 = state->left->reg1;
347 tree->inst_destbasereg = X86_ESP;
348 tree->inst_offset = 0;
349 mono_bblock_add_inst (s->cbb, tree);
352 stmt: OP_OUTARG_R4 (freg) {
353 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 4);
354 tree->opcode = OP_STORER4_MEMBASE_REG;
355 tree->sreg1 = state->left->reg1;
356 tree->inst_destbasereg = X86_ESP;
357 tree->inst_offset = 0;
358 mono_bblock_add_inst (s->cbb, tree);
361 stmt: OP_OUTARG_R8 (freg) {
362 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
363 tree->opcode = OP_STORER8_MEMBASE_REG;
364 tree->sreg1 = state->left->reg1;
365 tree->inst_destbasereg = X86_ESP;
366 tree->inst_offset = 0;
367 mono_bblock_add_inst (s->cbb, tree);
370 stmt: OP_OUTARG_VT (CEE_LDOBJ (base)) {
371 MonoInst *vt = state->left->left->tree;
372 //g_print ("vt size: %d at R%d + %d\n", tree->inst_imm, vt->inst_basereg, vt->inst_offset);
377 if (tree->inst_imm <= 4) {
378 tree->opcode = OP_X86_PUSH_MEMBASE;
379 tree->inst_basereg = vt->inst_basereg;
380 tree->inst_offset = vt->inst_offset;
381 mono_bblock_add_inst (s->cbb, tree);
382 } else if (tree->inst_imm <= 20) {
383 int sz = tree->inst_imm;
386 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, sz);
387 mini_emit_memcpy (s, X86_ESP, 0, vt->inst_basereg, vt->inst_offset, tree->inst_imm, 0);
389 tree->opcode = OP_X86_PUSH_OBJ;
390 tree->inst_basereg = vt->inst_basereg;
391 tree->inst_offset = vt->inst_offset;
392 mono_bblock_add_inst (s->cbb, tree);
396 stmt: OP_OUTARG_VT (OP_ICONST) {
397 tree->opcode = OP_X86_PUSH_IMM;
398 tree->inst_imm = state->left->tree->inst_c0;
399 mono_bblock_add_inst (s->cbb, tree);
402 stmt: OP_OUTARG_VT (reg) {
403 tree->opcode = OP_X86_PUSH;
404 tree->sreg1 = state->left->reg1;
405 mono_bblock_add_inst (s->cbb, tree);
408 reg: OP_LDADDR (OP_REGOFFSET),
409 reg: CEE_LDOBJ (OP_REGOFFSET) {
410 if (state->left->tree->inst_offset) {
411 tree->opcode = OP_X86_LEA_MEMBASE;
412 tree->inst_imm = state->left->tree->inst_offset;
414 tree->opcode = OP_MOVE;
416 tree->sreg1 = state->left->tree->inst_basereg;
417 tree->dreg = state->reg1;
418 mono_bblock_add_inst (s->cbb, tree);
421 reg: CEE_LDELEMA (reg, reg) "15" {
422 guint32 size = mono_class_array_element_size (tree->klass);
424 MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoArray, max_length, state->right->reg1);
426 if (size == 1 || size == 2 || size == 4 || size == 8) {
427 static const int fast_log2 [] = { 1, 0, 1, -1, 2, -1, -1, -1, 3 };
428 tree->opcode = OP_X86_LEA;
429 tree->dreg = state->reg1;
430 tree->sreg1 = state->left->reg1;
431 tree->sreg2 = state->right->reg1;
432 tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
433 tree->unused = fast_log2 [size];
434 mono_bblock_add_inst (s->cbb, tree);
436 int mult_reg = mono_regstate_next_int (s->rs);
437 int add_reg = mono_regstate_next_int (s->rs);
438 MONO_EMIT_NEW_BIALU_IMM (s, OP_MUL_IMM, mult_reg, state->right->reg1, size);
439 MONO_EMIT_NEW_BIALU (s, CEE_ADD, add_reg, mult_reg, state->left->reg1);
440 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, state->reg1, add_reg, G_STRUCT_OFFSET (MonoArray, vector));
444 stmt: CEE_STIND_R8 (OP_REGVAR, freg) {
445 /* nothing to do: the value is already on the FP stack */
448 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
449 int con = state->right->right->tree->inst_c0;
452 tree->opcode = OP_X86_INC_MEMBASE;
454 tree->opcode = OP_X86_ADD_MEMBASE_IMM;
455 tree->inst_imm = con;
458 tree->inst_basereg = state->left->tree->inst_basereg;
459 tree->inst_offset = state->left->tree->inst_offset;
460 mono_bblock_add_inst (s->cbb, tree);
462 MBTREE_TYPE *t1 = state->right->left->left->tree;
463 MBTREE_TYPE *t2 = state->left->tree;
464 MBCOND (t1->inst_basereg == t2->inst_basereg &&
465 t1->inst_offset == t2->inst_offset);
469 stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)) {
470 int con = state->right->right->tree->inst_c0;
473 tree->opcode = OP_X86_DEC_MEMBASE;
475 tree->opcode = OP_X86_SUB_MEMBASE_IMM;
476 tree->inst_imm = con;
479 tree->inst_basereg = state->left->tree->inst_basereg;
480 tree->inst_offset = state->left->tree->inst_offset;
481 mono_bblock_add_inst (s->cbb, tree);
483 MBTREE_TYPE *t1 = state->right->left->left->tree;
484 MBTREE_TYPE *t2 = state->left->tree;
485 MBCOND (t1->inst_basereg == t2->inst_basereg &&
486 t1->inst_offset == t2->inst_offset);
491 # this rules is incorrect, it needs to do an indirect inc (inc_membase)
492 #stmt: CEE_STIND_I4 (reg, CEE_ADD (reg, OP_ICONST)) {
493 # tree->opcode = OP_X86_INC_REG;
494 # tree->dreg = state->left->reg1;
495 # mono_bblock_add_inst (s->cbb, tree);
497 # MBState *s1 = state->left;
498 # MBState *s2 = state->right->left;
499 # int con = state->right->right->tree->inst_c0;
500 # MBCOND (con == 1 && s1->reg1 == s2->reg1);
504 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_SUB (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
505 int con = state->right->right->tree->inst_c0;
506 int dreg = state->left->tree->dreg;
507 int sreg = state->right->left->left->tree->dreg;
511 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
512 tree->opcode = OP_X86_DEC_REG;
513 tree->dreg = tree->sreg1 = dreg;
514 } else if (con == -1) {
516 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
517 tree->opcode = OP_X86_INC_REG;
518 tree->dreg = tree->sreg1 = dreg;
520 tree->opcode = OP_SUB_IMM;
521 tree->inst_imm = con;
525 mono_bblock_add_inst (s->cbb, tree);
528 stmt: CEE_STIND_I (OP_REGVAR, CEE_ADD (CEE_LDIND_I (OP_REGVAR), OP_ICONST)),
529 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_ADD (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
530 int con = state->right->right->tree->inst_c0;
531 int dreg = state->left->tree->dreg;
532 int sreg = state->right->left->left->tree->dreg;
536 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
537 tree->opcode = OP_X86_INC_REG;
538 tree->dreg = tree->sreg1 = dreg;
539 } else if (con == -1) {
541 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
542 tree->opcode = OP_X86_DEC_REG;
543 tree->dreg = tree->sreg1 = dreg;
545 tree->opcode = OP_ADD_IMM;
546 tree->inst_imm = con;
550 mono_bblock_add_inst (s->cbb, tree);
553 reg: CEE_LDIND_I2 (OP_REGVAR) {
554 MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);
558 stmt: CEE_STIND_I4 (OP_REGVAR, OP_ICONST),
559 stmt: CEE_STIND_I2 (OP_REGVAR, OP_ICONST),
560 stmt: CEE_STIND_I1 (OP_REGVAR, OP_ICONST),
561 stmt: CEE_STIND_REF (OP_REGVAR, OP_ICONST),
562 stmt: CEE_STIND_I (OP_REGVAR, OP_ICONST) {
563 int r = state->left->tree->dreg;
564 MONO_EMIT_BIALU (s, tree, CEE_XOR, r, r, r);
566 MBCOND (!state->right->tree->inst_c0);
571 # on x86, fp compare overwrites EAX, so we must
572 # either improve the local register allocator or
573 # emit coarse opcodes which saves EAX for us.
575 reg: OP_CEQ (OP_COMPARE (freg, freg)) {
576 MONO_EMIT_BIALU (s, tree, OP_FCEQ, state->reg1, state->left->left->reg1,
577 state->left->right->reg1);
580 reg: OP_CLT (OP_COMPARE (freg, freg)) {
581 MONO_EMIT_BIALU (s, tree, OP_FCLT, state->reg1, state->left->left->reg1,
582 state->left->right->reg1);
585 reg: OP_CLT_UN (OP_COMPARE (freg, freg)) {
586 MONO_EMIT_BIALU (s, tree, OP_FCLT_UN, state->reg1, state->left->left->reg1,
587 state->left->right->reg1);
590 reg: OP_CGT (OP_COMPARE (freg, freg)) {
591 MONO_EMIT_BIALU (s, tree, OP_FCGT, state->reg1, state->left->left->reg1,
592 state->left->right->reg1);
595 reg: OP_CGT_UN (OP_COMPARE (freg, freg)) {
596 MONO_EMIT_BIALU (s, tree, OP_FCGT_UN, state->reg1, state->left->left->reg1,
597 state->left->right->reg1);
600 # fpcflags overwrites EAX, but this does not matter for statements
601 # because we are the last operation in the tree.
603 stmt: CEE_BNE_UN (fpcflags) {
604 tree->opcode = OP_FBNE_UN;
605 mono_bblock_add_inst (s->cbb, tree);
608 stmt: CEE_BEQ (fpcflags) {
609 tree->opcode = OP_FBEQ;
610 mono_bblock_add_inst (s->cbb, tree);
613 stmt: CEE_BLT (fpcflags) {
614 tree->opcode = OP_FBLT;
615 mono_bblock_add_inst (s->cbb, tree);
618 stmt: CEE_BLT_UN (fpcflags) {
619 tree->opcode = OP_FBLT_UN;
620 mono_bblock_add_inst (s->cbb, tree);
623 stmt: CEE_BGT (fpcflags) {
624 tree->opcode = OP_FBGT;
625 mono_bblock_add_inst (s->cbb, tree);
628 stmt: CEE_BGT_UN (fpcflags) {
629 tree->opcode = OP_FBGT_UN;
630 mono_bblock_add_inst (s->cbb, tree);
633 stmt: CEE_BGE (fpcflags) {
634 tree->opcode = OP_FBGE;
635 mono_bblock_add_inst (s->cbb, tree);
638 stmt: CEE_BGE_UN (fpcflags) {
639 tree->opcode = OP_FBGE_UN;
640 mono_bblock_add_inst (s->cbb, tree);
643 stmt: CEE_BLE (fpcflags) {
644 tree->opcode = OP_FBLE;
645 mono_bblock_add_inst (s->cbb, tree);
648 stmt: CEE_BLE_UN (fpcflags) {
649 tree->opcode = OP_FBLE_UN;
650 mono_bblock_add_inst (s->cbb, tree);
653 stmt: CEE_POP (freg) "0" {
654 /* we need to pop the value from the x86 FP stack */
655 MONO_EMIT_UNALU (s, tree, OP_X86_FPOP, -1, state->left->reg1);
658 # override the rules in inssel-float.brg that work for machines with FP registers
660 freg: OP_FCONV_TO_R8 (freg) "0" {
664 freg: OP_FCONV_TO_R4 (freg) "0" {
665 /* fixme: nothing to do ??*/
668 reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) {
669 MonoInst *base = state->right->left->tree;
671 tree->dreg = state->reg1;
672 tree->sreg1 = state->left->reg1;
673 tree->sreg2 = base->inst_basereg;
674 tree->inst_offset = base->inst_offset;
675 tree->opcode = OP_X86_ADD_MEMBASE;
676 mono_bblock_add_inst (s->cbb, tree);
679 reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) {
680 MonoInst *base = state->right->left->tree;
682 tree->dreg = state->reg1;
683 tree->sreg1 = state->left->reg1;
684 tree->sreg2 = base->inst_basereg;
685 tree->inst_offset = base->inst_offset;
686 tree->opcode = OP_X86_SUB_MEMBASE;
687 mono_bblock_add_inst (s->cbb, tree);
690 reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) {
691 MonoInst *base = state->right->left->tree;
693 tree->dreg = state->reg1;
694 tree->sreg1 = state->left->reg1;
695 tree->sreg2 = base->inst_basereg;
696 tree->inst_offset = base->inst_offset;
697 tree->opcode = OP_X86_MUL_MEMBASE;
698 mono_bblock_add_inst (s->cbb, tree);
701 lreg: OP_LSHL (lreg, reg) "0" {
702 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
705 lreg: OP_LSHL (lreg, OP_ICONST) "0" {
706 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
709 lreg: OP_LSHR (lreg, reg) "0" {
710 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
713 lreg: OP_LSHR (lreg, OP_ICONST) "0" {
714 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
717 lreg: OP_LSHR_UN (lreg, reg) "0" {
718 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
721 lreg: OP_LSHR_UN (lreg, OP_ICONST) "0" {
722 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
725 reg: OP_ATOMIC_ADD_NEW_I4 (base, reg),
726 reg: OP_ATOMIC_ADD_I4 (base, reg) {
727 tree->opcode = tree->opcode;
728 tree->inst_basereg = state->left->tree->inst_basereg;
729 tree->inst_offset = state->left->tree->inst_offset;
730 tree->dreg = state->reg1;
731 tree->sreg2 = state->right->reg1;
733 mono_bblock_add_inst (s->cbb, tree);
736 reg: OP_ATOMIC_EXCHANGE_I4 (base, reg) {
737 tree->opcode = OP_ATOMIC_EXCHANGE_I4;
738 tree->dreg = state->reg1;
739 tree->sreg2 = state->right->reg1;
740 tree->inst_basereg = state->left->tree->inst_basereg;
741 tree->inst_offset = state->left->tree->inst_offset;
743 mono_bblock_add_inst (s->cbb, tree);