1 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG(cfg,basereg,offset,operand) do { \
3 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
4 inst->opcode = OP_X86_COMPARE_MEMBASE_REG; \
5 inst->inst_basereg = basereg; \
6 inst->inst_offset = offset; \
7 inst->sreg2 = operand; \
8 mono_bblock_add_inst (cfg->cbb, inst); \
11 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM(cfg,basereg,offset,operand) do { \
13 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
14 inst->opcode = OP_X86_COMPARE_MEMBASE_IMM; \
15 inst->inst_basereg = basereg; \
16 inst->inst_offset = offset; \
17 inst->inst_imm = operand; \
18 mono_bblock_add_inst (cfg->cbb, inst); \
21 /* override the arch independant versions with fast x86 versions */
23 #undef MONO_EMIT_BOUNDS_CHECK
24 #undef MONO_EMIT_BOUNDS_CHECK_IMM
26 #define MONO_EMIT_BOUNDS_CHECK(cfg, array_reg, array_type, array_length_field, index_reg) do { \
27 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
28 MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_reg); \
29 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
33 #define MONO_EMIT_BOUNDS_CHECK_IMM(cfg, array_reg, array_type, array_length_field, index_imm) do { \
34 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
35 MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_imm); \
36 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
43 # inssel-x86.brg: burg file for special x86 instructions
46 # Dietmar Maurer (dietmar@ximian.com)
47 # Paolo Molaro (lupus@ximian.com)
49 # (C) 2002 Ximian, Inc.
52 stmt: OP_START_HANDLER {
53 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
54 MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP);
57 stmt: CEE_ENDFINALLY {
58 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
59 MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
60 tree->opcode = CEE_RET;
61 mono_bblock_add_inst (s->cbb, tree);
64 stmt: OP_ENDFILTER (reg) {
65 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
66 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->left->reg1);
67 MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
68 tree->opcode = CEE_RET;
69 mono_bblock_add_inst (s->cbb, tree);
72 stmt: CEE_STIND_I8 (OP_REGVAR, lreg) {
73 /* this should only happen for methods returning a long */
74 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->right->reg1);
75 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->right->reg2);
78 lreg: OP_LNEG (lreg) "3" {
79 int tmpr = mono_regstate_next_int (s->rs);
80 MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg1, state->left->reg1);
81 MONO_EMIT_BIALU_IMM (s, tree, OP_ADC_IMM, tmpr, state->left->reg2, 0);
82 MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg2, tmpr);
85 freg: OP_LCONV_TO_R8 (lreg) {
86 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
87 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
88 tree->opcode = OP_X86_FP_LOAD_I8;
89 tree->inst_basereg = X86_ESP;
90 tree->inst_offset = 0;
91 tree->dreg = state->reg1;
92 mono_bblock_add_inst (s->cbb, tree);
93 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
96 freg: OP_LCONV_TO_R4 (lreg) {
97 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
98 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
99 tree->opcode = OP_X86_FP_LOAD_I8;
100 tree->inst_basereg = X86_ESP;
101 tree->inst_offset = 0;
102 tree->dreg = state->reg1;
103 mono_bblock_add_inst (s->cbb, tree);
104 /* change precision */
105 MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORER4_MEMBASE_REG, X86_ESP, 0, state->reg1);
106 MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADR4_MEMBASE, state->reg1, X86_ESP, 0);
107 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
110 freg: CEE_CONV_R_UN (reg) {
111 MONO_EMIT_NEW_BIALU_IMM (s, OP_X86_PUSH_IMM, -1, -1, 0);
112 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
113 tree->opcode = OP_X86_FP_LOAD_I8;
114 tree->inst_basereg = X86_ESP;
115 tree->inst_offset = 0;
116 tree->dreg = state->reg1;
117 mono_bblock_add_inst (s->cbb, tree);
118 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
121 cflags: OP_COMPARE (CEE_LDIND_REF (base), reg),
122 cflags: OP_COMPARE (CEE_LDIND_I (base), reg),
123 cflags: OP_COMPARE (CEE_LDIND_I4 (base), reg),
124 cflags: OP_COMPARE (CEE_LDIND_U4 (base), reg) {
125 tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
126 tree->inst_basereg = state->left->left->tree->inst_basereg;
127 tree->inst_offset = state->left->left->tree->inst_offset;
128 tree->sreg2 = state->right->reg1;
129 mono_bblock_add_inst (s->cbb, tree);
132 cflags: OP_COMPARE (CEE_LDIND_REF (base), CEE_LDIND_REF (OP_REGVAR)),
133 cflags: OP_COMPARE (CEE_LDIND_I (base), CEE_LDIND_REF (OP_REGVAR)),
134 cflags: OP_COMPARE (CEE_LDIND_I4 (base), CEE_LDIND_REF (OP_REGVAR)),
135 cflags: OP_COMPARE (CEE_LDIND_U4 (base), CEE_LDIND_REF (OP_REGVAR)) {
136 tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
137 tree->inst_basereg = state->left->left->tree->inst_basereg;
138 tree->inst_offset = state->left->left->tree->inst_offset;
139 tree->sreg2 = state->right->left->tree->dreg;
140 mono_bblock_add_inst (s->cbb, tree);
143 cflags: OP_COMPARE (CEE_LDIND_REF (base), OP_ICONST),
144 cflags: OP_COMPARE (CEE_LDIND_I (base), OP_ICONST),
145 cflags: OP_COMPARE (CEE_LDIND_I4 (base), OP_ICONST),
146 cflags: OP_COMPARE (CEE_LDIND_U4 (base), OP_ICONST) {
147 tree->opcode = OP_X86_COMPARE_MEMBASE_IMM;
148 tree->inst_basereg = state->left->left->tree->inst_basereg;
149 tree->inst_offset = state->left->left->tree->inst_offset;
150 tree->inst_imm = state->right->tree->inst_c0;
151 mono_bblock_add_inst (s->cbb, tree);
155 cflags: OP_COMPARE (CEE_LDIND_REF (OP_ICONST), OP_ICONST),
156 cflags: OP_COMPARE (CEE_LDIND_I (OP_ICONST), OP_ICONST),
157 cflags: OP_COMPARE (CEE_LDIND_I4 (OP_ICONST), OP_ICONST),
158 cflags: OP_COMPARE (CEE_LDIND_U4 (OP_ICONST), OP_ICONST) {
159 tree->opcode = OP_X86_COMPARE_MEM_IMM;
160 tree->inst_offset = state->left->left->tree->inst_c0;
161 tree->inst_imm = state->right->tree->inst_c0;
162 mono_bblock_add_inst (s->cbb, tree);
165 cflags: OP_COMPARE (reg, CEE_LDIND_REF (base)),
166 cflags: OP_COMPARE (reg, CEE_LDIND_I (base)),
167 cflags: OP_COMPARE (reg, CEE_LDIND_I4 (base)),
168 cflags: OP_COMPARE (reg, CEE_LDIND_U4 (base)) {
169 tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
170 tree->sreg2 = state->right->left->tree->inst_basereg;
171 tree->inst_offset = state->right->left->tree->inst_offset;
172 tree->sreg1 = state->left->reg1;
173 mono_bblock_add_inst (s->cbb, tree);
176 cflags: OP_COMPARE (CEE_LDIND_REF (OP_REGVAR), CEE_LDIND_REF (base)),
177 cflags: OP_COMPARE (CEE_LDIND_I (OP_REGVAR), CEE_LDIND_I (base)),
178 cflags: OP_COMPARE (CEE_LDIND_I4 (OP_REGVAR), CEE_LDIND_I4 (base)),
179 cflags: OP_COMPARE (CEE_LDIND_U4 (OP_REGVAR), CEE_LDIND_U4 (base)) {
180 tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
181 tree->sreg2 = state->right->left->tree->inst_basereg;
182 tree->inst_offset = state->right->left->tree->inst_offset;
183 tree->sreg1 = state->left->left->tree->dreg;
184 mono_bblock_add_inst (s->cbb, tree);
187 cflags : OP_CEQ (OP_COMPARE (OP_CEQ (cflags), OP_ICONST)) {
188 tree->opcode = OP_CNE;
189 tree->dreg = state->reg1;
190 mono_bblock_add_inst (s->cbb, tree);
192 MBCOND (!state->left->right->tree->inst_c0);
196 stmt: CEE_STIND_I1 (base, OP_CEQ (OP_COMPARE (OP_CEQ (cflags), OP_ICONST))) {
197 tree->opcode = OP_X86_SETNE_MEMBASE;
198 tree->inst_offset = state->left->tree->inst_offset;
199 tree->inst_basereg = state->left->tree->inst_basereg;
200 mono_bblock_add_inst (s->cbb, tree);
202 MBCOND (!state->right->left->right->tree->inst_c0);
206 stmt: CEE_STIND_I1 (base, OP_CEQ (cflags)) {
207 tree->opcode = OP_X86_SETEQ_MEMBASE;
208 tree->inst_offset = state->left->tree->inst_offset;
209 tree->inst_basereg = state->left->tree->inst_basereg;
210 mono_bblock_add_inst (s->cbb, tree);
213 reg: OP_LOCALLOC (OP_ICONST) {
214 if (tree->flags & MONO_INST_INIT) {
215 /* microcoded in mini-x86.c */
216 tree->sreg1 = mono_regstate_next_int (s->rs);
217 tree->dreg = state->reg1;
218 MONO_EMIT_NEW_ICONST (s, tree->sreg1, state->left->tree->inst_c0);
219 mono_bblock_add_inst (s->cbb, tree);
221 guint32 size = state->left->tree->inst_c0;
222 size = (size + (MONO_ARCH_FRAME_ALIGNMENT - 1)) & ~ (MONO_ARCH_FRAME_ALIGNMENT - 1);
223 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, size);
224 MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
228 reg: OP_LOCALLOC (reg) {
229 tree->sreg1 = state->left->tree->dreg;
230 tree->dreg = state->reg1;
231 mono_bblock_add_inst (s->cbb, tree);
234 stmt: OP_SETRET (reg) {
235 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->reg1);
238 stmt: OP_SETRET (lreg) {
239 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->left->reg2);
240 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->reg1);
243 stmt: OP_SETRET (CEE_LDIND_REF (OP_REGVAR)),
244 stmt: OP_SETRET (CEE_LDIND_I (OP_REGVAR)),
245 stmt: OP_SETRET (CEE_LDIND_I4 (OP_REGVAR)),
246 stmt: OP_SETRET (CEE_LDIND_U4 (OP_REGVAR)) {
247 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->left->tree->dreg);
250 stmt: OP_SETRET (freg) {
254 stmt: OP_SETRET (OP_ICONST) {
255 tree->opcode = OP_ICONST;
256 tree->inst_c0 = state->left->tree->inst_c0;
257 tree->dreg = X86_EAX;
258 mono_bblock_add_inst (s->cbb, tree);
261 stmt: OP_SETRET (i8con) {
262 MONO_EMIT_NEW_ICONST (s, X86_EAX, state->left->tree->inst_ls_word);
263 MONO_EMIT_NEW_ICONST (s, X86_EDX, state->left->tree->inst_ms_word);
266 stmt: OP_OUTARG (reg) {
267 tree->opcode = OP_X86_PUSH;
268 tree->sreg1 = state->left->reg1;
269 mono_bblock_add_inst (s->cbb, tree);
272 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)),
273 stmt: OP_OUTARG (CEE_LDIND_I4 (OP_REGVAR)),
274 stmt: OP_OUTARG (CEE_LDIND_U4 (OP_REGVAR)),
275 stmt: OP_OUTARG (CEE_LDIND_I (OP_REGVAR)) {
276 tree->opcode = OP_X86_PUSH;
277 tree->sreg1 = state->left->left->tree->dreg;
278 mono_bblock_add_inst (s->cbb, tree);
281 stmt: OP_OUTARG (OP_GOT_ENTRY (CEE_LDIND_I (OP_REGVAR), OP_PATCH_INFO)) {
283 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
284 ins->opcode = OP_X86_PUSH_GOT_ENTRY;
285 ins->inst_right = state->left->right->tree;
286 ins->inst_basereg = state->left->left->left->tree->dreg;
287 mono_bblock_add_inst (s->cbb, ins);
290 stmt: OP_OUTARG (lreg) {
291 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
292 tree->opcode = OP_X86_PUSH;
293 tree->sreg1 = state->left->reg1;
294 mono_bblock_add_inst (s->cbb, tree);
297 stmt: OP_OUTARG (CEE_LDIND_I8 (base)) {
299 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
300 ins->opcode = OP_X86_PUSH_MEMBASE;
301 ins->inst_basereg = state->left->left->tree->inst_basereg;
302 ins->inst_offset = state->left->left->tree->inst_offset + 4;
303 mono_bblock_add_inst (s->cbb, ins);
305 tree->opcode = OP_X86_PUSH_MEMBASE;
306 tree->inst_basereg = state->left->left->tree->inst_basereg;
307 tree->inst_offset = state->left->left->tree->inst_offset;
308 mono_bblock_add_inst (s->cbb, tree);
311 stmt: OP_OUTARG (OP_ICONST) {
312 tree->opcode = OP_X86_PUSH_IMM;
313 tree->inst_imm = state->left->tree->inst_c0;
314 mono_bblock_add_inst (s->cbb, tree);
317 stmt: OP_OUTARG (i8con) {
319 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
320 ins->opcode = OP_X86_PUSH_IMM;
321 ins->inst_imm = state->left->tree->inst_ms_word;
322 mono_bblock_add_inst (s->cbb, ins);
324 tree->opcode = OP_X86_PUSH_IMM;
325 tree->inst_imm = state->left->tree->inst_ls_word;
326 mono_bblock_add_inst (s->cbb, tree);
329 stmt: OP_OUTARG (CEE_LDIND_I4 (base)),
330 stmt: OP_OUTARG (CEE_LDIND_U4 (base)),
331 stmt: OP_OUTARG (CEE_LDIND_I (base)),
332 stmt: OP_OUTARG (CEE_LDIND_REF (base)) {
333 tree->opcode = OP_X86_PUSH_MEMBASE;
334 tree->inst_basereg = state->left->left->tree->inst_basereg;
335 tree->inst_offset = state->left->left->tree->inst_offset;
336 mono_bblock_add_inst (s->cbb, tree);
339 stmt: OP_OUTARG (freg) {
340 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
341 tree->opcode = OP_STORER8_MEMBASE_REG;
342 tree->sreg1 = state->left->reg1;
343 tree->inst_destbasereg = X86_ESP;
344 tree->inst_offset = 0;
345 mono_bblock_add_inst (s->cbb, tree);
348 stmt: OP_OUTARG_R4 (freg) {
349 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 4);
350 tree->opcode = OP_STORER4_MEMBASE_REG;
351 tree->sreg1 = state->left->reg1;
352 tree->inst_destbasereg = X86_ESP;
353 tree->inst_offset = 0;
354 mono_bblock_add_inst (s->cbb, tree);
357 stmt: OP_OUTARG_R8 (freg) {
358 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
359 tree->opcode = OP_STORER8_MEMBASE_REG;
360 tree->sreg1 = state->left->reg1;
361 tree->inst_destbasereg = X86_ESP;
362 tree->inst_offset = 0;
363 mono_bblock_add_inst (s->cbb, tree);
366 stmt: OP_OUTARG_VT (CEE_LDOBJ (base)) {
367 MonoInst *vt = state->left->left->tree;
368 //g_print ("vt size: %d at R%d + %d\n", tree->inst_imm, vt->inst_basereg, vt->inst_offset);
373 if (tree->inst_imm <= 4) {
374 tree->opcode = OP_X86_PUSH_MEMBASE;
375 tree->inst_basereg = vt->inst_basereg;
376 tree->inst_offset = vt->inst_offset;
377 mono_bblock_add_inst (s->cbb, tree);
378 } else if (tree->inst_imm <= 20) {
379 int sz = tree->inst_imm;
382 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, sz);
383 mini_emit_memcpy (s, X86_ESP, 0, vt->inst_basereg, vt->inst_offset, tree->inst_imm, 0);
385 tree->opcode = OP_X86_PUSH_OBJ;
386 tree->inst_basereg = vt->inst_basereg;
387 tree->inst_offset = vt->inst_offset;
388 mono_bblock_add_inst (s->cbb, tree);
392 stmt: OP_OUTARG_VT (OP_ICONST) {
393 tree->opcode = OP_X86_PUSH_IMM;
394 tree->inst_imm = state->left->tree->inst_c0;
395 mono_bblock_add_inst (s->cbb, tree);
398 stmt: OP_OUTARG_VT (reg) {
399 tree->opcode = OP_X86_PUSH;
400 tree->sreg1 = state->left->reg1;
401 mono_bblock_add_inst (s->cbb, tree);
404 stmt: OP_X86_OUTARG_ALIGN_STACK {
405 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, tree->inst_c0);
408 reg: OP_LDADDR (OP_REGOFFSET),
409 reg: CEE_LDOBJ (OP_REGOFFSET) {
410 if (state->left->tree->inst_offset) {
411 tree->opcode = OP_X86_LEA_MEMBASE;
412 tree->inst_imm = state->left->tree->inst_offset;
414 tree->opcode = OP_MOVE;
416 tree->sreg1 = state->left->tree->inst_basereg;
417 tree->dreg = state->reg1;
418 mono_bblock_add_inst (s->cbb, tree);
421 reg: CEE_LDELEMA (reg, reg) "15" {
422 guint32 size = mono_class_array_element_size (tree->klass);
424 MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoArray, max_length, state->right->reg1);
426 if (size == 1 || size == 2 || size == 4 || size == 8) {
427 static const int fast_log2 [] = { 1, 0, 1, -1, 2, -1, -1, -1, 3 };
428 tree->opcode = OP_X86_LEA;
429 tree->dreg = state->reg1;
430 tree->sreg1 = state->left->reg1;
431 tree->sreg2 = state->right->reg1;
432 tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
433 tree->backend.shift_amount = fast_log2 [size];
434 mono_bblock_add_inst (s->cbb, tree);
436 int mult_reg = mono_regstate_next_int (s->rs);
437 int add_reg = mono_regstate_next_int (s->rs);
438 MONO_EMIT_NEW_BIALU_IMM (s, OP_MUL_IMM, mult_reg, state->right->reg1, size);
439 MONO_EMIT_NEW_BIALU (s, CEE_ADD, add_reg, mult_reg, state->left->reg1);
440 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, state->reg1, add_reg, G_STRUCT_OFFSET (MonoArray, vector));
444 stmt: CEE_STIND_R8 (OP_REGVAR, freg) {
445 /* nothing to do: the value is already on the FP stack */
448 stmt: CEE_STIND_I4 (base, CEE_AND (CEE_LDIND_U4 (base), OP_ICONST)),
449 stmt: CEE_STIND_I4 (base, CEE_OR (CEE_LDIND_U4 (base), OP_ICONST)),
450 stmt: CEE_STIND_I4 (base, CEE_XOR (CEE_LDIND_U4 (base), OP_ICONST)),
451 stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_U4 (base), OP_ICONST)),
452 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_U4 (base), OP_ICONST)),
453 stmt: CEE_STIND_I4 (base, CEE_AND (CEE_LDIND_I4 (base), OP_ICONST)),
454 stmt: CEE_STIND_I4 (base, CEE_OR (CEE_LDIND_I4 (base), OP_ICONST)),
455 stmt: CEE_STIND_I4 (base, CEE_XOR (CEE_LDIND_I4 (base), OP_ICONST)),
456 stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)),
457 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
458 int con = state->right->right->tree->inst_c0;
459 MBTREE_TYPE *t1 = state->left->tree;
460 MBTREE_TYPE *t2 = state->right->left->left->tree;
461 int op = state->right->tree->opcode;
463 /* inst_basereg/offset can't be used for base
464 * operands in cost functions, since they are not set yet,
465 * so we catch all the cases and handle them here.
467 if (t1->inst_basereg == t2->inst_basereg && t1->inst_offset == t2->inst_offset) {
468 if (con == 1 && op == CEE_ADD) {
469 tree->opcode = OP_X86_INC_MEMBASE;
470 } else if (con == 1 && op == CEE_SUB) {
471 tree->opcode = OP_X86_DEC_MEMBASE;
473 tree->opcode = alu_reg_to_alu_membase_imm (op);
474 tree->inst_imm = con;
477 tree->inst_basereg = state->left->tree->inst_basereg;
478 tree->inst_offset = state->left->tree->inst_offset;
479 mono_bblock_add_inst (s->cbb, tree);
482 int loaded_reg = mono_regstate_next_int (s->rs);
483 int add_reg = mono_regstate_next_int (s->rs);
484 MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADI4_MEMBASE, loaded_reg, t2->inst_basereg, t2->inst_offset);
485 MONO_EMIT_NEW_BIALU_IMM (s, alu_reg_to_alu_imm (op), add_reg, loaded_reg, con);
486 MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STOREI4_MEMBASE_REG, t1->inst_basereg, t1->inst_offset, add_reg);
491 # this rules is incorrect, it needs to do an indirect inc (inc_membase)
492 #stmt: CEE_STIND_I4 (reg, CEE_ADD (reg, OP_ICONST)) {
493 # tree->opcode = OP_X86_INC_REG;
494 # tree->dreg = state->left->reg1;
495 # mono_bblock_add_inst (s->cbb, tree);
497 # MBState *s1 = state->left;
498 # MBState *s2 = state->right->left;
499 # int con = state->right->right->tree->inst_c0;
500 # MBCOND (con == 1 && s1->reg1 == s2->reg1);
504 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_SUB (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
505 int con = state->right->right->tree->inst_c0;
506 int dreg = state->left->tree->dreg;
507 int sreg = state->right->left->left->tree->dreg;
511 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
512 tree->opcode = OP_X86_DEC_REG;
513 tree->dreg = tree->sreg1 = dreg;
514 } else if (con == -1) {
516 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
517 tree->opcode = OP_X86_INC_REG;
518 tree->dreg = tree->sreg1 = dreg;
520 tree->opcode = OP_SUB_IMM;
521 tree->inst_imm = con;
525 mono_bblock_add_inst (s->cbb, tree);
528 stmt: CEE_STIND_I (OP_REGVAR, CEE_ADD (CEE_LDIND_I (OP_REGVAR), OP_ICONST)),
529 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_ADD (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
530 int con = state->right->right->tree->inst_c0;
531 int dreg = state->left->tree->dreg;
532 int sreg = state->right->left->left->tree->dreg;
536 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
537 tree->opcode = OP_X86_INC_REG;
538 tree->dreg = tree->sreg1 = dreg;
539 } else if (con == -1) {
541 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
542 tree->opcode = OP_X86_DEC_REG;
543 tree->dreg = tree->sreg1 = dreg;
545 tree->opcode = OP_ADD_IMM;
546 tree->inst_imm = con;
550 mono_bblock_add_inst (s->cbb, tree);
553 reg: CEE_LDIND_I2 (OP_REGVAR) {
554 MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);
558 stmt: CEE_STIND_I4 (OP_REGVAR, OP_ICONST),
559 stmt: CEE_STIND_I2 (OP_REGVAR, OP_ICONST),
560 stmt: CEE_STIND_I1 (OP_REGVAR, OP_ICONST),
561 stmt: CEE_STIND_REF (OP_REGVAR, OP_ICONST),
562 stmt: CEE_STIND_I (OP_REGVAR, OP_ICONST) {
563 int r = state->left->tree->dreg;
564 MONO_EMIT_BIALU (s, tree, CEE_XOR, r, r, r);
566 MBCOND (!state->right->tree->inst_c0);
571 # on x86, fp compare overwrites EAX, so we must
572 # either improve the local register allocator or
573 # emit coarse opcodes which saves EAX for us.
575 reg: OP_CEQ (OP_COMPARE (freg, freg)) {
576 MONO_EMIT_BIALU (s, tree, OP_FCEQ, state->reg1, state->left->left->reg1,
577 state->left->right->reg1);
580 reg: OP_CLT (OP_COMPARE (freg, freg)) {
581 MONO_EMIT_BIALU (s, tree, OP_FCLT, state->reg1, state->left->left->reg1,
582 state->left->right->reg1);
585 reg: OP_CLT_UN (OP_COMPARE (freg, freg)) {
586 MONO_EMIT_BIALU (s, tree, OP_FCLT_UN, state->reg1, state->left->left->reg1,
587 state->left->right->reg1);
590 reg: OP_CGT (OP_COMPARE (freg, freg)) {
591 MONO_EMIT_BIALU (s, tree, OP_FCGT, state->reg1, state->left->left->reg1,
592 state->left->right->reg1);
595 reg: OP_CGT_UN (OP_COMPARE (freg, freg)) {
596 MONO_EMIT_BIALU (s, tree, OP_FCGT_UN, state->reg1, state->left->left->reg1,
597 state->left->right->reg1);
600 # fpcflags overwrites EAX, but this does not matter for statements
601 # because we are the last operation in the tree.
603 stmt: CEE_BNE_UN (fpcflags) {
604 tree->opcode = OP_FBNE_UN;
605 mono_bblock_add_inst (s->cbb, tree);
608 stmt: CEE_BEQ (fpcflags) {
609 tree->opcode = OP_FBEQ;
610 mono_bblock_add_inst (s->cbb, tree);
613 stmt: CEE_BLT (fpcflags) {
614 tree->opcode = OP_FBLT;
615 mono_bblock_add_inst (s->cbb, tree);
618 stmt: CEE_BLT_UN (fpcflags) {
619 tree->opcode = OP_FBLT_UN;
620 mono_bblock_add_inst (s->cbb, tree);
623 stmt: CEE_BGT (fpcflags) {
624 tree->opcode = OP_FBGT;
625 mono_bblock_add_inst (s->cbb, tree);
628 stmt: CEE_BGT_UN (fpcflags) {
629 tree->opcode = OP_FBGT_UN;
630 mono_bblock_add_inst (s->cbb, tree);
633 stmt: CEE_BGE (fpcflags) {
634 tree->opcode = OP_FBGE;
635 mono_bblock_add_inst (s->cbb, tree);
638 stmt: CEE_BGE_UN (fpcflags) {
639 tree->opcode = OP_FBGE_UN;
640 mono_bblock_add_inst (s->cbb, tree);
643 stmt: CEE_BLE (fpcflags) {
644 tree->opcode = OP_FBLE;
645 mono_bblock_add_inst (s->cbb, tree);
648 stmt: CEE_BLE_UN (fpcflags) {
649 tree->opcode = OP_FBLE_UN;
650 mono_bblock_add_inst (s->cbb, tree);
653 stmt: CEE_POP (freg) "0" {
654 /* we need to pop the value from the x86 FP stack */
655 MONO_EMIT_UNALU (s, tree, OP_X86_FPOP, -1, state->left->reg1);
658 # override the rules in inssel-float.brg that work for machines with FP registers
660 freg: OP_FCONV_TO_R8 (freg) "0" {
664 freg: OP_FCONV_TO_R4 (freg) "0" {
665 /* fixme: nothing to do ??*/
668 reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) {
669 MonoInst *base = state->right->left->tree;
671 tree->dreg = state->reg1;
672 tree->sreg1 = state->left->reg1;
673 tree->sreg2 = base->inst_basereg;
674 tree->inst_offset = base->inst_offset;
675 tree->opcode = OP_X86_ADD_MEMBASE;
676 mono_bblock_add_inst (s->cbb, tree);
679 reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) {
680 MonoInst *base = state->right->left->tree;
682 tree->dreg = state->reg1;
683 tree->sreg1 = state->left->reg1;
684 tree->sreg2 = base->inst_basereg;
685 tree->inst_offset = base->inst_offset;
686 tree->opcode = OP_X86_SUB_MEMBASE;
687 mono_bblock_add_inst (s->cbb, tree);
690 reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) {
691 MonoInst *base = state->right->left->tree;
693 tree->dreg = state->reg1;
694 tree->sreg1 = state->left->reg1;
695 tree->sreg2 = base->inst_basereg;
696 tree->inst_offset = base->inst_offset;
697 tree->opcode = OP_X86_MUL_MEMBASE;
698 mono_bblock_add_inst (s->cbb, tree);
701 lreg: OP_LSHL (lreg, reg) "0" {
702 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
705 lreg: OP_LSHL (lreg, OP_ICONST) "0" {
706 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
709 lreg: OP_LSHR (lreg, reg) "0" {
710 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
713 lreg: OP_LSHR (lreg, OP_ICONST) "0" {
714 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
717 lreg: OP_LSHR_UN (lreg, reg) "0" {
718 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
721 lreg: OP_LSHR_UN (lreg, OP_ICONST) "0" {
722 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
725 reg: OP_ATOMIC_ADD_NEW_I4 (base, reg),
726 reg: OP_ATOMIC_ADD_I4 (base, reg) {
727 tree->opcode = tree->opcode;
728 tree->inst_basereg = state->left->tree->inst_basereg;
729 tree->inst_offset = state->left->tree->inst_offset;
730 tree->dreg = state->reg1;
731 tree->sreg2 = state->right->reg1;
733 mono_bblock_add_inst (s->cbb, tree);
736 reg: OP_ATOMIC_EXCHANGE_I4 (base, reg) {
737 tree->opcode = OP_ATOMIC_EXCHANGE_I4;
738 tree->dreg = state->reg1;
739 tree->sreg2 = state->right->reg1;
740 tree->inst_basereg = state->left->tree->inst_basereg;
741 tree->inst_offset = state->left->tree->inst_offset;
743 mono_bblock_add_inst (s->cbb, tree);
746 # Optimized call instructions
747 # mono_arch_patch_delegate_trampoline depends on these
748 reg: OP_CALL_REG (CEE_LDIND_I (base)),
749 freg: OP_FCALL_REG (CEE_LDIND_I (base)),
750 reg: OP_LCALL_REG (CEE_LDIND_I (base)) {
751 tree->opcode = call_reg_to_call_membase (tree->opcode);
752 tree->inst_basereg = state->left->left->tree->inst_basereg;
753 tree->inst_offset = state->left->left->tree->inst_offset;
754 tree->dreg = state->reg1;
755 mono_bblock_add_inst (s->cbb, tree);
758 lreg: OP_LCALL_REG (CEE_LDIND_I (base)) {
759 tree->opcode = call_reg_to_call_membase (tree->opcode);
760 tree->inst_basereg = state->left->left->tree->inst_basereg;
761 tree->inst_offset = state->left->left->tree->inst_offset;
762 tree->dreg = state->reg1;
763 mono_bblock_add_inst (s->cbb, tree);
766 stmt: OP_VOIDCALL_REG (CEE_LDIND_I (base)) {
767 tree->opcode = call_reg_to_call_membase (tree->opcode);
768 tree->inst_basereg = state->left->left->tree->inst_basereg;
769 tree->inst_offset = state->left->left->tree->inst_offset;
770 mono_bblock_add_inst (s->cbb, tree);
773 stmt: OP_VCALL_REG (CEE_LDIND_I (base), reg) {
774 mono_arch_emit_this_vret_args (s, (MonoCallInst*)tree, -1, -1, state->right->reg1);
776 tree->opcode = call_reg_to_call_membase (tree->opcode);
777 tree->inst_basereg = state->left->left->tree->inst_basereg;
778 tree->inst_offset = state->left->left->tree->inst_offset;
779 tree->dreg = state->reg1;
780 mono_bblock_add_inst (s->cbb, tree);
783 # Optimized ldind(reg) rules
784 reg: CEE_LDIND_REF (OP_REGVAR),
785 reg: CEE_LDIND_I (OP_REGVAR),
786 reg: CEE_LDIND_I4 (OP_REGVAR),
787 reg: CEE_LDIND_U4 (OP_REGVAR) "0" {
788 state->reg1 = state->left->tree->dreg;
789 tree->dreg = state->reg1;
792 reg: OP_STR_CHAR_ADDR (reg, reg) "2" {
794 * The corlib functions check for oob already.
795 * MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoString, length, state->right->reg1);
797 tree->opcode = OP_X86_LEA;
798 tree->dreg = state->reg1;
799 tree->sreg1 = state->left->reg1;
800 tree->sreg2 = state->right->reg1;
801 tree->inst_imm = G_STRUCT_OFFSET (MonoString, chars);
802 tree->backend.shift_amount = 1; /* shift by two */
803 mono_bblock_add_inst (s->cbb, tree);
809 alu_reg_to_alu_imm (int op)
823 g_assert_not_reached ();
829 alu_reg_to_alu_membase_imm (int op)
833 return OP_X86_ADD_MEMBASE_IMM;
835 return OP_X86_SUB_MEMBASE_IMM;
837 return OP_X86_AND_MEMBASE_IMM;
839 return OP_X86_OR_MEMBASE_IMM;
841 return OP_X86_XOR_MEMBASE_IMM;
843 g_assert_not_reached ();
849 call_reg_to_call_membase (int opcode)
853 return OP_CALL_MEMBASE;
855 return OP_FCALL_MEMBASE;
857 return OP_VCALL_MEMBASE;
859 return OP_LCALL_MEMBASE;
860 case OP_VOIDCALL_REG:
861 return OP_VOIDCALL_MEMBASE;
863 g_assert_not_reached ();