1 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG(cfg,basereg,offset,operand) do { \
3 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
4 inst->opcode = OP_X86_COMPARE_MEMBASE_REG; \
5 inst->inst_basereg = basereg; \
6 inst->inst_offset = offset; \
7 inst->sreg2 = operand; \
8 mono_bblock_add_inst (cfg->cbb, inst); \
11 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM(cfg,basereg,offset,operand) do { \
13 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
14 inst->opcode = OP_X86_COMPARE_MEMBASE_IMM; \
15 inst->inst_basereg = basereg; \
16 inst->inst_offset = offset; \
17 inst->inst_imm = operand; \
18 mono_bblock_add_inst (cfg->cbb, inst); \
21 /* override the arch independant versions with fast x86 versions */
23 #undef MONO_EMIT_BOUNDS_CHECK
24 #undef MONO_EMIT_BOUNDS_CHECK_IMM
26 #define MONO_EMIT_BOUNDS_CHECK(cfg, array_reg, array_type, array_length_field, index_reg) do { \
27 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
28 MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_reg); \
29 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
33 #define MONO_EMIT_BOUNDS_CHECK_IMM(cfg, array_reg, array_type, array_length_field, index_imm) do { \
34 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
35 MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_imm); \
36 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
44 # inssel-x86.brg: burg file for special x86 instructions
47 # Dietmar Maurer (dietmar@ximian.com)
48 # Paolo Molaro (lupus@ximian.com)
50 # (C) 2002 Ximian, Inc.
53 stmt: OP_START_HANDLER {
54 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
55 MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP);
58 stmt: CEE_ENDFINALLY {
59 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
60 MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
61 tree->opcode = CEE_RET;
62 mono_bblock_add_inst (s->cbb, tree);
65 stmt: OP_ENDFILTER (reg) {
66 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
67 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->left->reg1);
68 MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
69 tree->opcode = CEE_RET;
70 mono_bblock_add_inst (s->cbb, tree);
73 stmt: CEE_STIND_I8 (OP_REGVAR, lreg) {
74 /* this should only happen for methods returning a long */
75 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->right->reg1);
76 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->right->reg2);
79 lreg: OP_LNEG (lreg) "3" {
80 int tmpr = mono_regstate_next_int (s->rs);
81 MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg1, state->left->reg1);
82 MONO_EMIT_BIALU_IMM (s, tree, OP_ADC_IMM, tmpr, state->left->reg2, 0);
83 MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg2, tmpr);
86 freg: OP_LCONV_TO_R8 (lreg) {
87 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
88 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
89 tree->opcode = OP_X86_FP_LOAD_I8;
90 tree->inst_basereg = X86_ESP;
91 tree->inst_offset = 0;
92 mono_bblock_add_inst (s->cbb, tree);
93 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
96 freg: OP_LCONV_TO_R4 (lreg) {
97 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
98 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
99 tree->opcode = OP_X86_FP_LOAD_I8;
100 tree->inst_basereg = X86_ESP;
101 tree->inst_offset = 0;
102 mono_bblock_add_inst (s->cbb, tree);
103 /* change precision */
104 MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORER4_MEMBASE_REG, X86_ESP, 0, state->reg1);
105 MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADR4_MEMBASE, state->reg1, X86_ESP, 0);
106 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
109 freg: CEE_CONV_R_UN (reg) {
110 MONO_EMIT_NEW_BIALU_IMM (s, OP_X86_PUSH_IMM, -1, -1, 0);
111 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
112 tree->opcode = OP_X86_FP_LOAD_I8;
113 tree->inst_basereg = X86_ESP;
114 tree->inst_offset = 0;
115 mono_bblock_add_inst (s->cbb, tree);
116 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
119 cflags: OP_COMPARE (CEE_LDIND_REF (base), reg),
120 cflags: OP_COMPARE (CEE_LDIND_I (base), reg),
121 cflags: OP_COMPARE (CEE_LDIND_I4 (base), reg),
122 cflags: OP_COMPARE (CEE_LDIND_U4 (base), reg) {
123 tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
124 tree->inst_basereg = state->left->left->tree->inst_basereg;
125 tree->inst_offset = state->left->left->tree->inst_offset;
126 tree->sreg2 = state->right->reg1;
127 mono_bblock_add_inst (s->cbb, tree);
130 cflags: OP_COMPARE (CEE_LDIND_REF (base), CEE_LDIND_REF (OP_REGVAR)),
131 cflags: OP_COMPARE (CEE_LDIND_I (base), CEE_LDIND_REF (OP_REGVAR)),
132 cflags: OP_COMPARE (CEE_LDIND_I4 (base), CEE_LDIND_REF (OP_REGVAR)),
133 cflags: OP_COMPARE (CEE_LDIND_U4 (base), CEE_LDIND_REF (OP_REGVAR)) {
134 tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
135 tree->inst_basereg = state->left->left->tree->inst_basereg;
136 tree->inst_offset = state->left->left->tree->inst_offset;
137 tree->sreg2 = state->right->left->tree->dreg;
138 mono_bblock_add_inst (s->cbb, tree);
141 cflags: OP_COMPARE (CEE_LDIND_REF (base), OP_ICONST),
142 cflags: OP_COMPARE (CEE_LDIND_I (base), OP_ICONST),
143 cflags: OP_COMPARE (CEE_LDIND_I4 (base), OP_ICONST),
144 cflags: OP_COMPARE (CEE_LDIND_U4 (base), OP_ICONST) {
145 tree->opcode = OP_X86_COMPARE_MEMBASE_IMM;
146 tree->inst_basereg = state->left->left->tree->inst_basereg;
147 tree->inst_offset = state->left->left->tree->inst_offset;
148 tree->inst_imm = state->right->tree->inst_c0;
149 mono_bblock_add_inst (s->cbb, tree);
152 cflags: OP_COMPARE (reg, CEE_LDIND_REF (base)),
153 cflags: OP_COMPARE (reg, CEE_LDIND_I (base)),
154 cflags: OP_COMPARE (reg, CEE_LDIND_I4 (base)),
155 cflags: OP_COMPARE (reg, CEE_LDIND_U4 (base)) {
156 tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
157 tree->sreg2 = state->right->left->tree->inst_basereg;
158 tree->inst_offset = state->right->left->tree->inst_offset;
159 tree->sreg1 = state->left->reg1;
160 mono_bblock_add_inst (s->cbb, tree);
163 cflags: OP_COMPARE (CEE_LDIND_REF (OP_REGVAR), CEE_LDIND_REF (base)),
164 cflags: OP_COMPARE (CEE_LDIND_I (OP_REGVAR), CEE_LDIND_I (base)),
165 cflags: OP_COMPARE (CEE_LDIND_I4 (OP_REGVAR), CEE_LDIND_I4 (base)),
166 cflags: OP_COMPARE (CEE_LDIND_U4 (OP_REGVAR), CEE_LDIND_U4 (base)) {
167 tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
168 tree->sreg2 = state->right->left->tree->inst_basereg;
169 tree->inst_offset = state->right->left->tree->inst_offset;
170 tree->sreg1 = state->left->left->tree->dreg;
171 mono_bblock_add_inst (s->cbb, tree);
174 cflags : OP_CEQ (OP_COMPARE (OP_CEQ (cflags), OP_ICONST)) {
175 tree->opcode = OP_CNE;
176 tree->dreg = state->reg1;
177 mono_bblock_add_inst (s->cbb, tree);
179 MBCOND (!state->left->right->tree->inst_c0);
183 stmt: CEE_STIND_I1 (base, OP_CEQ (OP_COMPARE (OP_CEQ (cflags), OP_ICONST))) {
184 tree->opcode = OP_X86_SETNE_MEMBASE;
185 tree->inst_offset = state->left->tree->inst_offset;
186 tree->inst_basereg = state->left->tree->inst_basereg;
187 mono_bblock_add_inst (s->cbb, tree);
189 MBCOND (!state->right->left->right->tree->inst_c0);
193 stmt: CEE_STIND_I1 (base, OP_CEQ (cflags)) {
194 tree->opcode = OP_X86_SETEQ_MEMBASE;
195 tree->inst_offset = state->left->tree->inst_offset;
196 tree->inst_basereg = state->left->tree->inst_basereg;
197 mono_bblock_add_inst (s->cbb, tree);
200 reg: OP_LOCALLOC (OP_ICONST) {
201 if (tree->flags & MONO_INST_INIT) {
202 /* microcoded in mini-x86.c */
203 tree->sreg1 = mono_regstate_next_int (s->rs);
204 tree->dreg = state->reg1;
205 MONO_EMIT_NEW_ICONST (s, tree->sreg1, state->left->tree->inst_c0);
206 mono_bblock_add_inst (s->cbb, tree);
208 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, state->left->tree->inst_c0);
209 MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
213 reg: OP_LOCALLOC (reg) {
214 tree->sreg1 = state->left->tree->dreg;
215 tree->dreg = state->reg1;
216 mono_bblock_add_inst (s->cbb, tree);
219 stmt: OP_SETRET (reg) {
220 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->reg1);
223 stmt: OP_SETRET (lreg) {
224 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->left->reg2);
225 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->reg1);
228 stmt: OP_SETRET (CEE_LDIND_REF (OP_REGVAR)),
229 stmt: OP_SETRET (CEE_LDIND_I (OP_REGVAR)),
230 stmt: OP_SETRET (CEE_LDIND_I4 (OP_REGVAR)),
231 stmt: OP_SETRET (CEE_LDIND_U4 (OP_REGVAR)) {
232 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->left->tree->dreg);
235 stmt: OP_SETRET (freg) {
239 stmt: OP_SETRET (OP_ICONST) {
240 tree->opcode = OP_ICONST;
241 tree->inst_c0 = state->left->tree->inst_c0;
242 tree->dreg = X86_EAX;
243 mono_bblock_add_inst (s->cbb, tree);
246 stmt: OP_OUTARG (reg) {
247 tree->opcode = OP_X86_PUSH;
248 tree->sreg1 = state->left->reg1;
249 mono_bblock_add_inst (s->cbb, tree);
252 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)),
253 stmt: OP_OUTARG (CEE_LDIND_I4 (OP_REGVAR)),
254 stmt: OP_OUTARG (CEE_LDIND_U4 (OP_REGVAR)),
255 stmt: OP_OUTARG (CEE_LDIND_I (OP_REGVAR)) {
256 tree->opcode = OP_X86_PUSH;
257 tree->sreg1 = state->left->left->tree->dreg;
258 mono_bblock_add_inst (s->cbb, tree);
261 stmt: OP_OUTARG (lreg) {
262 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
263 tree->opcode = OP_X86_PUSH;
264 tree->sreg1 = state->left->reg1;
265 mono_bblock_add_inst (s->cbb, tree);
268 stmt: OP_OUTARG (CEE_LDIND_I8 (base)) {
270 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
271 ins->opcode = OP_X86_PUSH_MEMBASE;
272 ins->inst_basereg = state->left->left->tree->inst_basereg;
273 ins->inst_offset = state->left->left->tree->inst_offset + 4;
274 mono_bblock_add_inst (s->cbb, ins);
276 tree->opcode = OP_X86_PUSH_MEMBASE;
277 tree->inst_basereg = state->left->left->tree->inst_basereg;
278 tree->inst_offset = state->left->left->tree->inst_offset;
279 mono_bblock_add_inst (s->cbb, tree);
282 stmt: OP_OUTARG (OP_ICONST) {
283 tree->opcode = OP_X86_PUSH_IMM;
284 tree->inst_imm = state->left->tree->inst_c0;
285 mono_bblock_add_inst (s->cbb, tree);
288 stmt: OP_OUTARG (CEE_LDIND_I4 (base)),
289 stmt: OP_OUTARG (CEE_LDIND_U4 (base)),
290 stmt: OP_OUTARG (CEE_LDIND_I (base)),
291 stmt: OP_OUTARG (CEE_LDIND_REF (base)) {
292 tree->opcode = OP_X86_PUSH_MEMBASE;
293 tree->inst_basereg = state->left->left->tree->inst_basereg;
294 tree->inst_offset = state->left->left->tree->inst_offset;
295 mono_bblock_add_inst (s->cbb, tree);
298 stmt: OP_OUTARG (CEE_LDOBJ (reg)) {
299 tree->opcode = OP_X86_PUSH;
300 tree->sreg1 = state->left->reg1;
301 mono_bblock_add_inst (s->cbb, tree);
304 stmt: OP_OUTARG (freg) {
305 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
306 tree->opcode = OP_STORER8_MEMBASE_REG;
307 tree->sreg1 = state->left->reg1;
308 tree->inst_destbasereg = X86_ESP;
309 tree->inst_offset = 0;
310 mono_bblock_add_inst (s->cbb, tree);
313 stmt: OP_OUTARG_R4 (freg) {
314 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 4);
315 tree->opcode = OP_STORER4_MEMBASE_REG;
316 tree->sreg1 = state->left->reg1;
317 tree->inst_destbasereg = X86_ESP;
318 tree->inst_offset = 0;
319 mono_bblock_add_inst (s->cbb, tree);
322 stmt: OP_OUTARG_R8 (freg) {
323 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
324 tree->opcode = OP_STORER8_MEMBASE_REG;
325 tree->sreg1 = state->left->reg1;
326 tree->inst_destbasereg = X86_ESP;
327 tree->inst_offset = 0;
328 mono_bblock_add_inst (s->cbb, tree);
331 stmt: OP_OUTARG_VT (CEE_LDOBJ (base)) {
332 MonoInst *vt = state->left->left->tree;
333 //g_print ("vt size: %d at R%d + %d\n", tree->inst_imm, vt->inst_basereg, vt->inst_offset);
338 if (tree->inst_imm <= 4) {
339 tree->opcode = OP_X86_PUSH_MEMBASE;
340 tree->inst_basereg = vt->inst_basereg;
341 tree->inst_offset = vt->inst_offset;
342 mono_bblock_add_inst (s->cbb, tree);
343 } else if (tree->inst_imm <= 20) {
344 int sz = tree->inst_imm;
347 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, sz);
348 mini_emit_memcpy (s, X86_ESP, 0, vt->inst_basereg, vt->inst_offset, tree->inst_imm, 0);
350 tree->opcode = OP_X86_PUSH_OBJ;
351 tree->inst_basereg = vt->inst_basereg;
352 tree->inst_offset = vt->inst_offset;
353 mono_bblock_add_inst (s->cbb, tree);
357 stmt: OP_OUTARG_VT (OP_ICONST) {
358 tree->opcode = OP_X86_PUSH_IMM;
359 tree->inst_imm = state->left->tree->inst_c0;
360 mono_bblock_add_inst (s->cbb, tree);
363 stmt: OP_OUTARG_VT (reg) {
364 tree->opcode = OP_X86_PUSH;
365 tree->sreg1 = state->left->tree->dreg;
366 mono_bblock_add_inst (s->cbb, tree);
369 reg: OP_LDADDR (OP_REGOFFSET),
370 reg: CEE_LDOBJ (OP_REGOFFSET) {
371 if (state->left->tree->inst_offset) {
372 tree->opcode = OP_X86_LEA_MEMBASE;
373 tree->inst_imm = state->left->tree->inst_offset;
375 tree->opcode = OP_MOVE;
377 tree->sreg1 = state->left->tree->inst_basereg;
378 tree->dreg = state->reg1;
379 mono_bblock_add_inst (s->cbb, tree);
382 reg: CEE_LDELEMA (reg, reg) "15" {
383 guint32 size = mono_class_array_element_size (tree->klass);
385 MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoArray, max_length, state->right->reg1);
387 if (size == 1 || size == 2 || size == 4 || size == 8) {
388 static const int fast_log2 [] = { 1, 0, 1, -1, 2, -1, -1, -1, 3 };
389 tree->opcode = OP_X86_LEA;
390 tree->dreg = state->reg1;
391 tree->sreg1 = state->left->reg1;
392 tree->sreg2 = state->right->reg1;
393 tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
394 tree->unused = fast_log2 [size];
395 mono_bblock_add_inst (s->cbb, tree);
397 int mult_reg = mono_regstate_next_int (s->rs);
398 int add_reg = mono_regstate_next_int (s->rs);
399 MONO_EMIT_NEW_BIALU_IMM (s, OP_MUL_IMM, mult_reg, state->right->reg1, size);
400 MONO_EMIT_NEW_BIALU (s, CEE_ADD, add_reg, mult_reg, state->left->reg1);
401 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, state->reg1, add_reg, G_STRUCT_OFFSET (MonoArray, vector));
405 stmt: CEE_STIND_R8 (OP_REGVAR, freg) {
406 /* nothing to do: the value is already on the FP stack */
409 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
410 int con = state->right->right->tree->inst_c0;
413 tree->opcode = OP_X86_INC_MEMBASE;
415 tree->opcode = OP_X86_ADD_MEMBASE_IMM;
416 tree->inst_imm = con;
419 tree->inst_basereg = state->left->tree->inst_basereg;
420 tree->inst_offset = state->left->tree->inst_offset;
421 mono_bblock_add_inst (s->cbb, tree);
423 MBTREE_TYPE *t1 = state->right->left->left->tree;
424 MBTREE_TYPE *t2 = state->left->tree;
425 MBCOND (t1->inst_basereg == t2->inst_basereg &&
426 t1->inst_offset == t2->inst_offset);
430 stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)) {
431 int con = state->right->right->tree->inst_c0;
434 tree->opcode = OP_X86_DEC_MEMBASE;
436 tree->opcode = OP_X86_SUB_MEMBASE_IMM;
437 tree->inst_imm = con;
440 tree->inst_basereg = state->left->tree->inst_basereg;
441 tree->inst_offset = state->left->tree->inst_offset;
442 mono_bblock_add_inst (s->cbb, tree);
444 MBTREE_TYPE *t1 = state->right->left->left->tree;
445 MBTREE_TYPE *t2 = state->left->tree;
446 MBCOND (t1->inst_basereg == t2->inst_basereg &&
447 t1->inst_offset == t2->inst_offset);
452 # this rules is incorrect, it needs to do an indirect inc (inc_membase)
453 #stmt: CEE_STIND_I4 (reg, CEE_ADD (reg, OP_ICONST)) {
454 # tree->opcode = OP_X86_INC_REG;
455 # tree->dreg = state->left->reg1;
456 # mono_bblock_add_inst (s->cbb, tree);
458 # MBState *s1 = state->left;
459 # MBState *s2 = state->right->left;
460 # int con = state->right->right->tree->inst_c0;
461 # MBCOND (con == 1 && s1->reg1 == s2->reg1);
465 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_SUB (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
466 int con = state->right->right->tree->inst_c0;
467 int dreg = state->left->tree->dreg;
468 int sreg = state->right->left->left->tree->dreg;
472 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
473 tree->opcode = OP_X86_DEC_REG;
474 tree->dreg = tree->sreg1 = dreg;
475 } else if (con == -1) {
477 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
478 tree->opcode = OP_X86_INC_REG;
479 tree->dreg = tree->sreg1 = dreg;
481 tree->opcode = OP_SUB_IMM;
482 tree->inst_imm = con;
486 mono_bblock_add_inst (s->cbb, tree);
489 stmt: CEE_STIND_I (OP_REGVAR, CEE_ADD (CEE_LDIND_I (OP_REGVAR), OP_ICONST)),
490 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_ADD (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
491 int con = state->right->right->tree->inst_c0;
492 int dreg = state->left->tree->dreg;
493 int sreg = state->right->left->left->tree->dreg;
497 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
498 tree->opcode = OP_X86_INC_REG;
499 tree->dreg = tree->sreg1 = dreg;
500 } else if (con == -1) {
502 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
503 tree->opcode = OP_X86_DEC_REG;
504 tree->dreg = tree->sreg1 = dreg;
506 tree->opcode = OP_ADD_IMM;
507 tree->inst_imm = con;
511 mono_bblock_add_inst (s->cbb, tree);
514 reg: CEE_LDIND_I2 (OP_REGVAR) {
515 MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);
519 stmt: CEE_STIND_I4 (OP_REGVAR, OP_ICONST),
520 stmt: CEE_STIND_I2 (OP_REGVAR, OP_ICONST),
521 stmt: CEE_STIND_I1 (OP_REGVAR, OP_ICONST),
522 stmt: CEE_STIND_REF (OP_REGVAR, OP_ICONST),
523 stmt: CEE_STIND_I (OP_REGVAR, OP_ICONST) {
524 int r = state->left->tree->dreg;
525 MONO_EMIT_BIALU (s, tree, CEE_XOR, r, r, r);
527 MBCOND (!state->right->tree->inst_c0);
532 # on x86, fp compare overwrites EAX, so we must
533 # either improve the local register allocator or
534 # emit coarse opcodes which saves EAX for us.
536 reg: OP_CEQ (OP_COMPARE (freg, freg)) {
537 MONO_EMIT_BIALU (s, tree, OP_FCEQ, state->reg1, state->left->left->reg1,
538 state->left->right->reg1);
541 reg: OP_CLT (OP_COMPARE (freg, freg)) {
542 MONO_EMIT_BIALU (s, tree, OP_FCLT, state->reg1, state->left->left->reg1,
543 state->left->right->reg1);
546 reg: OP_CLT_UN (OP_COMPARE (freg, freg)) {
547 MONO_EMIT_BIALU (s, tree, OP_FCLT_UN, state->reg1, state->left->left->reg1,
548 state->left->right->reg1);
551 reg: OP_CGT (OP_COMPARE (freg, freg)) {
552 MONO_EMIT_BIALU (s, tree, OP_FCGT, state->reg1, state->left->left->reg1,
553 state->left->right->reg1);
556 reg: OP_CGT_UN (OP_COMPARE (freg, freg)) {
557 MONO_EMIT_BIALU (s, tree, OP_FCGT_UN, state->reg1, state->left->left->reg1,
558 state->left->right->reg1);
561 # fpcflags overwrites EAX, but this does not matter for statements
562 # because we are the last operation in the tree.
564 stmt: CEE_BNE_UN (fpcflags) {
565 tree->opcode = OP_FBNE_UN;
566 mono_bblock_add_inst (s->cbb, tree);
569 stmt: CEE_BEQ (fpcflags) {
570 tree->opcode = OP_FBEQ;
571 mono_bblock_add_inst (s->cbb, tree);
574 stmt: CEE_BLT (fpcflags) {
575 tree->opcode = OP_FBLT;
576 mono_bblock_add_inst (s->cbb, tree);
579 stmt: CEE_BLT_UN (fpcflags) {
580 tree->opcode = OP_FBLT_UN;
581 mono_bblock_add_inst (s->cbb, tree);
584 stmt: CEE_BGT (fpcflags) {
585 tree->opcode = OP_FBGT;
586 mono_bblock_add_inst (s->cbb, tree);
589 stmt: CEE_BGT_UN (fpcflags) {
590 tree->opcode = OP_FBGT_UN;
591 mono_bblock_add_inst (s->cbb, tree);
594 stmt: CEE_BGE (fpcflags) {
595 tree->opcode = OP_FBGE;
596 mono_bblock_add_inst (s->cbb, tree);
599 stmt: CEE_BGE_UN (fpcflags) {
600 tree->opcode = OP_FBGE_UN;
601 mono_bblock_add_inst (s->cbb, tree);
604 stmt: CEE_BLE (fpcflags) {
605 tree->opcode = OP_FBLE;
606 mono_bblock_add_inst (s->cbb, tree);
609 stmt: CEE_BLE_UN (fpcflags) {
610 tree->opcode = OP_FBLE_UN;
611 mono_bblock_add_inst (s->cbb, tree);
614 stmt: CEE_POP (freg) "0" {
615 /* we need to pop the value from the x86 FP stack */
616 MONO_EMIT_UNALU (s, tree, OP_X86_FPOP, -1, state->left->reg1);
619 # override the rules in inssel-float.brg that work for machines with FP registers
621 freg: OP_FCONV_TO_R8 (freg) "0" {
625 freg: OP_FCONV_TO_R4 (freg) "0" {
626 /* fixme: nothing to do ??*/
629 reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) {
630 MonoInst *base = state->right->left->tree;
632 tree->dreg = state->reg1;
633 tree->sreg1 = state->left->reg1;
634 tree->sreg2 = base->inst_basereg;
635 tree->inst_offset = base->inst_offset;
636 tree->opcode = OP_X86_ADD_MEMBASE;
637 mono_bblock_add_inst (s->cbb, tree);
640 reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) {
641 MonoInst *base = state->right->left->tree;
643 tree->dreg = state->reg1;
644 tree->sreg1 = state->left->reg1;
645 tree->sreg2 = base->inst_basereg;
646 tree->inst_offset = base->inst_offset;
647 tree->opcode = OP_X86_SUB_MEMBASE;
648 mono_bblock_add_inst (s->cbb, tree);
651 reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) {
652 MonoInst *base = state->right->left->tree;
654 tree->dreg = state->reg1;
655 tree->sreg1 = state->left->reg1;
656 tree->sreg2 = base->inst_basereg;
657 tree->inst_offset = base->inst_offset;
658 tree->opcode = OP_X86_MUL_MEMBASE;
659 mono_bblock_add_inst (s->cbb, tree);
662 lreg: OP_LSHL (lreg, reg) "0" {
663 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
666 lreg: OP_LSHL (lreg, OP_ICONST) "0" {
667 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
670 lreg: OP_LSHR (lreg, reg) "0" {
671 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
674 lreg: OP_LSHR (lreg, OP_ICONST) "0" {
675 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
678 lreg: OP_LSHR_UN (lreg, reg) "0" {
679 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
682 lreg: OP_LSHR_UN (lreg, OP_ICONST) "0" {
683 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
686 reg: OP_X86_TLS_GET {
687 tree->dreg = state->reg1;
688 mono_bblock_add_inst (s->cbb, tree);