mono/mini/inssel-x86.brg

   1 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG(cfg,basereg,offset,operand) do { \
   2                 MonoInst *inst; \
   3                 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
   4                 inst->opcode = OP_X86_COMPARE_MEMBASE_REG; \
   5                 inst->inst_basereg = basereg; \
   6                 inst->inst_offset = offset; \
   7                 inst->sreg2 = operand; \
   8                 mono_bblock_add_inst (cfg->cbb, inst); \
   9         } while (0)
  10
  11 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM(cfg,basereg,offset,operand) do { \
  12                 MonoInst *inst; \
  13                 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
  14                 inst->opcode = OP_X86_COMPARE_MEMBASE_IMM; \
  15                 inst->inst_basereg = basereg; \
  16                 inst->inst_offset = offset; \
  17                 inst->inst_imm = operand; \
  18                 mono_bblock_add_inst (cfg->cbb, inst); \
  19         } while (0)
  20
  21 /* override the arch independant versions with fast x86 versions */
  22
  23 #undef MONO_EMIT_BOUNDS_CHECK
  24 #undef MONO_EMIT_BOUNDS_CHECK_IMM
  25
  26 #define MONO_EMIT_BOUNDS_CHECK(cfg, array_reg, array_type, array_length_field, index_reg) do { \
  27                 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
  28                         MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_reg); \
  29                         MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
  30                 } \
  31         } while (0)
  32
  33 #define MONO_EMIT_BOUNDS_CHECK_IMM(cfg, array_reg, array_type, array_length_field, index_imm) do { \
  34                 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
  35                         MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_imm); \
  36                         MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
  37                 } \
  38         } while (0)
  39
  40
  41 %%
  42
  43 #
  44 # inssel-x86.brg: burg file for special x86 instructions
  45 #
  46 # Author:
  47 #   Dietmar Maurer (dietmar@ximian.com)
  48 #   Paolo Molaro (lupus@ximian.com)
  49 #
  50 # (C) 2002 Ximian, Inc.
  51 #
  52
  53 stmt: OP_START_HANDLER {
  54         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
  55         MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP);
  56 }
  57
  58 stmt: CEE_ENDFINALLY {
  59         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
  60         MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
  61         tree->opcode = CEE_RET;
  62         mono_bblock_add_inst (s->cbb, tree);
  63 }
  64
  65 stmt: OP_ENDFILTER (reg) {
  66         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
  67         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->left->reg1);
  68         MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
  69         tree->opcode = CEE_RET;
  70         mono_bblock_add_inst (s->cbb, tree);
  71 }
  72
  73 stmt: CEE_STIND_I8 (OP_REGVAR, lreg) {
  74         /* this should only happen for methods returning a long */
  75         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->right->reg1);
  76         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->right->reg2);
  77 }
  78
  79 lreg: OP_LNEG (lreg) "3" {
  80         int tmpr = mono_regstate_next_int (s->rs);
  81         MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg1, state->left->reg1);
  82         MONO_EMIT_BIALU_IMM (s, tree, OP_ADC_IMM, tmpr, state->left->reg2, 0);
  83         MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg2, tmpr);
  84 }
  85
  86 freg: OP_LCONV_TO_R8 (lreg) {
  87         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
  88         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
  89         tree->opcode = OP_X86_FP_LOAD_I8;
  90         tree->inst_basereg = X86_ESP;
  91         tree->inst_offset = 0;
  92         mono_bblock_add_inst (s->cbb, tree);
  93         MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
  94 }
  95
  96 freg: OP_LCONV_TO_R4 (lreg) {
  97         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
  98         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
  99         tree->opcode = OP_X86_FP_LOAD_I8;
 100         tree->inst_basereg = X86_ESP;
 101         tree->inst_offset = 0;
 102         mono_bblock_add_inst (s->cbb, tree);
 103         /* change precision */
 104         MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORER4_MEMBASE_REG, X86_ESP, 0, state->reg1);
 105         MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADR4_MEMBASE, state->reg1, X86_ESP, 0);
 106         MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
 107 }
 108
 109 freg: CEE_CONV_R_UN (reg) {
 110         MONO_EMIT_NEW_BIALU_IMM (s, OP_X86_PUSH_IMM, -1, -1, 0);
 111         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
 112         tree->opcode = OP_X86_FP_LOAD_I8;
 113         tree->inst_basereg = X86_ESP;
 114         tree->inst_offset = 0;
 115         mono_bblock_add_inst (s->cbb, tree);
 116         MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
 117 }
 118
 119 cflags: OP_COMPARE (CEE_LDIND_I4 (base), reg) {
 120         tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
 121         tree->inst_basereg = state->left->left->tree->inst_basereg;
 122         tree->inst_offset = state->left->left->tree->inst_offset;
 123         tree->sreg2 = state->right->reg1;
 124         mono_bblock_add_inst (s->cbb, tree);
 125 }
 126
 127 cflags: OP_COMPARE (CEE_LDIND_I4 (base), OP_ICONST) {
 128         tree->opcode = OP_X86_COMPARE_MEMBASE_IMM;
 129         tree->inst_basereg = state->left->left->tree->inst_basereg;
 130         tree->inst_offset = state->left->left->tree->inst_offset;
 131         tree->inst_imm = state->right->tree->inst_c0;
 132         mono_bblock_add_inst (s->cbb, tree);
 133 }
 134
 135 cflags: OP_COMPARE (reg, CEE_LDIND_I4 (base)) {
 136         tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
 137         tree->sreg2 = state->right->left->tree->inst_basereg;
 138         tree->inst_offset = state->right->left->tree->inst_offset;
 139         tree->sreg1 = state->left->reg1;
 140         mono_bblock_add_inst (s->cbb, tree);
 141 }
 142
 143 stmt: CEE_STIND_I1 (base, OP_CEQ (cflags)) {
 144         tree->opcode = OP_X86_SETEQ_MEMBASE;
 145         tree->inst_offset = state->left->tree->inst_offset;
 146         tree->inst_basereg = state->left->tree->inst_basereg;
 147         mono_bblock_add_inst (s->cbb, tree);
 148 }
 149
 150 reg: OP_LOCALLOC (OP_ICONST) {
 151         if (tree->flags & MONO_INST_INIT) {
 152                 /* microcoded in mini-x86.c */
 153                 tree->sreg1 = mono_regstate_next_int (s->rs);
 154                 tree->dreg = state->reg1;
 155                 MONO_EMIT_NEW_ICONST (s, tree->sreg1, state->left->tree->inst_c0);
 156                 mono_bblock_add_inst (s->cbb, tree);
 157         } else {
 158                 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, state->left->tree->inst_c0);
 159                 MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
 160         }
 161 }
 162
 163 reg: OP_LOCALLOC (reg) {
 164         tree->sreg1 = state->left->tree->dreg;
 165         tree->dreg = state->reg1;
 166         mono_bblock_add_inst (s->cbb, tree);
 167 }
 168
 169 stmt: OP_SETRET (reg) {
 170         tree->opcode = OP_MOVE;
 171         tree->sreg1 = state->left->reg1;
 172         tree->dreg = X86_EAX;
 173         mono_bblock_add_inst (s->cbb, tree);
 174 }
 175
 176 stmt: OP_SETRET (lreg) {
 177         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->left->reg2);
 178         tree->opcode = OP_MOVE;
 179         tree->sreg1 = state->left->reg1;
 180         tree->dreg = X86_EAX;
 181         mono_bblock_add_inst (s->cbb, tree);
 182 }
 183
 184 stmt: OP_SETRET (CEE_LDIND_REF (OP_REGVAR)) {
 185         tree->opcode = OP_MOVE;
 186         tree->sreg1 = state->left->left->tree->dreg;
 187         tree->dreg = X86_EAX;
 188         mono_bblock_add_inst (s->cbb, tree);
 189 }
 190
 191 stmt: OP_SETRET (freg) {
 192         /* nothing to do */
 193 }
 194
 195 stmt: OP_SETRET (OP_ICONST) {
 196         tree->opcode = OP_ICONST;
 197         tree->inst_c0 = state->left->tree->inst_c0;
 198         tree->dreg = X86_EAX;
 199         mono_bblock_add_inst (s->cbb, tree);
 200 }
 201
 202 stmt: OP_OUTARG (reg) {
 203         tree->opcode = OP_X86_PUSH;
 204         tree->sreg1 = state->left->reg1;
 205         mono_bblock_add_inst (s->cbb, tree);
 206 }
 207
 208 # we need to reduce this code duplication with some burg syntax extension
 209 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)) {
 210         tree->opcode = OP_X86_PUSH;
 211         tree->sreg1 = state->left->left->tree->dreg;
 212         mono_bblock_add_inst (s->cbb, tree);
 213 }
 214
 215 stmt: OP_OUTARG (CEE_LDIND_I4 (OP_REGVAR)) {
 216         tree->opcode = OP_X86_PUSH;
 217         tree->sreg1 = state->left->left->tree->dreg;
 218         mono_bblock_add_inst (s->cbb, tree);
 219 }
 220
 221 stmt: OP_OUTARG (CEE_LDIND_U4 (OP_REGVAR)) {
 222         tree->opcode = OP_X86_PUSH;
 223         tree->sreg1 = state->left->left->tree->dreg;
 224         mono_bblock_add_inst (s->cbb, tree);
 225 }
 226
 227 stmt: OP_OUTARG (CEE_LDIND_I (OP_REGVAR)) {
 228         tree->opcode = OP_X86_PUSH;
 229         tree->sreg1 = state->left->left->tree->dreg;
 230         mono_bblock_add_inst (s->cbb, tree);
 231 }
 232
 233 stmt: OP_OUTARG (lreg) {
 234         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
 235         tree->opcode = OP_X86_PUSH;
 236         tree->sreg1 = state->left->reg1;
 237         mono_bblock_add_inst (s->cbb, tree);
 238 }
 239
 240 stmt: OP_OUTARG (CEE_LDIND_I8 (base)) {
 241         MonoInst *ins;
 242         ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
 243         ins->opcode = OP_X86_PUSH_MEMBASE;
 244         ins->inst_basereg = state->left->left->tree->inst_basereg;
 245         ins->inst_offset = state->left->left->tree->inst_offset + 4;
 246         mono_bblock_add_inst (s->cbb, ins);
 247
 248         tree->opcode = OP_X86_PUSH_MEMBASE;
 249         tree->inst_basereg = state->left->left->tree->inst_basereg;
 250         tree->inst_offset = state->left->left->tree->inst_offset;
 251         mono_bblock_add_inst (s->cbb, tree);
 252 }
 253
 254 stmt: OP_OUTARG (OP_ICONST) {
 255         tree->opcode = OP_X86_PUSH_IMM;
 256         tree->inst_imm = state->left->tree->inst_c0;
 257         mono_bblock_add_inst (s->cbb, tree);
 258 }
 259
 260 stmt: OP_OUTARG (CEE_LDIND_I4 (base)) {
 261         tree->opcode = OP_X86_PUSH_MEMBASE;
 262         tree->inst_basereg = state->left->left->tree->inst_basereg;
 263         tree->inst_offset = state->left->left->tree->inst_offset;
 264         mono_bblock_add_inst (s->cbb, tree);
 265 }
 266
 267 stmt: OP_OUTARG (CEE_LDIND_U4 (base)) {
 268         tree->opcode = OP_X86_PUSH_MEMBASE;
 269         tree->inst_basereg = state->left->left->tree->inst_basereg;
 270         tree->inst_offset = state->left->left->tree->inst_offset;
 271         mono_bblock_add_inst (s->cbb, tree);
 272 }
 273
 274 stmt: OP_OUTARG (CEE_LDIND_I (base)) {
 275         tree->opcode = OP_X86_PUSH_MEMBASE;
 276         tree->inst_basereg = state->left->left->tree->inst_basereg;
 277         tree->inst_offset = state->left->left->tree->inst_offset;
 278         mono_bblock_add_inst (s->cbb, tree);
 279 }
 280
 281 stmt: OP_OUTARG (CEE_LDIND_REF (base)) {
 282         tree->opcode = OP_X86_PUSH_MEMBASE;
 283         tree->inst_basereg = state->left->left->tree->inst_basereg;
 284         tree->inst_offset = state->left->left->tree->inst_offset;
 285         mono_bblock_add_inst (s->cbb, tree);
 286 }
 287
 288 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)) {
 289         tree->opcode = OP_X86_PUSH;
 290         tree->sreg1 = state->left->left->tree->dreg;
 291         mono_bblock_add_inst (s->cbb, tree);
 292 }
 293
 294 stmt: OP_OUTARG (CEE_LDOBJ (reg)) {
 295         tree->opcode = OP_X86_PUSH;
 296         tree->sreg1 = state->left->reg1;
 297         mono_bblock_add_inst (s->cbb, tree);
 298 }
 299
 300 stmt: OP_OUTARG (freg) {
 301         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
 302         tree->opcode = OP_STORER8_MEMBASE_REG;
 303         tree->sreg1 = state->left->reg1;
 304         tree->inst_destbasereg = X86_ESP;
 305         tree->inst_offset = 0;
 306         mono_bblock_add_inst (s->cbb, tree);
 307 }
 308
 309 stmt: OP_OUTARG_R4 (freg) {
 310         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 4);
 311         tree->opcode = OP_STORER4_MEMBASE_REG;
 312         tree->sreg1 = state->left->reg1;
 313         tree->inst_destbasereg = X86_ESP;
 314         tree->inst_offset = 0;
 315         mono_bblock_add_inst (s->cbb, tree);
 316 }
 317
 318 stmt: OP_OUTARG_R8 (freg) {
 319         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
 320         tree->opcode = OP_STORER8_MEMBASE_REG;
 321         tree->sreg1 = state->left->reg1;
 322         tree->inst_destbasereg = X86_ESP;
 323         tree->inst_offset = 0;
 324         mono_bblock_add_inst (s->cbb, tree);
 325 }
 326
 327 stmt: OP_OUTARG_VT (CEE_LDOBJ (base)) {
 328         MonoInst *vt = state->left->left->tree;
 329         //g_print ("vt size: %d at R%d + %d\n", tree->inst_imm, vt->inst_basereg, vt->inst_offset);
 330
 331         if (!tree->inst_imm)
 332                 return;
 333
 334         if (tree->inst_imm <= 4) {
 335                 tree->opcode = OP_X86_PUSH_MEMBASE;
 336                 tree->inst_basereg = vt->inst_basereg;
 337                 tree->inst_offset = vt->inst_offset;
 338                 mono_bblock_add_inst (s->cbb, tree);
 339         } else if (tree->inst_imm <= 20) {
 340                 int sz = tree->inst_imm;
 341                 sz += 3;
 342                 sz &= ~3;
 343                 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, sz);
 344                 mini_emit_memcpy (s, X86_ESP, 0, vt->inst_basereg, vt->inst_offset, tree->inst_imm, 0);
 345         } else {
 346                 tree->opcode = OP_X86_PUSH_OBJ;
 347                 tree->inst_basereg = vt->inst_basereg;
 348                 tree->inst_offset = vt->inst_offset;
 349                 mono_bblock_add_inst (s->cbb, tree);
 350         }
 351 }
 352
 353 stmt: OP_OUTARG_VT (OP_ICONST) {
 354         tree->opcode = OP_X86_PUSH_IMM;
 355         tree->inst_imm = state->left->tree->inst_c0;
 356         mono_bblock_add_inst (s->cbb, tree);
 357 }
 358
 359 stmt: OP_OUTARG_VT (reg) {
 360         tree->opcode = OP_X86_PUSH;
 361         tree->sreg1 = state->left->tree->dreg;
 362         mono_bblock_add_inst (s->cbb, tree);
 363 }
 364
 365 reg: OP_LDADDR (OP_REGOFFSET) "1" {
 366         if (state->left->tree->inst_offset) {
 367                 tree->opcode = OP_X86_LEA_MEMBASE;
 368                 tree->sreg1 = state->left->tree->inst_basereg;
 369                 tree->inst_imm = state->left->tree->inst_offset;
 370                 tree->dreg = state->reg1;
 371         } else {
 372                 tree->opcode = OP_MOVE;
 373                 tree->sreg1 = state->left->tree->inst_basereg;
 374                 tree->dreg = state->reg1;
 375         }
 376         mono_bblock_add_inst (s->cbb, tree);
 377 }
 378
 379 reg: CEE_LDOBJ (OP_REGOFFSET) "1" {
 380         if (state->left->tree->inst_offset) {
 381                 tree->opcode = OP_X86_LEA_MEMBASE;
 382                 tree->sreg1 = state->left->tree->inst_basereg;
 383                 tree->inst_imm = state->left->tree->inst_offset;
 384                 tree->dreg = state->reg1;
 385         } else {
 386                 tree->opcode = OP_MOVE;
 387                 tree->sreg1 = state->left->tree->inst_basereg;
 388                 tree->dreg = state->reg1;
 389         }
 390         mono_bblock_add_inst (s->cbb, tree);
 391 }
 392
 393 reg: CEE_LDELEMA (reg, reg) "15" {
 394         guint32 size = mono_class_array_element_size (tree->klass);
 395
 396         MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoArray, max_length, state->right->reg1);
 397
 398         if (size == 1 || size == 2 || size == 4 || size == 8) {
 399                 static const int fast_log2 [] = { 1, 0, 1, -1, 2, -1, -1, -1, 3 };
 400                 tree->opcode = OP_X86_LEA;
 401                 tree->dreg = state->reg1;
 402                 tree->sreg1 = state->left->reg1;
 403                 tree->sreg2 = state->right->reg1;
 404                 tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
 405                 tree->unused = fast_log2 [size];
 406                 mono_bblock_add_inst (s->cbb, tree);
 407         } else {
 408                 int mult_reg = mono_regstate_next_int (s->rs);
 409                 int add_reg = mono_regstate_next_int (s->rs);
 410                 MONO_EMIT_NEW_BIALU_IMM (s, OP_MUL_IMM, mult_reg, state->right->reg1, size);
 411                 MONO_EMIT_NEW_BIALU (s, CEE_ADD, add_reg, mult_reg, state->left->reg1);
 412                 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, state->reg1, add_reg, G_STRUCT_OFFSET (MonoArray, vector));
 413         }
 414 }
 415
 416 stmt: CEE_STIND_R8 (OP_REGVAR, freg) {
 417         /* nothing to do: the value is already on the FP stack */
 418 }
 419
 420 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
 421         int con = state->right->right->tree->inst_c0;
 422
 423         if (con == 1) {
 424                 tree->opcode = OP_X86_INC_MEMBASE;
 425         } else {
 426                 tree->opcode = OP_X86_ADD_MEMBASE_IMM;
 427                 tree->inst_imm = con;
 428         }
 429
 430         tree->inst_basereg = state->left->tree->inst_basereg;
 431         tree->inst_offset = state->left->tree->inst_offset;
 432         mono_bblock_add_inst (s->cbb, tree);
 433 } cost {
 434         MBTREE_TYPE *t1 = state->right->left->left->tree;
 435         MBTREE_TYPE *t2 = state->left->tree;
 436         MBCOND (t1->inst_basereg == t2->inst_basereg &&
 437                 t1->inst_offset == t2->inst_offset);
 438         return 2;
 439 }
 440
 441 stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)) {
 442         int con = state->right->right->tree->inst_c0;
 443
 444         if (con == 1) {
 445                 tree->opcode = OP_X86_DEC_MEMBASE;
 446         } else {
 447                 tree->opcode = OP_X86_SUB_MEMBASE_IMM;
 448                 tree->inst_imm = con;
 449         }
 450
 451         tree->inst_basereg = state->left->tree->inst_basereg;
 452         tree->inst_offset = state->left->tree->inst_offset;
 453         mono_bblock_add_inst (s->cbb, tree);
 454 } cost {
 455         MBTREE_TYPE *t1 = state->right->left->left->tree;
 456         MBTREE_TYPE *t2 = state->left->tree;
 457         MBCOND (t1->inst_basereg == t2->inst_basereg &&
 458                 t1->inst_offset == t2->inst_offset);
 459         return 2;
 460 }
 461
 462 #
 463 # this rules is incorrect, it needs to do an indirect inc (inc_membase)
 464 #stmt: CEE_STIND_I4 (reg, CEE_ADD (reg, OP_ICONST)) {
 465 #       tree->opcode = OP_X86_INC_REG;
 466 #       tree->dreg = state->left->reg1;
 467 #       mono_bblock_add_inst (s->cbb, tree);
 468 #} cost {
 469 #       MBState *s1 = state->left;
 470 #       MBState *s2 = state->right->left;
 471 #       int con = state->right->right->tree->inst_c0;
 472 #       MBCOND (con == 1 && s1->reg1 == s2->reg1);
 473 #       return 1;
 474 #}
 475
 476 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_SUB (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
 477         int con = state->right->right->tree->inst_c0;
 478         int dreg = state->left->tree->dreg;
 479         int sreg = state->right->left->left->tree->dreg;
 480
 481         if (con == 1) {
 482                 if (dreg != sreg)
 483                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 484                 tree->opcode = OP_X86_DEC_REG;
 485                 tree->dreg = tree->sreg1 = dreg;
 486         } else if (con == -1) {
 487                 if (dreg != sreg)
 488                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 489                 tree->opcode = OP_X86_INC_REG;
 490                 tree->dreg = tree->sreg1 = dreg;
 491         } else {
 492                 tree->opcode = OP_SUB_IMM;
 493                 tree->inst_imm = con;
 494                 tree->sreg1 = sreg;
 495                 tree->dreg = dreg;
 496         }
 497         mono_bblock_add_inst (s->cbb, tree);
 498 }
 499
 500 stmt: CEE_STIND_I (OP_REGVAR, CEE_ADD (CEE_LDIND_I (OP_REGVAR), OP_ICONST)),
 501 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_ADD (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
 502         int con = state->right->right->tree->inst_c0;
 503         int dreg = state->left->tree->dreg;
 504         int sreg = state->right->left->left->tree->dreg;
 505
 506         if (con == 1) {
 507                 if (dreg != sreg)
 508                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 509                 tree->opcode = OP_X86_INC_REG;
 510                 tree->dreg = tree->sreg1 = dreg;
 511         } else if (con == -1) {
 512                 if (dreg != sreg)
 513                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 514                 tree->opcode = OP_X86_DEC_REG;
 515                 tree->dreg = tree->sreg1 = dreg;
 516         } else {
 517                 tree->opcode = OP_ADD_IMM;
 518                 tree->inst_imm = con;
 519                 tree->sreg1 = sreg;
 520                 tree->dreg = dreg;
 521         }
 522         mono_bblock_add_inst (s->cbb, tree);
 523 }
 524
 525 reg: CEE_LDIND_I2 (OP_REGVAR) {
 526         MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);
 527 }
 528
 529 # on x86, fp compare overwrites EAX, so we must
 530 # either improve the local register allocator or
 531 # emit coarse opcodes which saves EAX for us.
 532
 533 reg: OP_CEQ (OP_COMPARE (freg, freg)) {
 534         MONO_EMIT_BIALU (s, tree, OP_FCEQ, state->reg1, state->left->left->reg1,
 535                          state->left->right->reg1);
 536 }
 537
 538 reg: OP_CLT (OP_COMPARE (freg, freg)) {
 539         MONO_EMIT_BIALU (s, tree, OP_FCLT, state->reg1, state->left->left->reg1,
 540                          state->left->right->reg1);
 541 }
 542
 543 reg: OP_CLT_UN (OP_COMPARE (freg, freg)) {
 544         MONO_EMIT_BIALU (s, tree, OP_FCLT_UN, state->reg1, state->left->left->reg1,
 545                          state->left->right->reg1);
 546 }
 547
 548 reg: OP_CGT (OP_COMPARE (freg, freg)) {
 549         MONO_EMIT_BIALU (s, tree, OP_FCGT, state->reg1, state->left->left->reg1,
 550                          state->left->right->reg1);
 551 }
 552
 553 reg: OP_CGT_UN (OP_COMPARE (freg, freg)) {
 554         MONO_EMIT_BIALU (s, tree, OP_FCGT_UN, state->reg1, state->left->left->reg1,
 555                          state->left->right->reg1);
 556 }
 557
 558 # fpcflags overwrites EAX, but this does not matter for statements
 559 # because we are the last operation in the tree.
 560
 561 stmt: CEE_BNE_UN (fpcflags) {
 562         tree->opcode = OP_FBNE_UN;
 563         mono_bblock_add_inst (s->cbb, tree);
 564 }
 565
 566 stmt: CEE_BEQ (fpcflags) {
 567         tree->opcode = OP_FBEQ;
 568         mono_bblock_add_inst (s->cbb, tree);
 569 }
 570
 571 stmt: CEE_BLT (fpcflags) {
 572         tree->opcode = OP_FBLT;
 573         mono_bblock_add_inst (s->cbb, tree);
 574 }
 575
 576 stmt: CEE_BLT_UN (fpcflags) {
 577         tree->opcode = OP_FBLT_UN;
 578         mono_bblock_add_inst (s->cbb, tree);
 579 }
 580
 581 stmt: CEE_BGT (fpcflags) {
 582         tree->opcode = OP_FBGT;
 583         mono_bblock_add_inst (s->cbb, tree);
 584 }
 585
 586 stmt: CEE_BGT_UN (fpcflags) {
 587         tree->opcode = OP_FBGT_UN;
 588         mono_bblock_add_inst (s->cbb, tree);
 589 }
 590
 591 stmt: CEE_BGE  (fpcflags) {
 592         tree->opcode = OP_FBGE;
 593         mono_bblock_add_inst (s->cbb, tree);
 594 }
 595
 596 stmt: CEE_BGE_UN (fpcflags) {
 597         tree->opcode = OP_FBGE_UN;
 598         mono_bblock_add_inst (s->cbb, tree);
 599 }
 600
 601 stmt: CEE_BLE  (fpcflags) {
 602         tree->opcode = OP_FBLE;
 603         mono_bblock_add_inst (s->cbb, tree);
 604 }
 605
 606 stmt: CEE_BLE_UN (fpcflags) {
 607         tree->opcode = OP_FBLE_UN;
 608         mono_bblock_add_inst (s->cbb, tree);
 609 }
 610
 611 stmt: CEE_POP (freg) "0" {
 612         /* we need to pop the value from the x86 FP stack */
 613         MONO_EMIT_UNALU (s, tree, OP_X86_FPOP, -1, state->left->reg1);
 614 }
 615
 616 # override the rules in inssel-float.brg that work for machines with FP registers
 617
 618 freg: OP_FCONV_TO_R8 (freg) "0" {
 619         /* nothing to do */
 620 }
 621
 622 freg: OP_FCONV_TO_R4 (freg) "0" {
 623         /* fixme: nothing to do ??*/
 624 }
 625
 626 reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) {
 627         MonoInst *base = state->right->left->tree;
 628
 629         tree->dreg = state->reg1;
 630         tree->sreg1 = state->left->reg1;
 631         tree->sreg2 = base->inst_basereg;
 632         tree->inst_offset = base->inst_offset;
 633         tree->opcode = OP_X86_ADD_MEMBASE;
 634         mono_bblock_add_inst (s->cbb, tree);
 635 }
 636
 637 reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) {
 638         MonoInst *base = state->right->left->tree;
 639
 640         tree->dreg = state->reg1;
 641         tree->sreg1 = state->left->reg1;
 642         tree->sreg2 = base->inst_basereg;
 643         tree->inst_offset = base->inst_offset;
 644         tree->opcode = OP_X86_SUB_MEMBASE;
 645         mono_bblock_add_inst (s->cbb, tree);
 646 }
 647
 648 reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) {
 649         MonoInst *base = state->right->left->tree;
 650
 651         tree->dreg = state->reg1;
 652         tree->sreg1 = state->left->reg1;
 653         tree->sreg2 = base->inst_basereg;
 654         tree->inst_offset = base->inst_offset;
 655         tree->opcode = OP_X86_MUL_MEMBASE;
 656         mono_bblock_add_inst (s->cbb, tree);
 657 }
 658
 659 lreg: OP_LSHL (lreg, reg) "0" {
 660         MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
 661 }
 662
 663 lreg: OP_LSHL (lreg, OP_ICONST) "0" {
 664         MONO_EMIT_BIALU_IMM (s, tree, OP_LSHL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
 665 }
 666
 667 lreg: OP_LSHR (lreg, reg) "0" {
 668         MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
 669 }
 670
 671 lreg: OP_LSHR (lreg, OP_ICONST) "0" {
 672         MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
 673 }
 674
 675 lreg: OP_LSHR_UN (lreg, reg) "0" {
 676         MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
 677 }
 678
 679 lreg: OP_LSHR_UN (lreg, OP_ICONST) "0" {
 680         MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
 681 }
 682 %%