1 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG(cfg,basereg,offset,operand) do { \
3 MONO_INST_NEW ((cfg), inst, OP_X86_COMPARE_MEMBASE_REG); \
4 inst->inst_basereg = basereg; \
5 inst->inst_offset = offset; \
6 inst->sreg2 = operand; \
7 mono_bblock_add_inst (cfg->cbb, inst); \
10 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM(cfg,basereg,offset,operand) do { \
12 MONO_INST_NEW ((cfg), inst, OP_X86_COMPARE_MEMBASE_IMM); \
13 inst->inst_basereg = basereg; \
14 inst->inst_offset = offset; \
15 inst->inst_imm = operand; \
16 mono_bblock_add_inst (cfg->cbb, inst); \
19 /* override the arch independant versions with fast x86 versions */
21 #undef MONO_EMIT_BOUNDS_CHECK
22 #undef MONO_EMIT_BOUNDS_CHECK_IMM
24 #define MONO_EMIT_BOUNDS_CHECK(cfg, array_reg, array_type, array_length_field, index_reg) do { \
25 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
26 MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_reg); \
27 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
31 #define MONO_EMIT_BOUNDS_CHECK_IMM(cfg, array_reg, array_type, array_length_field, index_imm) do { \
32 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
33 MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_imm); \
34 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
41 # inssel-x86.brg: burg file for special x86 instructions
44 # Dietmar Maurer (dietmar@ximian.com)
45 # Paolo Molaro (lupus@ximian.com)
47 # (C) 2002 Ximian, Inc.
50 stmt: OP_START_HANDLER,
52 stmt: OP_ENDFILTER (reg) {
53 mono_bblock_add_inst (s->cbb, tree);
56 stmt: CEE_STIND_I8 (OP_REGVAR, lreg) {
57 /* this should only happen for methods returning a long */
58 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->right->reg1);
59 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->right->reg2);
62 reg: CEE_LDIND_I1 (OP_REGVAR) {
63 MONO_EMIT_UNALU (s, tree, OP_SEXT_I1, state->reg1, state->left->tree->dreg);}
65 reg: CEE_LDIND_I2 (OP_REGVAR) {
66 MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);}
68 lreg: OP_LNEG (lreg) "3" {
69 int tmpr = mono_regstate_next_int (s->rs);
70 MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg1, state->left->reg1);
71 MONO_EMIT_BIALU_IMM (s, tree, OP_ADC_IMM, tmpr, state->left->reg2, 0);
72 MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg2, tmpr);
75 freg: OP_LCONV_TO_R8 (lreg) {
76 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
77 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
78 tree->opcode = OP_X86_FP_LOAD_I8;
79 tree->inst_basereg = X86_ESP;
80 tree->inst_offset = 0;
81 tree->dreg = state->reg1;
82 mono_bblock_add_inst (s->cbb, tree);
83 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
86 freg: OP_LCONV_TO_R4 (lreg) {
87 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
88 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
89 tree->opcode = OP_X86_FP_LOAD_I8;
90 tree->inst_basereg = X86_ESP;
91 tree->inst_offset = 0;
92 tree->dreg = state->reg1;
93 mono_bblock_add_inst (s->cbb, tree);
94 /* change precision */
95 MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORER4_MEMBASE_REG, X86_ESP, 0, state->reg1);
96 MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADR4_MEMBASE, state->reg1, X86_ESP, 0);
97 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
100 freg: CEE_CONV_R_UN (reg) {
101 MONO_EMIT_NEW_BIALU_IMM (s, OP_X86_PUSH_IMM, -1, -1, 0);
102 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
103 tree->opcode = OP_X86_FP_LOAD_I8;
104 tree->inst_basereg = X86_ESP;
105 tree->inst_offset = 0;
106 tree->dreg = state->reg1;
107 mono_bblock_add_inst (s->cbb, tree);
108 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
111 cflags: OP_COMPARE (CEE_LDIND_REF (base), reg),
112 cflags: OP_COMPARE (CEE_LDIND_I (base), reg),
113 cflags: OP_COMPARE (CEE_LDIND_I4 (base), reg),
114 cflags: OP_COMPARE (CEE_LDIND_U4 (base), reg) {
115 tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
116 tree->inst_basereg = state->left->left->tree->inst_basereg;
117 tree->inst_offset = state->left->left->tree->inst_offset;
118 tree->sreg2 = state->right->reg1;
119 mono_bblock_add_inst (s->cbb, tree);
122 cflags: OP_COMPARE (CEE_LDIND_REF (base), CEE_LDIND_REF (OP_REGVAR)),
123 cflags: OP_COMPARE (CEE_LDIND_I (base), CEE_LDIND_REF (OP_REGVAR)),
124 cflags: OP_COMPARE (CEE_LDIND_I4 (base), CEE_LDIND_REF (OP_REGVAR)),
125 cflags: OP_COMPARE (CEE_LDIND_U4 (base), CEE_LDIND_REF (OP_REGVAR)) {
126 tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
127 tree->inst_basereg = state->left->left->tree->inst_basereg;
128 tree->inst_offset = state->left->left->tree->inst_offset;
129 tree->sreg2 = state->right->left->tree->dreg;
130 mono_bblock_add_inst (s->cbb, tree);
133 cflags: OP_COMPARE (CEE_LDIND_REF (base), OP_ICONST),
134 cflags: OP_COMPARE (CEE_LDIND_I (base), OP_ICONST),
135 cflags: OP_COMPARE (CEE_LDIND_I4 (base), OP_ICONST),
136 cflags: OP_COMPARE (CEE_LDIND_U4 (base), OP_ICONST) {
137 tree->opcode = OP_X86_COMPARE_MEMBASE_IMM;
138 tree->inst_basereg = state->left->left->tree->inst_basereg;
139 tree->inst_offset = state->left->left->tree->inst_offset;
140 tree->inst_imm = state->right->tree->inst_c0;
141 mono_bblock_add_inst (s->cbb, tree);
145 cflags: OP_COMPARE (CEE_LDIND_REF (OP_ICONST), OP_ICONST),
146 cflags: OP_COMPARE (CEE_LDIND_I (OP_ICONST), OP_ICONST),
147 cflags: OP_COMPARE (CEE_LDIND_I4 (OP_ICONST), OP_ICONST),
148 cflags: OP_COMPARE (CEE_LDIND_U4 (OP_ICONST), OP_ICONST) {
149 tree->opcode = OP_X86_COMPARE_MEM_IMM;
150 tree->inst_offset = state->left->left->tree->inst_c0;
151 tree->inst_imm = state->right->tree->inst_c0;
152 mono_bblock_add_inst (s->cbb, tree);
155 cflags: OP_COMPARE (reg, CEE_LDIND_REF (base)),
156 cflags: OP_COMPARE (reg, CEE_LDIND_I (base)),
157 cflags: OP_COMPARE (reg, CEE_LDIND_I4 (base)),
158 cflags: OP_COMPARE (reg, CEE_LDIND_U4 (base)) {
159 tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
160 tree->sreg2 = state->right->left->tree->inst_basereg;
161 tree->inst_offset = state->right->left->tree->inst_offset;
162 tree->sreg1 = state->left->reg1;
163 mono_bblock_add_inst (s->cbb, tree);
166 cflags: OP_COMPARE (CEE_LDIND_REF (OP_REGVAR), CEE_LDIND_REF (base)),
167 cflags: OP_COMPARE (CEE_LDIND_I (OP_REGVAR), CEE_LDIND_I (base)),
168 cflags: OP_COMPARE (CEE_LDIND_I4 (OP_REGVAR), CEE_LDIND_I4 (base)),
169 cflags: OP_COMPARE (CEE_LDIND_U4 (OP_REGVAR), CEE_LDIND_U4 (base)) {
170 tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
171 tree->sreg2 = state->right->left->tree->inst_basereg;
172 tree->inst_offset = state->right->left->tree->inst_offset;
173 tree->sreg1 = state->left->left->tree->dreg;
174 mono_bblock_add_inst (s->cbb, tree);
177 cflags : OP_CEQ (OP_COMPARE (OP_CEQ (cflags), OP_ICONST)) {
178 tree->opcode = OP_CNE;
179 tree->dreg = state->reg1;
180 mono_bblock_add_inst (s->cbb, tree);
182 MBCOND (!state->left->right->tree->inst_c0);
186 stmt: CEE_STIND_I1 (base, OP_CEQ (OP_COMPARE (OP_CEQ (cflags), OP_ICONST))) {
187 tree->opcode = OP_X86_SETNE_MEMBASE;
188 tree->inst_offset = state->left->tree->inst_offset;
189 tree->inst_basereg = state->left->tree->inst_basereg;
190 mono_bblock_add_inst (s->cbb, tree);
192 MBCOND (!state->right->left->right->tree->inst_c0);
196 stmt: CEE_STIND_I1 (base, OP_CEQ (cflags)) {
197 tree->opcode = OP_X86_SETEQ_MEMBASE;
198 tree->inst_offset = state->left->tree->inst_offset;
199 tree->inst_basereg = state->left->tree->inst_basereg;
200 mono_bblock_add_inst (s->cbb, tree);
203 reg: OP_LOCALLOC (OP_ICONST) {
204 if (tree->flags & MONO_INST_INIT) {
205 /* microcoded in mini-x86.c */
206 tree->sreg1 = mono_regstate_next_int (s->rs);
207 tree->dreg = state->reg1;
208 MONO_EMIT_NEW_ICONST (s, tree->sreg1, state->left->tree->inst_c0);
209 mono_bblock_add_inst (s->cbb, tree);
211 guint32 size = state->left->tree->inst_c0;
212 size = (size + (MONO_ARCH_LOCALLOC_ALIGNMENT - 1)) & ~ (MONO_ARCH_LOCALLOC_ALIGNMENT - 1);
213 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, size);
214 MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
218 reg: OP_LOCALLOC (reg) {
219 tree->sreg1 = state->left->tree->dreg;
220 tree->dreg = state->reg1;
221 mono_bblock_add_inst (s->cbb, tree);
224 stmt: OP_SETRET (reg) {
225 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->reg1);
228 stmt: OP_SETRET (lreg) {
229 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->left->reg2);
230 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->reg1);
233 stmt: OP_SETRET (CEE_LDIND_REF (OP_REGVAR)),
234 stmt: OP_SETRET (CEE_LDIND_I (OP_REGVAR)),
235 stmt: OP_SETRET (CEE_LDIND_I4 (OP_REGVAR)),
236 stmt: OP_SETRET (CEE_LDIND_U4 (OP_REGVAR)) {
237 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->left->tree->dreg);
240 stmt: OP_SETRET (freg) {
244 stmt: OP_SETRET (OP_ICONST) {
245 tree->opcode = OP_ICONST;
246 tree->inst_c0 = state->left->tree->inst_c0;
247 tree->dreg = X86_EAX;
248 mono_bblock_add_inst (s->cbb, tree);
251 stmt: OP_SETRET (i8con) {
252 MONO_EMIT_NEW_ICONST (s, X86_EAX, state->left->tree->inst_ls_word);
253 MONO_EMIT_NEW_ICONST (s, X86_EDX, state->left->tree->inst_ms_word);
256 stmt: OP_OUTARG (reg) {
257 tree->opcode = OP_X86_PUSH;
258 tree->sreg1 = state->left->reg1;
259 mono_bblock_add_inst (s->cbb, tree);
262 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)),
263 stmt: OP_OUTARG (CEE_LDIND_I4 (OP_REGVAR)),
264 stmt: OP_OUTARG (CEE_LDIND_U4 (OP_REGVAR)),
265 stmt: OP_OUTARG (CEE_LDIND_I (OP_REGVAR)) {
266 tree->opcode = OP_X86_PUSH;
267 tree->sreg1 = state->left->left->tree->dreg;
268 mono_bblock_add_inst (s->cbb, tree);
271 stmt: OP_OUTARG (OP_GOT_ENTRY (CEE_LDIND_I (OP_REGVAR), OP_PATCH_INFO)) {
273 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
274 ins->opcode = OP_X86_PUSH_GOT_ENTRY;
275 ins->inst_right = state->left->right->tree;
276 ins->inst_basereg = state->left->left->left->tree->dreg;
277 mono_bblock_add_inst (s->cbb, ins);
280 stmt: OP_OUTARG (lreg) {
281 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
282 tree->opcode = OP_X86_PUSH;
283 tree->sreg1 = state->left->reg1;
284 mono_bblock_add_inst (s->cbb, tree);
287 stmt: OP_OUTARG (CEE_LDIND_I8 (base)) {
289 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
290 ins->opcode = OP_X86_PUSH_MEMBASE;
291 ins->inst_basereg = state->left->left->tree->inst_basereg;
292 ins->inst_offset = state->left->left->tree->inst_offset + 4;
293 mono_bblock_add_inst (s->cbb, ins);
295 tree->opcode = OP_X86_PUSH_MEMBASE;
296 tree->inst_basereg = state->left->left->tree->inst_basereg;
297 tree->inst_offset = state->left->left->tree->inst_offset;
298 mono_bblock_add_inst (s->cbb, tree);
301 stmt: OP_OUTARG (OP_ICONST) {
302 tree->opcode = OP_X86_PUSH_IMM;
303 tree->inst_imm = state->left->tree->inst_c0;
304 mono_bblock_add_inst (s->cbb, tree);
307 stmt: OP_OUTARG (i8con) {
309 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
310 ins->opcode = OP_X86_PUSH_IMM;
311 ins->inst_imm = state->left->tree->inst_ms_word;
312 mono_bblock_add_inst (s->cbb, ins);
314 tree->opcode = OP_X86_PUSH_IMM;
315 tree->inst_imm = state->left->tree->inst_ls_word;
316 mono_bblock_add_inst (s->cbb, tree);
319 stmt: OP_OUTARG (CEE_LDIND_I4 (base)),
320 stmt: OP_OUTARG (CEE_LDIND_U4 (base)),
321 stmt: OP_OUTARG (CEE_LDIND_I (base)),
322 stmt: OP_OUTARG (CEE_LDIND_REF (base)) {
323 tree->opcode = OP_X86_PUSH_MEMBASE;
324 tree->inst_basereg = state->left->left->tree->inst_basereg;
325 tree->inst_offset = state->left->left->tree->inst_offset;
326 mono_bblock_add_inst (s->cbb, tree);
329 stmt: OP_OUTARG (freg) {
330 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
331 tree->opcode = OP_STORER8_MEMBASE_REG;
332 tree->sreg1 = state->left->reg1;
333 tree->inst_destbasereg = X86_ESP;
334 tree->inst_offset = 0;
335 mono_bblock_add_inst (s->cbb, tree);
338 stmt: OP_OUTARG_R4 (freg) {
339 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 4);
340 tree->opcode = OP_STORER4_MEMBASE_REG;
341 tree->sreg1 = state->left->reg1;
342 tree->inst_destbasereg = X86_ESP;
343 tree->inst_offset = 0;
344 mono_bblock_add_inst (s->cbb, tree);
347 stmt: OP_OUTARG_R8 (freg) {
348 int esp_displ = (tree->backend.arg_info >> 16) & 0xffff;
349 int esp_offset = tree->backend.arg_info & 0xffff;
351 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, esp_displ);
352 tree->opcode = OP_STORER8_MEMBASE_REG;
353 tree->sreg1 = state->left->reg1;
354 tree->inst_destbasereg = X86_ESP;
355 tree->inst_offset = esp_offset;
356 mono_bblock_add_inst (s->cbb, tree);
359 stmt: OP_OUTARG_VT (CEE_LDOBJ (base)) {
360 MonoInst *vt = state->left->left->tree;
361 //g_print ("vt size: %d at R%d + %d\n", tree->inst_imm, vt->inst_basereg, vt->inst_offset);
366 if (tree->inst_imm <= 4) {
367 tree->opcode = OP_X86_PUSH_MEMBASE;
368 tree->inst_basereg = vt->inst_basereg;
369 tree->inst_offset = vt->inst_offset;
370 mono_bblock_add_inst (s->cbb, tree);
371 } else if (tree->inst_imm <= 20) {
372 int sz = tree->inst_imm;
375 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, sz);
376 mini_emit_memcpy (s, X86_ESP, 0, vt->inst_basereg, vt->inst_offset, tree->inst_imm, 0);
378 tree->opcode = OP_X86_PUSH_OBJ;
379 tree->inst_basereg = vt->inst_basereg;
380 tree->inst_offset = vt->inst_offset;
381 mono_bblock_add_inst (s->cbb, tree);
385 stmt: OP_OUTARG_VT (OP_ICONST) {
386 tree->opcode = OP_X86_PUSH_IMM;
387 tree->inst_imm = state->left->tree->inst_c0;
388 mono_bblock_add_inst (s->cbb, tree);
391 stmt: OP_OUTARG_VT (reg) {
392 tree->opcode = OP_X86_PUSH;
393 tree->sreg1 = state->left->reg1;
394 mono_bblock_add_inst (s->cbb, tree);
397 stmt: OP_X86_OUTARG_ALIGN_STACK {
398 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, tree->inst_c0);
401 reg: OP_LDADDR (OP_REGOFFSET),
402 reg: CEE_LDOBJ (OP_REGOFFSET) {
403 if (state->left->tree->inst_offset) {
404 tree->opcode = OP_X86_LEA_MEMBASE;
405 tree->inst_imm = state->left->tree->inst_offset;
407 tree->opcode = OP_MOVE;
409 tree->sreg1 = state->left->tree->inst_basereg;
410 tree->dreg = state->reg1;
411 mono_bblock_add_inst (s->cbb, tree);
414 reg: CEE_LDELEMA (reg, reg) "15" {
415 guint32 size = mono_class_array_element_size (tree->klass);
417 MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoArray, max_length, state->right->reg1);
419 if (size == 1 || size == 2 || size == 4 || size == 8) {
420 static const int fast_log2 [] = { 1, 0, 1, -1, 2, -1, -1, -1, 3 };
421 tree->opcode = OP_X86_LEA;
422 tree->dreg = state->reg1;
423 tree->sreg1 = state->left->reg1;
424 tree->sreg2 = state->right->reg1;
425 tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
426 tree->backend.shift_amount = fast_log2 [size];
427 mono_bblock_add_inst (s->cbb, tree);
429 int mult_reg = mono_regstate_next_int (s->rs);
430 int add_reg = mono_regstate_next_int (s->rs);
431 MONO_EMIT_NEW_BIALU_IMM (s, OP_MUL_IMM, mult_reg, state->right->reg1, size);
432 MONO_EMIT_NEW_BIALU (s, CEE_ADD, add_reg, mult_reg, state->left->reg1);
433 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, state->reg1, add_reg, G_STRUCT_OFFSET (MonoArray, vector));
437 stmt: CEE_STIND_R8 (OP_REGVAR, freg) {
438 /* nothing to do: the value is already on the FP stack */
441 stmt: CEE_STIND_I4 (base, CEE_AND (CEE_LDIND_U4 (base), OP_ICONST)),
442 stmt: CEE_STIND_I4 (base, CEE_OR (CEE_LDIND_U4 (base), OP_ICONST)),
443 stmt: CEE_STIND_I4 (base, CEE_XOR (CEE_LDIND_U4 (base), OP_ICONST)),
444 stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_U4 (base), OP_ICONST)),
445 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_U4 (base), OP_ICONST)),
446 stmt: CEE_STIND_I4 (base, CEE_AND (CEE_LDIND_I4 (base), OP_ICONST)),
447 stmt: CEE_STIND_I4 (base, CEE_OR (CEE_LDIND_I4 (base), OP_ICONST)),
448 stmt: CEE_STIND_I4 (base, CEE_XOR (CEE_LDIND_I4 (base), OP_ICONST)),
449 stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)),
450 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
451 int con = state->right->right->tree->inst_c0;
452 MBTREE_TYPE *t1 = state->left->tree;
453 MBTREE_TYPE *t2 = state->right->left->left->tree;
454 int op = state->right->tree->opcode;
456 /* inst_basereg/offset can't be used for base
457 * operands in cost functions, since they are not set yet,
458 * so we catch all the cases and handle them here.
460 if (t1->inst_basereg == t2->inst_basereg && t1->inst_offset == t2->inst_offset) {
461 if (con == 1 && op == CEE_ADD) {
462 tree->opcode = OP_X86_INC_MEMBASE;
463 } else if (con == 1 && op == CEE_SUB) {
464 tree->opcode = OP_X86_DEC_MEMBASE;
466 tree->opcode = alu_reg_to_alu_membase_imm (op);
467 tree->inst_imm = con;
470 tree->inst_basereg = state->left->tree->inst_basereg;
471 tree->inst_offset = state->left->tree->inst_offset;
472 mono_bblock_add_inst (s->cbb, tree);
475 int loaded_reg = mono_regstate_next_int (s->rs);
476 int add_reg = mono_regstate_next_int (s->rs);
477 MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADI4_MEMBASE, loaded_reg, t2->inst_basereg, t2->inst_offset);
478 MONO_EMIT_NEW_BIALU_IMM (s, alu_reg_to_alu_imm (op), add_reg, loaded_reg, con);
479 MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STOREI4_MEMBASE_REG, t1->inst_basereg, t1->inst_offset, add_reg);
484 # this rules is incorrect, it needs to do an indirect inc (inc_membase)
485 #stmt: CEE_STIND_I4 (reg, CEE_ADD (reg, OP_ICONST)) {
486 # tree->opcode = OP_X86_INC_REG;
487 # tree->dreg = state->left->reg1;
488 # mono_bblock_add_inst (s->cbb, tree);
490 # MBState *s1 = state->left;
491 # MBState *s2 = state->right->left;
492 # int con = state->right->right->tree->inst_c0;
493 # MBCOND (con == 1 && s1->reg1 == s2->reg1);
497 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_SUB (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
498 int con = state->right->right->tree->inst_c0;
499 int dreg = state->left->tree->dreg;
500 int sreg = state->right->left->left->tree->dreg;
504 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
505 tree->opcode = OP_X86_DEC_REG;
506 tree->dreg = tree->sreg1 = dreg;
507 } else if (con == -1) {
509 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
510 tree->opcode = OP_X86_INC_REG;
511 tree->dreg = tree->sreg1 = dreg;
513 tree->opcode = OP_SUB_IMM;
514 tree->inst_imm = con;
518 mono_bblock_add_inst (s->cbb, tree);
521 stmt: CEE_STIND_I (OP_REGVAR, CEE_ADD (CEE_LDIND_I (OP_REGVAR), OP_ICONST)),
522 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_ADD (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
523 int con = state->right->right->tree->inst_c0;
524 int dreg = state->left->tree->dreg;
525 int sreg = state->right->left->left->tree->dreg;
529 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
530 tree->opcode = OP_X86_INC_REG;
531 tree->dreg = tree->sreg1 = dreg;
532 } else if (con == -1) {
534 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
535 tree->opcode = OP_X86_DEC_REG;
536 tree->dreg = tree->sreg1 = dreg;
538 tree->opcode = OP_ADD_IMM;
539 tree->inst_imm = con;
543 mono_bblock_add_inst (s->cbb, tree);
546 reg: CEE_LDIND_I2 (OP_REGVAR) {
547 MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);
551 stmt: CEE_STIND_I4 (OP_REGVAR, OP_ICONST),
552 stmt: CEE_STIND_I2 (OP_REGVAR, OP_ICONST),
553 stmt: CEE_STIND_I1 (OP_REGVAR, OP_ICONST),
554 stmt: CEE_STIND_REF (OP_REGVAR, OP_ICONST),
555 stmt: CEE_STIND_I (OP_REGVAR, OP_ICONST) {
556 int r = state->left->tree->dreg;
557 MONO_EMIT_BIALU (s, tree, CEE_XOR, r, r, r);
559 MBCOND (!state->right->tree->inst_c0);
564 # on x86, fp compare overwrites EAX, so we must
565 # either improve the local register allocator or
566 # emit coarse opcodes which saves EAX for us.
568 reg: OP_CEQ (OP_COMPARE (freg, freg)) {
569 MONO_EMIT_BIALU (s, tree, OP_FCEQ, state->reg1, state->left->left->reg1,
570 state->left->right->reg1);
573 reg: OP_CLT (OP_COMPARE (freg, freg)) {
574 MONO_EMIT_BIALU (s, tree, OP_FCLT, state->reg1, state->left->left->reg1,
575 state->left->right->reg1);
578 reg: OP_CLT_UN (OP_COMPARE (freg, freg)) {
579 MONO_EMIT_BIALU (s, tree, OP_FCLT_UN, state->reg1, state->left->left->reg1,
580 state->left->right->reg1);
583 reg: OP_CGT (OP_COMPARE (freg, freg)) {
584 MONO_EMIT_BIALU (s, tree, OP_FCGT, state->reg1, state->left->left->reg1,
585 state->left->right->reg1);
588 reg: OP_CGT_UN (OP_COMPARE (freg, freg)) {
589 MONO_EMIT_BIALU (s, tree, OP_FCGT_UN, state->reg1, state->left->left->reg1,
590 state->left->right->reg1);
593 # fpcflags overwrites EAX, but this does not matter for statements
594 # because we are the last operation in the tree.
596 stmt: CEE_BNE_UN (fpcflags) {
597 tree->opcode = OP_FBNE_UN;
598 mono_bblock_add_inst (s->cbb, tree);
601 stmt: CEE_BEQ (fpcflags) {
602 tree->opcode = OP_FBEQ;
603 mono_bblock_add_inst (s->cbb, tree);
606 stmt: CEE_BLT (fpcflags) {
607 tree->opcode = OP_FBLT;
608 mono_bblock_add_inst (s->cbb, tree);
611 stmt: CEE_BLT_UN (fpcflags) {
612 tree->opcode = OP_FBLT_UN;
613 mono_bblock_add_inst (s->cbb, tree);
616 stmt: CEE_BGT (fpcflags) {
617 tree->opcode = OP_FBGT;
618 mono_bblock_add_inst (s->cbb, tree);
621 stmt: CEE_BGT_UN (fpcflags) {
622 tree->opcode = OP_FBGT_UN;
623 mono_bblock_add_inst (s->cbb, tree);
626 stmt: CEE_BGE (fpcflags) {
627 tree->opcode = OP_FBGE;
628 mono_bblock_add_inst (s->cbb, tree);
631 stmt: CEE_BGE_UN (fpcflags) {
632 tree->opcode = OP_FBGE_UN;
633 mono_bblock_add_inst (s->cbb, tree);
636 stmt: CEE_BLE (fpcflags) {
637 tree->opcode = OP_FBLE;
638 mono_bblock_add_inst (s->cbb, tree);
641 stmt: CEE_BLE_UN (fpcflags) {
642 tree->opcode = OP_FBLE_UN;
643 mono_bblock_add_inst (s->cbb, tree);
646 stmt: CEE_POP (freg) "0" {
647 /* we need to pop the value from the x86 FP stack */
648 MONO_EMIT_UNALU (s, tree, OP_X86_FPOP, -1, state->left->reg1);
651 # override the rules in inssel-float.brg that work for machines with FP registers
653 freg: OP_FCONV_TO_R8 (freg) "0" {
657 freg: OP_FCONV_TO_R4 (freg) "0" {
658 /* fixme: nothing to do ??*/
661 reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) {
662 MonoInst *base = state->right->left->tree;
664 tree->dreg = state->reg1;
665 tree->sreg1 = state->left->reg1;
666 tree->sreg2 = base->inst_basereg;
667 tree->inst_offset = base->inst_offset;
668 tree->opcode = OP_X86_ADD_REG_MEMBASE;
669 mono_bblock_add_inst (s->cbb, tree);
672 reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) {
673 MonoInst *base = state->right->left->tree;
675 tree->dreg = state->reg1;
676 tree->sreg1 = state->left->reg1;
677 tree->sreg2 = base->inst_basereg;
678 tree->inst_offset = base->inst_offset;
679 tree->opcode = OP_X86_SUB_REG_MEMBASE;
680 mono_bblock_add_inst (s->cbb, tree);
683 reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) {
684 MonoInst *base = state->right->left->tree;
686 tree->dreg = state->reg1;
687 tree->sreg1 = state->left->reg1;
688 tree->sreg2 = base->inst_basereg;
689 tree->inst_offset = base->inst_offset;
690 tree->opcode = OP_X86_MUL_REG_MEMBASE;
691 mono_bblock_add_inst (s->cbb, tree);
694 reg: OP_IMIN (reg, reg),
695 reg: OP_IMIN_UN (reg, reg),
696 reg: OP_IMAX (reg, reg),
697 reg: OP_IMAX_UN (reg, reg) {
698 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
701 lreg: OP_LSHL (lreg, reg) "0" {
702 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
705 lreg: OP_LSHL (lreg, OP_ICONST) "0" {
706 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
709 lreg: OP_LSHR (lreg, reg) "0" {
710 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
713 lreg: OP_LSHR (lreg, OP_ICONST) "0" {
714 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
717 lreg: OP_LSHR_UN (lreg, reg) "0" {
718 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
721 lreg: OP_LSHR_UN (lreg, OP_ICONST) "0" {
722 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
725 reg: OP_ATOMIC_ADD_NEW_I4 (base, reg),
726 reg: OP_ATOMIC_ADD_I4 (base, reg),
727 reg: OP_ATOMIC_EXCHANGE_I4 (base, reg),
728 reg: OP_ATOMIC_CAS_IMM_I4 (base, reg) {
729 tree->opcode = tree->opcode;
730 tree->dreg = state->reg1;
731 tree->sreg2 = state->right->reg1;
732 tree->inst_basereg = state->left->tree->inst_basereg;
733 tree->inst_offset = state->left->tree->inst_offset;
735 mono_bblock_add_inst (s->cbb, tree);
738 # Optimized call instructions
739 reg: OP_CALL_REG (CEE_LDIND_I (base)),
740 freg: OP_FCALL_REG (CEE_LDIND_I (base)) {
741 tree->opcode = call_reg_to_call_membase (tree->opcode);
742 tree->inst_basereg = state->left->left->tree->inst_basereg;
743 tree->inst_offset = state->left->left->tree->inst_offset;
744 tree->dreg = state->reg1;
745 mono_bblock_add_inst (s->cbb, tree);
748 lreg: OP_LCALL_REG (CEE_LDIND_I (base)) {
749 tree->opcode = call_reg_to_call_membase (tree->opcode);
750 tree->inst_basereg = state->left->left->tree->inst_basereg;
751 tree->inst_offset = state->left->left->tree->inst_offset;
752 tree->dreg = state->reg1;
753 mono_bblock_add_inst (s->cbb, tree);
756 stmt: OP_VOIDCALL_REG (CEE_LDIND_I (base)) {
757 tree->opcode = call_reg_to_call_membase (tree->opcode);
758 tree->inst_basereg = state->left->left->tree->inst_basereg;
759 tree->inst_offset = state->left->left->tree->inst_offset;
760 mono_bblock_add_inst (s->cbb, tree);
763 stmt: OP_VCALL_REG (CEE_LDIND_I (base), reg) {
764 mono_arch_emit_this_vret_args (s, (MonoCallInst*)tree, -1, -1, state->right->reg1);
766 tree->opcode = call_reg_to_call_membase (tree->opcode);
767 tree->inst_basereg = state->left->left->tree->inst_basereg;
768 tree->inst_offset = state->left->left->tree->inst_offset;
769 tree->dreg = state->reg1;
770 mono_bblock_add_inst (s->cbb, tree);
773 # Optimized ldind(reg) rules
774 reg: CEE_LDIND_REF (OP_REGVAR),
775 reg: CEE_LDIND_I (OP_REGVAR),
776 reg: CEE_LDIND_I4 (OP_REGVAR),
777 reg: CEE_LDIND_U4 (OP_REGVAR) "0" {
778 state->reg1 = state->left->tree->dreg;
779 tree->dreg = state->reg1;
782 reg: OP_STR_CHAR_ADDR (reg, reg) "2" {
784 * The corlib functions check for oob already.
785 * MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoString, length, state->right->reg1);
787 tree->opcode = OP_X86_LEA;
788 tree->dreg = state->reg1;
789 tree->sreg1 = state->left->reg1;
790 tree->sreg2 = state->right->reg1;
791 tree->inst_imm = G_STRUCT_OFFSET (MonoString, chars);
792 tree->backend.shift_amount = 1; /* shift by two */
793 mono_bblock_add_inst (s->cbb, tree);
799 alu_reg_to_alu_imm (int op)
813 g_assert_not_reached ();
819 alu_reg_to_alu_membase_imm (int op)
823 return OP_X86_ADD_MEMBASE_IMM;
825 return OP_X86_SUB_MEMBASE_IMM;
827 return OP_X86_AND_MEMBASE_IMM;
829 return OP_X86_OR_MEMBASE_IMM;
831 return OP_X86_XOR_MEMBASE_IMM;
833 g_assert_not_reached ();
839 call_reg_to_call_membase (int opcode)
843 return OP_CALL_MEMBASE;
845 return OP_FCALL_MEMBASE;
847 return OP_VCALL_MEMBASE;
849 return OP_LCALL_MEMBASE;
850 case OP_VOIDCALL_REG:
851 return OP_VOIDCALL_MEMBASE;
853 g_assert_not_reached ();