1 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG(cfg,basereg,offset,operand) do { \
3 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
4 inst->opcode = OP_X86_COMPARE_MEMBASE_REG; \
5 inst->inst_basereg = basereg; \
6 inst->inst_offset = offset; \
7 inst->sreg2 = operand; \
8 mono_bblock_add_inst (cfg->cbb, inst); \
11 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM(cfg,basereg,offset,operand) do { \
13 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
14 inst->opcode = OP_X86_COMPARE_MEMBASE_IMM; \
15 inst->inst_basereg = basereg; \
16 inst->inst_offset = offset; \
17 inst->inst_imm = operand; \
18 mono_bblock_add_inst (cfg->cbb, inst); \
21 /* override the arch independant versions with fast x86 versions */
23 #undef MONO_EMIT_BOUNDS_CHECK
24 #undef MONO_EMIT_BOUNDS_CHECK_IMM
26 #define MONO_EMIT_BOUNDS_CHECK(cfg, array_reg, array_type, array_length_field, index_reg) do { \
27 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
28 MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_reg); \
29 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
33 #define MONO_EMIT_BOUNDS_CHECK_IMM(cfg, array_reg, array_type, array_length_field, index_imm) do { \
34 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
35 MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_imm); \
36 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
44 # inssel-x86.brg: burg file for special x86 instructions
47 # Dietmar Maurer (dietmar@ximian.com)
48 # Paolo Molaro (lupus@ximian.com)
50 # (C) 2002 Ximian, Inc.
53 stmt: OP_START_HANDLER {
54 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
55 MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP);
58 stmt: CEE_ENDFINALLY {
59 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
60 MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
61 tree->opcode = CEE_RET;
62 mono_bblock_add_inst (s->cbb, tree);
65 stmt: OP_ENDFILTER (reg) {
66 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
67 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->left->reg1);
68 MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
69 tree->opcode = CEE_RET;
70 mono_bblock_add_inst (s->cbb, tree);
73 stmt: CEE_STIND_I8 (OP_REGVAR, lreg) {
74 /* this should only happen for methods returning a long */
75 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->right->reg1);
76 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->right->reg2);
79 lreg: OP_LNEG (lreg) "3" {
80 int tmpr = mono_regstate_next_int (s->rs);
81 MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg1, state->left->reg1);
82 MONO_EMIT_BIALU_IMM (s, tree, OP_ADC_IMM, tmpr, state->left->reg2, 0);
83 MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg2, tmpr);
86 freg: OP_LCONV_TO_R8 (lreg) {
87 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
88 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
89 tree->opcode = OP_X86_FP_LOAD_I8;
90 tree->inst_basereg = X86_ESP;
91 tree->inst_offset = 0;
92 mono_bblock_add_inst (s->cbb, tree);
93 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
96 freg: OP_LCONV_TO_R4 (lreg) {
97 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
98 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
99 tree->opcode = OP_X86_FP_LOAD_I8;
100 tree->inst_basereg = X86_ESP;
101 tree->inst_offset = 0;
102 mono_bblock_add_inst (s->cbb, tree);
103 /* change precision */
104 MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORER4_MEMBASE_REG, X86_ESP, 0, state->reg1);
105 MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADR4_MEMBASE, state->reg1, X86_ESP, 0);
106 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
109 freg: CEE_CONV_R_UN (reg) {
110 MONO_EMIT_NEW_BIALU_IMM (s, OP_X86_PUSH_IMM, -1, -1, 0);
111 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
112 tree->opcode = OP_X86_FP_LOAD_I8;
113 tree->inst_basereg = X86_ESP;
114 tree->inst_offset = 0;
115 mono_bblock_add_inst (s->cbb, tree);
116 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
119 cflags: OP_COMPARE (CEE_LDIND_I4 (base), reg) {
120 tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
121 tree->inst_basereg = state->left->left->tree->inst_basereg;
122 tree->inst_offset = state->left->left->tree->inst_offset;
123 tree->sreg2 = state->right->reg1;
124 mono_bblock_add_inst (s->cbb, tree);
127 cflags: OP_COMPARE (CEE_LDIND_I4 (base), OP_ICONST) {
128 tree->opcode = OP_X86_COMPARE_MEMBASE_IMM;
129 tree->inst_basereg = state->left->left->tree->inst_basereg;
130 tree->inst_offset = state->left->left->tree->inst_offset;
131 tree->inst_imm = state->right->tree->inst_c0;
132 mono_bblock_add_inst (s->cbb, tree);
135 cflags: OP_COMPARE (reg, CEE_LDIND_I4 (base)) {
136 tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
137 tree->sreg2 = state->right->left->tree->inst_basereg;
138 tree->inst_offset = state->right->left->tree->inst_offset;
139 tree->sreg1 = state->left->reg1;
140 mono_bblock_add_inst (s->cbb, tree);
143 stmt: CEE_STIND_I1 (base, OP_CEQ (cflags)) {
144 tree->opcode = OP_X86_SETEQ_MEMBASE;
145 tree->inst_offset = state->left->tree->inst_offset;
146 tree->inst_basereg = state->left->tree->inst_basereg;
147 mono_bblock_add_inst (s->cbb, tree);
150 reg: OP_LOCALLOC (OP_ICONST) {
151 if (tree->flags & MONO_INST_INIT) {
152 /* microcoded in mini-x86.c */
153 tree->sreg1 = mono_regstate_next_int (s->rs);
154 MONO_EMIT_NEW_ICONST (s, tree->sreg1, state->left->tree->inst_c0);
155 mono_bblock_add_inst (s->cbb, tree);
157 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, state->left->tree->inst_c0);
158 MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
162 reg: OP_LOCALLOC (reg) {
163 tree->sreg1 = state->left->tree->dreg;
164 mono_bblock_add_inst (s->cbb, tree);
167 stmt: OP_SETRET (reg) {
168 tree->opcode = OP_MOVE;
169 tree->sreg1 = state->left->reg1;
170 tree->dreg = X86_EAX;
171 mono_bblock_add_inst (s->cbb, tree);
174 stmt: OP_SETRET (lreg) {
175 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->left->reg2);
176 tree->opcode = OP_MOVE;
177 tree->sreg1 = state->left->reg1;
178 tree->dreg = X86_EAX;
179 mono_bblock_add_inst (s->cbb, tree);
182 stmt: OP_SETRET (CEE_LDIND_REF (OP_REGVAR)) {
183 tree->opcode = OP_MOVE;
184 tree->sreg1 = state->left->left->tree->dreg;
185 tree->dreg = X86_EAX;
186 mono_bblock_add_inst (s->cbb, tree);
189 stmt: OP_SETRET (freg) {
193 stmt: OP_SETRET (OP_ICONST) {
194 tree->opcode = OP_ICONST;
195 tree->inst_c0 = state->left->tree->inst_c0;
196 tree->dreg = X86_EAX;
197 mono_bblock_add_inst (s->cbb, tree);
200 stmt: OP_OUTARG (reg) {
201 tree->opcode = OP_X86_PUSH;
202 tree->sreg1 = state->left->reg1;
203 mono_bblock_add_inst (s->cbb, tree);
206 # we need to reduce this code duplication with some burg syntax extension
207 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)) {
208 tree->opcode = OP_X86_PUSH;
209 tree->sreg1 = state->left->left->tree->dreg;
210 mono_bblock_add_inst (s->cbb, tree);
213 stmt: OP_OUTARG (CEE_LDIND_I4 (OP_REGVAR)) {
214 tree->opcode = OP_X86_PUSH;
215 tree->sreg1 = state->left->left->tree->dreg;
216 mono_bblock_add_inst (s->cbb, tree);
219 stmt: OP_OUTARG (CEE_LDIND_U4 (OP_REGVAR)) {
220 tree->opcode = OP_X86_PUSH;
221 tree->sreg1 = state->left->left->tree->dreg;
222 mono_bblock_add_inst (s->cbb, tree);
225 stmt: OP_OUTARG (CEE_LDIND_I (OP_REGVAR)) {
226 tree->opcode = OP_X86_PUSH;
227 tree->sreg1 = state->left->left->tree->dreg;
228 mono_bblock_add_inst (s->cbb, tree);
231 stmt: OP_OUTARG (lreg) {
232 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
233 tree->opcode = OP_X86_PUSH;
234 tree->sreg1 = state->left->reg1;
235 mono_bblock_add_inst (s->cbb, tree);
238 stmt: OP_OUTARG (CEE_LDIND_I8 (base)) {
240 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
241 ins->opcode = OP_X86_PUSH_MEMBASE;
242 ins->inst_basereg = state->left->left->tree->inst_basereg;
243 ins->inst_offset = state->left->left->tree->inst_offset + 4;
244 mono_bblock_add_inst (s->cbb, ins);
246 tree->opcode = OP_X86_PUSH_MEMBASE;
247 tree->inst_basereg = state->left->left->tree->inst_basereg;
248 tree->inst_offset = state->left->left->tree->inst_offset;
249 mono_bblock_add_inst (s->cbb, tree);
252 stmt: OP_OUTARG (OP_ICONST) {
253 tree->opcode = OP_X86_PUSH_IMM;
254 tree->inst_imm = state->left->tree->inst_c0;
255 mono_bblock_add_inst (s->cbb, tree);
258 stmt: OP_OUTARG (CEE_LDIND_I4 (base)) {
259 tree->opcode = OP_X86_PUSH_MEMBASE;
260 tree->inst_basereg = state->left->left->tree->inst_basereg;
261 tree->inst_offset = state->left->left->tree->inst_offset;
262 mono_bblock_add_inst (s->cbb, tree);
265 stmt: OP_OUTARG (CEE_LDIND_U4 (base)) {
266 tree->opcode = OP_X86_PUSH_MEMBASE;
267 tree->inst_basereg = state->left->left->tree->inst_basereg;
268 tree->inst_offset = state->left->left->tree->inst_offset;
269 mono_bblock_add_inst (s->cbb, tree);
272 stmt: OP_OUTARG (CEE_LDIND_I (base)) {
273 tree->opcode = OP_X86_PUSH_MEMBASE;
274 tree->inst_basereg = state->left->left->tree->inst_basereg;
275 tree->inst_offset = state->left->left->tree->inst_offset;
276 mono_bblock_add_inst (s->cbb, tree);
279 stmt: OP_OUTARG (CEE_LDIND_REF (base)) {
280 tree->opcode = OP_X86_PUSH_MEMBASE;
281 tree->inst_basereg = state->left->left->tree->inst_basereg;
282 tree->inst_offset = state->left->left->tree->inst_offset;
283 mono_bblock_add_inst (s->cbb, tree);
286 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)) {
287 tree->opcode = OP_X86_PUSH;
288 tree->sreg1 = state->left->left->tree->dreg;
289 mono_bblock_add_inst (s->cbb, tree);
292 stmt: OP_OUTARG (CEE_LDOBJ (reg)) {
293 tree->opcode = OP_X86_PUSH;
294 tree->sreg1 = state->left->reg1;
295 mono_bblock_add_inst (s->cbb, tree);
298 stmt: OP_OUTARG (freg) {
299 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
300 tree->opcode = OP_STORER8_MEMBASE_REG;
301 tree->sreg1 = state->left->reg1;
302 tree->inst_destbasereg = X86_ESP;
303 tree->inst_offset = 0;
304 mono_bblock_add_inst (s->cbb, tree);
307 stmt: OP_OUTARG_R4 (freg) {
308 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 4);
309 tree->opcode = OP_STORER4_MEMBASE_REG;
310 tree->sreg1 = state->left->reg1;
311 tree->inst_destbasereg = X86_ESP;
312 tree->inst_offset = 0;
313 mono_bblock_add_inst (s->cbb, tree);
316 stmt: OP_OUTARG_R8 (freg) {
317 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
318 tree->opcode = OP_STORER8_MEMBASE_REG;
319 tree->sreg1 = state->left->reg1;
320 tree->inst_destbasereg = X86_ESP;
321 tree->inst_offset = 0;
322 mono_bblock_add_inst (s->cbb, tree);
325 stmt: OP_OUTARG_VT (CEE_LDOBJ (base)) {
326 MonoInst *vt = state->left->left->tree;
327 //g_print ("vt size: %d at R%d + %d\n", tree->inst_imm, vt->inst_basereg, vt->inst_offset);
332 if (tree->inst_imm <= 4) {
333 tree->opcode = OP_X86_PUSH_MEMBASE;
334 tree->inst_basereg = vt->inst_basereg;
335 tree->inst_offset = vt->inst_offset;
336 mono_bblock_add_inst (s->cbb, tree);
337 } else if (tree->inst_imm <= 20) {
338 int sz = tree->inst_imm;
341 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, sz);
342 mini_emit_memcpy (s, X86_ESP, 0, vt->inst_basereg, vt->inst_offset, tree->inst_imm, 0);
344 tree->opcode = OP_X86_PUSH_OBJ;
345 tree->inst_basereg = vt->inst_basereg;
346 tree->inst_offset = vt->inst_offset;
347 mono_bblock_add_inst (s->cbb, tree);
351 stmt: OP_OUTARG_VT (OP_ICONST) {
352 tree->opcode = OP_X86_PUSH_IMM;
353 tree->inst_imm = state->left->tree->inst_c0;
354 mono_bblock_add_inst (s->cbb, tree);
357 stmt: OP_OUTARG_VT (reg) {
358 tree->opcode = OP_X86_PUSH;
359 tree->sreg1 = state->left->tree->dreg;
360 mono_bblock_add_inst (s->cbb, tree);
363 reg: OP_LDADDR (OP_REGOFFSET) "1" {
364 if (state->left->tree->inst_offset) {
365 tree->opcode = OP_X86_LEA_MEMBASE;
366 tree->sreg1 = state->left->tree->inst_basereg;
367 tree->inst_imm = state->left->tree->inst_offset;
368 tree->dreg = state->reg1;
370 tree->opcode = OP_MOVE;
371 tree->sreg1 = state->left->tree->inst_basereg;
372 tree->dreg = state->reg1;
374 mono_bblock_add_inst (s->cbb, tree);
377 reg: CEE_LDOBJ (OP_REGOFFSET) "1" {
378 if (state->left->tree->inst_offset) {
379 tree->opcode = OP_X86_LEA_MEMBASE;
380 tree->sreg1 = state->left->tree->inst_basereg;
381 tree->inst_imm = state->left->tree->inst_offset;
382 tree->dreg = state->reg1;
384 tree->opcode = OP_MOVE;
385 tree->sreg1 = state->left->tree->inst_basereg;
386 tree->dreg = state->reg1;
388 mono_bblock_add_inst (s->cbb, tree);
391 reg: CEE_LDELEMA (reg, reg) "15" {
392 guint32 size = mono_class_array_element_size (tree->klass);
394 MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoArray, max_length, state->right->reg1);
396 if (size == 1 || size == 2 || size == 4 || size == 8) {
397 static const int fast_log2 [] = { 1, 0, 1, -1, 2, -1, -1, -1, 3 };
398 tree->opcode = OP_X86_LEA;
399 tree->dreg = state->reg1;
400 tree->sreg1 = state->left->reg1;
401 tree->sreg2 = state->right->reg1;
402 tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
403 tree->unused = fast_log2 [size];
404 mono_bblock_add_inst (s->cbb, tree);
406 int mult_reg = mono_regstate_next_int (s->rs);
407 int add_reg = mono_regstate_next_int (s->rs);
408 MONO_EMIT_NEW_BIALU_IMM (s, OP_MUL_IMM, mult_reg, state->right->reg1, size);
409 MONO_EMIT_NEW_BIALU (s, CEE_ADD, add_reg, mult_reg, state->left->reg1);
410 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, state->reg1, add_reg, G_STRUCT_OFFSET (MonoArray, vector));
414 stmt: CEE_STIND_R8 (OP_REGVAR, freg) {
415 /* nothing to do: the value is already on the FP stack */
418 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
419 int con = state->right->right->tree->inst_c0;
422 tree->opcode = OP_X86_INC_MEMBASE;
424 tree->opcode = OP_X86_ADD_MEMBASE_IMM;
425 tree->inst_imm = con;
428 tree->inst_basereg = state->left->tree->inst_basereg;
429 tree->inst_offset = state->left->tree->inst_offset;
430 mono_bblock_add_inst (s->cbb, tree);
432 MBTREE_TYPE *t1 = state->right->left->left->tree;
433 MBTREE_TYPE *t2 = state->left->tree;
434 MBCOND (t1->inst_basereg == t2->inst_basereg &&
435 t1->inst_offset == t2->inst_offset);
439 stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)) {
440 int con = state->right->right->tree->inst_c0;
443 tree->opcode = OP_X86_DEC_MEMBASE;
445 tree->opcode = OP_X86_SUB_MEMBASE_IMM;
446 tree->inst_imm = con;
449 tree->inst_basereg = state->left->tree->inst_basereg;
450 tree->inst_offset = state->left->tree->inst_offset;
451 mono_bblock_add_inst (s->cbb, tree);
453 MBTREE_TYPE *t1 = state->right->left->left->tree;
454 MBTREE_TYPE *t2 = state->left->tree;
455 MBCOND (t1->inst_basereg == t2->inst_basereg &&
456 t1->inst_offset == t2->inst_offset);
461 # this rules is incorrect, it needs to do an indirect inc (inc_membase)
462 #stmt: CEE_STIND_I4 (reg, CEE_ADD (reg, OP_ICONST)) {
463 # tree->opcode = OP_X86_INC_REG;
464 # tree->dreg = state->left->reg1;
465 # mono_bblock_add_inst (s->cbb, tree);
467 # MBState *s1 = state->left;
468 # MBState *s2 = state->right->left;
469 # int con = state->right->right->tree->inst_c0;
470 # MBCOND (con == 1 && s1->reg1 == s2->reg1);
474 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_SUB (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
475 int con = state->right->right->tree->inst_c0;
476 int dreg = state->left->tree->dreg;
477 int sreg = state->right->left->left->tree->dreg;
481 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
482 tree->opcode = OP_X86_DEC_REG;
483 tree->dreg = tree->sreg1 = dreg;
484 } else if (con == -1) {
486 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
487 tree->opcode = OP_X86_INC_REG;
488 tree->dreg = tree->sreg1 = dreg;
490 tree->opcode = OP_SUB_IMM;
491 tree->inst_imm = con;
495 mono_bblock_add_inst (s->cbb, tree);
498 stmt: CEE_STIND_I (OP_REGVAR, CEE_ADD (CEE_LDIND_I (OP_REGVAR), OP_ICONST)),
499 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_ADD (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
500 int con = state->right->right->tree->inst_c0;
501 int dreg = state->left->tree->dreg;
502 int sreg = state->right->left->left->tree->dreg;
506 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
507 tree->opcode = OP_X86_INC_REG;
508 tree->dreg = tree->sreg1 = dreg;
509 } else if (con == -1) {
511 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
512 tree->opcode = OP_X86_DEC_REG;
513 tree->dreg = tree->sreg1 = dreg;
515 tree->opcode = OP_ADD_IMM;
516 tree->inst_imm = con;
520 mono_bblock_add_inst (s->cbb, tree);
523 reg: CEE_LDIND_I2 (OP_REGVAR) {
524 MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);
527 # on x86, fp compare overwrites EAX, so we must
528 # either improve the local register allocator or
529 # emit coarse opcodes which saves EAX for us.
531 reg: OP_CEQ (OP_COMPARE (freg, freg)) {
532 MONO_EMIT_BIALU (s, tree, OP_FCEQ, state->reg1, state->left->left->reg1,
533 state->left->right->reg1);
536 reg: OP_CLT (OP_COMPARE (freg, freg)) {
537 MONO_EMIT_BIALU (s, tree, OP_FCLT, state->reg1, state->left->left->reg1,
538 state->left->right->reg1);
541 reg: OP_CLT_UN (OP_COMPARE (freg, freg)) {
542 MONO_EMIT_BIALU (s, tree, OP_FCLT_UN, state->reg1, state->left->left->reg1,
543 state->left->right->reg1);
546 reg: OP_CGT (OP_COMPARE (freg, freg)) {
547 MONO_EMIT_BIALU (s, tree, OP_FCGT, state->reg1, state->left->left->reg1,
548 state->left->right->reg1);
551 reg: OP_CGT_UN (OP_COMPARE (freg, freg)) {
552 MONO_EMIT_BIALU (s, tree, OP_FCGT_UN, state->reg1, state->left->left->reg1,
553 state->left->right->reg1);
556 # fpcflags overwrites EAX, but this does not matter for statements
557 # because we are the last operation in the tree.
559 stmt: CEE_BNE_UN (fpcflags) {
560 tree->opcode = OP_FBNE_UN;
561 mono_bblock_add_inst (s->cbb, tree);
564 stmt: CEE_BEQ (fpcflags) {
565 tree->opcode = OP_FBEQ;
566 mono_bblock_add_inst (s->cbb, tree);
569 stmt: CEE_BLT (fpcflags) {
570 tree->opcode = OP_FBLT;
571 mono_bblock_add_inst (s->cbb, tree);
574 stmt: CEE_BLT_UN (fpcflags) {
575 tree->opcode = OP_FBLT_UN;
576 mono_bblock_add_inst (s->cbb, tree);
579 stmt: CEE_BGT (fpcflags) {
580 tree->opcode = OP_FBGT;
581 mono_bblock_add_inst (s->cbb, tree);
584 stmt: CEE_BGT_UN (fpcflags) {
585 tree->opcode = OP_FBGT_UN;
586 mono_bblock_add_inst (s->cbb, tree);
589 stmt: CEE_BGE (fpcflags) {
590 tree->opcode = OP_FBGE;
591 mono_bblock_add_inst (s->cbb, tree);
594 stmt: CEE_BGE_UN (fpcflags) {
595 tree->opcode = OP_FBGE_UN;
596 mono_bblock_add_inst (s->cbb, tree);
599 stmt: CEE_BLE (fpcflags) {
600 tree->opcode = OP_FBLE;
601 mono_bblock_add_inst (s->cbb, tree);
604 stmt: CEE_BLE_UN (fpcflags) {
605 tree->opcode = OP_FBLE_UN;
606 mono_bblock_add_inst (s->cbb, tree);
609 stmt: CEE_POP (freg) "0" {
610 /* we need to pop the value from the x86 FP stack */
611 MONO_EMIT_UNALU (s, tree, OP_X86_FPOP, -1, state->left->reg1);
614 # override the rules in inssel-float.brg that work for machines with FP registers
616 freg: OP_FCONV_TO_R8 (freg) "0" {
620 freg: OP_FCONV_TO_R4 (freg) "0" {
621 /* fixme: nothing to do ??*/
624 reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) {
625 MonoInst *base = state->right->left->tree;
627 tree->dreg = state->reg1;
628 tree->sreg1 = state->left->reg1;
629 tree->sreg2 = base->inst_basereg;
630 tree->inst_offset = base->inst_offset;
631 tree->opcode = OP_X86_ADD_MEMBASE;
632 mono_bblock_add_inst (s->cbb, tree);
635 reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) {
636 MonoInst *base = state->right->left->tree;
638 tree->dreg = state->reg1;
639 tree->sreg1 = state->left->reg1;
640 tree->sreg2 = base->inst_basereg;
641 tree->inst_offset = base->inst_offset;
642 tree->opcode = OP_X86_SUB_MEMBASE;
643 mono_bblock_add_inst (s->cbb, tree);
646 reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) {
647 MonoInst *base = state->right->left->tree;
649 tree->dreg = state->reg1;
650 tree->sreg1 = state->left->reg1;
651 tree->sreg2 = base->inst_basereg;
652 tree->inst_offset = base->inst_offset;
653 tree->opcode = OP_X86_MUL_MEMBASE;
654 mono_bblock_add_inst (s->cbb, tree);
657 lreg: OP_LSHL (lreg, reg) "0" {
658 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
661 lreg: OP_LSHL (lreg, OP_ICONST) "0" {
662 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
665 lreg: OP_LSHR (lreg, reg) "0" {
666 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
669 lreg: OP_LSHR (lreg, OP_ICONST) "0" {
670 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
673 lreg: OP_LSHR_UN (lreg, reg) "0" {
674 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
677 lreg: OP_LSHR_UN (lreg, OP_ICONST) "0" {
678 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);