2004-05-28 Zoltan Varga <vargaz@freemail.hu>
[mono.git] / mono / mini / inssel-x86.brg
1 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG(cfg,basereg,offset,operand) do { \
2                 MonoInst *inst; \
3                 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
4                 inst->opcode = OP_X86_COMPARE_MEMBASE_REG; \
5                 inst->inst_basereg = basereg; \
6                 inst->inst_offset = offset; \
7                 inst->sreg2 = operand; \
8                 mono_bblock_add_inst (cfg->cbb, inst); \
9         } while (0)
10
11 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM(cfg,basereg,offset,operand) do { \
12                 MonoInst *inst; \
13                 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
14                 inst->opcode = OP_X86_COMPARE_MEMBASE_IMM; \
15                 inst->inst_basereg = basereg; \
16                 inst->inst_offset = offset; \
17                 inst->inst_imm = operand; \
18                 mono_bblock_add_inst (cfg->cbb, inst); \
19         } while (0)
20
21 /* override the arch independant versions with fast x86 versions */
22
23 #undef MONO_EMIT_BOUNDS_CHECK
24 #undef MONO_EMIT_BOUNDS_CHECK_IMM
25
26 #define MONO_EMIT_BOUNDS_CHECK(cfg, array_reg, array_type, array_length_field, index_reg) do { \
27                 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
28                         MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_reg); \
29                         MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
30                 } \
31         } while (0)
32
33 #define MONO_EMIT_BOUNDS_CHECK_IMM(cfg, array_reg, array_type, array_length_field, index_imm) do { \
34                 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
35                         MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_imm); \
36                         MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
37                 } \
38         } while (0)
39
40
41 %%
42
43 #
44 # inssel-x86.brg: burg file for special x86 instructions
45 #
46 # Author:
47 #   Dietmar Maurer (dietmar@ximian.com)
48 #   Paolo Molaro (lupus@ximian.com)
49 #
50 # (C) 2002 Ximian, Inc.
51 #
52
53 stmt: OP_START_HANDLER {
54         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
55         MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP);
56 }
57
58 stmt: CEE_ENDFINALLY {
59         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
60         MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset); 
61         tree->opcode = CEE_RET;
62         mono_bblock_add_inst (s->cbb, tree);
63 }
64
65 stmt: OP_ENDFILTER (reg) {
66         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
67         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->left->reg1);
68         MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset); 
69         tree->opcode = CEE_RET;
70         mono_bblock_add_inst (s->cbb, tree);
71 }
72
73 stmt: CEE_STIND_I8 (OP_REGVAR, lreg) {
74         /* this should only happen for methods returning a long */
75         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->right->reg1);
76         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->right->reg2);
77 }
78
79 lreg: OP_LNEG (lreg) "3" {
80         int tmpr = mono_regstate_next_int (s->rs);
81         MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg1, state->left->reg1);
82         MONO_EMIT_BIALU_IMM (s, tree, OP_ADC_IMM, tmpr, state->left->reg2, 0);
83         MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg2, tmpr);
84 }
85
86 freg: OP_LCONV_TO_R8 (lreg) {
87         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
88         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
89         tree->opcode = OP_X86_FP_LOAD_I8;
90         tree->inst_basereg = X86_ESP;
91         tree->inst_offset = 0;
92         mono_bblock_add_inst (s->cbb, tree);
93         MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
94 }
95
96 freg: OP_LCONV_TO_R4 (lreg) {
97         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
98         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
99         tree->opcode = OP_X86_FP_LOAD_I8;
100         tree->inst_basereg = X86_ESP;
101         tree->inst_offset = 0;
102         mono_bblock_add_inst (s->cbb, tree);
103         /* change precision */
104         MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORER4_MEMBASE_REG, X86_ESP, 0, state->reg1);
105         MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADR4_MEMBASE, state->reg1, X86_ESP, 0);
106         MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
107 }
108
109 freg: CEE_CONV_R_UN (reg) {
110         MONO_EMIT_NEW_BIALU_IMM (s, OP_X86_PUSH_IMM, -1, -1, 0);
111         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
112         tree->opcode = OP_X86_FP_LOAD_I8;
113         tree->inst_basereg = X86_ESP;
114         tree->inst_offset = 0;
115         mono_bblock_add_inst (s->cbb, tree);
116         MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
117 }
118
119 cflags: OP_COMPARE (CEE_LDIND_I4 (base), reg) {
120         tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
121         tree->inst_basereg = state->left->left->tree->inst_basereg;
122         tree->inst_offset = state->left->left->tree->inst_offset;
123         tree->sreg2 = state->right->reg1;
124         mono_bblock_add_inst (s->cbb, tree);
125 }
126
127 cflags: OP_COMPARE (CEE_LDIND_I4 (base), OP_ICONST) {
128         tree->opcode = OP_X86_COMPARE_MEMBASE_IMM;
129         tree->inst_basereg = state->left->left->tree->inst_basereg;
130         tree->inst_offset = state->left->left->tree->inst_offset;
131         tree->inst_imm = state->right->tree->inst_c0;
132         mono_bblock_add_inst (s->cbb, tree);
133 }
134
135 cflags: OP_COMPARE (reg, CEE_LDIND_I4 (base)) {
136         tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
137         tree->sreg2 = state->right->left->tree->inst_basereg;
138         tree->inst_offset = state->right->left->tree->inst_offset;
139         tree->sreg1 = state->left->reg1;
140         mono_bblock_add_inst (s->cbb, tree);
141 }
142
143 stmt: CEE_STIND_I1 (base, OP_CEQ (cflags)) {
144         tree->opcode = OP_X86_SETEQ_MEMBASE;
145         tree->inst_offset = state->left->tree->inst_offset;
146         tree->inst_basereg = state->left->tree->inst_basereg;
147         mono_bblock_add_inst (s->cbb, tree);
148 }
149
150 reg: OP_LOCALLOC (OP_ICONST) {
151         if (tree->flags & MONO_INST_INIT) {
152                 /* microcoded in mini-x86.c */
153                 tree->sreg1 = mono_regstate_next_int (s->rs);
154                 MONO_EMIT_NEW_ICONST (s, tree->sreg1, state->left->tree->inst_c0);
155                 mono_bblock_add_inst (s->cbb, tree);
156         } else {
157                 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, state->left->tree->inst_c0);
158                 MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
159         }
160 }
161
162 reg: OP_LOCALLOC (reg) {
163         tree->sreg1 = state->left->tree->dreg;
164         mono_bblock_add_inst (s->cbb, tree);
165 }
166
167 stmt: OP_SETRET (reg) {
168         tree->opcode = OP_MOVE;
169         tree->sreg1 = state->left->reg1;
170         tree->dreg = X86_EAX;
171         mono_bblock_add_inst (s->cbb, tree);
172 }
173
174 stmt: OP_SETRET (lreg) {
175         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->left->reg2);
176         tree->opcode = OP_MOVE;
177         tree->sreg1 = state->left->reg1;
178         tree->dreg = X86_EAX;
179         mono_bblock_add_inst (s->cbb, tree);
180 }
181
182 stmt: OP_SETRET (CEE_LDIND_REF (OP_REGVAR)) {
183         tree->opcode = OP_MOVE;
184         tree->sreg1 = state->left->left->tree->dreg;
185         tree->dreg = X86_EAX;
186         mono_bblock_add_inst (s->cbb, tree);
187 }
188
189 stmt: OP_SETRET (freg) {
190         /* nothing to do */
191 }
192
193 stmt: OP_SETRET (OP_ICONST) {
194         tree->opcode = OP_ICONST;
195         tree->inst_c0 = state->left->tree->inst_c0;
196         tree->dreg = X86_EAX;
197         mono_bblock_add_inst (s->cbb, tree);
198 }
199
200 stmt: OP_OUTARG (reg) {
201         tree->opcode = OP_X86_PUSH;
202         tree->sreg1 = state->left->reg1;
203         mono_bblock_add_inst (s->cbb, tree);
204 }
205
206 # we need to reduce this code duplication with some burg syntax extension
207 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)) {
208         tree->opcode = OP_X86_PUSH;
209         tree->sreg1 = state->left->left->tree->dreg;
210         mono_bblock_add_inst (s->cbb, tree);
211 }
212
213 stmt: OP_OUTARG (CEE_LDIND_I4 (OP_REGVAR)) {
214         tree->opcode = OP_X86_PUSH;
215         tree->sreg1 = state->left->left->tree->dreg;
216         mono_bblock_add_inst (s->cbb, tree);
217 }
218
219 stmt: OP_OUTARG (CEE_LDIND_U4 (OP_REGVAR)) {
220         tree->opcode = OP_X86_PUSH;
221         tree->sreg1 = state->left->left->tree->dreg;
222         mono_bblock_add_inst (s->cbb, tree);
223 }
224
225 stmt: OP_OUTARG (CEE_LDIND_I (OP_REGVAR)) {
226         tree->opcode = OP_X86_PUSH;
227         tree->sreg1 = state->left->left->tree->dreg;
228         mono_bblock_add_inst (s->cbb, tree);
229 }
230
231 stmt: OP_OUTARG (lreg) {
232         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
233         tree->opcode = OP_X86_PUSH;
234         tree->sreg1 = state->left->reg1;
235         mono_bblock_add_inst (s->cbb, tree);
236 }
237
238 stmt: OP_OUTARG (CEE_LDIND_I8 (base)) {
239         MonoInst *ins;
240         ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
241         ins->opcode = OP_X86_PUSH_MEMBASE;
242         ins->inst_basereg = state->left->left->tree->inst_basereg;
243         ins->inst_offset = state->left->left->tree->inst_offset + 4;
244         mono_bblock_add_inst (s->cbb, ins);
245
246         tree->opcode = OP_X86_PUSH_MEMBASE;
247         tree->inst_basereg = state->left->left->tree->inst_basereg;
248         tree->inst_offset = state->left->left->tree->inst_offset;
249         mono_bblock_add_inst (s->cbb, tree);
250 }
251
252 stmt: OP_OUTARG (OP_ICONST) {
253         tree->opcode = OP_X86_PUSH_IMM;
254         tree->inst_imm = state->left->tree->inst_c0;
255         mono_bblock_add_inst (s->cbb, tree);
256 }
257
258 stmt: OP_OUTARG (CEE_LDIND_I4 (base)) {
259         tree->opcode = OP_X86_PUSH_MEMBASE;
260         tree->inst_basereg = state->left->left->tree->inst_basereg;
261         tree->inst_offset = state->left->left->tree->inst_offset;
262         mono_bblock_add_inst (s->cbb, tree);
263 }
264
265 stmt: OP_OUTARG (CEE_LDIND_U4 (base)) {
266         tree->opcode = OP_X86_PUSH_MEMBASE;
267         tree->inst_basereg = state->left->left->tree->inst_basereg;
268         tree->inst_offset = state->left->left->tree->inst_offset;
269         mono_bblock_add_inst (s->cbb, tree);
270 }
271
272 stmt: OP_OUTARG (CEE_LDIND_I (base)) {
273         tree->opcode = OP_X86_PUSH_MEMBASE;
274         tree->inst_basereg = state->left->left->tree->inst_basereg;
275         tree->inst_offset = state->left->left->tree->inst_offset;
276         mono_bblock_add_inst (s->cbb, tree);
277 }
278
279 stmt: OP_OUTARG (CEE_LDIND_REF (base)) {
280         tree->opcode = OP_X86_PUSH_MEMBASE;
281         tree->inst_basereg = state->left->left->tree->inst_basereg;
282         tree->inst_offset = state->left->left->tree->inst_offset;
283         mono_bblock_add_inst (s->cbb, tree);
284 }
285
286 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)) {
287         tree->opcode = OP_X86_PUSH;
288         tree->sreg1 = state->left->left->tree->dreg;
289         mono_bblock_add_inst (s->cbb, tree);
290 }
291
292 stmt: OP_OUTARG (CEE_LDOBJ (reg)) {
293         tree->opcode = OP_X86_PUSH;
294         tree->sreg1 = state->left->reg1;
295         mono_bblock_add_inst (s->cbb, tree);
296 }
297
298 stmt: OP_OUTARG (freg) {
299         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
300         tree->opcode = OP_STORER8_MEMBASE_REG;
301         tree->sreg1 = state->left->reg1;
302         tree->inst_destbasereg = X86_ESP;
303         tree->inst_offset = 0;
304         mono_bblock_add_inst (s->cbb, tree);
305 }
306
307 stmt: OP_OUTARG_R4 (freg) {
308         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 4);
309         tree->opcode = OP_STORER4_MEMBASE_REG;
310         tree->sreg1 = state->left->reg1;
311         tree->inst_destbasereg = X86_ESP;
312         tree->inst_offset = 0;
313         mono_bblock_add_inst (s->cbb, tree);
314 }
315
316 stmt: OP_OUTARG_R8 (freg) {
317         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
318         tree->opcode = OP_STORER8_MEMBASE_REG;
319         tree->sreg1 = state->left->reg1;
320         tree->inst_destbasereg = X86_ESP;
321         tree->inst_offset = 0;
322         mono_bblock_add_inst (s->cbb, tree);
323 }
324
325 stmt: OP_OUTARG_VT (CEE_LDOBJ (base)) {
326         MonoInst *vt = state->left->left->tree;
327         //g_print ("vt size: %d at R%d + %d\n", tree->inst_imm, vt->inst_basereg, vt->inst_offset);
328
329         if (!tree->inst_imm)
330                 return;
331
332         if (tree->inst_imm <= 4) {
333                 tree->opcode = OP_X86_PUSH_MEMBASE;
334                 tree->inst_basereg = vt->inst_basereg;
335                 tree->inst_offset = vt->inst_offset;
336                 mono_bblock_add_inst (s->cbb, tree);
337         } else if (tree->inst_imm <= 20) {
338                 int sz = tree->inst_imm;
339                 sz += 3;
340                 sz &= ~3;
341                 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, sz);
342                 mini_emit_memcpy (s, X86_ESP, 0, vt->inst_basereg, vt->inst_offset, tree->inst_imm, 0);
343         } else {
344                 tree->opcode = OP_X86_PUSH_OBJ;
345                 tree->inst_basereg = vt->inst_basereg;
346                 tree->inst_offset = vt->inst_offset;
347                 mono_bblock_add_inst (s->cbb, tree);
348         }
349 }
350
351 stmt: OP_OUTARG_VT (OP_ICONST) {
352         tree->opcode = OP_X86_PUSH_IMM;
353         tree->inst_imm = state->left->tree->inst_c0;
354         mono_bblock_add_inst (s->cbb, tree);
355 }
356
357 stmt: OP_OUTARG_VT (reg) {
358         tree->opcode = OP_X86_PUSH;
359         tree->sreg1 = state->left->tree->dreg;
360         mono_bblock_add_inst (s->cbb, tree);
361 }
362
363 reg: OP_LDADDR (OP_REGOFFSET) "1" {
364         if (state->left->tree->inst_offset) {
365                 tree->opcode = OP_X86_LEA_MEMBASE;
366                 tree->sreg1 = state->left->tree->inst_basereg;
367                 tree->inst_imm = state->left->tree->inst_offset;
368                 tree->dreg = state->reg1;
369         } else {
370                 tree->opcode = OP_MOVE;
371                 tree->sreg1 = state->left->tree->inst_basereg;
372                 tree->dreg = state->reg1;
373         }
374         mono_bblock_add_inst (s->cbb, tree);
375 }
376
377 reg: CEE_LDOBJ (OP_REGOFFSET) "1" {
378         if (state->left->tree->inst_offset) {
379                 tree->opcode = OP_X86_LEA_MEMBASE;
380                 tree->sreg1 = state->left->tree->inst_basereg;
381                 tree->inst_imm = state->left->tree->inst_offset;
382                 tree->dreg = state->reg1;
383         } else {
384                 tree->opcode = OP_MOVE;
385                 tree->sreg1 = state->left->tree->inst_basereg;
386                 tree->dreg = state->reg1;
387         }
388         mono_bblock_add_inst (s->cbb, tree);
389 }
390
391 reg: CEE_LDELEMA (reg, reg) "15" {
392         guint32 size = mono_class_array_element_size (tree->klass);
393         
394         MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoArray, max_length, state->right->reg1);
395
396         if (size == 1 || size == 2 || size == 4 || size == 8) {
397                 static const int fast_log2 [] = { 1, 0, 1, -1, 2, -1, -1, -1, 3 };
398                 tree->opcode = OP_X86_LEA;
399                 tree->dreg = state->reg1;
400                 tree->sreg1 = state->left->reg1;
401                 tree->sreg2 = state->right->reg1;
402                 tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
403                 tree->unused = fast_log2 [size];
404                 mono_bblock_add_inst (s->cbb, tree);
405         } else {
406                 int mult_reg = mono_regstate_next_int (s->rs);
407                 int add_reg = mono_regstate_next_int (s->rs);
408                 MONO_EMIT_NEW_BIALU_IMM (s, OP_MUL_IMM, mult_reg, state->right->reg1, size);
409                 MONO_EMIT_NEW_BIALU (s, CEE_ADD, add_reg, mult_reg, state->left->reg1);
410                 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, state->reg1, add_reg, G_STRUCT_OFFSET (MonoArray, vector));
411         }
412 }
413
414 stmt: CEE_STIND_R8 (OP_REGVAR, freg) {
415         /* nothing to do: the value is already on the FP stack */
416 }
417
418 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
419         int con = state->right->right->tree->inst_c0;   
420
421         if (con == 1) {
422                 tree->opcode = OP_X86_INC_MEMBASE;
423         } else {
424                 tree->opcode = OP_X86_ADD_MEMBASE_IMM;
425                 tree->inst_imm = con;
426         }
427
428         tree->inst_basereg = state->left->tree->inst_basereg;
429         tree->inst_offset = state->left->tree->inst_offset;
430         mono_bblock_add_inst (s->cbb, tree);
431 } cost {
432         MBTREE_TYPE *t1 = state->right->left->left->tree;
433         MBTREE_TYPE *t2 = state->left->tree;
434         MBCOND (t1->inst_basereg == t2->inst_basereg &&
435                 t1->inst_offset == t2->inst_offset);
436         return 2;
437 }
438
439 stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)) {
440         int con = state->right->right->tree->inst_c0;   
441
442         if (con == 1) {
443                 tree->opcode = OP_X86_DEC_MEMBASE;
444         } else {
445                 tree->opcode = OP_X86_SUB_MEMBASE_IMM;
446                 tree->inst_imm = con;
447         }
448
449         tree->inst_basereg = state->left->tree->inst_basereg;
450         tree->inst_offset = state->left->tree->inst_offset;
451         mono_bblock_add_inst (s->cbb, tree);
452 } cost {
453         MBTREE_TYPE *t1 = state->right->left->left->tree;
454         MBTREE_TYPE *t2 = state->left->tree;
455         MBCOND (t1->inst_basereg == t2->inst_basereg &&
456                 t1->inst_offset == t2->inst_offset);
457         return 2;
458 }
459
460 #
461 # this rules is incorrect, it needs to do an indirect inc (inc_membase)
462 #stmt: CEE_STIND_I4 (reg, CEE_ADD (reg, OP_ICONST)) {
463 #       tree->opcode = OP_X86_INC_REG;
464 #       tree->dreg = state->left->reg1;
465 #       mono_bblock_add_inst (s->cbb, tree);
466 #} cost {
467 #       MBState *s1 = state->left;
468 #       MBState *s2 = state->right->left;
469 #       int con = state->right->right->tree->inst_c0;   
470 #       MBCOND (con == 1 && s1->reg1 == s2->reg1);
471 #       return 1;
472 #}
473
474 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_SUB (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
475         int con = state->right->right->tree->inst_c0;   
476         int dreg = state->left->tree->dreg;
477         int sreg = state->right->left->left->tree->dreg;
478
479         if (con == 1) {
480                 if (dreg != sreg)
481                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
482                 tree->opcode = OP_X86_DEC_REG;
483                 tree->dreg = tree->sreg1 = dreg;
484         } else if (con == -1) {
485                 if (dreg != sreg)
486                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
487                 tree->opcode = OP_X86_INC_REG;
488                 tree->dreg = tree->sreg1 = dreg;
489         } else {
490                 tree->opcode = OP_SUB_IMM;
491                 tree->inst_imm = con;
492                 tree->sreg1 = sreg;
493                 tree->dreg = dreg;
494         }
495         mono_bblock_add_inst (s->cbb, tree);
496 }
497
498 stmt: CEE_STIND_I (OP_REGVAR, CEE_ADD (CEE_LDIND_I (OP_REGVAR), OP_ICONST)),
499 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_ADD (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
500         int con = state->right->right->tree->inst_c0;
501         int dreg = state->left->tree->dreg;
502         int sreg = state->right->left->left->tree->dreg;
503
504         if (con == 1) {
505                 if (dreg != sreg)
506                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
507                 tree->opcode = OP_X86_INC_REG;
508                 tree->dreg = tree->sreg1 = dreg;
509         } else if (con == -1) {
510                 if (dreg != sreg)
511                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
512                 tree->opcode = OP_X86_DEC_REG;
513                 tree->dreg = tree->sreg1 = dreg;
514         } else {
515                 tree->opcode = OP_ADD_IMM;
516                 tree->inst_imm = con;
517                 tree->sreg1 = sreg;
518                 tree->dreg = dreg;
519         }
520         mono_bblock_add_inst (s->cbb, tree);
521 }
522
523 reg: CEE_LDIND_I2 (OP_REGVAR) {
524         MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);
525 }
526
527 # on x86, fp compare overwrites EAX, so we must
528 # either improve the local register allocator or
529 # emit coarse opcodes which saves EAX for us.
530
531 reg: OP_CEQ (OP_COMPARE (freg, freg)) { 
532         MONO_EMIT_BIALU (s, tree, OP_FCEQ, state->reg1, state->left->left->reg1,
533                          state->left->right->reg1);
534 }
535
536 reg: OP_CLT (OP_COMPARE (freg, freg)) { 
537         MONO_EMIT_BIALU (s, tree, OP_FCLT, state->reg1, state->left->left->reg1,
538                          state->left->right->reg1);
539 }
540
541 reg: OP_CLT_UN (OP_COMPARE (freg, freg)) {      
542         MONO_EMIT_BIALU (s, tree, OP_FCLT_UN, state->reg1, state->left->left->reg1,
543                          state->left->right->reg1);
544 }
545
546 reg: OP_CGT (OP_COMPARE (freg, freg)) { 
547         MONO_EMIT_BIALU (s, tree, OP_FCGT, state->reg1, state->left->left->reg1,
548                          state->left->right->reg1);
549 }
550
551 reg: OP_CGT_UN (OP_COMPARE (freg, freg)) {      
552         MONO_EMIT_BIALU (s, tree, OP_FCGT_UN, state->reg1, state->left->left->reg1,
553                          state->left->right->reg1);
554 }
555
556 # fpcflags overwrites EAX, but this does not matter for statements
557 # because we are the last operation in the tree.
558  
559 stmt: CEE_BNE_UN (fpcflags) {
560         tree->opcode = OP_FBNE_UN;
561         mono_bblock_add_inst (s->cbb, tree);
562 }
563
564 stmt: CEE_BEQ (fpcflags) {
565         tree->opcode = OP_FBEQ;
566         mono_bblock_add_inst (s->cbb, tree);
567 }
568
569 stmt: CEE_BLT (fpcflags) {
570         tree->opcode = OP_FBLT;
571         mono_bblock_add_inst (s->cbb, tree);
572 }
573
574 stmt: CEE_BLT_UN (fpcflags) {
575         tree->opcode = OP_FBLT_UN;
576         mono_bblock_add_inst (s->cbb, tree);
577 }
578
579 stmt: CEE_BGT (fpcflags) {
580         tree->opcode = OP_FBGT;
581         mono_bblock_add_inst (s->cbb, tree);
582 }
583
584 stmt: CEE_BGT_UN (fpcflags) {
585         tree->opcode = OP_FBGT_UN;
586         mono_bblock_add_inst (s->cbb, tree);
587 }
588
589 stmt: CEE_BGE  (fpcflags) {
590         tree->opcode = OP_FBGE;
591         mono_bblock_add_inst (s->cbb, tree);
592 }
593
594 stmt: CEE_BGE_UN (fpcflags) {
595         tree->opcode = OP_FBGE_UN;
596         mono_bblock_add_inst (s->cbb, tree);
597 }
598
599 stmt: CEE_BLE  (fpcflags) {
600         tree->opcode = OP_FBLE;
601         mono_bblock_add_inst (s->cbb, tree);
602 }
603
604 stmt: CEE_BLE_UN (fpcflags) {
605         tree->opcode = OP_FBLE_UN;
606         mono_bblock_add_inst (s->cbb, tree);
607 }
608
609 stmt: CEE_POP (freg) "0" {
610         /* we need to pop the value from the x86 FP stack */
611         MONO_EMIT_UNALU (s, tree, OP_X86_FPOP, -1, state->left->reg1);  
612 }     
613
614 # override the rules in inssel-float.brg that work for machines with FP registers 
615
616 freg: OP_FCONV_TO_R8 (freg) "0" {
617         /* nothing to do */
618 }
619
620 freg: OP_FCONV_TO_R4 (freg) "0" {
621         /* fixme: nothing to do ??*/
622 }
623
624 reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) {
625         MonoInst *base = state->right->left->tree;
626
627         tree->dreg = state->reg1;
628         tree->sreg1 = state->left->reg1;
629         tree->sreg2 = base->inst_basereg; 
630         tree->inst_offset = base->inst_offset; 
631         tree->opcode = OP_X86_ADD_MEMBASE; 
632         mono_bblock_add_inst (s->cbb, tree);
633
634
635 reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) {
636         MonoInst *base = state->right->left->tree;
637
638         tree->dreg = state->reg1;
639         tree->sreg1 = state->left->reg1;
640         tree->sreg2 = base->inst_basereg; 
641         tree->inst_offset = base->inst_offset; 
642         tree->opcode = OP_X86_SUB_MEMBASE; 
643         mono_bblock_add_inst (s->cbb, tree);
644
645
646 reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) {
647         MonoInst *base = state->right->left->tree;
648
649         tree->dreg = state->reg1;
650         tree->sreg1 = state->left->reg1;
651         tree->sreg2 = base->inst_basereg; 
652         tree->inst_offset = base->inst_offset; 
653         tree->opcode = OP_X86_MUL_MEMBASE; 
654         mono_bblock_add_inst (s->cbb, tree);
655
656
657 lreg: OP_LSHL (lreg, reg) "0" {
658         MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
659 }
660
661 lreg: OP_LSHL (lreg, OP_ICONST) "0" {
662         MONO_EMIT_BIALU_IMM (s, tree, OP_LSHL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
663 }
664
665 lreg: OP_LSHR (lreg, reg) "0" {
666         MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
667 }
668
669 lreg: OP_LSHR (lreg, OP_ICONST) "0" {
670         MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
671 }
672
673 lreg: OP_LSHR_UN (lreg, reg) "0" {
674         MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
675 }
676
677 lreg: OP_LSHR_UN (lreg, OP_ICONST) "0" {
678         MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
679 }
680 %%