1 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG(cfg,basereg,offset,operand) do { \
3 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
4 inst->opcode = OP_X86_COMPARE_MEMBASE_REG; \
5 inst->inst_basereg = basereg; \
6 inst->inst_offset = offset; \
7 inst->sreg2 = operand; \
8 mono_bblock_add_inst (cfg->cbb, inst); \
11 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM(cfg,basereg,offset,operand) do { \
13 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
14 inst->opcode = OP_X86_COMPARE_MEMBASE_IMM; \
15 inst->inst_basereg = basereg; \
16 inst->inst_offset = offset; \
17 inst->inst_imm = operand; \
18 mono_bblock_add_inst (cfg->cbb, inst); \
21 /* override the arch independant versions with fast x86 versions */
23 #undef MONO_EMIT_BOUNDS_CHECK
24 #undef MONO_EMIT_BOUNDS_CHECK_IMM
26 #define MONO_EMIT_BOUNDS_CHECK(cfg, array_reg, array_type, array_length_field, index_reg) do { \
27 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
28 MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_reg); \
29 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
33 #define MONO_EMIT_BOUNDS_CHECK_IMM(cfg, array_reg, array_type, array_length_field, index_imm) do { \
34 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
35 MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_imm); \
36 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
44 # inssel-x86.brg: burg file for special x86 instructions
47 # Dietmar Maurer (dietmar@ximian.com)
48 # Paolo Molaro (lupus@ximian.com)
50 # (C) 2002 Ximian, Inc.
53 stmt: OP_START_HANDLER {
54 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
55 MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP);
58 stmt: CEE_ENDFINALLY {
59 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
60 MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
61 tree->opcode = CEE_RET;
62 mono_bblock_add_inst (s->cbb, tree);
65 stmt: OP_ENDFILTER (reg) {
66 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
67 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->left->reg1);
68 MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
69 tree->opcode = CEE_RET;
70 mono_bblock_add_inst (s->cbb, tree);
73 stmt: CEE_STIND_I8 (OP_REGVAR, lreg) {
74 /* this should only happen for methods returning a long */
75 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->right->reg1);
76 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->right->reg2);
79 lreg: OP_LNEG (lreg) "3" {
80 int tmpr = mono_regstate_next_int (s->rs);
81 MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg1, state->left->reg1);
82 MONO_EMIT_BIALU_IMM (s, tree, OP_ADC_IMM, tmpr, state->left->reg2, 0);
83 MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg2, tmpr);
86 freg: OP_LCONV_TO_R8 (lreg) {
87 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
88 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
89 tree->opcode = OP_X86_FP_LOAD_I8;
90 tree->inst_basereg = X86_ESP;
91 tree->inst_offset = 0;
92 mono_bblock_add_inst (s->cbb, tree);
93 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
96 freg: OP_LCONV_TO_R4 (lreg) {
97 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
98 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
99 tree->opcode = OP_X86_FP_LOAD_I8;
100 tree->inst_basereg = X86_ESP;
101 tree->inst_offset = 0;
102 mono_bblock_add_inst (s->cbb, tree);
103 /* change precision */
104 MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORER4_MEMBASE_REG, X86_ESP, 0, state->reg1);
105 MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADR4_MEMBASE, state->reg1, X86_ESP, 0);
106 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
109 freg: CEE_CONV_R_UN (reg) {
110 MONO_EMIT_NEW_BIALU_IMM (s, OP_X86_PUSH_IMM, -1, -1, 0);
111 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
112 tree->opcode = OP_X86_FP_LOAD_I8;
113 tree->inst_basereg = X86_ESP;
114 tree->inst_offset = 0;
115 mono_bblock_add_inst (s->cbb, tree);
116 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
119 cflags: OP_COMPARE (CEE_LDIND_REF (base), reg),
120 cflags: OP_COMPARE (CEE_LDIND_I (base), reg),
121 cflags: OP_COMPARE (CEE_LDIND_I4 (base), reg),
122 cflags: OP_COMPARE (CEE_LDIND_U4 (base), reg) {
123 tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
124 tree->inst_basereg = state->left->left->tree->inst_basereg;
125 tree->inst_offset = state->left->left->tree->inst_offset;
126 tree->sreg2 = state->right->reg1;
127 mono_bblock_add_inst (s->cbb, tree);
130 cflags: OP_COMPARE (CEE_LDIND_REF (base), CEE_LDIND_REF (OP_REGVAR)),
131 cflags: OP_COMPARE (CEE_LDIND_I (base), CEE_LDIND_REF (OP_REGVAR)),
132 cflags: OP_COMPARE (CEE_LDIND_I4 (base), CEE_LDIND_REF (OP_REGVAR)),
133 cflags: OP_COMPARE (CEE_LDIND_U4 (base), CEE_LDIND_REF (OP_REGVAR)) {
134 tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
135 tree->inst_basereg = state->left->left->tree->inst_basereg;
136 tree->inst_offset = state->left->left->tree->inst_offset;
137 tree->sreg2 = state->right->left->tree->dreg;
138 mono_bblock_add_inst (s->cbb, tree);
141 cflags: OP_COMPARE (CEE_LDIND_REF (base), OP_ICONST),
142 cflags: OP_COMPARE (CEE_LDIND_I (base), OP_ICONST),
143 cflags: OP_COMPARE (CEE_LDIND_I4 (base), OP_ICONST),
144 cflags: OP_COMPARE (CEE_LDIND_U4 (base), OP_ICONST) {
145 tree->opcode = OP_X86_COMPARE_MEMBASE_IMM;
146 tree->inst_basereg = state->left->left->tree->inst_basereg;
147 tree->inst_offset = state->left->left->tree->inst_offset;
148 tree->inst_imm = state->right->tree->inst_c0;
149 mono_bblock_add_inst (s->cbb, tree);
152 cflags: OP_COMPARE (reg, CEE_LDIND_REF (base)),
153 cflags: OP_COMPARE (reg, CEE_LDIND_I (base)),
154 cflags: OP_COMPARE (reg, CEE_LDIND_I4 (base)),
155 cflags: OP_COMPARE (reg, CEE_LDIND_U4 (base)) {
156 tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
157 tree->sreg2 = state->right->left->tree->inst_basereg;
158 tree->inst_offset = state->right->left->tree->inst_offset;
159 tree->sreg1 = state->left->reg1;
160 mono_bblock_add_inst (s->cbb, tree);
163 cflags: OP_COMPARE (CEE_LDIND_REF (OP_REGVAR), CEE_LDIND_REF (base)),
164 cflags: OP_COMPARE (CEE_LDIND_I (OP_REGVAR), CEE_LDIND_I (base)),
165 cflags: OP_COMPARE (CEE_LDIND_I4 (OP_REGVAR), CEE_LDIND_I4 (base)),
166 cflags: OP_COMPARE (CEE_LDIND_U4 (OP_REGVAR), CEE_LDIND_U4 (base)) {
167 tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
168 tree->sreg2 = state->right->left->tree->inst_basereg;
169 tree->inst_offset = state->right->left->tree->inst_offset;
170 tree->sreg1 = state->left->left->tree->dreg;
171 mono_bblock_add_inst (s->cbb, tree);
174 cflags : OP_CEQ (OP_COMPARE (OP_CEQ (cflags), OP_ICONST)) {
175 tree->opcode = OP_CNE;
176 tree->dreg = state->reg1;
177 mono_bblock_add_inst (s->cbb, tree);
179 MBCOND (!state->left->right->tree->inst_c0);
183 stmt: CEE_STIND_I1 (base, OP_CEQ (OP_COMPARE (OP_CEQ (cflags), OP_ICONST))) {
184 tree->opcode = OP_X86_SETNE_MEMBASE;
185 tree->inst_offset = state->left->tree->inst_offset;
186 tree->inst_basereg = state->left->tree->inst_basereg;
187 mono_bblock_add_inst (s->cbb, tree);
189 MBCOND (!state->right->left->right->tree->inst_c0);
193 stmt: CEE_STIND_I1 (base, OP_CEQ (cflags)) {
194 tree->opcode = OP_X86_SETEQ_MEMBASE;
195 tree->inst_offset = state->left->tree->inst_offset;
196 tree->inst_basereg = state->left->tree->inst_basereg;
197 mono_bblock_add_inst (s->cbb, tree);
200 reg: OP_LOCALLOC (OP_ICONST) {
201 if (tree->flags & MONO_INST_INIT) {
202 /* microcoded in mini-x86.c */
203 tree->sreg1 = mono_regstate_next_int (s->rs);
204 tree->dreg = state->reg1;
205 MONO_EMIT_NEW_ICONST (s, tree->sreg1, state->left->tree->inst_c0);
206 mono_bblock_add_inst (s->cbb, tree);
208 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, state->left->tree->inst_c0);
209 MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
213 reg: OP_LOCALLOC (reg) {
214 tree->sreg1 = state->left->tree->dreg;
215 tree->dreg = state->reg1;
216 mono_bblock_add_inst (s->cbb, tree);
219 stmt: OP_SETRET (reg) {
220 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->reg1);
223 stmt: OP_SETRET (lreg) {
224 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->left->reg2);
225 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->reg1);
228 stmt: OP_SETRET (CEE_LDIND_REF (OP_REGVAR)),
229 stmt: OP_SETRET (CEE_LDIND_I (OP_REGVAR)),
230 stmt: OP_SETRET (CEE_LDIND_I4 (OP_REGVAR)),
231 stmt: OP_SETRET (CEE_LDIND_U4 (OP_REGVAR)) {
232 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->left->tree->dreg);
235 stmt: OP_SETRET (freg) {
239 stmt: OP_SETRET (OP_ICONST) {
240 tree->opcode = OP_ICONST;
241 tree->inst_c0 = state->left->tree->inst_c0;
242 tree->dreg = X86_EAX;
243 mono_bblock_add_inst (s->cbb, tree);
246 stmt: OP_SETRET (i8con) {
247 MONO_EMIT_NEW_ICONST (s, X86_EAX, state->left->tree->inst_ls_word);
248 MONO_EMIT_NEW_ICONST (s, X86_EDX, state->left->tree->inst_ms_word);
251 stmt: OP_OUTARG (reg) {
252 tree->opcode = OP_X86_PUSH;
253 tree->sreg1 = state->left->reg1;
254 mono_bblock_add_inst (s->cbb, tree);
257 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)),
258 stmt: OP_OUTARG (CEE_LDIND_I4 (OP_REGVAR)),
259 stmt: OP_OUTARG (CEE_LDIND_U4 (OP_REGVAR)),
260 stmt: OP_OUTARG (CEE_LDIND_I (OP_REGVAR)) {
261 tree->opcode = OP_X86_PUSH;
262 tree->sreg1 = state->left->left->tree->dreg;
263 mono_bblock_add_inst (s->cbb, tree);
266 stmt: OP_OUTARG (lreg) {
267 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
268 tree->opcode = OP_X86_PUSH;
269 tree->sreg1 = state->left->reg1;
270 mono_bblock_add_inst (s->cbb, tree);
273 stmt: OP_OUTARG (CEE_LDIND_I8 (base)) {
275 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
276 ins->opcode = OP_X86_PUSH_MEMBASE;
277 ins->inst_basereg = state->left->left->tree->inst_basereg;
278 ins->inst_offset = state->left->left->tree->inst_offset + 4;
279 mono_bblock_add_inst (s->cbb, ins);
281 tree->opcode = OP_X86_PUSH_MEMBASE;
282 tree->inst_basereg = state->left->left->tree->inst_basereg;
283 tree->inst_offset = state->left->left->tree->inst_offset;
284 mono_bblock_add_inst (s->cbb, tree);
287 stmt: OP_OUTARG (OP_ICONST) {
288 tree->opcode = OP_X86_PUSH_IMM;
289 tree->inst_imm = state->left->tree->inst_c0;
290 mono_bblock_add_inst (s->cbb, tree);
293 stmt: OP_OUTARG (i8con) {
295 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
296 ins->opcode = OP_X86_PUSH_IMM;
297 ins->inst_imm = state->left->tree->inst_ms_word;
298 mono_bblock_add_inst (s->cbb, ins);
300 tree->opcode = OP_X86_PUSH_IMM;
301 tree->inst_imm = state->left->tree->inst_ls_word;
302 mono_bblock_add_inst (s->cbb, tree);
305 stmt: OP_OUTARG (CEE_LDIND_I4 (base)),
306 stmt: OP_OUTARG (CEE_LDIND_U4 (base)),
307 stmt: OP_OUTARG (CEE_LDIND_I (base)),
308 stmt: OP_OUTARG (CEE_LDIND_REF (base)) {
309 tree->opcode = OP_X86_PUSH_MEMBASE;
310 tree->inst_basereg = state->left->left->tree->inst_basereg;
311 tree->inst_offset = state->left->left->tree->inst_offset;
312 mono_bblock_add_inst (s->cbb, tree);
315 stmt: OP_OUTARG (CEE_LDOBJ (reg)) {
316 tree->opcode = OP_X86_PUSH;
317 tree->sreg1 = state->left->reg1;
318 mono_bblock_add_inst (s->cbb, tree);
321 stmt: OP_OUTARG (freg) {
322 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
323 tree->opcode = OP_STORER8_MEMBASE_REG;
324 tree->sreg1 = state->left->reg1;
325 tree->inst_destbasereg = X86_ESP;
326 tree->inst_offset = 0;
327 mono_bblock_add_inst (s->cbb, tree);
330 stmt: OP_OUTARG_R4 (freg) {
331 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 4);
332 tree->opcode = OP_STORER4_MEMBASE_REG;
333 tree->sreg1 = state->left->reg1;
334 tree->inst_destbasereg = X86_ESP;
335 tree->inst_offset = 0;
336 mono_bblock_add_inst (s->cbb, tree);
339 stmt: OP_OUTARG_R8 (freg) {
340 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
341 tree->opcode = OP_STORER8_MEMBASE_REG;
342 tree->sreg1 = state->left->reg1;
343 tree->inst_destbasereg = X86_ESP;
344 tree->inst_offset = 0;
345 mono_bblock_add_inst (s->cbb, tree);
348 stmt: OP_OUTARG_VT (CEE_LDOBJ (base)) {
349 MonoInst *vt = state->left->left->tree;
350 //g_print ("vt size: %d at R%d + %d\n", tree->inst_imm, vt->inst_basereg, vt->inst_offset);
355 if (tree->inst_imm <= 4) {
356 tree->opcode = OP_X86_PUSH_MEMBASE;
357 tree->inst_basereg = vt->inst_basereg;
358 tree->inst_offset = vt->inst_offset;
359 mono_bblock_add_inst (s->cbb, tree);
360 } else if (tree->inst_imm <= 20) {
361 int sz = tree->inst_imm;
364 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, sz);
365 mini_emit_memcpy (s, X86_ESP, 0, vt->inst_basereg, vt->inst_offset, tree->inst_imm, 0);
367 tree->opcode = OP_X86_PUSH_OBJ;
368 tree->inst_basereg = vt->inst_basereg;
369 tree->inst_offset = vt->inst_offset;
370 mono_bblock_add_inst (s->cbb, tree);
374 stmt: OP_OUTARG_VT (OP_ICONST) {
375 tree->opcode = OP_X86_PUSH_IMM;
376 tree->inst_imm = state->left->tree->inst_c0;
377 mono_bblock_add_inst (s->cbb, tree);
380 stmt: OP_OUTARG_VT (reg) {
381 tree->opcode = OP_X86_PUSH;
382 tree->sreg1 = state->left->tree->dreg;
383 mono_bblock_add_inst (s->cbb, tree);
386 reg: OP_LDADDR (OP_REGOFFSET),
387 reg: CEE_LDOBJ (OP_REGOFFSET) {
388 if (state->left->tree->inst_offset) {
389 tree->opcode = OP_X86_LEA_MEMBASE;
390 tree->inst_imm = state->left->tree->inst_offset;
392 tree->opcode = OP_MOVE;
394 tree->sreg1 = state->left->tree->inst_basereg;
395 tree->dreg = state->reg1;
396 mono_bblock_add_inst (s->cbb, tree);
399 reg: CEE_LDELEMA (reg, reg) "15" {
400 guint32 size = mono_class_array_element_size (tree->klass);
402 MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoArray, max_length, state->right->reg1);
404 if (size == 1 || size == 2 || size == 4 || size == 8) {
405 static const int fast_log2 [] = { 1, 0, 1, -1, 2, -1, -1, -1, 3 };
406 tree->opcode = OP_X86_LEA;
407 tree->dreg = state->reg1;
408 tree->sreg1 = state->left->reg1;
409 tree->sreg2 = state->right->reg1;
410 tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
411 tree->unused = fast_log2 [size];
412 mono_bblock_add_inst (s->cbb, tree);
414 int mult_reg = mono_regstate_next_int (s->rs);
415 int add_reg = mono_regstate_next_int (s->rs);
416 MONO_EMIT_NEW_BIALU_IMM (s, OP_MUL_IMM, mult_reg, state->right->reg1, size);
417 MONO_EMIT_NEW_BIALU (s, CEE_ADD, add_reg, mult_reg, state->left->reg1);
418 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, state->reg1, add_reg, G_STRUCT_OFFSET (MonoArray, vector));
422 stmt: CEE_STIND_R8 (OP_REGVAR, freg) {
423 /* nothing to do: the value is already on the FP stack */
426 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
427 int con = state->right->right->tree->inst_c0;
430 tree->opcode = OP_X86_INC_MEMBASE;
432 tree->opcode = OP_X86_ADD_MEMBASE_IMM;
433 tree->inst_imm = con;
436 tree->inst_basereg = state->left->tree->inst_basereg;
437 tree->inst_offset = state->left->tree->inst_offset;
438 mono_bblock_add_inst (s->cbb, tree);
440 MBTREE_TYPE *t1 = state->right->left->left->tree;
441 MBTREE_TYPE *t2 = state->left->tree;
442 MBCOND (t1->inst_basereg == t2->inst_basereg &&
443 t1->inst_offset == t2->inst_offset);
447 stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)) {
448 int con = state->right->right->tree->inst_c0;
451 tree->opcode = OP_X86_DEC_MEMBASE;
453 tree->opcode = OP_X86_SUB_MEMBASE_IMM;
454 tree->inst_imm = con;
457 tree->inst_basereg = state->left->tree->inst_basereg;
458 tree->inst_offset = state->left->tree->inst_offset;
459 mono_bblock_add_inst (s->cbb, tree);
461 MBTREE_TYPE *t1 = state->right->left->left->tree;
462 MBTREE_TYPE *t2 = state->left->tree;
463 MBCOND (t1->inst_basereg == t2->inst_basereg &&
464 t1->inst_offset == t2->inst_offset);
469 # this rules is incorrect, it needs to do an indirect inc (inc_membase)
470 #stmt: CEE_STIND_I4 (reg, CEE_ADD (reg, OP_ICONST)) {
471 # tree->opcode = OP_X86_INC_REG;
472 # tree->dreg = state->left->reg1;
473 # mono_bblock_add_inst (s->cbb, tree);
475 # MBState *s1 = state->left;
476 # MBState *s2 = state->right->left;
477 # int con = state->right->right->tree->inst_c0;
478 # MBCOND (con == 1 && s1->reg1 == s2->reg1);
482 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_SUB (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
483 int con = state->right->right->tree->inst_c0;
484 int dreg = state->left->tree->dreg;
485 int sreg = state->right->left->left->tree->dreg;
489 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
490 tree->opcode = OP_X86_DEC_REG;
491 tree->dreg = tree->sreg1 = dreg;
492 } else if (con == -1) {
494 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
495 tree->opcode = OP_X86_INC_REG;
496 tree->dreg = tree->sreg1 = dreg;
498 tree->opcode = OP_SUB_IMM;
499 tree->inst_imm = con;
503 mono_bblock_add_inst (s->cbb, tree);
506 stmt: CEE_STIND_I (OP_REGVAR, CEE_ADD (CEE_LDIND_I (OP_REGVAR), OP_ICONST)),
507 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_ADD (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
508 int con = state->right->right->tree->inst_c0;
509 int dreg = state->left->tree->dreg;
510 int sreg = state->right->left->left->tree->dreg;
514 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
515 tree->opcode = OP_X86_INC_REG;
516 tree->dreg = tree->sreg1 = dreg;
517 } else if (con == -1) {
519 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
520 tree->opcode = OP_X86_DEC_REG;
521 tree->dreg = tree->sreg1 = dreg;
523 tree->opcode = OP_ADD_IMM;
524 tree->inst_imm = con;
528 mono_bblock_add_inst (s->cbb, tree);
531 reg: CEE_LDIND_I2 (OP_REGVAR) {
532 MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);
536 stmt: CEE_STIND_I4 (OP_REGVAR, OP_ICONST),
537 stmt: CEE_STIND_I2 (OP_REGVAR, OP_ICONST),
538 stmt: CEE_STIND_I1 (OP_REGVAR, OP_ICONST),
539 stmt: CEE_STIND_REF (OP_REGVAR, OP_ICONST),
540 stmt: CEE_STIND_I (OP_REGVAR, OP_ICONST) {
541 int r = state->left->tree->dreg;
542 MONO_EMIT_BIALU (s, tree, CEE_XOR, r, r, r);
544 MBCOND (!state->right->tree->inst_c0);
549 # on x86, fp compare overwrites EAX, so we must
550 # either improve the local register allocator or
551 # emit coarse opcodes which saves EAX for us.
553 reg: OP_CEQ (OP_COMPARE (freg, freg)) {
554 MONO_EMIT_BIALU (s, tree, OP_FCEQ, state->reg1, state->left->left->reg1,
555 state->left->right->reg1);
558 reg: OP_CLT (OP_COMPARE (freg, freg)) {
559 MONO_EMIT_BIALU (s, tree, OP_FCLT, state->reg1, state->left->left->reg1,
560 state->left->right->reg1);
563 reg: OP_CLT_UN (OP_COMPARE (freg, freg)) {
564 MONO_EMIT_BIALU (s, tree, OP_FCLT_UN, state->reg1, state->left->left->reg1,
565 state->left->right->reg1);
568 reg: OP_CGT (OP_COMPARE (freg, freg)) {
569 MONO_EMIT_BIALU (s, tree, OP_FCGT, state->reg1, state->left->left->reg1,
570 state->left->right->reg1);
573 reg: OP_CGT_UN (OP_COMPARE (freg, freg)) {
574 MONO_EMIT_BIALU (s, tree, OP_FCGT_UN, state->reg1, state->left->left->reg1,
575 state->left->right->reg1);
578 # fpcflags overwrites EAX, but this does not matter for statements
579 # because we are the last operation in the tree.
581 stmt: CEE_BNE_UN (fpcflags) {
582 tree->opcode = OP_FBNE_UN;
583 mono_bblock_add_inst (s->cbb, tree);
586 stmt: CEE_BEQ (fpcflags) {
587 tree->opcode = OP_FBEQ;
588 mono_bblock_add_inst (s->cbb, tree);
591 stmt: CEE_BLT (fpcflags) {
592 tree->opcode = OP_FBLT;
593 mono_bblock_add_inst (s->cbb, tree);
596 stmt: CEE_BLT_UN (fpcflags) {
597 tree->opcode = OP_FBLT_UN;
598 mono_bblock_add_inst (s->cbb, tree);
601 stmt: CEE_BGT (fpcflags) {
602 tree->opcode = OP_FBGT;
603 mono_bblock_add_inst (s->cbb, tree);
606 stmt: CEE_BGT_UN (fpcflags) {
607 tree->opcode = OP_FBGT_UN;
608 mono_bblock_add_inst (s->cbb, tree);
611 stmt: CEE_BGE (fpcflags) {
612 tree->opcode = OP_FBGE;
613 mono_bblock_add_inst (s->cbb, tree);
616 stmt: CEE_BGE_UN (fpcflags) {
617 tree->opcode = OP_FBGE_UN;
618 mono_bblock_add_inst (s->cbb, tree);
621 stmt: CEE_BLE (fpcflags) {
622 tree->opcode = OP_FBLE;
623 mono_bblock_add_inst (s->cbb, tree);
626 stmt: CEE_BLE_UN (fpcflags) {
627 tree->opcode = OP_FBLE_UN;
628 mono_bblock_add_inst (s->cbb, tree);
631 stmt: CEE_POP (freg) "0" {
632 /* we need to pop the value from the x86 FP stack */
633 MONO_EMIT_UNALU (s, tree, OP_X86_FPOP, -1, state->left->reg1);
636 # override the rules in inssel-float.brg that work for machines with FP registers
638 freg: OP_FCONV_TO_R8 (freg) "0" {
642 freg: OP_FCONV_TO_R4 (freg) "0" {
643 /* fixme: nothing to do ??*/
646 reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) {
647 MonoInst *base = state->right->left->tree;
649 tree->dreg = state->reg1;
650 tree->sreg1 = state->left->reg1;
651 tree->sreg2 = base->inst_basereg;
652 tree->inst_offset = base->inst_offset;
653 tree->opcode = OP_X86_ADD_MEMBASE;
654 mono_bblock_add_inst (s->cbb, tree);
657 reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) {
658 MonoInst *base = state->right->left->tree;
660 tree->dreg = state->reg1;
661 tree->sreg1 = state->left->reg1;
662 tree->sreg2 = base->inst_basereg;
663 tree->inst_offset = base->inst_offset;
664 tree->opcode = OP_X86_SUB_MEMBASE;
665 mono_bblock_add_inst (s->cbb, tree);
668 reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) {
669 MonoInst *base = state->right->left->tree;
671 tree->dreg = state->reg1;
672 tree->sreg1 = state->left->reg1;
673 tree->sreg2 = base->inst_basereg;
674 tree->inst_offset = base->inst_offset;
675 tree->opcode = OP_X86_MUL_MEMBASE;
676 mono_bblock_add_inst (s->cbb, tree);
679 lreg: OP_LSHL (lreg, reg) "0" {
680 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
683 lreg: OP_LSHL (lreg, OP_ICONST) "0" {
684 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
687 lreg: OP_LSHR (lreg, reg) "0" {
688 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
691 lreg: OP_LSHR (lreg, OP_ICONST) "0" {
692 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
695 lreg: OP_LSHR_UN (lreg, reg) "0" {
696 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
699 lreg: OP_LSHR_UN (lreg, OP_ICONST) "0" {
700 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
703 reg: OP_X86_TLS_GET {
704 tree->dreg = state->reg1;
705 mono_bblock_add_inst (s->cbb, tree);