1 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG(cfg,basereg,offset,operand) do { \
3 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
4 inst->opcode = OP_X86_COMPARE_MEMBASE_REG; \
5 inst->inst_basereg = basereg; \
6 inst->inst_offset = offset; \
7 inst->sreg2 = operand; \
8 mono_bblock_add_inst (cfg->cbb, inst); \
11 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM(cfg,basereg,offset,operand) do { \
13 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
14 inst->opcode = OP_X86_COMPARE_MEMBASE_IMM; \
15 inst->inst_basereg = basereg; \
16 inst->inst_offset = offset; \
17 inst->inst_imm = operand; \
18 mono_bblock_add_inst (cfg->cbb, inst); \
21 /* override the arch independant versions with fast x86 versions */
23 #undef MONO_EMIT_BOUNDS_CHECK
24 #undef MONO_EMIT_BOUNDS_CHECK_IMM
26 #define MONO_EMIT_BOUNDS_CHECK(cfg, array_reg, array_type, array_length_field, index_reg) do { \
27 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
28 MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_reg); \
29 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
33 #define MONO_EMIT_BOUNDS_CHECK_IMM(cfg, array_reg, array_type, array_length_field, index_imm) do { \
34 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
35 MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_imm); \
36 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
44 # inssel-x86.brg: burg file for special x86 instructions
47 # Dietmar Maurer (dietmar@ximian.com)
48 # Paolo Molaro (lupus@ximian.com)
50 # (C) 2002 Ximian, Inc.
53 stmt: OP_START_HANDLER {
54 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
55 MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP);
58 stmt: CEE_ENDFINALLY {
59 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
60 MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
61 tree->opcode = CEE_RET;
62 mono_bblock_add_inst (s->cbb, tree);
65 stmt: OP_ENDFILTER (reg) {
66 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
67 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->left->reg1);
68 MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
69 tree->opcode = CEE_RET;
70 mono_bblock_add_inst (s->cbb, tree);
73 stmt: CEE_STIND_I8 (OP_REGVAR, lreg) {
74 /* this should only happen for methods returning a long */
75 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->right->reg1);
76 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->right->reg2);
79 lreg: OP_LNEG (lreg) "3" {
80 int tmpr = mono_regstate_next_int (s->rs);
81 MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg1, state->left->reg1);
82 MONO_EMIT_BIALU_IMM (s, tree, OP_ADC_IMM, tmpr, state->left->reg2, 0);
83 MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg2, tmpr);
86 freg: OP_LCONV_TO_R8 (lreg) {
87 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
88 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
89 tree->opcode = OP_X86_FP_LOAD_I8;
90 tree->inst_basereg = X86_ESP;
91 tree->inst_offset = 0;
92 mono_bblock_add_inst (s->cbb, tree);
93 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
96 freg: OP_LCONV_TO_R4 (lreg) {
97 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
98 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
99 tree->opcode = OP_X86_FP_LOAD_I8;
100 tree->inst_basereg = X86_ESP;
101 tree->inst_offset = 0;
102 mono_bblock_add_inst (s->cbb, tree);
103 /* change precision */
104 MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORER4_MEMBASE_REG, X86_ESP, 0, state->reg1);
105 MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADR4_MEMBASE, state->reg1, X86_ESP, 0);
106 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
109 freg: CEE_CONV_R_UN (reg) {
110 MONO_EMIT_NEW_BIALU_IMM (s, OP_X86_PUSH_IMM, -1, -1, 0);
111 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
112 tree->opcode = OP_X86_FP_LOAD_I8;
113 tree->inst_basereg = X86_ESP;
114 tree->inst_offset = 0;
115 mono_bblock_add_inst (s->cbb, tree);
116 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
119 cflags: OP_COMPARE (CEE_LDIND_REF (base), reg),
120 cflags: OP_COMPARE (CEE_LDIND_I (base), reg),
121 cflags: OP_COMPARE (CEE_LDIND_I4 (base), reg),
122 cflags: OP_COMPARE (CEE_LDIND_U4 (base), reg) {
123 tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
124 tree->inst_basereg = state->left->left->tree->inst_basereg;
125 tree->inst_offset = state->left->left->tree->inst_offset;
126 tree->sreg2 = state->right->reg1;
127 mono_bblock_add_inst (s->cbb, tree);
130 cflags: OP_COMPARE (CEE_LDIND_REF (base), CEE_LDIND_REF (OP_REGVAR)),
131 cflags: OP_COMPARE (CEE_LDIND_I (base), CEE_LDIND_REF (OP_REGVAR)),
132 cflags: OP_COMPARE (CEE_LDIND_I4 (base), CEE_LDIND_REF (OP_REGVAR)),
133 cflags: OP_COMPARE (CEE_LDIND_U4 (base), CEE_LDIND_REF (OP_REGVAR)) {
134 tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
135 tree->inst_basereg = state->left->left->tree->inst_basereg;
136 tree->inst_offset = state->left->left->tree->inst_offset;
137 tree->sreg2 = state->right->left->tree->dreg;
138 mono_bblock_add_inst (s->cbb, tree);
141 cflags: OP_COMPARE (CEE_LDIND_REF (base), OP_ICONST),
142 cflags: OP_COMPARE (CEE_LDIND_I (base), OP_ICONST),
143 cflags: OP_COMPARE (CEE_LDIND_I4 (base), OP_ICONST),
144 cflags: OP_COMPARE (CEE_LDIND_U4 (base), OP_ICONST) {
145 tree->opcode = OP_X86_COMPARE_MEMBASE_IMM;
146 tree->inst_basereg = state->left->left->tree->inst_basereg;
147 tree->inst_offset = state->left->left->tree->inst_offset;
148 tree->inst_imm = state->right->tree->inst_c0;
149 mono_bblock_add_inst (s->cbb, tree);
153 cflags: OP_COMPARE (CEE_LDIND_REF (OP_ICONST), OP_ICONST),
154 cflags: OP_COMPARE (CEE_LDIND_I (OP_ICONST), OP_ICONST),
155 cflags: OP_COMPARE (CEE_LDIND_I4 (OP_ICONST), OP_ICONST),
156 cflags: OP_COMPARE (CEE_LDIND_U4 (OP_ICONST), OP_ICONST) {
157 tree->opcode = OP_X86_COMPARE_MEM_IMM;
158 tree->inst_offset = state->left->left->tree->inst_c0;
159 tree->inst_imm = state->right->tree->inst_c0;
160 mono_bblock_add_inst (s->cbb, tree);
163 cflags: OP_COMPARE (reg, CEE_LDIND_REF (base)),
164 cflags: OP_COMPARE (reg, CEE_LDIND_I (base)),
165 cflags: OP_COMPARE (reg, CEE_LDIND_I4 (base)),
166 cflags: OP_COMPARE (reg, CEE_LDIND_U4 (base)) {
167 tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
168 tree->sreg2 = state->right->left->tree->inst_basereg;
169 tree->inst_offset = state->right->left->tree->inst_offset;
170 tree->sreg1 = state->left->reg1;
171 mono_bblock_add_inst (s->cbb, tree);
174 cflags: OP_COMPARE (CEE_LDIND_REF (OP_REGVAR), CEE_LDIND_REF (base)),
175 cflags: OP_COMPARE (CEE_LDIND_I (OP_REGVAR), CEE_LDIND_I (base)),
176 cflags: OP_COMPARE (CEE_LDIND_I4 (OP_REGVAR), CEE_LDIND_I4 (base)),
177 cflags: OP_COMPARE (CEE_LDIND_U4 (OP_REGVAR), CEE_LDIND_U4 (base)) {
178 tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
179 tree->sreg2 = state->right->left->tree->inst_basereg;
180 tree->inst_offset = state->right->left->tree->inst_offset;
181 tree->sreg1 = state->left->left->tree->dreg;
182 mono_bblock_add_inst (s->cbb, tree);
185 cflags : OP_CEQ (OP_COMPARE (OP_CEQ (cflags), OP_ICONST)) {
186 tree->opcode = OP_CNE;
187 tree->dreg = state->reg1;
188 mono_bblock_add_inst (s->cbb, tree);
190 MBCOND (!state->left->right->tree->inst_c0);
194 stmt: CEE_STIND_I1 (base, OP_CEQ (OP_COMPARE (OP_CEQ (cflags), OP_ICONST))) {
195 tree->opcode = OP_X86_SETNE_MEMBASE;
196 tree->inst_offset = state->left->tree->inst_offset;
197 tree->inst_basereg = state->left->tree->inst_basereg;
198 mono_bblock_add_inst (s->cbb, tree);
200 MBCOND (!state->right->left->right->tree->inst_c0);
204 stmt: CEE_STIND_I1 (base, OP_CEQ (cflags)) {
205 tree->opcode = OP_X86_SETEQ_MEMBASE;
206 tree->inst_offset = state->left->tree->inst_offset;
207 tree->inst_basereg = state->left->tree->inst_basereg;
208 mono_bblock_add_inst (s->cbb, tree);
211 reg: OP_LOCALLOC (OP_ICONST) {
212 if (tree->flags & MONO_INST_INIT) {
213 /* microcoded in mini-x86.c */
214 tree->sreg1 = mono_regstate_next_int (s->rs);
215 tree->dreg = state->reg1;
216 MONO_EMIT_NEW_ICONST (s, tree->sreg1, state->left->tree->inst_c0);
217 mono_bblock_add_inst (s->cbb, tree);
219 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, state->left->tree->inst_c0);
220 MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
224 reg: OP_LOCALLOC (reg) {
225 tree->sreg1 = state->left->tree->dreg;
226 tree->dreg = state->reg1;
227 mono_bblock_add_inst (s->cbb, tree);
230 stmt: OP_SETRET (reg) {
231 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->reg1);
234 stmt: OP_SETRET (lreg) {
235 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->left->reg2);
236 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->reg1);
239 stmt: OP_SETRET (CEE_LDIND_REF (OP_REGVAR)),
240 stmt: OP_SETRET (CEE_LDIND_I (OP_REGVAR)),
241 stmt: OP_SETRET (CEE_LDIND_I4 (OP_REGVAR)),
242 stmt: OP_SETRET (CEE_LDIND_U4 (OP_REGVAR)) {
243 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->left->tree->dreg);
246 stmt: OP_SETRET (freg) {
250 stmt: OP_SETRET (OP_ICONST) {
251 tree->opcode = OP_ICONST;
252 tree->inst_c0 = state->left->tree->inst_c0;
253 tree->dreg = X86_EAX;
254 mono_bblock_add_inst (s->cbb, tree);
257 stmt: OP_SETRET (i8con) {
258 MONO_EMIT_NEW_ICONST (s, X86_EAX, state->left->tree->inst_ls_word);
259 MONO_EMIT_NEW_ICONST (s, X86_EDX, state->left->tree->inst_ms_word);
262 stmt: OP_OUTARG (reg) {
263 tree->opcode = OP_X86_PUSH;
264 tree->sreg1 = state->left->reg1;
265 mono_bblock_add_inst (s->cbb, tree);
268 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)),
269 stmt: OP_OUTARG (CEE_LDIND_I4 (OP_REGVAR)),
270 stmt: OP_OUTARG (CEE_LDIND_U4 (OP_REGVAR)),
271 stmt: OP_OUTARG (CEE_LDIND_I (OP_REGVAR)) {
272 tree->opcode = OP_X86_PUSH;
273 tree->sreg1 = state->left->left->tree->dreg;
274 mono_bblock_add_inst (s->cbb, tree);
277 stmt: OP_OUTARG (OP_GOT_ENTRY (CEE_LDIND_I (OP_REGVAR), OP_PATCH_INFO)) {
279 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
280 ins->opcode = OP_X86_PUSH_GOT_ENTRY;
281 ins->inst_right = state->left->right->tree;
282 ins->inst_basereg = state->left->left->left->tree->dreg;
283 mono_bblock_add_inst (s->cbb, ins);
286 stmt: OP_OUTARG (lreg) {
287 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
288 tree->opcode = OP_X86_PUSH;
289 tree->sreg1 = state->left->reg1;
290 mono_bblock_add_inst (s->cbb, tree);
293 stmt: OP_OUTARG (CEE_LDIND_I8 (base)) {
295 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
296 ins->opcode = OP_X86_PUSH_MEMBASE;
297 ins->inst_basereg = state->left->left->tree->inst_basereg;
298 ins->inst_offset = state->left->left->tree->inst_offset + 4;
299 mono_bblock_add_inst (s->cbb, ins);
301 tree->opcode = OP_X86_PUSH_MEMBASE;
302 tree->inst_basereg = state->left->left->tree->inst_basereg;
303 tree->inst_offset = state->left->left->tree->inst_offset;
304 mono_bblock_add_inst (s->cbb, tree);
307 stmt: OP_OUTARG (OP_ICONST) {
308 tree->opcode = OP_X86_PUSH_IMM;
309 tree->inst_imm = state->left->tree->inst_c0;
310 mono_bblock_add_inst (s->cbb, tree);
313 stmt: OP_OUTARG (i8con) {
315 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
316 ins->opcode = OP_X86_PUSH_IMM;
317 ins->inst_imm = state->left->tree->inst_ms_word;
318 mono_bblock_add_inst (s->cbb, ins);
320 tree->opcode = OP_X86_PUSH_IMM;
321 tree->inst_imm = state->left->tree->inst_ls_word;
322 mono_bblock_add_inst (s->cbb, tree);
325 stmt: OP_OUTARG (CEE_LDIND_I4 (base)),
326 stmt: OP_OUTARG (CEE_LDIND_U4 (base)),
327 stmt: OP_OUTARG (CEE_LDIND_I (base)),
328 stmt: OP_OUTARG (CEE_LDIND_REF (base)) {
329 tree->opcode = OP_X86_PUSH_MEMBASE;
330 tree->inst_basereg = state->left->left->tree->inst_basereg;
331 tree->inst_offset = state->left->left->tree->inst_offset;
332 mono_bblock_add_inst (s->cbb, tree);
335 stmt: OP_OUTARG (CEE_LDOBJ (reg)) {
336 tree->opcode = OP_X86_PUSH;
337 tree->sreg1 = state->left->reg1;
338 mono_bblock_add_inst (s->cbb, tree);
341 stmt: OP_OUTARG (freg) {
342 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
343 tree->opcode = OP_STORER8_MEMBASE_REG;
344 tree->sreg1 = state->left->reg1;
345 tree->inst_destbasereg = X86_ESP;
346 tree->inst_offset = 0;
347 mono_bblock_add_inst (s->cbb, tree);
350 stmt: OP_OUTARG_R4 (freg) {
351 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 4);
352 tree->opcode = OP_STORER4_MEMBASE_REG;
353 tree->sreg1 = state->left->reg1;
354 tree->inst_destbasereg = X86_ESP;
355 tree->inst_offset = 0;
356 mono_bblock_add_inst (s->cbb, tree);
359 stmt: OP_OUTARG_R8 (freg) {
360 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
361 tree->opcode = OP_STORER8_MEMBASE_REG;
362 tree->sreg1 = state->left->reg1;
363 tree->inst_destbasereg = X86_ESP;
364 tree->inst_offset = 0;
365 mono_bblock_add_inst (s->cbb, tree);
368 stmt: OP_OUTARG_VT (CEE_LDOBJ (base)) {
369 MonoInst *vt = state->left->left->tree;
370 //g_print ("vt size: %d at R%d + %d\n", tree->inst_imm, vt->inst_basereg, vt->inst_offset);
375 if (tree->inst_imm <= 4) {
376 tree->opcode = OP_X86_PUSH_MEMBASE;
377 tree->inst_basereg = vt->inst_basereg;
378 tree->inst_offset = vt->inst_offset;
379 mono_bblock_add_inst (s->cbb, tree);
380 } else if (tree->inst_imm <= 20) {
381 int sz = tree->inst_imm;
384 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, sz);
385 mini_emit_memcpy (s, X86_ESP, 0, vt->inst_basereg, vt->inst_offset, tree->inst_imm, 0);
387 tree->opcode = OP_X86_PUSH_OBJ;
388 tree->inst_basereg = vt->inst_basereg;
389 tree->inst_offset = vt->inst_offset;
390 mono_bblock_add_inst (s->cbb, tree);
394 stmt: OP_OUTARG_VT (OP_ICONST) {
395 tree->opcode = OP_X86_PUSH_IMM;
396 tree->inst_imm = state->left->tree->inst_c0;
397 mono_bblock_add_inst (s->cbb, tree);
400 stmt: OP_OUTARG_VT (reg) {
401 tree->opcode = OP_X86_PUSH;
402 tree->sreg1 = state->left->reg1;
403 mono_bblock_add_inst (s->cbb, tree);
406 reg: OP_LDADDR (OP_REGOFFSET),
407 reg: CEE_LDOBJ (OP_REGOFFSET) {
408 if (state->left->tree->inst_offset) {
409 tree->opcode = OP_X86_LEA_MEMBASE;
410 tree->inst_imm = state->left->tree->inst_offset;
412 tree->opcode = OP_MOVE;
414 tree->sreg1 = state->left->tree->inst_basereg;
415 tree->dreg = state->reg1;
416 mono_bblock_add_inst (s->cbb, tree);
419 reg: CEE_LDELEMA (reg, reg) "15" {
420 guint32 size = mono_class_array_element_size (tree->klass);
422 MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoArray, max_length, state->right->reg1);
424 if (size == 1 || size == 2 || size == 4 || size == 8) {
425 static const int fast_log2 [] = { 1, 0, 1, -1, 2, -1, -1, -1, 3 };
426 tree->opcode = OP_X86_LEA;
427 tree->dreg = state->reg1;
428 tree->sreg1 = state->left->reg1;
429 tree->sreg2 = state->right->reg1;
430 tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
431 tree->unused = fast_log2 [size];
432 mono_bblock_add_inst (s->cbb, tree);
434 int mult_reg = mono_regstate_next_int (s->rs);
435 int add_reg = mono_regstate_next_int (s->rs);
436 MONO_EMIT_NEW_BIALU_IMM (s, OP_MUL_IMM, mult_reg, state->right->reg1, size);
437 MONO_EMIT_NEW_BIALU (s, CEE_ADD, add_reg, mult_reg, state->left->reg1);
438 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, state->reg1, add_reg, G_STRUCT_OFFSET (MonoArray, vector));
442 stmt: CEE_STIND_R8 (OP_REGVAR, freg) {
443 /* nothing to do: the value is already on the FP stack */
446 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
447 int con = state->right->right->tree->inst_c0;
450 tree->opcode = OP_X86_INC_MEMBASE;
452 tree->opcode = OP_X86_ADD_MEMBASE_IMM;
453 tree->inst_imm = con;
456 tree->inst_basereg = state->left->tree->inst_basereg;
457 tree->inst_offset = state->left->tree->inst_offset;
458 mono_bblock_add_inst (s->cbb, tree);
460 MBTREE_TYPE *t1 = state->right->left->left->tree;
461 MBTREE_TYPE *t2 = state->left->tree;
462 MBCOND (t1->inst_basereg == t2->inst_basereg &&
463 t1->inst_offset == t2->inst_offset);
467 stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)) {
468 int con = state->right->right->tree->inst_c0;
471 tree->opcode = OP_X86_DEC_MEMBASE;
473 tree->opcode = OP_X86_SUB_MEMBASE_IMM;
474 tree->inst_imm = con;
477 tree->inst_basereg = state->left->tree->inst_basereg;
478 tree->inst_offset = state->left->tree->inst_offset;
479 mono_bblock_add_inst (s->cbb, tree);
481 MBTREE_TYPE *t1 = state->right->left->left->tree;
482 MBTREE_TYPE *t2 = state->left->tree;
483 MBCOND (t1->inst_basereg == t2->inst_basereg &&
484 t1->inst_offset == t2->inst_offset);
489 # this rules is incorrect, it needs to do an indirect inc (inc_membase)
490 #stmt: CEE_STIND_I4 (reg, CEE_ADD (reg, OP_ICONST)) {
491 # tree->opcode = OP_X86_INC_REG;
492 # tree->dreg = state->left->reg1;
493 # mono_bblock_add_inst (s->cbb, tree);
495 # MBState *s1 = state->left;
496 # MBState *s2 = state->right->left;
497 # int con = state->right->right->tree->inst_c0;
498 # MBCOND (con == 1 && s1->reg1 == s2->reg1);
502 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_SUB (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
503 int con = state->right->right->tree->inst_c0;
504 int dreg = state->left->tree->dreg;
505 int sreg = state->right->left->left->tree->dreg;
509 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
510 tree->opcode = OP_X86_DEC_REG;
511 tree->dreg = tree->sreg1 = dreg;
512 } else if (con == -1) {
514 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
515 tree->opcode = OP_X86_INC_REG;
516 tree->dreg = tree->sreg1 = dreg;
518 tree->opcode = OP_SUB_IMM;
519 tree->inst_imm = con;
523 mono_bblock_add_inst (s->cbb, tree);
526 stmt: CEE_STIND_I (OP_REGVAR, CEE_ADD (CEE_LDIND_I (OP_REGVAR), OP_ICONST)),
527 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_ADD (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
528 int con = state->right->right->tree->inst_c0;
529 int dreg = state->left->tree->dreg;
530 int sreg = state->right->left->left->tree->dreg;
534 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
535 tree->opcode = OP_X86_INC_REG;
536 tree->dreg = tree->sreg1 = dreg;
537 } else if (con == -1) {
539 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
540 tree->opcode = OP_X86_DEC_REG;
541 tree->dreg = tree->sreg1 = dreg;
543 tree->opcode = OP_ADD_IMM;
544 tree->inst_imm = con;
548 mono_bblock_add_inst (s->cbb, tree);
551 reg: CEE_LDIND_I2 (OP_REGVAR) {
552 MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);
556 stmt: CEE_STIND_I4 (OP_REGVAR, OP_ICONST),
557 stmt: CEE_STIND_I2 (OP_REGVAR, OP_ICONST),
558 stmt: CEE_STIND_I1 (OP_REGVAR, OP_ICONST),
559 stmt: CEE_STIND_REF (OP_REGVAR, OP_ICONST),
560 stmt: CEE_STIND_I (OP_REGVAR, OP_ICONST) {
561 int r = state->left->tree->dreg;
562 MONO_EMIT_BIALU (s, tree, CEE_XOR, r, r, r);
564 MBCOND (!state->right->tree->inst_c0);
569 # on x86, fp compare overwrites EAX, so we must
570 # either improve the local register allocator or
571 # emit coarse opcodes which saves EAX for us.
573 reg: OP_CEQ (OP_COMPARE (freg, freg)) {
574 MONO_EMIT_BIALU (s, tree, OP_FCEQ, state->reg1, state->left->left->reg1,
575 state->left->right->reg1);
578 reg: OP_CLT (OP_COMPARE (freg, freg)) {
579 MONO_EMIT_BIALU (s, tree, OP_FCLT, state->reg1, state->left->left->reg1,
580 state->left->right->reg1);
583 reg: OP_CLT_UN (OP_COMPARE (freg, freg)) {
584 MONO_EMIT_BIALU (s, tree, OP_FCLT_UN, state->reg1, state->left->left->reg1,
585 state->left->right->reg1);
588 reg: OP_CGT (OP_COMPARE (freg, freg)) {
589 MONO_EMIT_BIALU (s, tree, OP_FCGT, state->reg1, state->left->left->reg1,
590 state->left->right->reg1);
593 reg: OP_CGT_UN (OP_COMPARE (freg, freg)) {
594 MONO_EMIT_BIALU (s, tree, OP_FCGT_UN, state->reg1, state->left->left->reg1,
595 state->left->right->reg1);
598 # fpcflags overwrites EAX, but this does not matter for statements
599 # because we are the last operation in the tree.
601 stmt: CEE_BNE_UN (fpcflags) {
602 tree->opcode = OP_FBNE_UN;
603 mono_bblock_add_inst (s->cbb, tree);
606 stmt: CEE_BEQ (fpcflags) {
607 tree->opcode = OP_FBEQ;
608 mono_bblock_add_inst (s->cbb, tree);
611 stmt: CEE_BLT (fpcflags) {
612 tree->opcode = OP_FBLT;
613 mono_bblock_add_inst (s->cbb, tree);
616 stmt: CEE_BLT_UN (fpcflags) {
617 tree->opcode = OP_FBLT_UN;
618 mono_bblock_add_inst (s->cbb, tree);
621 stmt: CEE_BGT (fpcflags) {
622 tree->opcode = OP_FBGT;
623 mono_bblock_add_inst (s->cbb, tree);
626 stmt: CEE_BGT_UN (fpcflags) {
627 tree->opcode = OP_FBGT_UN;
628 mono_bblock_add_inst (s->cbb, tree);
631 stmt: CEE_BGE (fpcflags) {
632 tree->opcode = OP_FBGE;
633 mono_bblock_add_inst (s->cbb, tree);
636 stmt: CEE_BGE_UN (fpcflags) {
637 tree->opcode = OP_FBGE_UN;
638 mono_bblock_add_inst (s->cbb, tree);
641 stmt: CEE_BLE (fpcflags) {
642 tree->opcode = OP_FBLE;
643 mono_bblock_add_inst (s->cbb, tree);
646 stmt: CEE_BLE_UN (fpcflags) {
647 tree->opcode = OP_FBLE_UN;
648 mono_bblock_add_inst (s->cbb, tree);
651 stmt: CEE_POP (freg) "0" {
652 /* we need to pop the value from the x86 FP stack */
653 MONO_EMIT_UNALU (s, tree, OP_X86_FPOP, -1, state->left->reg1);
656 # override the rules in inssel-float.brg that work for machines with FP registers
658 freg: OP_FCONV_TO_R8 (freg) "0" {
662 freg: OP_FCONV_TO_R4 (freg) "0" {
663 /* fixme: nothing to do ??*/
666 reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) {
667 MonoInst *base = state->right->left->tree;
669 tree->dreg = state->reg1;
670 tree->sreg1 = state->left->reg1;
671 tree->sreg2 = base->inst_basereg;
672 tree->inst_offset = base->inst_offset;
673 tree->opcode = OP_X86_ADD_MEMBASE;
674 mono_bblock_add_inst (s->cbb, tree);
677 reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) {
678 MonoInst *base = state->right->left->tree;
680 tree->dreg = state->reg1;
681 tree->sreg1 = state->left->reg1;
682 tree->sreg2 = base->inst_basereg;
683 tree->inst_offset = base->inst_offset;
684 tree->opcode = OP_X86_SUB_MEMBASE;
685 mono_bblock_add_inst (s->cbb, tree);
688 reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) {
689 MonoInst *base = state->right->left->tree;
691 tree->dreg = state->reg1;
692 tree->sreg1 = state->left->reg1;
693 tree->sreg2 = base->inst_basereg;
694 tree->inst_offset = base->inst_offset;
695 tree->opcode = OP_X86_MUL_MEMBASE;
696 mono_bblock_add_inst (s->cbb, tree);
699 lreg: OP_LSHL (lreg, reg) "0" {
700 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
703 lreg: OP_LSHL (lreg, OP_ICONST) "0" {
704 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
707 lreg: OP_LSHR (lreg, reg) "0" {
708 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
711 lreg: OP_LSHR (lreg, OP_ICONST) "0" {
712 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
715 lreg: OP_LSHR_UN (lreg, reg) "0" {
716 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
719 lreg: OP_LSHR_UN (lreg, OP_ICONST) "0" {
720 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
723 reg: OP_ATOMIC_ADD_NEW_I4 (base, reg),
724 reg: OP_ATOMIC_ADD_I4 (base, reg) {
725 tree->opcode = tree->opcode;
726 tree->inst_basereg = state->left->tree->inst_basereg;
727 tree->inst_offset = state->left->tree->inst_offset;
728 tree->dreg = state->reg1;
729 tree->sreg2 = state->right->reg1;
731 mono_bblock_add_inst (s->cbb, tree);
734 reg: OP_ATOMIC_EXCHANGE_I4 (base, reg) {
735 tree->opcode = OP_ATOMIC_EXCHANGE_I4;
736 tree->dreg = state->reg1;
737 tree->sreg2 = state->right->reg1;
738 tree->inst_basereg = state->left->tree->inst_basereg;
739 tree->inst_offset = state->left->tree->inst_offset;
741 mono_bblock_add_inst (s->cbb, tree);