1 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG(cfg,basereg,offset,operand) do { \
3 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
4 inst->opcode = OP_X86_COMPARE_MEMBASE_REG; \
5 inst->inst_basereg = basereg; \
6 inst->inst_offset = offset; \
7 inst->sreg2 = operand; \
8 mono_bblock_add_inst (cfg->cbb, inst); \
11 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM(cfg,basereg,offset,operand) do { \
13 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
14 inst->opcode = OP_X86_COMPARE_MEMBASE_IMM; \
15 inst->inst_basereg = basereg; \
16 inst->inst_offset = offset; \
17 inst->inst_imm = operand; \
18 mono_bblock_add_inst (cfg->cbb, inst); \
21 /* override the arch independant versions with fast x86 versions */
23 #undef MONO_EMIT_BOUNDS_CHECK
24 #undef MONO_EMIT_BOUNDS_CHECK_IMM
26 #define MONO_EMIT_BOUNDS_CHECK(cfg, array_reg, array_type, array_length_field, index_reg) do { \
27 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
28 MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_reg); \
29 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
33 #define MONO_EMIT_BOUNDS_CHECK_IMM(cfg, array_reg, array_type, array_length_field, index_imm) do { \
34 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
35 MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_imm); \
36 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
40 int call_reg_to_call_membase (int opcode);
45 # inssel-x86.brg: burg file for special x86 instructions
48 # Dietmar Maurer (dietmar@ximian.com)
49 # Paolo Molaro (lupus@ximian.com)
51 # (C) 2002 Ximian, Inc.
54 stmt: OP_START_HANDLER {
55 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
56 MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP);
59 stmt: CEE_ENDFINALLY {
60 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
61 MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
62 tree->opcode = CEE_RET;
63 mono_bblock_add_inst (s->cbb, tree);
66 stmt: OP_ENDFILTER (reg) {
67 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
68 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->left->reg1);
69 MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
70 tree->opcode = CEE_RET;
71 mono_bblock_add_inst (s->cbb, tree);
74 stmt: CEE_STIND_I8 (OP_REGVAR, lreg) {
75 /* this should only happen for methods returning a long */
76 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->right->reg1);
77 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->right->reg2);
80 lreg: OP_LNEG (lreg) "3" {
81 int tmpr = mono_regstate_next_int (s->rs);
82 MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg1, state->left->reg1);
83 MONO_EMIT_BIALU_IMM (s, tree, OP_ADC_IMM, tmpr, state->left->reg2, 0);
84 MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg2, tmpr);
87 freg: OP_LCONV_TO_R8 (lreg) {
88 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
89 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
90 tree->opcode = OP_X86_FP_LOAD_I8;
91 tree->inst_basereg = X86_ESP;
92 tree->inst_offset = 0;
93 mono_bblock_add_inst (s->cbb, tree);
94 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
97 freg: OP_LCONV_TO_R4 (lreg) {
98 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
99 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
100 tree->opcode = OP_X86_FP_LOAD_I8;
101 tree->inst_basereg = X86_ESP;
102 tree->inst_offset = 0;
103 mono_bblock_add_inst (s->cbb, tree);
104 /* change precision */
105 MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORER4_MEMBASE_REG, X86_ESP, 0, state->reg1);
106 MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADR4_MEMBASE, state->reg1, X86_ESP, 0);
107 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
110 freg: CEE_CONV_R_UN (reg) {
111 MONO_EMIT_NEW_BIALU_IMM (s, OP_X86_PUSH_IMM, -1, -1, 0);
112 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
113 tree->opcode = OP_X86_FP_LOAD_I8;
114 tree->inst_basereg = X86_ESP;
115 tree->inst_offset = 0;
116 mono_bblock_add_inst (s->cbb, tree);
117 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
120 cflags: OP_COMPARE (CEE_LDIND_REF (base), reg),
121 cflags: OP_COMPARE (CEE_LDIND_I (base), reg),
122 cflags: OP_COMPARE (CEE_LDIND_I4 (base), reg),
123 cflags: OP_COMPARE (CEE_LDIND_U4 (base), reg) {
124 tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
125 tree->inst_basereg = state->left->left->tree->inst_basereg;
126 tree->inst_offset = state->left->left->tree->inst_offset;
127 tree->sreg2 = state->right->reg1;
128 mono_bblock_add_inst (s->cbb, tree);
131 cflags: OP_COMPARE (CEE_LDIND_REF (base), CEE_LDIND_REF (OP_REGVAR)),
132 cflags: OP_COMPARE (CEE_LDIND_I (base), CEE_LDIND_REF (OP_REGVAR)),
133 cflags: OP_COMPARE (CEE_LDIND_I4 (base), CEE_LDIND_REF (OP_REGVAR)),
134 cflags: OP_COMPARE (CEE_LDIND_U4 (base), CEE_LDIND_REF (OP_REGVAR)) {
135 tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
136 tree->inst_basereg = state->left->left->tree->inst_basereg;
137 tree->inst_offset = state->left->left->tree->inst_offset;
138 tree->sreg2 = state->right->left->tree->dreg;
139 mono_bblock_add_inst (s->cbb, tree);
142 cflags: OP_COMPARE (CEE_LDIND_REF (base), OP_ICONST),
143 cflags: OP_COMPARE (CEE_LDIND_I (base), OP_ICONST),
144 cflags: OP_COMPARE (CEE_LDIND_I4 (base), OP_ICONST),
145 cflags: OP_COMPARE (CEE_LDIND_U4 (base), OP_ICONST) {
146 tree->opcode = OP_X86_COMPARE_MEMBASE_IMM;
147 tree->inst_basereg = state->left->left->tree->inst_basereg;
148 tree->inst_offset = state->left->left->tree->inst_offset;
149 tree->inst_imm = state->right->tree->inst_c0;
150 mono_bblock_add_inst (s->cbb, tree);
154 cflags: OP_COMPARE (CEE_LDIND_REF (OP_ICONST), OP_ICONST),
155 cflags: OP_COMPARE (CEE_LDIND_I (OP_ICONST), OP_ICONST),
156 cflags: OP_COMPARE (CEE_LDIND_I4 (OP_ICONST), OP_ICONST),
157 cflags: OP_COMPARE (CEE_LDIND_U4 (OP_ICONST), OP_ICONST) {
158 tree->opcode = OP_X86_COMPARE_MEM_IMM;
159 tree->inst_offset = state->left->left->tree->inst_c0;
160 tree->inst_imm = state->right->tree->inst_c0;
161 mono_bblock_add_inst (s->cbb, tree);
164 cflags: OP_COMPARE (reg, CEE_LDIND_REF (base)),
165 cflags: OP_COMPARE (reg, CEE_LDIND_I (base)),
166 cflags: OP_COMPARE (reg, CEE_LDIND_I4 (base)),
167 cflags: OP_COMPARE (reg, CEE_LDIND_U4 (base)) {
168 tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
169 tree->sreg2 = state->right->left->tree->inst_basereg;
170 tree->inst_offset = state->right->left->tree->inst_offset;
171 tree->sreg1 = state->left->reg1;
172 mono_bblock_add_inst (s->cbb, tree);
175 cflags: OP_COMPARE (CEE_LDIND_REF (OP_REGVAR), CEE_LDIND_REF (base)),
176 cflags: OP_COMPARE (CEE_LDIND_I (OP_REGVAR), CEE_LDIND_I (base)),
177 cflags: OP_COMPARE (CEE_LDIND_I4 (OP_REGVAR), CEE_LDIND_I4 (base)),
178 cflags: OP_COMPARE (CEE_LDIND_U4 (OP_REGVAR), CEE_LDIND_U4 (base)) {
179 tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
180 tree->sreg2 = state->right->left->tree->inst_basereg;
181 tree->inst_offset = state->right->left->tree->inst_offset;
182 tree->sreg1 = state->left->left->tree->dreg;
183 mono_bblock_add_inst (s->cbb, tree);
186 cflags : OP_CEQ (OP_COMPARE (OP_CEQ (cflags), OP_ICONST)) {
187 tree->opcode = OP_CNE;
188 tree->dreg = state->reg1;
189 mono_bblock_add_inst (s->cbb, tree);
191 MBCOND (!state->left->right->tree->inst_c0);
195 stmt: CEE_STIND_I1 (base, OP_CEQ (OP_COMPARE (OP_CEQ (cflags), OP_ICONST))) {
196 tree->opcode = OP_X86_SETNE_MEMBASE;
197 tree->inst_offset = state->left->tree->inst_offset;
198 tree->inst_basereg = state->left->tree->inst_basereg;
199 mono_bblock_add_inst (s->cbb, tree);
201 MBCOND (!state->right->left->right->tree->inst_c0);
205 stmt: CEE_STIND_I1 (base, OP_CEQ (cflags)) {
206 tree->opcode = OP_X86_SETEQ_MEMBASE;
207 tree->inst_offset = state->left->tree->inst_offset;
208 tree->inst_basereg = state->left->tree->inst_basereg;
209 mono_bblock_add_inst (s->cbb, tree);
212 reg: OP_LOCALLOC (OP_ICONST) {
213 if (tree->flags & MONO_INST_INIT) {
214 /* microcoded in mini-x86.c */
215 tree->sreg1 = mono_regstate_next_int (s->rs);
216 tree->dreg = state->reg1;
217 MONO_EMIT_NEW_ICONST (s, tree->sreg1, state->left->tree->inst_c0);
218 mono_bblock_add_inst (s->cbb, tree);
220 guint32 size = state->left->tree->inst_c0;
221 size = (size + (MONO_ARCH_FRAME_ALIGNMENT - 1)) & ~ (MONO_ARCH_FRAME_ALIGNMENT - 1);
222 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, size);
223 MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
227 reg: OP_LOCALLOC (reg) {
228 tree->sreg1 = state->left->tree->dreg;
229 tree->dreg = state->reg1;
230 mono_bblock_add_inst (s->cbb, tree);
233 stmt: OP_SETRET (reg) {
234 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->reg1);
237 stmt: OP_SETRET (lreg) {
238 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->left->reg2);
239 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->reg1);
242 stmt: OP_SETRET (CEE_LDIND_REF (OP_REGVAR)),
243 stmt: OP_SETRET (CEE_LDIND_I (OP_REGVAR)),
244 stmt: OP_SETRET (CEE_LDIND_I4 (OP_REGVAR)),
245 stmt: OP_SETRET (CEE_LDIND_U4 (OP_REGVAR)) {
246 MONO_EMIT_UNALU (s, tree, OP_MOVE, X86_EAX, state->left->left->tree->dreg);
249 stmt: OP_SETRET (freg) {
253 stmt: OP_SETRET (OP_ICONST) {
254 tree->opcode = OP_ICONST;
255 tree->inst_c0 = state->left->tree->inst_c0;
256 tree->dreg = X86_EAX;
257 mono_bblock_add_inst (s->cbb, tree);
260 stmt: OP_SETRET (i8con) {
261 MONO_EMIT_NEW_ICONST (s, X86_EAX, state->left->tree->inst_ls_word);
262 MONO_EMIT_NEW_ICONST (s, X86_EDX, state->left->tree->inst_ms_word);
265 stmt: OP_OUTARG (reg) {
266 tree->opcode = OP_X86_PUSH;
267 tree->sreg1 = state->left->reg1;
268 mono_bblock_add_inst (s->cbb, tree);
271 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)),
272 stmt: OP_OUTARG (CEE_LDIND_I4 (OP_REGVAR)),
273 stmt: OP_OUTARG (CEE_LDIND_U4 (OP_REGVAR)),
274 stmt: OP_OUTARG (CEE_LDIND_I (OP_REGVAR)) {
275 tree->opcode = OP_X86_PUSH;
276 tree->sreg1 = state->left->left->tree->dreg;
277 mono_bblock_add_inst (s->cbb, tree);
280 stmt: OP_OUTARG (OP_GOT_ENTRY (CEE_LDIND_I (OP_REGVAR), OP_PATCH_INFO)) {
282 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
283 ins->opcode = OP_X86_PUSH_GOT_ENTRY;
284 ins->inst_right = state->left->right->tree;
285 ins->inst_basereg = state->left->left->left->tree->dreg;
286 mono_bblock_add_inst (s->cbb, ins);
289 stmt: OP_OUTARG (lreg) {
290 MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
291 tree->opcode = OP_X86_PUSH;
292 tree->sreg1 = state->left->reg1;
293 mono_bblock_add_inst (s->cbb, tree);
296 stmt: OP_OUTARG (CEE_LDIND_I8 (base)) {
298 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
299 ins->opcode = OP_X86_PUSH_MEMBASE;
300 ins->inst_basereg = state->left->left->tree->inst_basereg;
301 ins->inst_offset = state->left->left->tree->inst_offset + 4;
302 mono_bblock_add_inst (s->cbb, ins);
304 tree->opcode = OP_X86_PUSH_MEMBASE;
305 tree->inst_basereg = state->left->left->tree->inst_basereg;
306 tree->inst_offset = state->left->left->tree->inst_offset;
307 mono_bblock_add_inst (s->cbb, tree);
310 stmt: OP_OUTARG (OP_ICONST) {
311 tree->opcode = OP_X86_PUSH_IMM;
312 tree->inst_imm = state->left->tree->inst_c0;
313 mono_bblock_add_inst (s->cbb, tree);
316 stmt: OP_OUTARG (i8con) {
318 ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
319 ins->opcode = OP_X86_PUSH_IMM;
320 ins->inst_imm = state->left->tree->inst_ms_word;
321 mono_bblock_add_inst (s->cbb, ins);
323 tree->opcode = OP_X86_PUSH_IMM;
324 tree->inst_imm = state->left->tree->inst_ls_word;
325 mono_bblock_add_inst (s->cbb, tree);
328 stmt: OP_OUTARG (CEE_LDIND_I4 (base)),
329 stmt: OP_OUTARG (CEE_LDIND_U4 (base)),
330 stmt: OP_OUTARG (CEE_LDIND_I (base)),
331 stmt: OP_OUTARG (CEE_LDIND_REF (base)) {
332 tree->opcode = OP_X86_PUSH_MEMBASE;
333 tree->inst_basereg = state->left->left->tree->inst_basereg;
334 tree->inst_offset = state->left->left->tree->inst_offset;
335 mono_bblock_add_inst (s->cbb, tree);
338 stmt: OP_OUTARG (CEE_LDOBJ (reg)) {
339 tree->opcode = OP_X86_PUSH;
340 tree->sreg1 = state->left->reg1;
341 mono_bblock_add_inst (s->cbb, tree);
344 stmt: OP_OUTARG (freg) {
345 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
346 tree->opcode = OP_STORER8_MEMBASE_REG;
347 tree->sreg1 = state->left->reg1;
348 tree->inst_destbasereg = X86_ESP;
349 tree->inst_offset = 0;
350 mono_bblock_add_inst (s->cbb, tree);
353 stmt: OP_OUTARG_R4 (freg) {
354 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 4);
355 tree->opcode = OP_STORER4_MEMBASE_REG;
356 tree->sreg1 = state->left->reg1;
357 tree->inst_destbasereg = X86_ESP;
358 tree->inst_offset = 0;
359 mono_bblock_add_inst (s->cbb, tree);
362 stmt: OP_OUTARG_R8 (freg) {
363 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
364 tree->opcode = OP_STORER8_MEMBASE_REG;
365 tree->sreg1 = state->left->reg1;
366 tree->inst_destbasereg = X86_ESP;
367 tree->inst_offset = 0;
368 mono_bblock_add_inst (s->cbb, tree);
371 stmt: OP_OUTARG_VT (CEE_LDOBJ (base)) {
372 MonoInst *vt = state->left->left->tree;
373 //g_print ("vt size: %d at R%d + %d\n", tree->inst_imm, vt->inst_basereg, vt->inst_offset);
378 if (tree->inst_imm <= 4) {
379 tree->opcode = OP_X86_PUSH_MEMBASE;
380 tree->inst_basereg = vt->inst_basereg;
381 tree->inst_offset = vt->inst_offset;
382 mono_bblock_add_inst (s->cbb, tree);
383 } else if (tree->inst_imm <= 20) {
384 int sz = tree->inst_imm;
387 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, sz);
388 mini_emit_memcpy (s, X86_ESP, 0, vt->inst_basereg, vt->inst_offset, tree->inst_imm, 0);
390 tree->opcode = OP_X86_PUSH_OBJ;
391 tree->inst_basereg = vt->inst_basereg;
392 tree->inst_offset = vt->inst_offset;
393 mono_bblock_add_inst (s->cbb, tree);
397 stmt: OP_OUTARG_VT (OP_ICONST) {
398 tree->opcode = OP_X86_PUSH_IMM;
399 tree->inst_imm = state->left->tree->inst_c0;
400 mono_bblock_add_inst (s->cbb, tree);
403 stmt: OP_OUTARG_VT (reg) {
404 tree->opcode = OP_X86_PUSH;
405 tree->sreg1 = state->left->reg1;
406 mono_bblock_add_inst (s->cbb, tree);
409 reg: OP_LDADDR (OP_REGOFFSET),
410 reg: CEE_LDOBJ (OP_REGOFFSET) {
411 if (state->left->tree->inst_offset) {
412 tree->opcode = OP_X86_LEA_MEMBASE;
413 tree->inst_imm = state->left->tree->inst_offset;
415 tree->opcode = OP_MOVE;
417 tree->sreg1 = state->left->tree->inst_basereg;
418 tree->dreg = state->reg1;
419 mono_bblock_add_inst (s->cbb, tree);
422 reg: CEE_LDELEMA (reg, reg) "15" {
423 guint32 size = mono_class_array_element_size (tree->klass);
425 MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoArray, max_length, state->right->reg1);
427 if (size == 1 || size == 2 || size == 4 || size == 8) {
428 static const int fast_log2 [] = { 1, 0, 1, -1, 2, -1, -1, -1, 3 };
429 tree->opcode = OP_X86_LEA;
430 tree->dreg = state->reg1;
431 tree->sreg1 = state->left->reg1;
432 tree->sreg2 = state->right->reg1;
433 tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
434 tree->unused = fast_log2 [size];
435 mono_bblock_add_inst (s->cbb, tree);
437 int mult_reg = mono_regstate_next_int (s->rs);
438 int add_reg = mono_regstate_next_int (s->rs);
439 MONO_EMIT_NEW_BIALU_IMM (s, OP_MUL_IMM, mult_reg, state->right->reg1, size);
440 MONO_EMIT_NEW_BIALU (s, CEE_ADD, add_reg, mult_reg, state->left->reg1);
441 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, state->reg1, add_reg, G_STRUCT_OFFSET (MonoArray, vector));
445 stmt: CEE_STIND_R8 (OP_REGVAR, freg) {
446 /* nothing to do: the value is already on the FP stack */
449 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
450 int con = state->right->right->tree->inst_c0;
453 tree->opcode = OP_X86_INC_MEMBASE;
455 tree->opcode = OP_X86_ADD_MEMBASE_IMM;
456 tree->inst_imm = con;
459 tree->inst_basereg = state->left->tree->inst_basereg;
460 tree->inst_offset = state->left->tree->inst_offset;
461 mono_bblock_add_inst (s->cbb, tree);
463 MBTREE_TYPE *t1 = state->right->left->left->tree;
464 MBTREE_TYPE *t2 = state->left->tree;
465 MBCOND (t1->inst_basereg == t2->inst_basereg &&
466 t1->inst_offset == t2->inst_offset);
470 stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)) {
471 int con = state->right->right->tree->inst_c0;
474 tree->opcode = OP_X86_DEC_MEMBASE;
476 tree->opcode = OP_X86_SUB_MEMBASE_IMM;
477 tree->inst_imm = con;
480 tree->inst_basereg = state->left->tree->inst_basereg;
481 tree->inst_offset = state->left->tree->inst_offset;
482 mono_bblock_add_inst (s->cbb, tree);
484 MBTREE_TYPE *t1 = state->right->left->left->tree;
485 MBTREE_TYPE *t2 = state->left->tree;
486 MBCOND (t1->inst_basereg == t2->inst_basereg &&
487 t1->inst_offset == t2->inst_offset);
492 # this rules is incorrect, it needs to do an indirect inc (inc_membase)
493 #stmt: CEE_STIND_I4 (reg, CEE_ADD (reg, OP_ICONST)) {
494 # tree->opcode = OP_X86_INC_REG;
495 # tree->dreg = state->left->reg1;
496 # mono_bblock_add_inst (s->cbb, tree);
498 # MBState *s1 = state->left;
499 # MBState *s2 = state->right->left;
500 # int con = state->right->right->tree->inst_c0;
501 # MBCOND (con == 1 && s1->reg1 == s2->reg1);
505 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_SUB (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
506 int con = state->right->right->tree->inst_c0;
507 int dreg = state->left->tree->dreg;
508 int sreg = state->right->left->left->tree->dreg;
512 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
513 tree->opcode = OP_X86_DEC_REG;
514 tree->dreg = tree->sreg1 = dreg;
515 } else if (con == -1) {
517 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
518 tree->opcode = OP_X86_INC_REG;
519 tree->dreg = tree->sreg1 = dreg;
521 tree->opcode = OP_SUB_IMM;
522 tree->inst_imm = con;
526 mono_bblock_add_inst (s->cbb, tree);
529 stmt: CEE_STIND_I (OP_REGVAR, CEE_ADD (CEE_LDIND_I (OP_REGVAR), OP_ICONST)),
530 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_ADD (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
531 int con = state->right->right->tree->inst_c0;
532 int dreg = state->left->tree->dreg;
533 int sreg = state->right->left->left->tree->dreg;
537 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
538 tree->opcode = OP_X86_INC_REG;
539 tree->dreg = tree->sreg1 = dreg;
540 } else if (con == -1) {
542 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
543 tree->opcode = OP_X86_DEC_REG;
544 tree->dreg = tree->sreg1 = dreg;
546 tree->opcode = OP_ADD_IMM;
547 tree->inst_imm = con;
551 mono_bblock_add_inst (s->cbb, tree);
554 reg: CEE_LDIND_I2 (OP_REGVAR) {
555 MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);
559 stmt: CEE_STIND_I4 (OP_REGVAR, OP_ICONST),
560 stmt: CEE_STIND_I2 (OP_REGVAR, OP_ICONST),
561 stmt: CEE_STIND_I1 (OP_REGVAR, OP_ICONST),
562 stmt: CEE_STIND_REF (OP_REGVAR, OP_ICONST),
563 stmt: CEE_STIND_I (OP_REGVAR, OP_ICONST) {
564 int r = state->left->tree->dreg;
565 MONO_EMIT_BIALU (s, tree, CEE_XOR, r, r, r);
567 MBCOND (!state->right->tree->inst_c0);
572 # on x86, fp compare overwrites EAX, so we must
573 # either improve the local register allocator or
574 # emit coarse opcodes which saves EAX for us.
576 reg: OP_CEQ (OP_COMPARE (freg, freg)) {
577 MONO_EMIT_BIALU (s, tree, OP_FCEQ, state->reg1, state->left->left->reg1,
578 state->left->right->reg1);
581 reg: OP_CLT (OP_COMPARE (freg, freg)) {
582 MONO_EMIT_BIALU (s, tree, OP_FCLT, state->reg1, state->left->left->reg1,
583 state->left->right->reg1);
586 reg: OP_CLT_UN (OP_COMPARE (freg, freg)) {
587 MONO_EMIT_BIALU (s, tree, OP_FCLT_UN, state->reg1, state->left->left->reg1,
588 state->left->right->reg1);
591 reg: OP_CGT (OP_COMPARE (freg, freg)) {
592 MONO_EMIT_BIALU (s, tree, OP_FCGT, state->reg1, state->left->left->reg1,
593 state->left->right->reg1);
596 reg: OP_CGT_UN (OP_COMPARE (freg, freg)) {
597 MONO_EMIT_BIALU (s, tree, OP_FCGT_UN, state->reg1, state->left->left->reg1,
598 state->left->right->reg1);
601 # fpcflags overwrites EAX, but this does not matter for statements
602 # because we are the last operation in the tree.
604 stmt: CEE_BNE_UN (fpcflags) {
605 tree->opcode = OP_FBNE_UN;
606 mono_bblock_add_inst (s->cbb, tree);
609 stmt: CEE_BEQ (fpcflags) {
610 tree->opcode = OP_FBEQ;
611 mono_bblock_add_inst (s->cbb, tree);
614 stmt: CEE_BLT (fpcflags) {
615 tree->opcode = OP_FBLT;
616 mono_bblock_add_inst (s->cbb, tree);
619 stmt: CEE_BLT_UN (fpcflags) {
620 tree->opcode = OP_FBLT_UN;
621 mono_bblock_add_inst (s->cbb, tree);
624 stmt: CEE_BGT (fpcflags) {
625 tree->opcode = OP_FBGT;
626 mono_bblock_add_inst (s->cbb, tree);
629 stmt: CEE_BGT_UN (fpcflags) {
630 tree->opcode = OP_FBGT_UN;
631 mono_bblock_add_inst (s->cbb, tree);
634 stmt: CEE_BGE (fpcflags) {
635 tree->opcode = OP_FBGE;
636 mono_bblock_add_inst (s->cbb, tree);
639 stmt: CEE_BGE_UN (fpcflags) {
640 tree->opcode = OP_FBGE_UN;
641 mono_bblock_add_inst (s->cbb, tree);
644 stmt: CEE_BLE (fpcflags) {
645 tree->opcode = OP_FBLE;
646 mono_bblock_add_inst (s->cbb, tree);
649 stmt: CEE_BLE_UN (fpcflags) {
650 tree->opcode = OP_FBLE_UN;
651 mono_bblock_add_inst (s->cbb, tree);
654 stmt: CEE_POP (freg) "0" {
655 /* we need to pop the value from the x86 FP stack */
656 MONO_EMIT_UNALU (s, tree, OP_X86_FPOP, -1, state->left->reg1);
659 # override the rules in inssel-float.brg that work for machines with FP registers
661 freg: OP_FCONV_TO_R8 (freg) "0" {
665 freg: OP_FCONV_TO_R4 (freg) "0" {
666 /* fixme: nothing to do ??*/
669 reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) {
670 MonoInst *base = state->right->left->tree;
672 tree->dreg = state->reg1;
673 tree->sreg1 = state->left->reg1;
674 tree->sreg2 = base->inst_basereg;
675 tree->inst_offset = base->inst_offset;
676 tree->opcode = OP_X86_ADD_MEMBASE;
677 mono_bblock_add_inst (s->cbb, tree);
680 reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) {
681 MonoInst *base = state->right->left->tree;
683 tree->dreg = state->reg1;
684 tree->sreg1 = state->left->reg1;
685 tree->sreg2 = base->inst_basereg;
686 tree->inst_offset = base->inst_offset;
687 tree->opcode = OP_X86_SUB_MEMBASE;
688 mono_bblock_add_inst (s->cbb, tree);
691 reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) {
692 MonoInst *base = state->right->left->tree;
694 tree->dreg = state->reg1;
695 tree->sreg1 = state->left->reg1;
696 tree->sreg2 = base->inst_basereg;
697 tree->inst_offset = base->inst_offset;
698 tree->opcode = OP_X86_MUL_MEMBASE;
699 mono_bblock_add_inst (s->cbb, tree);
702 lreg: OP_LSHL (lreg, reg) "0" {
703 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
706 lreg: OP_LSHL (lreg, OP_ICONST) "0" {
707 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
710 lreg: OP_LSHR (lreg, reg) "0" {
711 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
714 lreg: OP_LSHR (lreg, OP_ICONST) "0" {
715 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
718 lreg: OP_LSHR_UN (lreg, reg) "0" {
719 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
722 lreg: OP_LSHR_UN (lreg, OP_ICONST) "0" {
723 MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
726 reg: OP_ATOMIC_ADD_NEW_I4 (base, reg),
727 reg: OP_ATOMIC_ADD_I4 (base, reg) {
728 tree->opcode = tree->opcode;
729 tree->inst_basereg = state->left->tree->inst_basereg;
730 tree->inst_offset = state->left->tree->inst_offset;
731 tree->dreg = state->reg1;
732 tree->sreg2 = state->right->reg1;
734 mono_bblock_add_inst (s->cbb, tree);
737 reg: OP_ATOMIC_EXCHANGE_I4 (base, reg) {
738 tree->opcode = OP_ATOMIC_EXCHANGE_I4;
739 tree->dreg = state->reg1;
740 tree->sreg2 = state->right->reg1;
741 tree->inst_basereg = state->left->tree->inst_basereg;
742 tree->inst_offset = state->left->tree->inst_offset;
744 mono_bblock_add_inst (s->cbb, tree);
747 # Optimized call instructions
748 # mono_arch_patch_delegate_trampoline depends on these
749 reg: OP_CALL_REG (CEE_LDIND_I (base)),
750 freg: OP_FCALL_REG (CEE_LDIND_I (base)),
751 reg: OP_LCALL_REG (CEE_LDIND_I (base)) {
752 tree->opcode = call_reg_to_call_membase (tree->opcode);
753 tree->inst_basereg = state->left->left->tree->inst_basereg;
754 tree->inst_offset = state->left->left->tree->inst_offset;
755 tree->dreg = state->reg1;
756 mono_bblock_add_inst (s->cbb, tree);
759 lreg: OP_LCALL_REG (CEE_LDIND_I (base)) {
760 tree->opcode = call_reg_to_call_membase (tree->opcode);
761 tree->inst_basereg = state->left->left->tree->inst_basereg;
762 tree->inst_offset = state->left->left->tree->inst_offset;
763 tree->dreg = state->reg1;
764 mono_bblock_add_inst (s->cbb, tree);
767 stmt: OP_VOIDCALL_REG (CEE_LDIND_I (base)) {
768 tree->opcode = call_reg_to_call_membase (tree->opcode);
769 tree->inst_basereg = state->left->left->tree->inst_basereg;
770 tree->inst_offset = state->left->left->tree->inst_offset;
771 mono_bblock_add_inst (s->cbb, tree);
774 stmt: OP_VCALL_REG (CEE_LDIND_I (base), reg) {
775 mono_arch_emit_this_vret_args (s, (MonoCallInst*)tree, -1, -1, state->right->reg1);
777 tree->opcode = call_reg_to_call_membase (tree->opcode);
778 tree->inst_basereg = state->left->left->tree->inst_basereg;
779 tree->inst_offset = state->left->left->tree->inst_offset;
780 tree->dreg = state->reg1;
781 mono_bblock_add_inst (s->cbb, tree);
784 # Optimized ldind(reg) rules
785 reg: CEE_LDIND_REF (OP_REGVAR),
786 reg: CEE_LDIND_I (OP_REGVAR),
787 reg: CEE_LDIND_I4 (OP_REGVAR),
788 reg: CEE_LDIND_U4 (OP_REGVAR) "0" {
789 state->reg1 = state->left->tree->dreg;
790 tree->dreg = state->reg1;
796 call_reg_to_call_membase (int opcode)
800 return OP_CALL_MEMBASE;
802 return OP_FCALL_MEMBASE;
804 return OP_VCALL_MEMBASE;
806 return OP_LCALL_MEMBASE;
807 case OP_VOIDCALL_REG:
808 return OP_VOIDCALL_MEMBASE;
810 g_assert_not_reached ();