grammar updates
[mono.git] / mono / mini / inssel-x86.brg
1 %%
2
3 #
4 # inssel-x86.brg: burg file for special x86 instructions
5 #
6 # Author:
7 #   Dietmar Maurer (dietmar@ximian.com)
8 #   Paolo Molaro (lupus@ximian.com)
9 #
10 # (C) 2002 Ximian, Inc.
11 #
12
13 stmt: OP_START_HANDLER {
14         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
15         MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP);
16 }
17
18 stmt: CEE_ENDFINALLY {
19         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
20         MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset); 
21         tree->opcode = CEE_RET;
22         mono_bblock_add_inst (s->cbb, tree);
23 }
24
25 stmt: OP_ENDFILTER (reg) {
26         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
27         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->left->reg1);
28         MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset); 
29         tree->opcode = CEE_RET;
30         mono_bblock_add_inst (s->cbb, tree);
31 }
32
33 stmt: CEE_STIND_I8 (OP_REGVAR, lreg) {
34         /* this should only happen for methods returning a long */
35         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->right->reg1);
36         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->right->reg2);
37 }
38
39 lreg: OP_LNEG (lreg) "3" {
40         int tmpr = mono_regstate_next_int (s->rs);
41         MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg1, state->left->reg1);
42         MONO_EMIT_BIALU_IMM (s, tree, OP_ADC_IMM, tmpr, state->left->reg2, 0);
43         MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg2, tmpr);
44 }
45
46 freg: OP_LCONV_TO_R8 (lreg) {
47         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
48         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
49         tree->opcode = OP_X86_FP_LOAD_I8;
50         tree->inst_basereg = X86_ESP;
51         tree->inst_offset = 0;
52         mono_bblock_add_inst (s->cbb, tree);
53         MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
54 }
55
56 freg: OP_LCONV_TO_R4 (lreg) {
57         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
58         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
59         tree->opcode = OP_X86_FP_LOAD_I8;
60         tree->inst_basereg = X86_ESP;
61         tree->inst_offset = 0;
62         mono_bblock_add_inst (s->cbb, tree);
63         /* change precision */
64         MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORER4_MEMBASE_REG, X86_ESP, 0, state->reg1);
65         MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADR4_MEMBASE, state->reg1, X86_ESP, 0);
66         MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
67 }
68
69 freg: CEE_CONV_R_UN (reg) {
70         MONO_EMIT_NEW_BIALU_IMM (s, OP_X86_PUSH_IMM, -1, -1, 0);
71         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
72         tree->opcode = OP_X86_FP_LOAD_I8;
73         tree->inst_basereg = X86_ESP;
74         tree->inst_offset = 0;
75         mono_bblock_add_inst (s->cbb, tree);
76         MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
77 }
78
79 cflags: OP_COMPARE (CEE_LDIND_I4 (base), reg) {
80         tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
81         tree->inst_basereg = state->left->left->tree->inst_basereg;
82         tree->inst_offset = state->left->left->tree->inst_offset;
83         tree->sreg2 = state->right->reg1;
84         mono_bblock_add_inst (s->cbb, tree);
85 }
86
87 cflags: OP_COMPARE (CEE_LDIND_I4 (base), OP_ICONST) {
88         tree->opcode = OP_X86_COMPARE_MEMBASE_IMM;
89         tree->inst_basereg = state->left->left->tree->inst_basereg;
90         tree->inst_offset = state->left->left->tree->inst_offset;
91         tree->inst_imm = state->right->tree->inst_c0;
92         mono_bblock_add_inst (s->cbb, tree);
93 }
94
95 cflags: OP_COMPARE (reg, CEE_LDIND_I4 (base)) {
96         tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
97         tree->sreg2 = state->right->left->tree->inst_basereg;
98         tree->inst_offset = state->right->left->tree->inst_offset;
99         tree->sreg1 = state->left->reg1;
100         mono_bblock_add_inst (s->cbb, tree);
101 }
102
103 stmt: CEE_STIND_I1 (base, OP_CEQ (cflags)) {
104         tree->opcode = OP_X86_SETEQ_MEMBASE;
105         tree->inst_offset = state->left->tree->inst_offset;
106         tree->inst_basereg = state->left->tree->inst_basereg;
107         mono_bblock_add_inst (s->cbb, tree);
108 }
109
110 reg: OP_LOCALLOC (OP_ICONST) {
111         if (tree->flags & MONO_INST_INIT) {
112                 /* microcoded in mini-x86.c */
113                 tree->sreg1 = mono_regstate_next_int (s->rs);
114                 MONO_EMIT_NEW_ICONST (s, tree->sreg1, state->left->tree->inst_c0);
115                 mono_bblock_add_inst (s->cbb, tree);
116         } else {
117                 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, state->left->tree->inst_c0);
118                 MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
119         }
120 }
121
122 reg: OP_LOCALLOC (reg) {
123         tree->sreg1 = state->left->tree->dreg;
124         mono_bblock_add_inst (s->cbb, tree);
125 }
126
127 stmt: OP_SETRET (reg) {
128         tree->opcode = OP_MOVE;
129         tree->sreg1 = state->left->reg1;
130         tree->dreg = X86_EAX;
131         mono_bblock_add_inst (s->cbb, tree);
132 }
133
134 stmt: OP_SETRET (lreg) {
135         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->left->reg2);
136         tree->opcode = OP_MOVE;
137         tree->sreg1 = state->left->reg1;
138         tree->dreg = X86_EAX;
139         mono_bblock_add_inst (s->cbb, tree);
140 }
141
142 stmt: OP_SETRET (CEE_LDIND_REF (OP_REGVAR)) {
143         tree->opcode = OP_MOVE;
144         tree->sreg1 = state->left->left->tree->dreg;
145         tree->dreg = X86_EAX;
146         mono_bblock_add_inst (s->cbb, tree);
147 }
148
149 stmt: OP_SETRET (freg) {
150         /* nothing to do */
151 }
152
153 stmt: OP_SETRET (OP_ICONST) {
154         tree->opcode = OP_ICONST;
155         tree->inst_c0 = state->left->tree->inst_c0;
156         tree->dreg = X86_EAX;
157         mono_bblock_add_inst (s->cbb, tree);
158 }
159
160 stmt: OP_OUTARG (reg) {
161         tree->opcode = OP_X86_PUSH;
162         tree->sreg1 = state->left->reg1;
163         mono_bblock_add_inst (s->cbb, tree);
164 }
165
166 # we need to reduce this code duplication with some burg syntax extension
167 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)) {
168         tree->opcode = OP_X86_PUSH;
169         tree->sreg1 = state->left->left->tree->dreg;
170         mono_bblock_add_inst (s->cbb, tree);
171 }
172
173 stmt: OP_OUTARG (CEE_LDIND_I4 (OP_REGVAR)) {
174         tree->opcode = OP_X86_PUSH;
175         tree->sreg1 = state->left->left->tree->dreg;
176         mono_bblock_add_inst (s->cbb, tree);
177 }
178
179 stmt: OP_OUTARG (CEE_LDIND_U4 (OP_REGVAR)) {
180         tree->opcode = OP_X86_PUSH;
181         tree->sreg1 = state->left->left->tree->dreg;
182         mono_bblock_add_inst (s->cbb, tree);
183 }
184
185 stmt: OP_OUTARG (CEE_LDIND_I (OP_REGVAR)) {
186         tree->opcode = OP_X86_PUSH;
187         tree->sreg1 = state->left->left->tree->dreg;
188         mono_bblock_add_inst (s->cbb, tree);
189 }
190
191 stmt: OP_OUTARG (lreg) {
192         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
193         tree->opcode = OP_X86_PUSH;
194         tree->sreg1 = state->left->reg1;
195         mono_bblock_add_inst (s->cbb, tree);
196 }
197
198 stmt: OP_OUTARG (CEE_LDIND_I8 (base)) {
199         MonoInst *ins;
200         ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
201         ins->opcode = OP_X86_PUSH_MEMBASE;
202         ins->inst_basereg = state->left->left->tree->inst_basereg;
203         ins->inst_offset = state->left->left->tree->inst_offset + 4;
204         mono_bblock_add_inst (s->cbb, ins);
205
206         tree->opcode = OP_X86_PUSH_MEMBASE;
207         tree->inst_basereg = state->left->left->tree->inst_basereg;
208         tree->inst_offset = state->left->left->tree->inst_offset;
209         mono_bblock_add_inst (s->cbb, tree);
210 }
211
212 stmt: OP_OUTARG (OP_ICONST) {
213         tree->opcode = OP_X86_PUSH_IMM;
214         tree->inst_imm = state->left->tree->inst_c0;
215         mono_bblock_add_inst (s->cbb, tree);
216 }
217
218 stmt: OP_OUTARG (CEE_LDIND_I4 (base)) {
219         tree->opcode = OP_X86_PUSH_MEMBASE;
220         tree->inst_basereg = state->left->left->tree->inst_basereg;
221         tree->inst_offset = state->left->left->tree->inst_offset;
222         mono_bblock_add_inst (s->cbb, tree);
223 }
224
225 stmt: OP_OUTARG (CEE_LDIND_U4 (base)) {
226         tree->opcode = OP_X86_PUSH_MEMBASE;
227         tree->inst_basereg = state->left->left->tree->inst_basereg;
228         tree->inst_offset = state->left->left->tree->inst_offset;
229         mono_bblock_add_inst (s->cbb, tree);
230 }
231
232 stmt: OP_OUTARG (CEE_LDIND_I (base)) {
233         tree->opcode = OP_X86_PUSH_MEMBASE;
234         tree->inst_basereg = state->left->left->tree->inst_basereg;
235         tree->inst_offset = state->left->left->tree->inst_offset;
236         mono_bblock_add_inst (s->cbb, tree);
237 }
238
239 stmt: OP_OUTARG (CEE_LDIND_REF (base)) {
240         tree->opcode = OP_X86_PUSH_MEMBASE;
241         tree->inst_basereg = state->left->left->tree->inst_basereg;
242         tree->inst_offset = state->left->left->tree->inst_offset;
243         mono_bblock_add_inst (s->cbb, tree);
244 }
245
246 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)) {
247         tree->opcode = OP_X86_PUSH;
248         tree->sreg1 = state->left->left->tree->dreg;
249         mono_bblock_add_inst (s->cbb, tree);
250 }
251
252 stmt: OP_OUTARG (CEE_LDOBJ (reg)) {
253         tree->opcode = OP_X86_PUSH;
254         tree->sreg1 = state->left->reg1;
255         mono_bblock_add_inst (s->cbb, tree);
256 }
257
258 stmt: OP_OUTARG (freg) {
259         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
260         tree->opcode = OP_STORER8_MEMBASE_REG;
261         tree->sreg1 = state->left->reg1;
262         tree->inst_destbasereg = X86_ESP;
263         tree->inst_offset = 0;
264         mono_bblock_add_inst (s->cbb, tree);
265 }
266
267 stmt: OP_OUTARG_R4 (freg) {
268         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 4);
269         tree->opcode = OP_STORER4_MEMBASE_REG;
270         tree->sreg1 = state->left->reg1;
271         tree->inst_destbasereg = X86_ESP;
272         tree->inst_offset = 0;
273         mono_bblock_add_inst (s->cbb, tree);
274 }
275
276 stmt: OP_OUTARG_R8 (freg) {
277         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
278         tree->opcode = OP_STORER8_MEMBASE_REG;
279         tree->sreg1 = state->left->reg1;
280         tree->inst_destbasereg = X86_ESP;
281         tree->inst_offset = 0;
282         mono_bblock_add_inst (s->cbb, tree);
283 }
284
285 stmt: OP_OUTARG_VT (CEE_LDOBJ (base)) {
286         MonoInst *vt = state->left->left->tree;
287         //g_print ("vt size: %d at R%d + %d\n", tree->inst_imm, vt->inst_basereg, vt->inst_offset);
288
289         if (!tree->inst_imm)
290                 return;
291
292         if (tree->inst_imm <= 4) {
293                 tree->opcode = OP_X86_PUSH_MEMBASE;
294                 tree->inst_basereg = vt->inst_basereg;
295                 tree->inst_offset = vt->inst_offset;
296                 mono_bblock_add_inst (s->cbb, tree);
297         } else if (tree->inst_imm <= 20) {
298                 int sz = tree->inst_imm;
299                 sz += 3;
300                 sz &= ~3;
301                 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, sz);
302                 mini_emit_memcpy (s, X86_ESP, 0, vt->inst_basereg, vt->inst_offset, tree->inst_imm, 0);
303         } else {
304                 tree->opcode = OP_X86_PUSH_OBJ;
305                 tree->inst_basereg = vt->inst_basereg;
306                 tree->inst_offset = vt->inst_offset;
307                 mono_bblock_add_inst (s->cbb, tree);
308         }
309 }
310
311 stmt: OP_OUTARG_VT (OP_ICONST) {
312         tree->opcode = OP_X86_PUSH_IMM;
313         tree->inst_imm = state->left->tree->inst_c0;
314         mono_bblock_add_inst (s->cbb, tree);
315 }
316
317 stmt: OP_OUTARG_VT (reg) {
318         tree->opcode = OP_X86_PUSH;
319         tree->sreg1 = state->left->tree->dreg;
320         mono_bblock_add_inst (s->cbb, tree);
321 }
322
323 reg: OP_LDADDR (OP_REGOFFSET) "1" {
324         if (state->left->tree->inst_offset) {
325                 tree->opcode = OP_X86_LEA_MEMBASE;
326                 tree->sreg1 = state->left->tree->inst_basereg;
327                 tree->inst_imm = state->left->tree->inst_offset;
328                 tree->dreg = state->reg1;
329         } else {
330                 tree->opcode = OP_MOVE;
331                 tree->sreg1 = state->left->tree->inst_basereg;
332                 tree->dreg = state->reg1;
333         }
334         mono_bblock_add_inst (s->cbb, tree);
335 }
336
337 reg: CEE_LDOBJ (OP_REGOFFSET) "1" {
338         if (state->left->tree->inst_offset) {
339                 tree->opcode = OP_X86_LEA_MEMBASE;
340                 tree->sreg1 = state->left->tree->inst_basereg;
341                 tree->inst_imm = state->left->tree->inst_offset;
342                 tree->dreg = state->reg1;
343         } else {
344                 tree->opcode = OP_MOVE;
345                 tree->sreg1 = state->left->tree->inst_basereg;
346                 tree->dreg = state->reg1;
347         }
348         mono_bblock_add_inst (s->cbb, tree);
349 }
350
351 reg: CEE_LDELEMA (reg, reg) "15" {
352         int length_reg = mono_regstate_next_int (s->rs);
353         guint32 size = mono_class_array_element_size (tree->klass);
354         
355         MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADI4_MEMBASE, length_reg, 
356                                        state->left->reg1, G_STRUCT_OFFSET (MonoArray, max_length));
357         MONO_EMIT_NEW_BIALU (s, OP_COMPARE, -1, length_reg, state->right->reg1);
358         MONO_EMIT_NEW_COND_EXC (s, LE_UN, "IndexOutOfRangeException");
359
360         if (size == 1 || size == 2 || size == 4 || size == 8) {
361                 static const int fast_log2 [] = { 1, 0, 1, -1, 2, -1, -1, -1, 3 };
362                 tree->opcode = OP_X86_LEA;
363                 tree->dreg = state->reg1;
364                 tree->sreg1 = state->left->reg1;
365                 tree->sreg2 = state->right->reg1;
366                 tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
367                 tree->unused = fast_log2 [size];
368                 mono_bblock_add_inst (s->cbb, tree);
369         } else {
370                 int mult_reg = mono_regstate_next_int (s->rs);
371                 int add_reg = mono_regstate_next_int (s->rs);
372                 MONO_EMIT_NEW_BIALU_IMM (s, OP_MUL_IMM, mult_reg, state->right->reg1, size);
373                 MONO_EMIT_NEW_BIALU (s, CEE_ADD, add_reg, mult_reg, state->left->reg1);
374                 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, state->reg1, add_reg, G_STRUCT_OFFSET (MonoArray, vector));
375         }
376 }
377
378 stmt: CEE_STIND_R8 (OP_REGVAR, freg) {
379         /* nothing to do: the value is already on the FP stack */
380 }
381
382 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
383         int con = state->right->right->tree->inst_c0;   
384
385         if (con == 1) {
386                 tree->opcode = OP_X86_INC_MEMBASE;
387         } else {
388                 tree->opcode = OP_X86_ADD_MEMBASE_IMM;
389                 tree->inst_imm = con;
390         }
391
392         tree->inst_basereg = state->left->tree->inst_basereg;
393         tree->inst_offset = state->left->tree->inst_offset;
394         mono_bblock_add_inst (s->cbb, tree);
395 } cost {
396         MBTREE_TYPE *t1 = state->right->left->left->tree;
397         MBTREE_TYPE *t2 = state->left->tree;
398         MBCOND (t1->inst_basereg == t2->inst_basereg &&
399                 t1->inst_offset == t2->inst_offset);
400         return 2;
401 }
402
403 stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)) {
404         int con = state->right->right->tree->inst_c0;   
405
406         if (con == 1) {
407                 tree->opcode = OP_X86_DEC_MEMBASE;
408         } else {
409                 tree->opcode = OP_X86_SUB_MEMBASE_IMM;
410                 tree->inst_imm = con;
411         }
412
413         tree->inst_basereg = state->left->tree->inst_basereg;
414         tree->inst_offset = state->left->tree->inst_offset;
415         mono_bblock_add_inst (s->cbb, tree);
416 } cost {
417         MBTREE_TYPE *t1 = state->right->left->left->tree;
418         MBTREE_TYPE *t2 = state->left->tree;
419         MBCOND (t1->inst_basereg == t2->inst_basereg &&
420                 t1->inst_offset == t2->inst_offset);
421         return 2;
422 }
423
424 #
425 # this rules is incorrect, it needs to do an indirect inc (inc_membase)
426 #stmt: CEE_STIND_I4 (reg, CEE_ADD (reg, OP_ICONST)) {
427 #       tree->opcode = OP_X86_INC_REG;
428 #       tree->dreg = state->left->reg1;
429 #       mono_bblock_add_inst (s->cbb, tree);
430 #} cost {
431 #       MBState *s1 = state->left;
432 #       MBState *s2 = state->right->left;
433 #       int con = state->right->right->tree->inst_c0;   
434 #       MBCOND (con == 1 && s1->reg1 == s2->reg1);
435 #       return 1;
436 #}
437
438 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_SUB (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
439         int con = state->right->right->tree->inst_c0;   
440         int dreg = state->left->tree->dreg;
441         int sreg = state->right->left->left->tree->dreg;
442
443         if (con == 1) {
444                 if (dreg != sreg)
445                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
446                 tree->opcode = OP_X86_DEC_REG;
447                 tree->dreg = tree->sreg1 = dreg;
448         } else if (con == -1) {
449                 if (dreg != sreg)
450                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
451                 tree->opcode = OP_X86_INC_REG;
452                 tree->dreg = tree->sreg1 = dreg;
453         } else {
454                 tree->opcode = OP_SUB_IMM;
455                 tree->inst_imm = con;
456                 tree->sreg1 = sreg;
457                 tree->dreg = dreg;
458         }
459         mono_bblock_add_inst (s->cbb, tree);
460 }
461
462 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_ADD (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
463         int con = state->right->right->tree->inst_c0;
464         int dreg = state->left->tree->dreg;
465         int sreg = state->right->left->left->tree->dreg;
466
467         if (con == 1) {
468                 if (dreg != sreg)
469                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
470                 tree->opcode = OP_X86_INC_REG;
471                 tree->dreg = tree->sreg1 = dreg;
472         } else if (con == -1) {
473                 if (dreg != sreg)
474                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
475                 tree->opcode = OP_X86_DEC_REG;
476                 tree->dreg = tree->sreg1 = dreg;
477         } else {
478                 tree->opcode = OP_ADD_IMM;
479                 tree->inst_imm = con;
480                 tree->sreg1 = sreg;
481                 tree->dreg = dreg;
482         }
483         mono_bblock_add_inst (s->cbb, tree);
484 }
485
486 reg: CEE_LDIND_I2 (OP_REGVAR) {
487         MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);
488 }
489
490 # on x86, fp compare overwrites EAX, so we must
491 # either improve the local register allocator or
492 # emit coarse opcodes which saves EAX for us.
493
494 reg: OP_CEQ (OP_COMPARE (freg, freg)) { 
495         MONO_EMIT_BIALU (s, tree, OP_FCEQ, state->reg1, state->left->left->reg1,
496                          state->left->right->reg1);
497 }
498
499 reg: OP_CLT (OP_COMPARE (freg, freg)) { 
500         MONO_EMIT_BIALU (s, tree, OP_FCLT, state->reg1, state->left->left->reg1,
501                          state->left->right->reg1);
502 }
503
504 reg: OP_CLT_UN (OP_COMPARE (freg, freg)) {      
505         MONO_EMIT_BIALU (s, tree, OP_FCLT_UN, state->reg1, state->left->left->reg1,
506                          state->left->right->reg1);
507 }
508
509 reg: OP_CGT (OP_COMPARE (freg, freg)) { 
510         MONO_EMIT_BIALU (s, tree, OP_FCGT, state->reg1, state->left->left->reg1,
511                          state->left->right->reg1);
512 }
513
514 reg: OP_CGT_UN (OP_COMPARE (freg, freg)) {      
515         MONO_EMIT_BIALU (s, tree, OP_FCGT_UN, state->reg1, state->left->left->reg1,
516                          state->left->right->reg1);
517 }
518
519 # fpcflags overwrites EAX, but this does not matter for statements
520 # because we are the last operation in the tree.
521  
522 stmt: CEE_BNE_UN (fpcflags) {
523         tree->opcode = OP_FBNE_UN;
524         mono_bblock_add_inst (s->cbb, tree);
525 }
526
527 stmt: CEE_BEQ (fpcflags) {
528         tree->opcode = OP_FBEQ;
529         mono_bblock_add_inst (s->cbb, tree);
530 }
531
532 stmt: CEE_BLT (fpcflags) {
533         tree->opcode = OP_FBLT;
534         mono_bblock_add_inst (s->cbb, tree);
535 }
536
537 stmt: CEE_BLT_UN (fpcflags) {
538         tree->opcode = OP_FBLT_UN;
539         mono_bblock_add_inst (s->cbb, tree);
540 }
541
542 stmt: CEE_BGT (fpcflags) {
543         tree->opcode = OP_FBGT;
544         mono_bblock_add_inst (s->cbb, tree);
545 }
546
547 stmt: CEE_BGT_UN (fpcflags) {
548         tree->opcode = OP_FBGT_UN;
549         mono_bblock_add_inst (s->cbb, tree);
550 }
551
552 stmt: CEE_BGE  (fpcflags) {
553         tree->opcode = OP_FBGE;
554         mono_bblock_add_inst (s->cbb, tree);
555 }
556
557 stmt: CEE_BGE_UN (fpcflags) {
558         tree->opcode = OP_FBGE_UN;
559         mono_bblock_add_inst (s->cbb, tree);
560 }
561
562 stmt: CEE_BLE  (fpcflags) {
563         tree->opcode = OP_FBLE;
564         mono_bblock_add_inst (s->cbb, tree);
565 }
566
567 stmt: CEE_BLE_UN (fpcflags) {
568         tree->opcode = OP_FBLE_UN;
569         mono_bblock_add_inst (s->cbb, tree);
570 }
571
572 stmt: CEE_POP (freg) "0" {
573         /* we need to pop the value from the x86 FP stack */
574         MONO_EMIT_UNALU (s, tree, OP_X86_FPOP, -1, state->left->reg1);  
575 }     
576
577 %%