mono/mini/inssel-x86.brg

   1 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG(cfg,basereg,offset,operand) do { \
   2                 MonoInst *inst; \
   3                 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
   4                 inst->opcode = OP_X86_COMPARE_MEMBASE_REG; \
   5                 inst->inst_basereg = basereg; \
   6                 inst->inst_offset = offset; \
   7                 inst->sreg2 = operand; \
   8                 mono_bblock_add_inst (cfg->cbb, inst); \
   9         } while (0)
  10
  11 #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM(cfg,basereg,offset,operand) do { \
  12                 MonoInst *inst; \
  13                 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
  14                 inst->opcode = OP_X86_COMPARE_MEMBASE_IMM; \
  15                 inst->inst_basereg = basereg; \
  16                 inst->inst_offset = offset; \
  17                 inst->inst_imm = operand; \
  18                 mono_bblock_add_inst (cfg->cbb, inst); \
  19         } while (0)
  20
  21 /* override the arch independant versions with fast x86 versions */
  22
  23 #undef MONO_EMIT_BOUNDS_CHECK
  24 #undef MONO_EMIT_BOUNDS_CHECK_IMM
  25
  26 #define MONO_EMIT_BOUNDS_CHECK(cfg, array_reg, array_type, array_length_field, index_reg) do { \
  27                 MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_reg); \
  28                 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
  29         } while (0)
  30
  31 #define MONO_EMIT_BOUNDS_CHECK_IMM(cfg, array_reg, array_type, array_length_field, index_imm) do { \
  32                 MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_imm); \
  33                 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
  34         } while (0)
  35
  36
  37 %%
  38
  39 #
  40 # inssel-x86.brg: burg file for special x86 instructions
  41 #
  42 # Author:
  43 #   Dietmar Maurer (dietmar@ximian.com)
  44 #   Paolo Molaro (lupus@ximian.com)
  45 #
  46 # (C) 2002 Ximian, Inc.
  47 #
  48
  49 stmt: OP_START_HANDLER {
  50         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
  51         MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP);
  52 }
  53
  54 stmt: CEE_ENDFINALLY {
  55         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
  56         MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
  57         tree->opcode = CEE_RET;
  58         mono_bblock_add_inst (s->cbb, tree);
  59 }
  60
  61 stmt: OP_ENDFILTER (reg) {
  62         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
  63         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->left->reg1);
  64         MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
  65         tree->opcode = CEE_RET;
  66         mono_bblock_add_inst (s->cbb, tree);
  67 }
  68
  69 stmt: CEE_STIND_I8 (OP_REGVAR, lreg) {
  70         /* this should only happen for methods returning a long */
  71         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->right->reg1);
  72         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->right->reg2);
  73 }
  74
  75 lreg: OP_LNEG (lreg) "3" {
  76         int tmpr = mono_regstate_next_int (s->rs);
  77         MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg1, state->left->reg1);
  78         MONO_EMIT_BIALU_IMM (s, tree, OP_ADC_IMM, tmpr, state->left->reg2, 0);
  79         MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg2, tmpr);
  80 }
  81
  82 freg: OP_LCONV_TO_R8 (lreg) {
  83         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
  84         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
  85         tree->opcode = OP_X86_FP_LOAD_I8;
  86         tree->inst_basereg = X86_ESP;
  87         tree->inst_offset = 0;
  88         mono_bblock_add_inst (s->cbb, tree);
  89         MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
  90 }
  91
  92 freg: OP_LCONV_TO_R4 (lreg) {
  93         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
  94         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
  95         tree->opcode = OP_X86_FP_LOAD_I8;
  96         tree->inst_basereg = X86_ESP;
  97         tree->inst_offset = 0;
  98         mono_bblock_add_inst (s->cbb, tree);
  99         /* change precision */
 100         MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORER4_MEMBASE_REG, X86_ESP, 0, state->reg1);
 101         MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADR4_MEMBASE, state->reg1, X86_ESP, 0);
 102         MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
 103 }
 104
 105 freg: CEE_CONV_R_UN (reg) {
 106         MONO_EMIT_NEW_BIALU_IMM (s, OP_X86_PUSH_IMM, -1, -1, 0);
 107         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg1);
 108         tree->opcode = OP_X86_FP_LOAD_I8;
 109         tree->inst_basereg = X86_ESP;
 110         tree->inst_offset = 0;
 111         mono_bblock_add_inst (s->cbb, tree);
 112         MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
 113 }
 114
 115 cflags: OP_COMPARE (CEE_LDIND_I4 (base), reg) {
 116         tree->opcode = OP_X86_COMPARE_MEMBASE_REG;
 117         tree->inst_basereg = state->left->left->tree->inst_basereg;
 118         tree->inst_offset = state->left->left->tree->inst_offset;
 119         tree->sreg2 = state->right->reg1;
 120         mono_bblock_add_inst (s->cbb, tree);
 121 }
 122
 123 cflags: OP_COMPARE (CEE_LDIND_I4 (base), OP_ICONST) {
 124         tree->opcode = OP_X86_COMPARE_MEMBASE_IMM;
 125         tree->inst_basereg = state->left->left->tree->inst_basereg;
 126         tree->inst_offset = state->left->left->tree->inst_offset;
 127         tree->inst_imm = state->right->tree->inst_c0;
 128         mono_bblock_add_inst (s->cbb, tree);
 129 }
 130
 131 cflags: OP_COMPARE (reg, CEE_LDIND_I4 (base)) {
 132         tree->opcode = OP_X86_COMPARE_REG_MEMBASE;
 133         tree->sreg2 = state->right->left->tree->inst_basereg;
 134         tree->inst_offset = state->right->left->tree->inst_offset;
 135         tree->sreg1 = state->left->reg1;
 136         mono_bblock_add_inst (s->cbb, tree);
 137 }
 138
 139 stmt: CEE_STIND_I1 (base, OP_CEQ (cflags)) {
 140         tree->opcode = OP_X86_SETEQ_MEMBASE;
 141         tree->inst_offset = state->left->tree->inst_offset;
 142         tree->inst_basereg = state->left->tree->inst_basereg;
 143         mono_bblock_add_inst (s->cbb, tree);
 144 }
 145
 146 reg: OP_LOCALLOC (OP_ICONST) {
 147         if (tree->flags & MONO_INST_INIT) {
 148                 /* microcoded in mini-x86.c */
 149                 tree->sreg1 = mono_regstate_next_int (s->rs);
 150                 MONO_EMIT_NEW_ICONST (s, tree->sreg1, state->left->tree->inst_c0);
 151                 mono_bblock_add_inst (s->cbb, tree);
 152         } else {
 153                 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, state->left->tree->inst_c0);
 154                 MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
 155         }
 156 }
 157
 158 reg: OP_LOCALLOC (reg) {
 159         tree->sreg1 = state->left->tree->dreg;
 160         mono_bblock_add_inst (s->cbb, tree);
 161 }
 162
 163 stmt: OP_SETRET (reg) {
 164         tree->opcode = OP_MOVE;
 165         tree->sreg1 = state->left->reg1;
 166         tree->dreg = X86_EAX;
 167         mono_bblock_add_inst (s->cbb, tree);
 168 }
 169
 170 stmt: OP_SETRET (lreg) {
 171         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->left->reg2);
 172         tree->opcode = OP_MOVE;
 173         tree->sreg1 = state->left->reg1;
 174         tree->dreg = X86_EAX;
 175         mono_bblock_add_inst (s->cbb, tree);
 176 }
 177
 178 stmt: OP_SETRET (CEE_LDIND_REF (OP_REGVAR)) {
 179         tree->opcode = OP_MOVE;
 180         tree->sreg1 = state->left->left->tree->dreg;
 181         tree->dreg = X86_EAX;
 182         mono_bblock_add_inst (s->cbb, tree);
 183 }
 184
 185 stmt: OP_SETRET (freg) {
 186         /* nothing to do */
 187 }
 188
 189 stmt: OP_SETRET (OP_ICONST) {
 190         tree->opcode = OP_ICONST;
 191         tree->inst_c0 = state->left->tree->inst_c0;
 192         tree->dreg = X86_EAX;
 193         mono_bblock_add_inst (s->cbb, tree);
 194 }
 195
 196 stmt: OP_OUTARG (reg) {
 197         tree->opcode = OP_X86_PUSH;
 198         tree->sreg1 = state->left->reg1;
 199         mono_bblock_add_inst (s->cbb, tree);
 200 }
 201
 202 # we need to reduce this code duplication with some burg syntax extension
 203 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)) {
 204         tree->opcode = OP_X86_PUSH;
 205         tree->sreg1 = state->left->left->tree->dreg;
 206         mono_bblock_add_inst (s->cbb, tree);
 207 }
 208
 209 stmt: OP_OUTARG (CEE_LDIND_I4 (OP_REGVAR)) {
 210         tree->opcode = OP_X86_PUSH;
 211         tree->sreg1 = state->left->left->tree->dreg;
 212         mono_bblock_add_inst (s->cbb, tree);
 213 }
 214
 215 stmt: OP_OUTARG (CEE_LDIND_U4 (OP_REGVAR)) {
 216         tree->opcode = OP_X86_PUSH;
 217         tree->sreg1 = state->left->left->tree->dreg;
 218         mono_bblock_add_inst (s->cbb, tree);
 219 }
 220
 221 stmt: OP_OUTARG (CEE_LDIND_I (OP_REGVAR)) {
 222         tree->opcode = OP_X86_PUSH;
 223         tree->sreg1 = state->left->left->tree->dreg;
 224         mono_bblock_add_inst (s->cbb, tree);
 225 }
 226
 227 stmt: OP_OUTARG (lreg) {
 228         MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
 229         tree->opcode = OP_X86_PUSH;
 230         tree->sreg1 = state->left->reg1;
 231         mono_bblock_add_inst (s->cbb, tree);
 232 }
 233
 234 stmt: OP_OUTARG (CEE_LDIND_I8 (base)) {
 235         MonoInst *ins;
 236         ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
 237         ins->opcode = OP_X86_PUSH_MEMBASE;
 238         ins->inst_basereg = state->left->left->tree->inst_basereg;
 239         ins->inst_offset = state->left->left->tree->inst_offset + 4;
 240         mono_bblock_add_inst (s->cbb, ins);
 241
 242         tree->opcode = OP_X86_PUSH_MEMBASE;
 243         tree->inst_basereg = state->left->left->tree->inst_basereg;
 244         tree->inst_offset = state->left->left->tree->inst_offset;
 245         mono_bblock_add_inst (s->cbb, tree);
 246 }
 247
 248 stmt: OP_OUTARG (OP_ICONST) {
 249         tree->opcode = OP_X86_PUSH_IMM;
 250         tree->inst_imm = state->left->tree->inst_c0;
 251         mono_bblock_add_inst (s->cbb, tree);
 252 }
 253
 254 stmt: OP_OUTARG (CEE_LDIND_I4 (base)) {
 255         tree->opcode = OP_X86_PUSH_MEMBASE;
 256         tree->inst_basereg = state->left->left->tree->inst_basereg;
 257         tree->inst_offset = state->left->left->tree->inst_offset;
 258         mono_bblock_add_inst (s->cbb, tree);
 259 }
 260
 261 stmt: OP_OUTARG (CEE_LDIND_U4 (base)) {
 262         tree->opcode = OP_X86_PUSH_MEMBASE;
 263         tree->inst_basereg = state->left->left->tree->inst_basereg;
 264         tree->inst_offset = state->left->left->tree->inst_offset;
 265         mono_bblock_add_inst (s->cbb, tree);
 266 }
 267
 268 stmt: OP_OUTARG (CEE_LDIND_I (base)) {
 269         tree->opcode = OP_X86_PUSH_MEMBASE;
 270         tree->inst_basereg = state->left->left->tree->inst_basereg;
 271         tree->inst_offset = state->left->left->tree->inst_offset;
 272         mono_bblock_add_inst (s->cbb, tree);
 273 }
 274
 275 stmt: OP_OUTARG (CEE_LDIND_REF (base)) {
 276         tree->opcode = OP_X86_PUSH_MEMBASE;
 277         tree->inst_basereg = state->left->left->tree->inst_basereg;
 278         tree->inst_offset = state->left->left->tree->inst_offset;
 279         mono_bblock_add_inst (s->cbb, tree);
 280 }
 281
 282 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)) {
 283         tree->opcode = OP_X86_PUSH;
 284         tree->sreg1 = state->left->left->tree->dreg;
 285         mono_bblock_add_inst (s->cbb, tree);
 286 }
 287
 288 stmt: OP_OUTARG (CEE_LDOBJ (reg)) {
 289         tree->opcode = OP_X86_PUSH;
 290         tree->sreg1 = state->left->reg1;
 291         mono_bblock_add_inst (s->cbb, tree);
 292 }
 293
 294 stmt: OP_OUTARG (freg) {
 295         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
 296         tree->opcode = OP_STORER8_MEMBASE_REG;
 297         tree->sreg1 = state->left->reg1;
 298         tree->inst_destbasereg = X86_ESP;
 299         tree->inst_offset = 0;
 300         mono_bblock_add_inst (s->cbb, tree);
 301 }
 302
 303 stmt: OP_OUTARG_R4 (freg) {
 304         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 4);
 305         tree->opcode = OP_STORER4_MEMBASE_REG;
 306         tree->sreg1 = state->left->reg1;
 307         tree->inst_destbasereg = X86_ESP;
 308         tree->inst_offset = 0;
 309         mono_bblock_add_inst (s->cbb, tree);
 310 }
 311
 312 stmt: OP_OUTARG_R8 (freg) {
 313         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
 314         tree->opcode = OP_STORER8_MEMBASE_REG;
 315         tree->sreg1 = state->left->reg1;
 316         tree->inst_destbasereg = X86_ESP;
 317         tree->inst_offset = 0;
 318         mono_bblock_add_inst (s->cbb, tree);
 319 }
 320
 321 stmt: OP_OUTARG_VT (CEE_LDOBJ (base)) {
 322         MonoInst *vt = state->left->left->tree;
 323         //g_print ("vt size: %d at R%d + %d\n", tree->inst_imm, vt->inst_basereg, vt->inst_offset);
 324
 325         if (!tree->inst_imm)
 326                 return;
 327
 328         if (tree->inst_imm <= 4) {
 329                 tree->opcode = OP_X86_PUSH_MEMBASE;
 330                 tree->inst_basereg = vt->inst_basereg;
 331                 tree->inst_offset = vt->inst_offset;
 332                 mono_bblock_add_inst (s->cbb, tree);
 333         } else if (tree->inst_imm <= 20) {
 334                 int sz = tree->inst_imm;
 335                 sz += 3;
 336                 sz &= ~3;
 337                 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, sz);
 338                 mini_emit_memcpy (s, X86_ESP, 0, vt->inst_basereg, vt->inst_offset, tree->inst_imm, 0);
 339         } else {
 340                 tree->opcode = OP_X86_PUSH_OBJ;
 341                 tree->inst_basereg = vt->inst_basereg;
 342                 tree->inst_offset = vt->inst_offset;
 343                 mono_bblock_add_inst (s->cbb, tree);
 344         }
 345 }
 346
 347 stmt: OP_OUTARG_VT (OP_ICONST) {
 348         tree->opcode = OP_X86_PUSH_IMM;
 349         tree->inst_imm = state->left->tree->inst_c0;
 350         mono_bblock_add_inst (s->cbb, tree);
 351 }
 352
 353 stmt: OP_OUTARG_VT (reg) {
 354         tree->opcode = OP_X86_PUSH;
 355         tree->sreg1 = state->left->tree->dreg;
 356         mono_bblock_add_inst (s->cbb, tree);
 357 }
 358
 359 reg: OP_LDADDR (OP_REGOFFSET) "1" {
 360         if (state->left->tree->inst_offset) {
 361                 tree->opcode = OP_X86_LEA_MEMBASE;
 362                 tree->sreg1 = state->left->tree->inst_basereg;
 363                 tree->inst_imm = state->left->tree->inst_offset;
 364                 tree->dreg = state->reg1;
 365         } else {
 366                 tree->opcode = OP_MOVE;
 367                 tree->sreg1 = state->left->tree->inst_basereg;
 368                 tree->dreg = state->reg1;
 369         }
 370         mono_bblock_add_inst (s->cbb, tree);
 371 }
 372
 373 reg: CEE_LDOBJ (OP_REGOFFSET) "1" {
 374         if (state->left->tree->inst_offset) {
 375                 tree->opcode = OP_X86_LEA_MEMBASE;
 376                 tree->sreg1 = state->left->tree->inst_basereg;
 377                 tree->inst_imm = state->left->tree->inst_offset;
 378                 tree->dreg = state->reg1;
 379         } else {
 380                 tree->opcode = OP_MOVE;
 381                 tree->sreg1 = state->left->tree->inst_basereg;
 382                 tree->dreg = state->reg1;
 383         }
 384         mono_bblock_add_inst (s->cbb, tree);
 385 }
 386
 387 reg: CEE_LDELEMA (reg, reg) "15" {
 388         guint32 size = mono_class_array_element_size (tree->klass);
 389
 390         MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoArray, max_length, state->right->reg1);
 391
 392         if (size == 1 || size == 2 || size == 4 || size == 8) {
 393                 static const int fast_log2 [] = { 1, 0, 1, -1, 2, -1, -1, -1, 3 };
 394                 tree->opcode = OP_X86_LEA;
 395                 tree->dreg = state->reg1;
 396                 tree->sreg1 = state->left->reg1;
 397                 tree->sreg2 = state->right->reg1;
 398                 tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
 399                 tree->unused = fast_log2 [size];
 400                 mono_bblock_add_inst (s->cbb, tree);
 401         } else {
 402                 int mult_reg = mono_regstate_next_int (s->rs);
 403                 int add_reg = mono_regstate_next_int (s->rs);
 404                 MONO_EMIT_NEW_BIALU_IMM (s, OP_MUL_IMM, mult_reg, state->right->reg1, size);
 405                 MONO_EMIT_NEW_BIALU (s, CEE_ADD, add_reg, mult_reg, state->left->reg1);
 406                 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, state->reg1, add_reg, G_STRUCT_OFFSET (MonoArray, vector));
 407         }
 408 }
 409
 410 stmt: CEE_STIND_R8 (OP_REGVAR, freg) {
 411         /* nothing to do: the value is already on the FP stack */
 412 }
 413
 414 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
 415         int con = state->right->right->tree->inst_c0;
 416
 417         if (con == 1) {
 418                 tree->opcode = OP_X86_INC_MEMBASE;
 419         } else {
 420                 tree->opcode = OP_X86_ADD_MEMBASE_IMM;
 421                 tree->inst_imm = con;
 422         }
 423
 424         tree->inst_basereg = state->left->tree->inst_basereg;
 425         tree->inst_offset = state->left->tree->inst_offset;
 426         mono_bblock_add_inst (s->cbb, tree);
 427 } cost {
 428         MBTREE_TYPE *t1 = state->right->left->left->tree;
 429         MBTREE_TYPE *t2 = state->left->tree;
 430         MBCOND (t1->inst_basereg == t2->inst_basereg &&
 431                 t1->inst_offset == t2->inst_offset);
 432         return 2;
 433 }
 434
 435 stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)) {
 436         int con = state->right->right->tree->inst_c0;
 437
 438         if (con == 1) {
 439                 tree->opcode = OP_X86_DEC_MEMBASE;
 440         } else {
 441                 tree->opcode = OP_X86_SUB_MEMBASE_IMM;
 442                 tree->inst_imm = con;
 443         }
 444
 445         tree->inst_basereg = state->left->tree->inst_basereg;
 446         tree->inst_offset = state->left->tree->inst_offset;
 447         mono_bblock_add_inst (s->cbb, tree);
 448 } cost {
 449         MBTREE_TYPE *t1 = state->right->left->left->tree;
 450         MBTREE_TYPE *t2 = state->left->tree;
 451         MBCOND (t1->inst_basereg == t2->inst_basereg &&
 452                 t1->inst_offset == t2->inst_offset);
 453         return 2;
 454 }
 455
 456 #
 457 # this rules is incorrect, it needs to do an indirect inc (inc_membase)
 458 #stmt: CEE_STIND_I4 (reg, CEE_ADD (reg, OP_ICONST)) {
 459 #       tree->opcode = OP_X86_INC_REG;
 460 #       tree->dreg = state->left->reg1;
 461 #       mono_bblock_add_inst (s->cbb, tree);
 462 #} cost {
 463 #       MBState *s1 = state->left;
 464 #       MBState *s2 = state->right->left;
 465 #       int con = state->right->right->tree->inst_c0;
 466 #       MBCOND (con == 1 && s1->reg1 == s2->reg1);
 467 #       return 1;
 468 #}
 469
 470 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_SUB (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
 471         int con = state->right->right->tree->inst_c0;
 472         int dreg = state->left->tree->dreg;
 473         int sreg = state->right->left->left->tree->dreg;
 474
 475         if (con == 1) {
 476                 if (dreg != sreg)
 477                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 478                 tree->opcode = OP_X86_DEC_REG;
 479                 tree->dreg = tree->sreg1 = dreg;
 480         } else if (con == -1) {
 481                 if (dreg != sreg)
 482                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 483                 tree->opcode = OP_X86_INC_REG;
 484                 tree->dreg = tree->sreg1 = dreg;
 485         } else {
 486                 tree->opcode = OP_SUB_IMM;
 487                 tree->inst_imm = con;
 488                 tree->sreg1 = sreg;
 489                 tree->dreg = dreg;
 490         }
 491         mono_bblock_add_inst (s->cbb, tree);
 492 }
 493
 494 stmt: CEE_STIND_I (OP_REGVAR, CEE_ADD (CEE_LDIND_I (OP_REGVAR), OP_ICONST)),
 495 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_ADD (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
 496         int con = state->right->right->tree->inst_c0;
 497         int dreg = state->left->tree->dreg;
 498         int sreg = state->right->left->left->tree->dreg;
 499
 500         if (con == 1) {
 501                 if (dreg != sreg)
 502                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 503                 tree->opcode = OP_X86_INC_REG;
 504                 tree->dreg = tree->sreg1 = dreg;
 505         } else if (con == -1) {
 506                 if (dreg != sreg)
 507                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 508                 tree->opcode = OP_X86_DEC_REG;
 509                 tree->dreg = tree->sreg1 = dreg;
 510         } else {
 511                 tree->opcode = OP_ADD_IMM;
 512                 tree->inst_imm = con;
 513                 tree->sreg1 = sreg;
 514                 tree->dreg = dreg;
 515         }
 516         mono_bblock_add_inst (s->cbb, tree);
 517 }
 518
 519 reg: CEE_LDIND_I2 (OP_REGVAR) {
 520         MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);
 521 }
 522
 523 # on x86, fp compare overwrites EAX, so we must
 524 # either improve the local register allocator or
 525 # emit coarse opcodes which saves EAX for us.
 526
 527 reg: OP_CEQ (OP_COMPARE (freg, freg)) {
 528         MONO_EMIT_BIALU (s, tree, OP_FCEQ, state->reg1, state->left->left->reg1,
 529                          state->left->right->reg1);
 530 }
 531
 532 reg: OP_CLT (OP_COMPARE (freg, freg)) {
 533         MONO_EMIT_BIALU (s, tree, OP_FCLT, state->reg1, state->left->left->reg1,
 534                          state->left->right->reg1);
 535 }
 536
 537 reg: OP_CLT_UN (OP_COMPARE (freg, freg)) {
 538         MONO_EMIT_BIALU (s, tree, OP_FCLT_UN, state->reg1, state->left->left->reg1,
 539                          state->left->right->reg1);
 540 }
 541
 542 reg: OP_CGT (OP_COMPARE (freg, freg)) {
 543         MONO_EMIT_BIALU (s, tree, OP_FCGT, state->reg1, state->left->left->reg1,
 544                          state->left->right->reg1);
 545 }
 546
 547 reg: OP_CGT_UN (OP_COMPARE (freg, freg)) {
 548         MONO_EMIT_BIALU (s, tree, OP_FCGT_UN, state->reg1, state->left->left->reg1,
 549                          state->left->right->reg1);
 550 }
 551
 552 # fpcflags overwrites EAX, but this does not matter for statements
 553 # because we are the last operation in the tree.
 554
 555 stmt: CEE_BNE_UN (fpcflags) {
 556         tree->opcode = OP_FBNE_UN;
 557         mono_bblock_add_inst (s->cbb, tree);
 558 }
 559
 560 stmt: CEE_BEQ (fpcflags) {
 561         tree->opcode = OP_FBEQ;
 562         mono_bblock_add_inst (s->cbb, tree);
 563 }
 564
 565 stmt: CEE_BLT (fpcflags) {
 566         tree->opcode = OP_FBLT;
 567         mono_bblock_add_inst (s->cbb, tree);
 568 }
 569
 570 stmt: CEE_BLT_UN (fpcflags) {
 571         tree->opcode = OP_FBLT_UN;
 572         mono_bblock_add_inst (s->cbb, tree);
 573 }
 574
 575 stmt: CEE_BGT (fpcflags) {
 576         tree->opcode = OP_FBGT;
 577         mono_bblock_add_inst (s->cbb, tree);
 578 }
 579
 580 stmt: CEE_BGT_UN (fpcflags) {
 581         tree->opcode = OP_FBGT_UN;
 582         mono_bblock_add_inst (s->cbb, tree);
 583 }
 584
 585 stmt: CEE_BGE  (fpcflags) {
 586         tree->opcode = OP_FBGE;
 587         mono_bblock_add_inst (s->cbb, tree);
 588 }
 589
 590 stmt: CEE_BGE_UN (fpcflags) {
 591         tree->opcode = OP_FBGE_UN;
 592         mono_bblock_add_inst (s->cbb, tree);
 593 }
 594
 595 stmt: CEE_BLE  (fpcflags) {
 596         tree->opcode = OP_FBLE;
 597         mono_bblock_add_inst (s->cbb, tree);
 598 }
 599
 600 stmt: CEE_BLE_UN (fpcflags) {
 601         tree->opcode = OP_FBLE_UN;
 602         mono_bblock_add_inst (s->cbb, tree);
 603 }
 604
 605 stmt: CEE_POP (freg) "0" {
 606         /* we need to pop the value from the x86 FP stack */
 607         MONO_EMIT_UNALU (s, tree, OP_X86_FPOP, -1, state->left->reg1);
 608 }
 609
 610 # override the rules in inssel-float.brg that work for machines with FP registers
 611
 612 freg: OP_FCONV_TO_R8 (freg) "0" {
 613         /* nothing to do */
 614 }
 615
 616 freg: OP_FCONV_TO_R4 (freg) "0" {
 617         /* fixme: nothing to do ??*/
 618 }
 619
 620 reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) {
 621         MonoInst *base = state->right->left->tree;
 622
 623         tree->dreg = state->reg1;
 624         tree->sreg1 = state->left->reg1;
 625         tree->sreg2 = base->inst_basereg;
 626         tree->inst_offset = base->inst_offset;
 627         tree->opcode = OP_X86_ADD_MEMBASE;
 628         mono_bblock_add_inst (s->cbb, tree);
 629 }
 630
 631 reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) {
 632         MonoInst *base = state->right->left->tree;
 633
 634         tree->dreg = state->reg1;
 635         tree->sreg1 = state->left->reg1;
 636         tree->sreg2 = base->inst_basereg;
 637         tree->inst_offset = base->inst_offset;
 638         tree->opcode = OP_X86_SUB_MEMBASE;
 639         mono_bblock_add_inst (s->cbb, tree);
 640 }
 641
 642 reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) {
 643         MonoInst *base = state->right->left->tree;
 644
 645         tree->dreg = state->reg1;
 646         tree->sreg1 = state->left->reg1;
 647         tree->sreg2 = base->inst_basereg;
 648         tree->inst_offset = base->inst_offset;
 649         tree->opcode = OP_X86_MUL_MEMBASE;
 650         mono_bblock_add_inst (s->cbb, tree);
 651 }
 652
 653 lreg: OP_LSHL (lreg, reg) "0" {
 654         MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
 655 }
 656
 657 lreg: OP_LSHL (lreg, OP_ICONST) "0" {
 658         MONO_EMIT_BIALU_IMM (s, tree, OP_LSHL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
 659 }
 660
 661 lreg: OP_LSHR (lreg, reg) "0" {
 662         MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
 663 }
 664
 665 lreg: OP_LSHR (lreg, OP_ICONST) "0" {
 666         MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
 667 }
 668
 669 lreg: OP_LSHR_UN (lreg, reg) "0" {
 670         MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
 671 }
 672
 673 lreg: OP_LSHR_UN (lreg, OP_ICONST) "0" {
 674         MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
 675 }
 676 %%