4 # inssel-float.brg: burg file for floating point instructions
7 # Dietmar Maurer (dietmar@ximian.com)
9 # (C) 2002 Ximian, Inc.
16 freg: CEE_LDIND_R4 (base) {
17 MONO_EMIT_LOAD_MEMBASE_OP (s, tree, OP_LOADR4_MEMBASE, state->reg1,
18 state->left->tree->inst_basereg, state->left->tree->inst_offset);
21 freg: CEE_LDIND_R8 (base) {
22 MONO_EMIT_LOAD_MEMBASE_OP (s, tree, OP_LOADR8_MEMBASE, state->reg1,
23 state->left->tree->inst_basereg, state->left->tree->inst_offset);
26 stmt: CEE_STIND_R4 (base, freg) {
27 MONO_EMIT_STORE_MEMBASE (s, tree, OP_STORER4_MEMBASE_REG, state->left->tree->inst_basereg,
28 state->left->tree->inst_offset, state->right->reg1);
31 stmt: CEE_STIND_R8 (base, freg) {
32 MONO_EMIT_STORE_MEMBASE (s, tree, OP_STORER8_MEMBASE_REG, state->left->tree->inst_basereg,
33 state->left->tree->inst_offset, state->right->reg1);
37 tree->dreg = state->reg1;
38 mono_bblock_add_inst (s->cbb, tree);
42 tree->dreg = state->reg1;
43 mono_bblock_add_inst (s->cbb, tree);
50 freg: OP_FADD (freg, freg) {
51 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
54 freg: OP_FSUB (freg, freg) {
55 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
58 freg: OP_FMUL (freg, freg) {
59 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
62 freg: OP_FDIV (freg, freg) {
63 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
66 freg: OP_FREM (freg, freg) {
67 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
70 freg: OP_FNEG (freg) {
71 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
74 freg: CEE_CKFINITE (freg) {
75 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
79 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
83 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
87 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
91 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
94 freg: OP_ATAN (freg) {
95 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
98 freg: OP_SQRT (freg) {
99 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
103 # floating point conversions
106 reg: OP_FCONV_TO_I4 (freg) {
107 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
110 reg: OP_FCONV_TO_U4 (freg) {
111 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
114 reg: OP_FCONV_TO_OVF_I4 (freg) {
115 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
118 reg: OP_FCONV_TO_OVF_U4 (freg) {
119 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
122 reg: OP_FCONV_TO_OVF_I8 (freg) {
123 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
126 reg: OP_FCONV_TO_OVF_U8 (freg) {
127 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
130 reg: OP_FCONV_TO_OVF_I (freg) {
131 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
134 reg: OP_FCONV_TO_OVF_U (freg) {
135 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
138 reg: OP_FCONV_TO_I (freg) {
139 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
142 reg: OP_FCONV_TO_U (freg) {
143 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
146 reg: OP_FCONV_TO_I2 (freg) {
147 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
150 reg: OP_FCONV_TO_U2 (freg) {
151 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
154 reg: OP_FCONV_TO_I1 (freg) {
155 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
158 reg: OP_FCONV_TO_U1 (freg) {
159 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
162 freg: OP_FCONV_TO_R8 (freg) {
163 MONO_EMIT_UNALU (s, tree, OP_FMOVE, state->reg1, state->left->reg1);
166 freg: OP_FCONV_TO_R4 (freg) {
167 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
170 freg: CEE_CONV_R4 (reg) "2" {
171 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
174 freg: CEE_CONV_R8 (reg) "2" {
175 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
178 freg: CEE_CONV_R_UN (reg) "2" {
179 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);
186 # CPUs using the same condition flags for integers and float
187 # can use the following chain rule:
188 # cflags: fpcflags "0"
189 # that way all branches are handled by inssel.brg
191 fpcflags: OP_COMPARE (freg, freg) {
192 tree->opcode = OP_FCOMPARE;
193 tree->sreg1 = state->left->reg1;
194 tree->sreg2 = state->right->reg1;
195 mono_bblock_add_inst (s->cbb, tree);
199 # miscellaneous fp operations
202 stmt: CEE_POP (freg) {
207 freg: CEE_CKFINITE (freg) {
208 MONO_EMIT_UNALU (s, tree, tree->opcode, state->reg1, state->left->reg1);