1 #define MONO_EMIT_NEW_AMD64_ICOMPARE_MEMBASE_REG(cfg,basereg,offset,operand) do { \
3 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
4 inst->opcode = OP_AMD64_ICOMPARE_MEMBASE_REG; \
5 inst->inst_basereg = basereg; \
6 inst->inst_offset = offset; \
7 inst->sreg2 = operand; \
8 mono_bblock_add_inst (cfg->cbb, inst); \
11 #define MONO_EMIT_NEW_AMD64_ICOMPARE_MEMBASE_IMM(cfg,basereg,offset,operand) do { \
13 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
14 inst->opcode = OP_AMD64_ICOMPARE_MEMBASE_IMM; \
15 inst->inst_basereg = basereg; \
16 inst->inst_offset = offset; \
17 inst->inst_imm = operand; \
18 mono_bblock_add_inst (cfg->cbb, inst); \
21 /* override the arch independant versions with fast x86 versions */
23 #undef MONO_EMIT_BOUNDS_CHECK
24 #undef MONO_EMIT_BOUNDS_CHECK_IMM
26 #define MONO_EMIT_BOUNDS_CHECK(cfg, array_reg, array_type, array_length_field, index_reg) do { \
27 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
28 MONO_EMIT_NEW_AMD64_ICOMPARE_MEMBASE_REG (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_reg); \
29 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
33 #define MONO_EMIT_BOUNDS_CHECK_IMM(cfg, array_reg, array_type, array_length_field, index_imm) do { \
34 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
35 MONO_EMIT_NEW_AMD64_ICOMPARE_MEMBASE_IMM (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_imm); \
36 MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
40 int cbranch_to_fcbranch (int opcode);
41 int bialu_to_bialu_imm (int opcode);
42 int ceq_to_fceq (int opcode);
43 int call_reg_to_call_membase (int opcode);
48 # inssel-amd64.brg: burg file for special AMD64 instructions
51 # Dietmar Maurer (dietmar@ximian.com)
52 # Paolo Molaro (lupus@ximian.com)
54 # (C) 2002 Ximian, Inc.
57 stmt: OP_START_HANDLER {
58 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
59 MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP);
62 stmt: CEE_ENDFINALLY {
63 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
64 MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
65 tree->opcode = CEE_RET;
66 mono_bblock_add_inst (s->cbb, tree);
69 stmt: OP_ENDFILTER (reg) {
70 MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
71 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->left->reg1);
72 MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
73 tree->opcode = CEE_RET;
74 mono_bblock_add_inst (s->cbb, tree);
77 freg: OP_LCONV_TO_R8 (reg) {
78 tree->sreg1 = state->left->reg1;
79 tree->dreg = state->reg1;
80 mono_bblock_add_inst (s->cbb, tree);
83 freg: OP_LCONV_TO_R4 (reg) {
84 tree->sreg1 = state->left->reg1;
85 tree->dreg = state->reg1;
86 mono_bblock_add_inst (s->cbb, tree);
89 cflags: OP_COMPARE (CEE_LDIND_I4 (base), reg) {
90 tree->opcode = OP_AMD64_ICOMPARE_MEMBASE_REG;
91 tree->inst_basereg = state->left->left->tree->inst_basereg;
92 tree->inst_offset = state->left->left->tree->inst_offset;
93 tree->sreg2 = state->right->reg1;
94 mono_bblock_add_inst (s->cbb, tree);
97 cflags: OP_COMPARE (CEE_LDIND_I4 (base), OP_ICONST) {
98 tree->opcode = OP_AMD64_ICOMPARE_MEMBASE_IMM;
99 tree->inst_basereg = state->left->left->tree->inst_basereg;
100 tree->inst_offset = state->left->left->tree->inst_offset;
101 tree->inst_imm = state->right->tree->inst_c0;
102 mono_bblock_add_inst (s->cbb, tree);
105 cflags: OP_COMPARE (reg, CEE_LDIND_I4 (base)) {
106 tree->opcode = OP_AMD64_ICOMPARE_REG_MEMBASE;
107 tree->sreg2 = state->right->left->tree->inst_basereg;
108 tree->inst_offset = state->right->left->tree->inst_offset;
109 tree->sreg1 = state->left->reg1;
110 mono_bblock_add_inst (s->cbb, tree);
113 stmt: CEE_STIND_I1 (base, OP_CEQ (cflags)) {
114 tree->opcode = OP_X86_SETEQ_MEMBASE;
115 tree->inst_offset = state->left->tree->inst_offset;
116 tree->inst_basereg = state->left->tree->inst_basereg;
117 mono_bblock_add_inst (s->cbb, tree);
120 reg: OP_LOCALLOC (OP_ICONST) {
121 if (tree->flags & MONO_INST_INIT) {
122 /* microcoded in mini-x86.c */
123 tree->sreg1 = mono_regstate_next_int (s->rs);
124 tree->dreg = state->reg1;
125 MONO_EMIT_NEW_ICONST (s, tree->sreg1, state->left->tree->inst_c0);
126 mono_bblock_add_inst (s->cbb, tree);
128 guint32 size = state->left->tree->inst_c0;
129 size = (size + (MONO_ARCH_FRAME_ALIGNMENT - 1)) & ~ (MONO_ARCH_FRAME_ALIGNMENT - 1);
130 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, size);
131 MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
135 reg: OP_LOCALLOC (reg) {
136 tree->sreg1 = state->left->tree->dreg;
137 tree->dreg = state->reg1;
138 mono_bblock_add_inst (s->cbb, tree);
141 stmt: OP_SETRET (reg) {
142 tree->opcode = OP_MOVE;
143 tree->sreg1 = state->left->reg1;
144 tree->dreg = X86_EAX;
145 mono_bblock_add_inst (s->cbb, tree);
148 stmt: OP_SETRET (reg) {
149 MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->left->reg2);
150 tree->opcode = OP_MOVE;
151 tree->sreg1 = state->left->reg1;
152 tree->dreg = X86_EAX;
153 mono_bblock_add_inst (s->cbb, tree);
156 reg: CEE_LDIND_REF (OP_REGVAR),
157 reg: CEE_LDIND_I (OP_REGVAR),
158 reg: CEE_LDIND_I4 (OP_REGVAR),
159 reg: CEE_LDIND_U4 (OP_REGVAR) "0" {
160 /* This rule might not work on all archs */
161 state->reg1 = state->left->tree->dreg;
162 tree->dreg = state->reg1;
165 stmt: OP_SETRET (CEE_LDIND_REF (OP_REGVAR)),
166 stmt: OP_SETRET (CEE_LDIND_I4 (OP_REGVAR)),
167 stmt: OP_SETRET (CEE_LDIND_U4 (OP_REGVAR)),
168 stmt: OP_SETRET (CEE_LDIND_I (OP_REGVAR)) {
169 tree->opcode = OP_MOVE;
170 tree->sreg1 = state->left->left->tree->dreg;
171 tree->dreg = X86_EAX;
172 mono_bblock_add_inst (s->cbb, tree);
175 stmt: OP_SETRET (freg) {
176 if (mono_method_signature (s->method)->ret->type == MONO_TYPE_R4)
177 tree->opcode = OP_AMD64_SET_XMMREG_R4;
179 tree->opcode = OP_AMD64_SET_XMMREG_R8;
180 tree->sreg1 = state->left->reg1;
181 tree->dreg = 0; /* %xmm0 */
182 mono_bblock_add_inst (s->cbb, tree);
186 stmt: OP_SETRET (OP_ICONST) {
187 if (state->left->tree->inst_c0 == 0) {
188 MONO_EMIT_BIALU (s, tree, CEE_XOR, AMD64_RAX, AMD64_RAX, AMD64_RAX);
191 tree->opcode = OP_ICONST;
192 tree->inst_c0 = state->left->tree->inst_c0;
193 tree->dreg = X86_EAX;
194 mono_bblock_add_inst (s->cbb, tree);
198 stmt: OP_OUTARG (reg) {
199 tree->opcode = OP_X86_PUSH;
200 tree->sreg1 = state->left->reg1;
201 mono_bblock_add_inst (s->cbb, tree);
204 stmt: OP_OUTARG_REG (reg) {
205 MonoCallInst *call = (MonoCallInst*)tree->inst_right;
207 tree->opcode = OP_MOVE;
208 tree->sreg1 = state->left->reg1;
209 tree->dreg = mono_regstate_next_int (s->rs);
210 mono_bblock_add_inst (s->cbb, tree);
212 mono_call_inst_add_outarg_reg (call, tree->dreg, tree->unused, FALSE);
215 # we need to reduce this code duplication with some burg syntax extension
216 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)) {
217 tree->opcode = OP_X86_PUSH;
218 tree->sreg1 = state->left->left->tree->dreg;
219 mono_bblock_add_inst (s->cbb, tree);
222 stmt: OP_OUTARG (CEE_LDIND_I4 (OP_REGVAR)) {
223 tree->opcode = OP_X86_PUSH;
224 tree->sreg1 = state->left->left->tree->dreg;
225 mono_bblock_add_inst (s->cbb, tree);
228 stmt: OP_OUTARG (CEE_LDIND_U4 (OP_REGVAR)) {
229 tree->opcode = OP_X86_PUSH;
230 tree->sreg1 = state->left->left->tree->dreg;
231 mono_bblock_add_inst (s->cbb, tree);
234 stmt: OP_OUTARG (CEE_LDIND_I (OP_REGVAR)) {
235 tree->opcode = OP_X86_PUSH;
236 tree->sreg1 = state->left->left->tree->dreg;
237 mono_bblock_add_inst (s->cbb, tree);
240 stmt: OP_OUTARG (CEE_LDIND_I (base)) {
241 tree->opcode = OP_X86_PUSH_MEMBASE;
242 tree->inst_basereg = state->left->left->tree->inst_basereg;
243 tree->inst_offset = state->left->left->tree->inst_offset;
244 mono_bblock_add_inst (s->cbb, tree);
247 stmt: OP_OUTARG (CEE_LDIND_REF (base)) {
248 tree->opcode = OP_X86_PUSH_MEMBASE;
249 tree->inst_basereg = state->left->left->tree->inst_basereg;
250 tree->inst_offset = state->left->left->tree->inst_offset;
251 mono_bblock_add_inst (s->cbb, tree);
254 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)) {
255 tree->opcode = OP_X86_PUSH;
256 tree->sreg1 = state->left->left->tree->dreg;
257 mono_bblock_add_inst (s->cbb, tree);
260 stmt: OP_OUTARG (CEE_LDOBJ (reg)) {
261 tree->opcode = OP_X86_PUSH;
262 tree->sreg1 = state->left->reg1;
263 mono_bblock_add_inst (s->cbb, tree);
266 stmt: OP_OUTARG (freg) {
267 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
268 tree->opcode = OP_STORER8_MEMBASE_REG;
269 tree->sreg1 = state->left->reg1;
270 tree->inst_destbasereg = X86_ESP;
271 tree->inst_offset = 0;
272 mono_bblock_add_inst (s->cbb, tree);
275 stmt: OP_OUTARG_R4 (freg) {
276 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
277 tree->opcode = OP_STORER4_MEMBASE_REG;
278 tree->sreg1 = state->left->reg1;
279 tree->inst_destbasereg = X86_ESP;
280 tree->inst_offset = 0;
281 mono_bblock_add_inst (s->cbb, tree);
284 stmt: OP_OUTARG_R8 (freg) {
285 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
286 tree->opcode = OP_STORER8_MEMBASE_REG;
287 tree->sreg1 = state->left->reg1;
288 tree->inst_destbasereg = X86_ESP;
289 tree->inst_offset = 0;
290 mono_bblock_add_inst (s->cbb, tree);
293 stmt: OP_AMD64_OUTARG_XMMREG_R4 (freg) {
294 MonoCallInst *call = (MonoCallInst*)tree->inst_right;
296 tree->opcode = OP_AMD64_SET_XMMREG_R4;
297 tree->sreg1 = state->left->reg1;
298 tree->dreg = mono_regstate_next_float (s->rs);
299 mono_bblock_add_inst (s->cbb, tree);
301 mono_call_inst_add_outarg_reg (call, tree->dreg, tree->unused, TRUE);
304 stmt: OP_AMD64_OUTARG_XMMREG_R8 (freg) {
305 MonoCallInst *call = (MonoCallInst*)tree->inst_right;
307 tree->opcode = OP_AMD64_SET_XMMREG_R8;
308 tree->sreg1 = state->left->reg1;
309 tree->dreg = mono_regstate_next_float (s->rs);
310 mono_bblock_add_inst (s->cbb, tree);
312 mono_call_inst_add_outarg_reg (call, tree->dreg, tree->unused, TRUE);
315 stmt: OP_OUTARG_VT (CEE_LDOBJ (base)) {
316 MonoInst *vt = state->left->left->tree;
317 //g_print ("vt size: %d at R%d + %d\n", tree->inst_imm, vt->inst_basereg, vt->inst_offset);
322 if (tree->inst_imm == 8) {
323 /* Can't use this for < 8 since it does an 8 byte memory load */
324 tree->opcode = OP_X86_PUSH_MEMBASE;
325 tree->inst_basereg = vt->inst_basereg;
326 tree->inst_offset = vt->inst_offset;
327 mono_bblock_add_inst (s->cbb, tree);
328 } else if (tree->inst_imm <= 20) {
329 int sz = tree->inst_imm;
332 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, sz);
333 mini_emit_memcpy (s, X86_ESP, 0, vt->inst_basereg, vt->inst_offset, tree->inst_imm, 0);
335 tree->opcode = OP_X86_PUSH_OBJ;
336 tree->inst_basereg = vt->inst_basereg;
337 tree->inst_offset = vt->inst_offset;
338 mono_bblock_add_inst (s->cbb, tree);
342 stmt: OP_OUTARG_VT (OP_ICONST) {
343 tree->opcode = OP_X86_PUSH_IMM;
344 tree->inst_imm = state->left->tree->inst_c0;
345 mono_bblock_add_inst (s->cbb, tree);
348 stmt: OP_OUTARG_VT (reg) {
349 tree->opcode = OP_X86_PUSH;
350 tree->sreg1 = state->left->tree->dreg;
351 mono_bblock_add_inst (s->cbb, tree);
354 stmt: OP_AMD64_OUTARG_ALIGN_STACK {
355 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
358 base: OP_INARG_VT (base) {
359 MONO_EMIT_NEW_LOAD_MEMBASE (s, state->reg1, state->left->tree->inst_basereg,
360 state->left->tree->inst_offset);
363 reg: OP_LDADDR (OP_INARG_VT (base)) {
364 MONO_EMIT_NEW_LOAD_MEMBASE (s, state->reg1, state->left->left->tree->inst_basereg,
365 state->left->left->tree->inst_offset);
368 reg: CEE_LDOBJ (OP_INARG_VT (base)) {
369 MONO_EMIT_NEW_LOAD_MEMBASE (s, state->reg1, state->left->left->tree->inst_basereg,
370 state->left->left->tree->inst_offset);
373 reg: OP_LDADDR (OP_REGOFFSET) "1" {
374 if (state->left->tree->inst_offset) {
375 tree->opcode = OP_X86_LEA_MEMBASE;
376 tree->sreg1 = state->left->tree->inst_basereg;
377 tree->inst_imm = state->left->tree->inst_offset;
378 tree->dreg = state->reg1;
380 tree->opcode = OP_MOVE;
381 tree->sreg1 = state->left->tree->inst_basereg;
382 tree->dreg = state->reg1;
384 mono_bblock_add_inst (s->cbb, tree);
387 reg: CEE_LDOBJ (OP_REGOFFSET) "1" {
388 if (state->left->tree->inst_offset) {
389 tree->opcode = OP_X86_LEA_MEMBASE;
390 tree->sreg1 = state->left->tree->inst_basereg;
391 tree->inst_imm = state->left->tree->inst_offset;
392 tree->dreg = state->reg1;
394 tree->opcode = OP_MOVE;
395 tree->sreg1 = state->left->tree->inst_basereg;
396 tree->dreg = state->reg1;
398 mono_bblock_add_inst (s->cbb, tree);
401 reg: CEE_LDELEMA (reg, reg) "15" {
402 guint32 size = mono_class_array_element_size (tree->klass);
404 MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoArray, max_length, state->right->reg1);
406 if (size == 1 || size == 2 || size == 4 || size == 8) {
407 static const int fast_log2 [] = { 1, 0, 1, -1, 2, -1, -1, -1, 3 };
410 /* The array reg is 64 bits but the index reg is only 32 */
411 tree->dreg = mono_regstate_next_float (s->rs);
412 reg = mono_regstate_next_int (s->rs);
413 MONO_EMIT_NEW_UNALU (s, OP_SEXT_I4, reg, state->right->reg1);
415 tree->opcode = OP_X86_LEA;
416 tree->dreg = state->reg1;
417 tree->sreg1 = state->left->reg1;
419 tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
420 tree->unused = fast_log2 [size];
421 mono_bblock_add_inst (s->cbb, tree);
423 int mult_reg = mono_regstate_next_int (s->rs);
424 int add_reg = mono_regstate_next_int (s->rs);
425 MONO_EMIT_NEW_BIALU_IMM (s, OP_MUL_IMM, mult_reg, state->right->reg1, size);
426 MONO_EMIT_NEW_BIALU (s, CEE_ADD, add_reg, mult_reg, state->left->reg1);
427 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, state->reg1, add_reg, G_STRUCT_OFFSET (MonoArray, vector));
431 stmt: CEE_STIND_R8 (OP_REGVAR, freg) {
432 /* nothing to do: the value is already on the FP stack */
435 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
436 int con = state->right->right->tree->inst_c0;
439 tree->opcode = OP_X86_INC_MEMBASE;
441 tree->opcode = OP_X86_ADD_MEMBASE_IMM;
442 tree->inst_imm = con;
445 tree->inst_basereg = state->left->tree->inst_basereg;
446 tree->inst_offset = state->left->tree->inst_offset;
447 mono_bblock_add_inst (s->cbb, tree);
449 MBTREE_TYPE *t1 = state->right->left->left->tree;
450 MBTREE_TYPE *t2 = state->left->tree;
451 MBCOND (t1->inst_basereg == t2->inst_basereg &&
452 t1->inst_offset == t2->inst_offset);
456 stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)) {
457 int con = state->right->right->tree->inst_c0;
460 tree->opcode = OP_X86_DEC_MEMBASE;
462 tree->opcode = OP_X86_SUB_MEMBASE_IMM;
463 tree->inst_imm = con;
466 tree->inst_basereg = state->left->tree->inst_basereg;
467 tree->inst_offset = state->left->tree->inst_offset;
468 mono_bblock_add_inst (s->cbb, tree);
470 MBTREE_TYPE *t1 = state->right->left->left->tree;
471 MBTREE_TYPE *t2 = state->left->tree;
472 MBCOND (t1->inst_basereg == t2->inst_basereg &&
473 t1->inst_offset == t2->inst_offset);
477 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_SUB (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
478 int con = state->right->right->tree->inst_c0;
479 int dreg = state->left->tree->dreg;
480 int sreg = state->right->left->left->tree->dreg;
484 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
485 tree->opcode = OP_X86_DEC_REG;
486 tree->dreg = tree->sreg1 = dreg;
487 } else if (con == -1) {
489 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
490 tree->opcode = OP_X86_INC_REG;
491 tree->dreg = tree->sreg1 = dreg;
493 tree->opcode = OP_SUB_IMM;
494 tree->inst_imm = con;
498 mono_bblock_add_inst (s->cbb, tree);
501 stmt: CEE_STIND_I (OP_REGVAR, CEE_ADD (CEE_LDIND_I (OP_REGVAR), OP_ICONST)),
502 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_ADD (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
503 int con = state->right->right->tree->inst_c0;
504 int dreg = state->left->tree->dreg;
505 int sreg = state->right->left->left->tree->dreg;
509 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
510 tree->opcode = OP_X86_INC_REG;
511 tree->dreg = tree->sreg1 = dreg;
512 } else if (con == -1) {
514 MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
515 tree->opcode = OP_X86_DEC_REG;
516 tree->dreg = tree->sreg1 = dreg;
518 tree->opcode = OP_ADD_IMM;
519 tree->inst_imm = con;
523 mono_bblock_add_inst (s->cbb, tree);
526 reg: CEE_LDIND_I2 (OP_REGVAR) {
527 MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);
531 stmt: CEE_STIND_I8 (OP_REGVAR, OP_ICONST),
532 stmt: CEE_STIND_I4 (OP_REGVAR, OP_ICONST),
533 stmt: CEE_STIND_I2 (OP_REGVAR, OP_ICONST),
534 stmt: CEE_STIND_I1 (OP_REGVAR, OP_ICONST),
535 stmt: CEE_STIND_REF (OP_REGVAR, OP_ICONST),
536 stmt: CEE_STIND_I (OP_REGVAR, OP_ICONST),
537 stmt: CEE_STIND_I8 (OP_REGVAR, OP_I8CONST),
538 stmt: CEE_STIND_I4 (OP_REGVAR, OP_I8CONST),
539 stmt: CEE_STIND_I2 (OP_REGVAR, OP_I8CONST),
540 stmt: CEE_STIND_I1 (OP_REGVAR, OP_I8CONST),
541 stmt: CEE_STIND_REF (OP_REGVAR, OP_I8CONST),
542 stmt: CEE_STIND_I (OP_REGVAR, OP_I8CONST) {
543 int r = state->left->tree->dreg;
544 MONO_EMIT_BIALU (s, tree, CEE_XOR, r, r, r);
546 MBCOND (!state->right->tree->inst_c0);
551 # on x86, fp compare overwrites EAX, so we must
552 # either improve the local register allocator or
553 # emit coarse opcodes which saves EAX for us.
555 reg: OP_CEQ (OP_COMPARE (freg, freg)),
556 reg: OP_CLT (OP_COMPARE (freg, freg)),
557 reg: OP_CGT (OP_COMPARE (freg, freg)),
558 reg: OP_CLT_UN (OP_COMPARE (freg, freg)),
559 reg: OP_CGT_UN (OP_COMPARE (freg, freg)) {
560 MONO_EMIT_BIALU (s, tree, ceq_to_fceq (tree->opcode), state->reg1, state->left->left->reg1,
561 state->left->right->reg1);
564 # fpcflags overwrites EAX, but this does not matter for statements
565 # because we are the last operation in the tree.
567 stmt: CEE_BNE_UN (fpcflags),
568 stmt: CEE_BEQ (fpcflags),
569 stmt: CEE_BLT (fpcflags),
570 stmt: CEE_BLT_UN (fpcflags),
571 stmt: CEE_BGT (fpcflags),
572 stmt: CEE_BGT_UN (fpcflags),
573 stmt: CEE_BGE (fpcflags),
574 stmt: CEE_BGE_UN (fpcflags),
575 stmt: CEE_BLE (fpcflags),
576 stmt: CEE_BLE_UN (fpcflags) {
577 tree->opcode = cbranch_to_fcbranch (tree->opcode);
578 mono_bblock_add_inst (s->cbb, tree);
581 stmt: CEE_POP (freg) "0" {
582 /* we need to pop the value from the x86 FP stack */
583 MONO_EMIT_UNALU (s, tree, OP_X86_FPOP, -1, state->left->reg1);
586 # override the rules in inssel-float.brg that work for machines with FP registers
588 freg: OP_FCONV_TO_R8 (freg) "0" {
589 tree->opcode = OP_FMOVE;
590 tree->sreg1 = state->left->reg1;
591 tree->dreg = state->reg1;
592 mono_bblock_add_inst (s->cbb, tree);
595 freg: OP_FCONV_TO_R4 (freg) "0" {
596 tree->opcode = OP_FMOVE;
597 tree->sreg1 = state->left->reg1;
598 tree->dreg = state->reg1;
599 mono_bblock_add_inst (s->cbb, tree);
602 reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) {
603 MonoInst *base = state->right->left->tree;
605 MONO_EMIT_BIALU_MEMBASE (cfg, tree, OP_X86_ADD_MEMBASE, state->reg1, state->left->reg1, base->inst_basereg, base->inst_offset);
608 reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) {
609 MonoInst *base = state->right->left->tree;
611 MONO_EMIT_BIALU_MEMBASE (cfg, tree, OP_X86_SUB_MEMBASE, state->reg1, state->left->reg1, base->inst_basereg, base->inst_offset);
614 reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) {
615 MonoInst *base = state->right->left->tree;
617 MONO_EMIT_BIALU_MEMBASE (cfg, tree, OP_X86_MUL_MEMBASE, state->reg1, state->left->reg1, base->inst_basereg, base->inst_offset);
620 reg: OP_LSHL (reg, reg),
621 reg: OP_LSHR (reg, reg),
622 reg: OP_LSHR_UN (reg, reg),
623 reg: OP_LMUL (reg, reg),
624 reg: OP_LDIV (reg, reg),
625 reg: OP_LDIV_UN (reg, reg),
626 reg: OP_LREM (reg, reg),
627 reg: OP_LREM_UN (reg, reg),
628 reg: OP_LMUL_OVF (reg, reg),
629 reg: OP_LMUL_OVF_UN (reg, reg) "0" {
630 MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
633 reg: OP_LMUL (reg, OP_I8CONST),
634 reg: OP_LSHL (reg, OP_ICONST),
635 reg: OP_LSHR (reg, OP_ICONST),
636 reg: OP_LSHR_UN (reg, OP_ICONST) {
637 MONO_EMIT_BIALU_IMM (s, tree, bialu_to_bialu_imm (tree->opcode), state->reg1, state->left->reg1, state->right->tree->inst_c0);
639 MBCOND (mono_arch_is_inst_imm (state->right->tree->inst_c0));
643 reg: OP_ATOMIC_ADD_NEW_I4 (base, reg),
644 reg: OP_ATOMIC_ADD_NEW_I8 (base, reg),
645 reg: OP_ATOMIC_ADD_I4 (base, reg),
646 reg: OP_ATOMIC_ADD_I8 (base, reg),
647 reg: OP_ATOMIC_EXCHANGE_I4 (base, reg),
648 reg: OP_ATOMIC_EXCHANGE_I8 (base, reg) {
649 tree->opcode = tree->opcode;
650 tree->dreg = state->reg1;
651 tree->sreg2 = state->right->reg1;
652 tree->inst_basereg = state->left->tree->inst_basereg;
653 tree->inst_offset = state->left->tree->inst_offset;
655 mono_bblock_add_inst (s->cbb, tree);
658 # Optimized call instructions
659 # mono_arch_patch_delegate_trampoline depends on these
660 reg: OP_CALL_REG (CEE_LDIND_I (base)),
661 freg: OP_FCALL_REG (CEE_LDIND_I (base)),
662 reg: OP_LCALL_REG (CEE_LDIND_I (base)) {
663 tree->opcode = call_reg_to_call_membase (tree->opcode);
664 tree->inst_basereg = state->left->left->tree->inst_basereg;
665 tree->inst_offset = state->left->left->tree->inst_offset;
666 tree->dreg = state->reg1;
667 mono_bblock_add_inst (s->cbb, tree);
670 stmt: OP_VOIDCALL_REG (CEE_LDIND_I (base)) {
671 tree->opcode = call_reg_to_call_membase (tree->opcode);
672 tree->inst_basereg = state->left->left->tree->inst_basereg;
673 tree->inst_offset = state->left->left->tree->inst_offset;
674 mono_bblock_add_inst (s->cbb, tree);
677 stmt: OP_VCALL_REG (CEE_LDIND_I (base), reg) {
678 mono_arch_emit_this_vret_args (s, (MonoCallInst*)tree, -1, -1, state->right->reg1);
680 tree->opcode = call_reg_to_call_membase (tree->opcode);
681 tree->inst_basereg = state->left->left->tree->inst_basereg;
682 tree->inst_offset = state->left->left->tree->inst_offset;
683 tree->dreg = state->reg1;
684 mono_bblock_add_inst (s->cbb, tree);
690 bialu_to_bialu_imm (int opcode)
700 return OP_LSHR_UN_IMM;
702 g_assert_not_reached ();
709 cbranch_to_fcbranch (int opcode)
733 g_assert_not_reached ();
740 ceq_to_fceq (int opcode)
754 g_assert_not_reached ();
761 call_reg_to_call_membase (int opcode)
765 return OP_CALL_MEMBASE;
767 return OP_FCALL_MEMBASE;
769 return OP_VCALL_MEMBASE;
771 return OP_LCALL_MEMBASE;
772 case OP_VOIDCALL_REG:
773 return OP_VOIDCALL_MEMBASE;
775 g_assert_not_reached ();