mono/mini/inssel-amd64.brg

   1 #define MONO_EMIT_NEW_AMD64_ICOMPARE_MEMBASE_REG(cfg,basereg,offset,operand) do { \
   2                 MonoInst *inst; \
   3                 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
   4                 inst->opcode = OP_AMD64_ICOMPARE_MEMBASE_REG; \
   5                 inst->inst_basereg = basereg; \
   6                 inst->inst_offset = offset; \
   7                 inst->sreg2 = operand; \
   8                 mono_bblock_add_inst (cfg->cbb, inst); \
   9         } while (0)
  10
  11 #define MONO_EMIT_NEW_AMD64_ICOMPARE_MEMBASE_IMM(cfg,basereg,offset,operand) do { \
  12                 MonoInst *inst; \
  13                 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
  14                 inst->opcode = OP_AMD64_ICOMPARE_MEMBASE_IMM; \
  15                 inst->inst_basereg = basereg; \
  16                 inst->inst_offset = offset; \
  17                 inst->inst_imm = operand; \
  18                 mono_bblock_add_inst (cfg->cbb, inst); \
  19         } while (0)
  20
  21 /* override the arch independant versions with fast x86 versions */
  22
  23 #undef MONO_EMIT_BOUNDS_CHECK
  24 #undef MONO_EMIT_BOUNDS_CHECK_IMM
  25
  26 #define MONO_EMIT_BOUNDS_CHECK(cfg, array_reg, array_type, array_length_field, index_reg) do { \
  27                 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
  28                         MONO_EMIT_NEW_AMD64_ICOMPARE_MEMBASE_REG (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_reg); \
  29                         MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
  30                 } \
  31         } while (0)
  32
  33 #define MONO_EMIT_BOUNDS_CHECK_IMM(cfg, array_reg, array_type, array_length_field, index_imm) do { \
  34                 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
  35                         MONO_EMIT_NEW_AMD64_ICOMPARE_MEMBASE_IMM (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_imm); \
  36                         MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
  37                 } \
  38         } while (0)
  39
  40 int cbranch_to_fcbranch (int opcode);
  41 int bialu_to_bialu_imm (int opcode);
  42 int ceq_to_fceq (int opcode);
  43
  44 %%
  45
  46 #
  47 # inssel-amd64.brg: burg file for special AMD64 instructions
  48 #
  49 # Author:
  50 #   Dietmar Maurer (dietmar@ximian.com)
  51 #   Paolo Molaro (lupus@ximian.com)
  52 #
  53 # (C) 2002 Ximian, Inc.
  54 #
  55
  56 stmt: OP_START_HANDLER {
  57         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
  58         MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP);
  59 }
  60
  61 stmt: CEE_ENDFINALLY {
  62         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
  63         MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
  64         tree->opcode = CEE_RET;
  65         mono_bblock_add_inst (s->cbb, tree);
  66 }
  67
  68 stmt: OP_ENDFILTER (reg) {
  69         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
  70         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->left->reg1);
  71         MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
  72         tree->opcode = CEE_RET;
  73         mono_bblock_add_inst (s->cbb, tree);
  74 }
  75
  76 freg: OP_LCONV_TO_R8 (reg) {
  77         tree->sreg1 = state->left->reg1;
  78         tree->dreg = state->reg1;
  79         mono_bblock_add_inst (s->cbb, tree);
  80 }
  81
  82 freg: OP_LCONV_TO_R4 (reg) {
  83         tree->sreg1 = state->left->reg1;
  84         tree->dreg = state->reg1;
  85         mono_bblock_add_inst (s->cbb, tree);
  86 }
  87
  88 cflags: OP_COMPARE (CEE_LDIND_I4 (base), reg) {
  89         tree->opcode = OP_AMD64_ICOMPARE_MEMBASE_REG;
  90         tree->inst_basereg = state->left->left->tree->inst_basereg;
  91         tree->inst_offset = state->left->left->tree->inst_offset;
  92         tree->sreg2 = state->right->reg1;
  93         mono_bblock_add_inst (s->cbb, tree);
  94 }
  95
  96 cflags: OP_COMPARE (CEE_LDIND_I4 (base), OP_ICONST) {
  97         tree->opcode = OP_AMD64_ICOMPARE_MEMBASE_IMM;
  98         tree->inst_basereg = state->left->left->tree->inst_basereg;
  99         tree->inst_offset = state->left->left->tree->inst_offset;
 100         tree->inst_imm = state->right->tree->inst_c0;
 101         mono_bblock_add_inst (s->cbb, tree);
 102 }
 103
 104 cflags: OP_COMPARE (reg, CEE_LDIND_I4 (base)) {
 105         tree->opcode = OP_AMD64_ICOMPARE_REG_MEMBASE;
 106         tree->sreg2 = state->right->left->tree->inst_basereg;
 107         tree->inst_offset = state->right->left->tree->inst_offset;
 108         tree->sreg1 = state->left->reg1;
 109         mono_bblock_add_inst (s->cbb, tree);
 110 }
 111
 112 stmt: CEE_STIND_I1 (base, OP_CEQ (cflags)) {
 113         tree->opcode = OP_X86_SETEQ_MEMBASE;
 114         tree->inst_offset = state->left->tree->inst_offset;
 115         tree->inst_basereg = state->left->tree->inst_basereg;
 116         mono_bblock_add_inst (s->cbb, tree);
 117 }
 118
 119 reg: OP_LOCALLOC (OP_ICONST) {
 120         if (tree->flags & MONO_INST_INIT) {
 121                 /* microcoded in mini-x86.c */
 122                 tree->sreg1 = mono_regstate_next_int (s->rs);
 123                 tree->dreg = state->reg1;
 124                 MONO_EMIT_NEW_ICONST (s, tree->sreg1, state->left->tree->inst_c0);
 125                 mono_bblock_add_inst (s->cbb, tree);
 126         } else {
 127                 guint32 size = state->left->tree->inst_c0;
 128                 size = (size + (MONO_ARCH_FRAME_ALIGNMENT - 1)) & ~ (MONO_ARCH_FRAME_ALIGNMENT - 1);
 129                 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, size);
 130                 MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
 131         }
 132 }
 133
 134 reg: OP_LOCALLOC (reg) {
 135         tree->sreg1 = state->left->tree->dreg;
 136         tree->dreg = state->reg1;
 137         mono_bblock_add_inst (s->cbb, tree);
 138 }
 139
 140 stmt: OP_SETRET (reg) {
 141         tree->opcode = OP_MOVE;
 142         tree->sreg1 = state->left->reg1;
 143         tree->dreg = X86_EAX;
 144         mono_bblock_add_inst (s->cbb, tree);
 145 }
 146
 147 stmt: OP_SETRET (reg) {
 148         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->left->reg2);
 149         tree->opcode = OP_MOVE;
 150         tree->sreg1 = state->left->reg1;
 151         tree->dreg = X86_EAX;
 152         mono_bblock_add_inst (s->cbb, tree);
 153 }
 154
 155 reg: CEE_LDIND_REF (OP_REGVAR),
 156 reg: CEE_LDIND_I (OP_REGVAR),
 157 reg: CEE_LDIND_I4 (OP_REGVAR),
 158 reg: CEE_LDIND_U4 (OP_REGVAR) "0" {
 159         /* This rule might not work on all archs */
 160         state->reg1 = state->left->tree->dreg;
 161         tree->dreg = state->reg1;
 162 }
 163
 164 stmt: OP_SETRET (CEE_LDIND_REF (OP_REGVAR)),
 165 stmt: OP_SETRET (CEE_LDIND_I4 (OP_REGVAR)),
 166 stmt: OP_SETRET (CEE_LDIND_U4 (OP_REGVAR)),
 167 stmt: OP_SETRET (CEE_LDIND_I (OP_REGVAR)) {
 168         tree->opcode = OP_MOVE;
 169         tree->sreg1 = state->left->left->tree->dreg;
 170         tree->dreg = X86_EAX;
 171         mono_bblock_add_inst (s->cbb, tree);
 172 }
 173
 174 stmt: OP_SETRET (freg) {
 175         if (mono_method_signature (s->method)->ret->type == MONO_TYPE_R4)
 176                 tree->opcode = OP_AMD64_SET_XMMREG_R4;
 177         else
 178                 tree->opcode = OP_AMD64_SET_XMMREG_R8;
 179         tree->sreg1 = state->left->reg1;
 180         tree->dreg = 0; /* %xmm0 */
 181         mono_bblock_add_inst (s->cbb, tree);
 182         /* nothing to do */
 183 }
 184
 185 stmt: OP_SETRET (OP_ICONST) {
 186         if (state->left->tree->inst_c0 == 0) {
 187                 MONO_EMIT_BIALU (s, tree, CEE_XOR, AMD64_RAX, AMD64_RAX, AMD64_RAX);
 188         }
 189         else {
 190                 tree->opcode = OP_ICONST;
 191                 tree->inst_c0 = state->left->tree->inst_c0;
 192                 tree->dreg = X86_EAX;
 193                 mono_bblock_add_inst (s->cbb, tree);
 194         }
 195 }
 196
 197 stmt: OP_OUTARG (reg) {
 198         tree->opcode = OP_X86_PUSH;
 199         tree->sreg1 = state->left->reg1;
 200         mono_bblock_add_inst (s->cbb, tree);
 201 }
 202
 203 stmt: OP_OUTARG_REG (reg) {
 204         MonoCallInst *call = (MonoCallInst*)tree->inst_right;
 205         guint64 regpair;
 206
 207         tree->opcode = OP_SETREG;
 208         tree->sreg1 = state->left->reg1;
 209         tree->dreg = mono_regstate_next_int (s->rs);
 210         mono_bblock_add_inst (s->cbb, tree);
 211
 212         regpair = (((guint64)tree->unused) << 32) + tree->dreg;
 213         call->out_ireg_args = g_slist_append (call->out_ireg_args, (gpointer)(regpair));
 214 }
 215
 216 stmt: OP_OUTARG_REG (CEE_LDIND_I (base)),
 217 stmt: OP_OUTARG_REG (CEE_LDIND_REF (base)),
 218 stmt: OP_OUTARG_REG (CEE_LDIND_I1 (base)),
 219 stmt: OP_OUTARG_REG (CEE_LDIND_U1 (base)),
 220 stmt: OP_OUTARG_REG (CEE_LDIND_I2 (base)),
 221 stmt: OP_OUTARG_REG (CEE_LDIND_U2 (base)),
 222 stmt: OP_OUTARG_REG (CEE_LDIND_I4 (base)),
 223 stmt: OP_OUTARG_REG (CEE_LDIND_U4 (base)),
 224 stmt: OP_OUTARG_REG (CEE_LDIND_I8 (base)) {
 225         MonoCallInst *call = (MonoCallInst*)tree->inst_right;
 226         guint64 regpair;
 227         guint32 dreg;
 228         MonoInst *base = state->left->left->tree;
 229
 230         dreg = mono_regstate_next_int (s->rs);
 231         MONO_EMIT_LOAD_MEMBASE_OP (s, tree, ldind_to_load_membase (state->left->tree->opcode),
 232                                         dreg, base->inst_basereg, base->inst_offset);
 233
 234         regpair = (((guint64)tree->unused) << 32) + dreg;
 235         call->out_ireg_args = g_slist_append (call->out_ireg_args, (gpointer)(regpair));
 236 }
 237
 238 stmt: OP_OUTARG_REG (OP_I8CONST),
 239 stmt: OP_OUTARG_REG (OP_ICONST) {
 240         MonoCallInst *call = (MonoCallInst*)tree->inst_right;
 241         guint64 regpair;
 242
 243         tree->opcode = OP_ICONST;
 244         tree->inst_c0 = state->left->tree->inst_c0;
 245         tree->dreg = mono_regstate_next_int (s->rs);
 246         mono_bblock_add_inst (s->cbb, tree);
 247
 248         regpair = (((guint64)tree->unused) << 32) + tree->dreg;
 249         call->out_ireg_args = g_slist_append (call->out_ireg_args, (gpointer)(regpair));
 250 }
 251
 252 stmt: OP_OUTARG_REG (CEE_LDIND_I (OP_REGVAR)),
 253 stmt: OP_OUTARG_REG (CEE_LDIND_I8 (OP_REGVAR)),
 254 stmt: OP_OUTARG_REG (CEE_LDIND_I4 (OP_REGVAR)),
 255 stmt: OP_OUTARG_REG (CEE_LDIND_U4 (OP_REGVAR)),
 256 stmt: OP_OUTARG_REG (CEE_LDIND_REF (OP_REGVAR)) {
 257         MonoCallInst *call = (MonoCallInst*)tree->inst_right;
 258         guint64 regpair;
 259
 260         tree->opcode = OP_SETREG;
 261         tree->sreg1 = state->left->left->tree->dreg;
 262         tree->dreg = mono_regstate_next_int (s->rs);
 263         mono_bblock_add_inst (s->cbb, tree);
 264
 265         regpair = (((guint64)tree->unused) << 32) + tree->dreg;
 266         call->out_ireg_args = g_slist_append (call->out_ireg_args, (gpointer)(regpair));
 267 }
 268
 269 # we need to reduce this code duplication with some burg syntax extension
 270 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)) {
 271         tree->opcode = OP_X86_PUSH;
 272         tree->sreg1 = state->left->left->tree->dreg;
 273         mono_bblock_add_inst (s->cbb, tree);
 274 }
 275
 276 stmt: OP_OUTARG (CEE_LDIND_I4 (OP_REGVAR)) {
 277         tree->opcode = OP_X86_PUSH;
 278         tree->sreg1 = state->left->left->tree->dreg;
 279         mono_bblock_add_inst (s->cbb, tree);
 280 }
 281
 282 stmt: OP_OUTARG (CEE_LDIND_U4 (OP_REGVAR)) {
 283         tree->opcode = OP_X86_PUSH;
 284         tree->sreg1 = state->left->left->tree->dreg;
 285         mono_bblock_add_inst (s->cbb, tree);
 286 }
 287
 288 stmt: OP_OUTARG (CEE_LDIND_I (OP_REGVAR)) {
 289         tree->opcode = OP_X86_PUSH;
 290         tree->sreg1 = state->left->left->tree->dreg;
 291         mono_bblock_add_inst (s->cbb, tree);
 292 }
 293
 294 stmt: OP_OUTARG (CEE_LDIND_I4 (base)) {
 295         tree->opcode = OP_X86_PUSH_MEMBASE;
 296         tree->inst_basereg = state->left->left->tree->inst_basereg;
 297         tree->inst_offset = state->left->left->tree->inst_offset;
 298         mono_bblock_add_inst (s->cbb, tree);
 299 }
 300
 301 stmt: OP_OUTARG (CEE_LDIND_U4 (base)) {
 302         tree->opcode = OP_X86_PUSH_MEMBASE;
 303         tree->inst_basereg = state->left->left->tree->inst_basereg;
 304         tree->inst_offset = state->left->left->tree->inst_offset;
 305         mono_bblock_add_inst (s->cbb, tree);
 306 }
 307
 308 stmt: OP_OUTARG (CEE_LDIND_I (base)) {
 309         tree->opcode = OP_X86_PUSH_MEMBASE;
 310         tree->inst_basereg = state->left->left->tree->inst_basereg;
 311         tree->inst_offset = state->left->left->tree->inst_offset;
 312         mono_bblock_add_inst (s->cbb, tree);
 313 }
 314
 315 stmt: OP_OUTARG (CEE_LDIND_REF (base)) {
 316         tree->opcode = OP_X86_PUSH_MEMBASE;
 317         tree->inst_basereg = state->left->left->tree->inst_basereg;
 318         tree->inst_offset = state->left->left->tree->inst_offset;
 319         mono_bblock_add_inst (s->cbb, tree);
 320 }
 321
 322 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)) {
 323         tree->opcode = OP_X86_PUSH;
 324         tree->sreg1 = state->left->left->tree->dreg;
 325         mono_bblock_add_inst (s->cbb, tree);
 326 }
 327
 328 stmt: OP_OUTARG (CEE_LDOBJ (reg)) {
 329         tree->opcode = OP_X86_PUSH;
 330         tree->sreg1 = state->left->reg1;
 331         mono_bblock_add_inst (s->cbb, tree);
 332 }
 333
 334 stmt: OP_OUTARG (freg) {
 335         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
 336         tree->opcode = OP_STORER8_MEMBASE_REG;
 337         tree->sreg1 = state->left->reg1;
 338         tree->inst_destbasereg = X86_ESP;
 339         tree->inst_offset = 0;
 340         mono_bblock_add_inst (s->cbb, tree);
 341 }
 342
 343 stmt: OP_OUTARG_R4 (freg) {
 344         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
 345         tree->opcode = OP_STORER4_MEMBASE_REG;
 346         tree->sreg1 = state->left->reg1;
 347         tree->inst_destbasereg = X86_ESP;
 348         tree->inst_offset = 0;
 349         mono_bblock_add_inst (s->cbb, tree);
 350 }
 351
 352 stmt: OP_OUTARG_R8 (freg) {
 353         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
 354         tree->opcode = OP_STORER8_MEMBASE_REG;
 355         tree->sreg1 = state->left->reg1;
 356         tree->inst_destbasereg = X86_ESP;
 357         tree->inst_offset = 0;
 358         mono_bblock_add_inst (s->cbb, tree);
 359 }
 360
 361 stmt: OP_AMD64_OUTARG_XMMREG_R4 (freg) {
 362         MonoCallInst *call = (MonoCallInst*)tree->inst_right;
 363         guint64 regpair;
 364
 365         tree->opcode = OP_AMD64_SET_XMMREG_R4;
 366         tree->sreg1 = state->left->reg1;
 367         tree->dreg = mono_regstate_next_float (s->rs);
 368         mono_bblock_add_inst (s->cbb, tree);
 369
 370         regpair = (((guint64)tree->unused) << 32) + tree->dreg;
 371         call->out_freg_args = g_slist_append (call->out_freg_args, (gpointer)(regpair));
 372 }
 373
 374 stmt: OP_AMD64_OUTARG_XMMREG_R8 (freg) {
 375         MonoCallInst *call = (MonoCallInst*)tree->inst_right;
 376         guint64 regpair;
 377
 378         tree->opcode = OP_AMD64_SET_XMMREG_R8;
 379         tree->sreg1 = state->left->reg1;
 380         tree->dreg = mono_regstate_next_float (s->rs);
 381         mono_bblock_add_inst (s->cbb, tree);
 382
 383         regpair = (((guint64)tree->unused) << 32) + tree->dreg;
 384         call->out_freg_args = g_slist_append (call->out_freg_args, (gpointer)(regpair));
 385 }
 386
 387 stmt: OP_OUTARG_VT (CEE_LDOBJ (base)) {
 388         MonoInst *vt = state->left->left->tree;
 389         //g_print ("vt size: %d at R%d + %d\n", tree->inst_imm, vt->inst_basereg, vt->inst_offset);
 390
 391         if (!tree->inst_imm)
 392                 return;
 393
 394         if (tree->inst_imm <= 8) {
 395                 tree->opcode = OP_X86_PUSH_MEMBASE;
 396                 tree->inst_basereg = vt->inst_basereg;
 397                 tree->inst_offset = vt->inst_offset;
 398                 mono_bblock_add_inst (s->cbb, tree);
 399         } else if (tree->inst_imm <= 20) {
 400                 int sz = tree->inst_imm;
 401                 sz += 8;
 402                 sz &= ~8;
 403                 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, sz);
 404                 mini_emit_memcpy (s, X86_ESP, 0, vt->inst_basereg, vt->inst_offset, tree->inst_imm, 0);
 405         } else {
 406                 tree->opcode = OP_X86_PUSH_OBJ;
 407                 tree->inst_basereg = vt->inst_basereg;
 408                 tree->inst_offset = vt->inst_offset;
 409                 mono_bblock_add_inst (s->cbb, tree);
 410         }
 411 }
 412
 413 stmt: OP_OUTARG_VT (OP_ICONST) {
 414         tree->opcode = OP_X86_PUSH_IMM;
 415         tree->inst_imm = state->left->tree->inst_c0;
 416         mono_bblock_add_inst (s->cbb, tree);
 417 }
 418
 419 stmt: OP_OUTARG_VT (reg) {
 420         tree->opcode = OP_X86_PUSH;
 421         tree->sreg1 = state->left->tree->dreg;
 422         mono_bblock_add_inst (s->cbb, tree);
 423 }
 424
 425 stmt: OP_AMD64_OUTARG_ALIGN_STACK {
 426         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
 427 }
 428
 429 base: OP_INARG_VT (base) {
 430         MONO_EMIT_NEW_LOAD_MEMBASE (s, state->reg1, state->left->tree->inst_basereg,
 431                                         state->left->tree->inst_offset);
 432 }
 433
 434 reg: OP_LDADDR (OP_INARG_VT (base)) {
 435         MONO_EMIT_NEW_LOAD_MEMBASE (s, state->reg1, state->left->left->tree->inst_basereg,
 436                                         state->left->left->tree->inst_offset);
 437 }
 438
 439 reg: CEE_LDOBJ (OP_INARG_VT (base)) {
 440         MONO_EMIT_NEW_LOAD_MEMBASE (s, state->reg1, state->left->left->tree->inst_basereg,
 441                                         state->left->left->tree->inst_offset);
 442 }
 443
 444 reg: OP_LDADDR (OP_REGOFFSET) "1" {
 445         if (state->left->tree->inst_offset) {
 446                 tree->opcode = OP_X86_LEA_MEMBASE;
 447                 tree->sreg1 = state->left->tree->inst_basereg;
 448                 tree->inst_imm = state->left->tree->inst_offset;
 449                 tree->dreg = state->reg1;
 450         } else {
 451                 tree->opcode = OP_MOVE;
 452                 tree->sreg1 = state->left->tree->inst_basereg;
 453                 tree->dreg = state->reg1;
 454         }
 455         mono_bblock_add_inst (s->cbb, tree);
 456 }
 457
 458 reg: CEE_LDOBJ (OP_REGOFFSET) "1" {
 459         if (state->left->tree->inst_offset) {
 460                 tree->opcode = OP_X86_LEA_MEMBASE;
 461                 tree->sreg1 = state->left->tree->inst_basereg;
 462                 tree->inst_imm = state->left->tree->inst_offset;
 463                 tree->dreg = state->reg1;
 464         } else {
 465                 tree->opcode = OP_MOVE;
 466                 tree->sreg1 = state->left->tree->inst_basereg;
 467                 tree->dreg = state->reg1;
 468         }
 469         mono_bblock_add_inst (s->cbb, tree);
 470 }
 471
 472 reg: CEE_LDELEMA (reg, reg) "15" {
 473         guint32 size = mono_class_array_element_size (tree->klass);
 474
 475         MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoArray, max_length, state->right->reg1);
 476
 477         if (size == 1 || size == 2 || size == 4 || size == 8) {
 478                 static const int fast_log2 [] = { 1, 0, 1, -1, 2, -1, -1, -1, 3 };
 479                 tree->opcode = OP_X86_LEA;
 480                 tree->dreg = state->reg1;
 481                 tree->sreg1 = state->left->reg1;
 482                 tree->sreg2 = state->right->reg1;
 483                 tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
 484                 tree->unused = fast_log2 [size];
 485                 mono_bblock_add_inst (s->cbb, tree);
 486         } else {
 487                 int mult_reg = mono_regstate_next_int (s->rs);
 488                 int add_reg = mono_regstate_next_int (s->rs);
 489                 MONO_EMIT_NEW_BIALU_IMM (s, OP_MUL_IMM, mult_reg, state->right->reg1, size);
 490                 MONO_EMIT_NEW_BIALU (s, CEE_ADD, add_reg, mult_reg, state->left->reg1);
 491                 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, state->reg1, add_reg, G_STRUCT_OFFSET (MonoArray, vector));
 492         }
 493 }
 494
 495 stmt: CEE_STIND_R8 (OP_REGVAR, freg) {
 496         /* nothing to do: the value is already on the FP stack */
 497 }
 498
 499 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
 500         int con = state->right->right->tree->inst_c0;
 501
 502         if (con == 1) {
 503                 tree->opcode = OP_X86_INC_MEMBASE;
 504         } else {
 505                 tree->opcode = OP_X86_ADD_MEMBASE_IMM;
 506                 tree->inst_imm = con;
 507         }
 508
 509         tree->inst_basereg = state->left->tree->inst_basereg;
 510         tree->inst_offset = state->left->tree->inst_offset;
 511         mono_bblock_add_inst (s->cbb, tree);
 512 } cost {
 513         MBTREE_TYPE *t1 = state->right->left->left->tree;
 514         MBTREE_TYPE *t2 = state->left->tree;
 515         MBCOND (t1->inst_basereg == t2->inst_basereg &&
 516                 t1->inst_offset == t2->inst_offset);
 517         return 2;
 518 }
 519
 520 stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)) {
 521         int con = state->right->right->tree->inst_c0;
 522
 523         if (con == 1) {
 524                 tree->opcode = OP_X86_DEC_MEMBASE;
 525         } else {
 526                 tree->opcode = OP_X86_SUB_MEMBASE_IMM;
 527                 tree->inst_imm = con;
 528         }
 529
 530         tree->inst_basereg = state->left->tree->inst_basereg;
 531         tree->inst_offset = state->left->tree->inst_offset;
 532         mono_bblock_add_inst (s->cbb, tree);
 533 } cost {
 534         MBTREE_TYPE *t1 = state->right->left->left->tree;
 535         MBTREE_TYPE *t2 = state->left->tree;
 536         MBCOND (t1->inst_basereg == t2->inst_basereg &&
 537                 t1->inst_offset == t2->inst_offset);
 538         return 2;
 539 }
 540
 541 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_SUB (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
 542         int con = state->right->right->tree->inst_c0;
 543         int dreg = state->left->tree->dreg;
 544         int sreg = state->right->left->left->tree->dreg;
 545
 546         if (con == 1) {
 547                 if (dreg != sreg)
 548                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 549                 tree->opcode = OP_X86_DEC_REG;
 550                 tree->dreg = tree->sreg1 = dreg;
 551         } else if (con == -1) {
 552                 if (dreg != sreg)
 553                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 554                 tree->opcode = OP_X86_INC_REG;
 555                 tree->dreg = tree->sreg1 = dreg;
 556         } else {
 557                 tree->opcode = OP_SUB_IMM;
 558                 tree->inst_imm = con;
 559                 tree->sreg1 = sreg;
 560                 tree->dreg = dreg;
 561         }
 562         mono_bblock_add_inst (s->cbb, tree);
 563 }
 564
 565 stmt: CEE_STIND_I (OP_REGVAR, CEE_ADD (CEE_LDIND_I (OP_REGVAR), OP_ICONST)),
 566 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_ADD (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
 567         int con = state->right->right->tree->inst_c0;
 568         int dreg = state->left->tree->dreg;
 569         int sreg = state->right->left->left->tree->dreg;
 570
 571         if (con == 1) {
 572                 if (dreg != sreg)
 573                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 574                 tree->opcode = OP_X86_INC_REG;
 575                 tree->dreg = tree->sreg1 = dreg;
 576         } else if (con == -1) {
 577                 if (dreg != sreg)
 578                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 579                 tree->opcode = OP_X86_DEC_REG;
 580                 tree->dreg = tree->sreg1 = dreg;
 581         } else {
 582                 tree->opcode = OP_ADD_IMM;
 583                 tree->inst_imm = con;
 584                 tree->sreg1 = sreg;
 585                 tree->dreg = dreg;
 586         }
 587         mono_bblock_add_inst (s->cbb, tree);
 588 }
 589
 590 reg: CEE_LDIND_I2 (OP_REGVAR) {
 591         MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);
 592 }
 593
 594 # The XOR rule
 595 stmt: CEE_STIND_I8 (OP_REGVAR, OP_ICONST),
 596 stmt: CEE_STIND_I4 (OP_REGVAR, OP_ICONST),
 597 stmt: CEE_STIND_I2 (OP_REGVAR, OP_ICONST),
 598 stmt: CEE_STIND_I1 (OP_REGVAR, OP_ICONST),
 599 stmt: CEE_STIND_REF (OP_REGVAR, OP_ICONST),
 600 stmt: CEE_STIND_I (OP_REGVAR, OP_ICONST),
 601 stmt: CEE_STIND_I8 (OP_REGVAR, OP_I8CONST),
 602 stmt: CEE_STIND_I4 (OP_REGVAR, OP_I8CONST),
 603 stmt: CEE_STIND_I2 (OP_REGVAR, OP_I8CONST),
 604 stmt: CEE_STIND_I1 (OP_REGVAR, OP_I8CONST),
 605 stmt: CEE_STIND_REF (OP_REGVAR, OP_I8CONST),
 606 stmt: CEE_STIND_I (OP_REGVAR, OP_I8CONST) {
 607         int r = state->left->tree->dreg;
 608         MONO_EMIT_BIALU (s, tree, CEE_XOR, r, r, r);
 609 } cost {
 610         MBCOND (!state->right->tree->inst_c0);
 611
 612         return 0;
 613 }
 614
 615 # on x86, fp compare overwrites EAX, so we must
 616 # either improve the local register allocator or
 617 # emit coarse opcodes which saves EAX for us.
 618
 619 reg: OP_CEQ (OP_COMPARE (freg, freg)),
 620 reg: OP_CLT (OP_COMPARE (freg, freg)),
 621 reg: OP_CGT (OP_COMPARE (freg, freg)),
 622 reg: OP_CLT_UN (OP_COMPARE (freg, freg)),
 623 reg: OP_CGT_UN (OP_COMPARE (freg, freg)) {
 624         MONO_EMIT_BIALU (s, tree, ceq_to_fceq (tree->opcode), state->reg1, state->left->left->reg1,
 625                          state->left->right->reg1);
 626 }
 627
 628 # fpcflags overwrites EAX, but this does not matter for statements
 629 # because we are the last operation in the tree.
 630
 631 stmt: CEE_BNE_UN (fpcflags),
 632 stmt: CEE_BEQ (fpcflags),
 633 stmt: CEE_BLT (fpcflags),
 634 stmt: CEE_BLT_UN (fpcflags),
 635 stmt: CEE_BGT (fpcflags),
 636 stmt: CEE_BGT_UN (fpcflags),
 637 stmt: CEE_BGE  (fpcflags),
 638 stmt: CEE_BGE_UN (fpcflags),
 639 stmt: CEE_BLE  (fpcflags),
 640 stmt: CEE_BLE_UN (fpcflags) {
 641         tree->opcode = cbranch_to_fcbranch (tree->opcode);
 642         mono_bblock_add_inst (s->cbb, tree);
 643 }
 644
 645 stmt: CEE_POP (freg) "0" {
 646         /* we need to pop the value from the x86 FP stack */
 647         MONO_EMIT_UNALU (s, tree, OP_X86_FPOP, -1, state->left->reg1);
 648 }
 649
 650 # override the rules in inssel-float.brg that work for machines with FP registers
 651
 652 freg: OP_FCONV_TO_R8 (freg) "0" {
 653         tree->opcode = OP_FMOVE;
 654         tree->sreg1 = state->left->reg1;
 655         tree->dreg = state->reg1;
 656         mono_bblock_add_inst (s->cbb, tree);
 657 }
 658
 659 freg: OP_FCONV_TO_R4 (freg) "0" {
 660         tree->opcode = OP_FMOVE;
 661         tree->sreg1 = state->left->reg1;
 662         tree->dreg = state->reg1;
 663         mono_bblock_add_inst (s->cbb, tree);
 664 }
 665
 666 reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) {
 667         MonoInst *base = state->right->left->tree;
 668
 669         MONO_EMIT_BIALU_MEMBASE (cfg, tree, OP_X86_ADD_MEMBASE, state->reg1, state->left->reg1, base->inst_basereg, base->inst_offset);
 670 }
 671
 672 reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) {
 673         MonoInst *base = state->right->left->tree;
 674
 675         MONO_EMIT_BIALU_MEMBASE (cfg, tree, OP_X86_SUB_MEMBASE, state->reg1, state->left->reg1, base->inst_basereg, base->inst_offset);
 676 }
 677
 678 reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) {
 679         MonoInst *base = state->right->left->tree;
 680
 681         MONO_EMIT_BIALU_MEMBASE (cfg, tree, OP_X86_MUL_MEMBASE, state->reg1, state->left->reg1, base->inst_basereg, base->inst_offset);
 682 }
 683
 684 reg: OP_LSHL (reg, reg),
 685 reg: OP_LSHR (reg, reg),
 686 reg: OP_LSHR_UN (reg, reg),
 687 reg: OP_LMUL (reg, reg),
 688 reg: OP_LDIV (reg, reg),
 689 reg: OP_LDIV_UN (reg, reg),
 690 reg: OP_LREM (reg, reg),
 691 reg: OP_LREM_UN (reg, reg),
 692 reg: OP_LMUL_OVF (reg, reg),
 693 reg: OP_LMUL_OVF_UN (reg, reg) "0" {
 694         MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
 695 }
 696
 697 reg: OP_LMUL (reg, OP_I8CONST),
 698 reg: OP_LSHL (reg, OP_ICONST),
 699 reg: OP_LSHR (reg, OP_ICONST),
 700 reg: OP_LSHR_UN (reg, OP_ICONST) {
 701         MONO_EMIT_BIALU_IMM (s, tree, bialu_to_bialu_imm (tree->opcode), state->reg1, state->left->reg1, state->right->tree->inst_c0);
 702 } cost {
 703         MBCOND (mono_arch_is_inst_imm (state->right->tree->inst_c0));
 704         return 0;
 705 }
 706
 707 reg: OP_ATOMIC_ADD_NEW_I4 (base, reg),
 708 reg: OP_ATOMIC_ADD_NEW_I8 (base, reg),
 709 reg: OP_ATOMIC_ADD_I4 (base, reg),
 710 reg: OP_ATOMIC_ADD_I8 (base, reg),
 711 reg: OP_ATOMIC_EXCHANGE_I4 (base, reg),
 712 reg: OP_ATOMIC_EXCHANGE_I8 (base, reg) {
 713         tree->opcode = tree->opcode;
 714         tree->dreg = state->reg1;
 715         tree->sreg2 = state->right->reg1;
 716         tree->inst_basereg = state->left->tree->inst_basereg;
 717         tree->inst_offset = state->left->tree->inst_offset;
 718
 719         mono_bblock_add_inst (s->cbb, tree);
 720 }
 721
 722 %%
 723
 724 int
 725 bialu_to_bialu_imm (int opcode)
 726 {
 727         switch (opcode) {
 728         case OP_LMUL:
 729                 return OP_LMUL_IMM;
 730         case OP_LSHL:
 731                 return OP_LSHL_IMM;
 732         case OP_LSHR:
 733                 return OP_LSHR_IMM;
 734         case OP_LSHR_UN:
 735                 return OP_LSHR_UN_IMM;
 736         default:
 737                 g_assert_not_reached ();
 738         }
 739
 740         return -1;
 741 }
 742
 743 int
 744 cbranch_to_fcbranch (int opcode)
 745 {
 746         switch (opcode) {
 747         case CEE_BNE_UN:
 748                 return OP_FBNE_UN;
 749         case CEE_BEQ:
 750                 return OP_FBEQ;
 751         case CEE_BLT:
 752                 return OP_FBLT;
 753         case CEE_BLT_UN:
 754                 return OP_FBLT_UN;
 755         case CEE_BGT:
 756                 return OP_FBGT;
 757         case CEE_BGT_UN:
 758                 return OP_FBGT_UN;
 759         case CEE_BGE:
 760                 return OP_FBGE;
 761         case CEE_BGE_UN:
 762                 return OP_FBGE_UN;
 763         case CEE_BLE:
 764                 return OP_FBLE;
 765         case CEE_BLE_UN:
 766                 return OP_FBLE_UN;
 767         default:
 768                 g_assert_not_reached ();
 769         }
 770
 771         return -1;
 772 }
 773
 774 int
 775 ceq_to_fceq (int opcode)
 776 {
 777         switch (opcode) {
 778         case OP_CEQ:
 779                 return OP_FCEQ;
 780         case OP_CLT:
 781                 return OP_FCLT;
 782         case OP_CGT:
 783                 return OP_FCGT;
 784         case OP_CLT_UN:
 785                 return OP_FCLT_UN;
 786         case OP_CGT_UN:
 787                 return OP_FCGT_UN;
 788         default:
 789                 g_assert_not_reached ();
 790         }
 791
 792         return -1;
 793 }