mono/mini/inssel-amd64.brg

   1 #define MONO_EMIT_NEW_AMD64_ICOMPARE_MEMBASE_REG(cfg,basereg,offset,operand) do { \
   2                 MonoInst *inst; \
   3                 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
   4                 inst->opcode = OP_AMD64_ICOMPARE_MEMBASE_REG; \
   5                 inst->inst_basereg = basereg; \
   6                 inst->inst_offset = offset; \
   7                 inst->sreg2 = operand; \
   8                 mono_bblock_add_inst (cfg->cbb, inst); \
   9         } while (0)
  10
  11 #define MONO_EMIT_NEW_AMD64_ICOMPARE_MEMBASE_IMM(cfg,basereg,offset,operand) do { \
  12                 MonoInst *inst; \
  13                 inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
  14                 inst->opcode = OP_AMD64_ICOMPARE_MEMBASE_IMM; \
  15                 inst->inst_basereg = basereg; \
  16                 inst->inst_offset = offset; \
  17                 inst->inst_imm = operand; \
  18                 mono_bblock_add_inst (cfg->cbb, inst); \
  19         } while (0)
  20
  21 /* override the arch independant versions with fast x86 versions */
  22
  23 #undef MONO_EMIT_BOUNDS_CHECK
  24 #undef MONO_EMIT_BOUNDS_CHECK_IMM
  25
  26 #define MONO_EMIT_BOUNDS_CHECK(cfg, array_reg, array_type, array_length_field, index_reg) do { \
  27                 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
  28                         MONO_EMIT_NEW_AMD64_ICOMPARE_MEMBASE_REG (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_reg); \
  29                         MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
  30                 } \
  31         } while (0)
  32
  33 #define MONO_EMIT_BOUNDS_CHECK_IMM(cfg, array_reg, array_type, array_length_field, index_imm) do { \
  34                 if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
  35                         MONO_EMIT_NEW_AMD64_ICOMPARE_MEMBASE_IMM (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_imm); \
  36                         MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
  37                 } \
  38         } while (0)
  39
  40 %%
  41
  42 #
  43 # inssel-amd64.brg: burg file for special AMD64 instructions
  44 #
  45 # Author:
  46 #   Dietmar Maurer (dietmar@ximian.com)
  47 #   Paolo Molaro (lupus@ximian.com)
  48 #
  49 # (C) 2002 Ximian, Inc.
  50 #
  51
  52 reg: CEE_LDIND_I8 (OP_REGVAR) {
  53         state->reg1 = state->left->tree->dreg;
  54 }
  55
  56 stmt: CEE_STIND_I8 (OP_REGVAR, reg) {
  57         MONO_EMIT_NEW_UNALU (s, OP_MOVE, state->left->tree->dreg, state->right->reg1);
  58 }
  59
  60 reg: CEE_LDIND_I1 (OP_REGVAR) {
  61         MONO_EMIT_UNALU (s, tree, OP_SEXT_I1, state->reg1, state->left->tree->dreg);}
  62
  63 reg: CEE_LDIND_I2 (OP_REGVAR) {
  64         MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);}
  65
  66 stmt: OP_START_HANDLER {
  67         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
  68         MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP);
  69 }
  70
  71 stmt: OP_ENDFINALLY {
  72         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
  73         MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
  74         tree->opcode = CEE_RET;
  75         mono_bblock_add_inst (s->cbb, tree);
  76 }
  77
  78 stmt: OP_ENDFILTER (reg) {
  79         MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
  80         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->left->reg1);
  81         MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
  82         tree->opcode = CEE_RET;
  83         mono_bblock_add_inst (s->cbb, tree);
  84 }
  85
  86 freg: OP_LCONV_TO_R8 (reg) {
  87         tree->sreg1 = state->left->reg1;
  88         tree->dreg = state->reg1;
  89         mono_bblock_add_inst (s->cbb, tree);
  90 }
  91
  92 freg: OP_LCONV_TO_R4 (reg) {
  93         tree->sreg1 = state->left->reg1;
  94         tree->dreg = state->reg1;
  95         mono_bblock_add_inst (s->cbb, tree);
  96 }
  97
  98 cflags: OP_COMPARE (CEE_LDIND_I4 (base), reg) {
  99         tree->opcode = OP_AMD64_ICOMPARE_MEMBASE_REG;
 100         tree->inst_basereg = state->left->left->tree->inst_basereg;
 101         tree->inst_offset = state->left->left->tree->inst_offset;
 102         tree->sreg2 = state->right->reg1;
 103         mono_bblock_add_inst (s->cbb, tree);
 104 }
 105
 106 cflags: OP_COMPARE (CEE_LDIND_I4 (base), OP_ICONST) {
 107         tree->opcode = OP_AMD64_ICOMPARE_MEMBASE_IMM;
 108         tree->inst_basereg = state->left->left->tree->inst_basereg;
 109         tree->inst_offset = state->left->left->tree->inst_offset;
 110         tree->inst_imm = state->right->tree->inst_c0;
 111         mono_bblock_add_inst (s->cbb, tree);
 112 }
 113
 114 cflags: OP_COMPARE (reg, CEE_LDIND_I4 (base)) {
 115         tree->opcode = OP_AMD64_ICOMPARE_REG_MEMBASE;
 116         tree->sreg2 = state->right->left->tree->inst_basereg;
 117         tree->inst_offset = state->right->left->tree->inst_offset;
 118         tree->sreg1 = state->left->reg1;
 119         mono_bblock_add_inst (s->cbb, tree);
 120 }
 121
 122 stmt: CEE_STIND_I1 (base, OP_CEQ (cflags)) {
 123         tree->opcode = OP_X86_SETEQ_MEMBASE;
 124         tree->inst_offset = state->left->tree->inst_offset;
 125         tree->inst_basereg = state->left->tree->inst_basereg;
 126         mono_bblock_add_inst (s->cbb, tree);
 127 }
 128
 129 reg: OP_LOCALLOC (OP_ICONST) {
 130         if (tree->flags & MONO_INST_INIT) {
 131                 /* microcoded in mini-x86.c */
 132                 tree->sreg1 = mono_regstate_next_int (s->rs);
 133                 tree->dreg = state->reg1;
 134                 MONO_EMIT_NEW_ICONST (s, tree->sreg1, state->left->tree->inst_c0);
 135                 mono_bblock_add_inst (s->cbb, tree);
 136         } else {
 137                 guint32 size = state->left->tree->inst_c0;
 138                 size = (size + (MONO_ARCH_LOCALLOC_ALIGNMENT - 1)) & ~ (MONO_ARCH_LOCALLOC_ALIGNMENT - 1);
 139                 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, size);
 140                 MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
 141         }
 142 }
 143
 144 reg: OP_LOCALLOC (reg) {
 145         tree->sreg1 = state->left->tree->dreg;
 146         tree->dreg = state->reg1;
 147         mono_bblock_add_inst (s->cbb, tree);
 148 }
 149
 150 stmt: OP_SETRET (reg) {
 151         tree->opcode = OP_MOVE;
 152         tree->sreg1 = state->left->reg1;
 153         tree->dreg = X86_EAX;
 154         mono_bblock_add_inst (s->cbb, tree);
 155 }
 156
 157 stmt: OP_SETRET (reg) {
 158         MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->left->reg2);
 159         tree->opcode = OP_MOVE;
 160         tree->sreg1 = state->left->reg1;
 161         tree->dreg = X86_EAX;
 162         mono_bblock_add_inst (s->cbb, tree);
 163 }
 164
 165 reg: CEE_LDIND_REF (OP_REGVAR),
 166 reg: CEE_LDIND_I (OP_REGVAR),
 167 reg: CEE_LDIND_I4 (OP_REGVAR),
 168 reg: CEE_LDIND_U4 (OP_REGVAR) "0" {
 169         /* This rule might not work on all archs */
 170         state->reg1 = state->left->tree->dreg;
 171         tree->dreg = state->reg1;
 172 }
 173
 174 stmt: OP_SETRET (CEE_LDIND_REF (OP_REGVAR)),
 175 stmt: OP_SETRET (CEE_LDIND_I4 (OP_REGVAR)),
 176 stmt: OP_SETRET (CEE_LDIND_U4 (OP_REGVAR)),
 177 stmt: OP_SETRET (CEE_LDIND_I (OP_REGVAR)) {
 178         tree->opcode = OP_MOVE;
 179         tree->sreg1 = state->left->left->tree->dreg;
 180         tree->dreg = X86_EAX;
 181         mono_bblock_add_inst (s->cbb, tree);
 182 }
 183
 184 stmt: OP_SETRET (freg) {
 185         if (mono_method_signature (s->method)->ret->type == MONO_TYPE_R4)
 186                 tree->opcode = OP_AMD64_SET_XMMREG_R4;
 187         else
 188                 tree->opcode = OP_AMD64_SET_XMMREG_R8;
 189         tree->sreg1 = state->left->reg1;
 190         tree->dreg = 0; /* %xmm0 */
 191         mono_bblock_add_inst (s->cbb, tree);
 192         /* nothing to do */
 193 }
 194
 195 stmt: OP_SETRET (OP_ICONST) {
 196         if (state->left->tree->inst_c0 == 0) {
 197                 MONO_EMIT_BIALU (s, tree, CEE_XOR, AMD64_RAX, AMD64_RAX, AMD64_RAX);
 198         }
 199         else {
 200                 tree->opcode = OP_ICONST;
 201                 tree->inst_c0 = state->left->tree->inst_c0;
 202                 tree->dreg = X86_EAX;
 203                 mono_bblock_add_inst (s->cbb, tree);
 204         }
 205 }
 206
 207 stmt: OP_OUTARG (reg) {
 208         tree->opcode = OP_X86_PUSH;
 209         tree->sreg1 = state->left->reg1;
 210         mono_bblock_add_inst (s->cbb, tree);
 211 }
 212
 213 stmt: OP_OUTARG_REG (reg) {
 214         MonoCallInst *call = tree->inst_call;
 215
 216         tree->opcode = OP_MOVE;
 217         tree->sreg1 = state->left->reg1;
 218         tree->dreg = mono_regstate_next_int (s->rs);
 219         mono_bblock_add_inst (s->cbb, tree);
 220
 221         mono_call_inst_add_outarg_reg (s, call, tree->dreg, tree->backend.reg3, FALSE);
 222 }
 223
 224 # we need to reduce this code duplication with some burg syntax extension
 225 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)) {
 226         tree->opcode = OP_X86_PUSH;
 227         tree->sreg1 = state->left->left->tree->dreg;
 228         mono_bblock_add_inst (s->cbb, tree);
 229 }
 230
 231 stmt: OP_OUTARG (CEE_LDIND_I4 (OP_REGVAR)) {
 232         tree->opcode = OP_X86_PUSH;
 233         tree->sreg1 = state->left->left->tree->dreg;
 234         mono_bblock_add_inst (s->cbb, tree);
 235 }
 236
 237 stmt: OP_OUTARG (CEE_LDIND_U4 (OP_REGVAR)) {
 238         tree->opcode = OP_X86_PUSH;
 239         tree->sreg1 = state->left->left->tree->dreg;
 240         mono_bblock_add_inst (s->cbb, tree);
 241 }
 242
 243 stmt: OP_OUTARG (CEE_LDIND_I (OP_REGVAR)) {
 244         tree->opcode = OP_X86_PUSH;
 245         tree->sreg1 = state->left->left->tree->dreg;
 246         mono_bblock_add_inst (s->cbb, tree);
 247 }
 248
 249 stmt: OP_OUTARG (CEE_LDIND_I (base)) {
 250         tree->opcode = OP_X86_PUSH_MEMBASE;
 251         tree->inst_basereg = state->left->left->tree->inst_basereg;
 252         tree->inst_offset = state->left->left->tree->inst_offset;
 253         mono_bblock_add_inst (s->cbb, tree);
 254 }
 255
 256 stmt: OP_OUTARG (CEE_LDIND_REF (base)) {
 257         tree->opcode = OP_X86_PUSH_MEMBASE;
 258         tree->inst_basereg = state->left->left->tree->inst_basereg;
 259         tree->inst_offset = state->left->left->tree->inst_offset;
 260         mono_bblock_add_inst (s->cbb, tree);
 261 }
 262
 263 stmt: OP_OUTARG (CEE_LDIND_REF (OP_REGVAR)) {
 264         tree->opcode = OP_X86_PUSH;
 265         tree->sreg1 = state->left->left->tree->dreg;
 266         mono_bblock_add_inst (s->cbb, tree);
 267 }
 268
 269 stmt: OP_OUTARG (CEE_LDOBJ (reg)) {
 270         tree->opcode = OP_X86_PUSH;
 271         tree->sreg1 = state->left->reg1;
 272         mono_bblock_add_inst (s->cbb, tree);
 273 }
 274
 275 stmt: OP_OUTARG (freg) {
 276         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
 277         tree->opcode = OP_STORER8_MEMBASE_REG;
 278         tree->sreg1 = state->left->reg1;
 279         tree->inst_destbasereg = X86_ESP;
 280         tree->inst_offset = 0;
 281         mono_bblock_add_inst (s->cbb, tree);
 282 }
 283
 284 stmt: OP_OUTARG_R4 (freg) {
 285         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
 286         tree->opcode = OP_STORER4_MEMBASE_REG;
 287         tree->sreg1 = state->left->reg1;
 288         tree->inst_destbasereg = X86_ESP;
 289         tree->inst_offset = 0;
 290         mono_bblock_add_inst (s->cbb, tree);
 291 }
 292
 293 stmt: OP_OUTARG_R8 (freg) {
 294         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
 295         tree->opcode = OP_STORER8_MEMBASE_REG;
 296         tree->sreg1 = state->left->reg1;
 297         tree->inst_destbasereg = X86_ESP;
 298         tree->inst_offset = 0;
 299         mono_bblock_add_inst (s->cbb, tree);
 300 }
 301
 302 stmt: OP_AMD64_OUTARG_XMMREG_R4 (freg) {
 303         MonoCallInst *call = tree->inst_call;
 304
 305         tree->opcode = OP_AMD64_SET_XMMREG_R4;
 306         tree->sreg1 = state->left->reg1;
 307         tree->dreg = mono_regstate_next_float (s->rs);
 308         mono_bblock_add_inst (s->cbb, tree);
 309
 310         mono_call_inst_add_outarg_reg (s, call, tree->dreg, tree->backend.reg3, TRUE);
 311 }
 312
 313 stmt: OP_AMD64_OUTARG_XMMREG_R8 (freg) {
 314         MonoCallInst *call = tree->inst_call;
 315
 316         tree->opcode = OP_AMD64_SET_XMMREG_R8;
 317         tree->sreg1 = state->left->reg1;
 318         tree->dreg = mono_regstate_next_float (s->rs);
 319         mono_bblock_add_inst (s->cbb, tree);
 320
 321         mono_call_inst_add_outarg_reg (s, call, tree->dreg, tree->backend.reg3, TRUE);
 322 }
 323
 324 stmt: OP_OUTARG_VT (CEE_LDOBJ (base)) {
 325         MonoInst *vt = state->left->left->tree;
 326         //g_print ("vt size: %d at R%d + %d\n", tree->inst_imm, vt->inst_basereg, vt->inst_offset);
 327
 328         if (!tree->inst_imm)
 329                 return;
 330
 331         if (tree->inst_imm == 8) {
 332                 /* Can't use this for < 8 since it does an 8 byte memory load */
 333                 tree->opcode = OP_X86_PUSH_MEMBASE;
 334                 tree->inst_basereg = vt->inst_basereg;
 335                 tree->inst_offset = vt->inst_offset;
 336                 mono_bblock_add_inst (s->cbb, tree);
 337         } else if (tree->inst_imm <= 20) {
 338                 int sz = tree->inst_imm;
 339                 sz += 7;
 340                 sz &= ~7;
 341                 MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, sz);
 342                 mini_emit_memcpy (s, X86_ESP, 0, vt->inst_basereg, vt->inst_offset, tree->inst_imm, 0);
 343         } else {
 344                 tree->opcode = OP_X86_PUSH_OBJ;
 345                 tree->inst_basereg = vt->inst_basereg;
 346                 tree->inst_offset = vt->inst_offset;
 347                 mono_bblock_add_inst (s->cbb, tree);
 348         }
 349 }
 350
 351 stmt: OP_OUTARG_VT (OP_ICONST) {
 352         tree->opcode = OP_X86_PUSH_IMM;
 353         tree->inst_imm = state->left->tree->inst_c0;
 354         mono_bblock_add_inst (s->cbb, tree);
 355 }
 356
 357 stmt: OP_OUTARG_VT (reg) {
 358         tree->opcode = OP_X86_PUSH;
 359         tree->sreg1 = state->left->tree->dreg;
 360         mono_bblock_add_inst (s->cbb, tree);
 361 }
 362
 363 stmt: OP_AMD64_OUTARG_ALIGN_STACK {
 364         MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
 365 }
 366
 367 base: OP_INARG_VT (base) {
 368         MONO_EMIT_NEW_LOAD_MEMBASE (s, state->reg1, state->left->tree->inst_basereg,
 369                                         state->left->tree->inst_offset);
 370 }
 371
 372 reg: OP_LDADDR (OP_INARG_VT (base)) {
 373         MONO_EMIT_NEW_LOAD_MEMBASE (s, state->reg1, state->left->left->tree->inst_basereg,
 374                                         state->left->left->tree->inst_offset);
 375 }
 376
 377 reg: CEE_LDOBJ (OP_INARG_VT (base)) {
 378         MONO_EMIT_NEW_LOAD_MEMBASE (s, state->reg1, state->left->left->tree->inst_basereg,
 379                                         state->left->left->tree->inst_offset);
 380 }
 381
 382 reg: OP_LDADDR (OP_REGOFFSET) "1" {
 383         if (state->left->tree->inst_offset) {
 384                 tree->opcode = OP_X86_LEA_MEMBASE;
 385                 tree->sreg1 = state->left->tree->inst_basereg;
 386                 tree->inst_imm = state->left->tree->inst_offset;
 387                 tree->dreg = state->reg1;
 388         } else {
 389                 tree->opcode = OP_MOVE;
 390                 tree->sreg1 = state->left->tree->inst_basereg;
 391                 tree->dreg = state->reg1;
 392         }
 393         mono_bblock_add_inst (s->cbb, tree);
 394 }
 395
 396 reg: CEE_LDOBJ (OP_REGOFFSET) "1" {
 397         if (state->left->tree->inst_offset) {
 398                 tree->opcode = OP_X86_LEA_MEMBASE;
 399                 tree->sreg1 = state->left->tree->inst_basereg;
 400                 tree->inst_imm = state->left->tree->inst_offset;
 401                 tree->dreg = state->reg1;
 402         } else {
 403                 tree->opcode = OP_MOVE;
 404                 tree->sreg1 = state->left->tree->inst_basereg;
 405                 tree->dreg = state->reg1;
 406         }
 407         mono_bblock_add_inst (s->cbb, tree);
 408 }
 409
 410 reg: CEE_LDELEMA (reg, reg) "15" {
 411         guint32 size = mono_class_array_element_size (tree->klass);
 412
 413         MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoArray, max_length, state->right->reg1);
 414
 415         if (size == 1 || size == 2 || size == 4 || size == 8) {
 416                 static const int fast_log2 [] = { 1, 0, 1, -1, 2, -1, -1, -1, 3 };
 417                 int reg;
 418
 419                 /* The array reg is 64 bits but the index reg is only 32 */
 420                 tree->dreg = mono_regstate_next_float (s->rs);
 421                 reg = mono_regstate_next_int (s->rs);
 422                 MONO_EMIT_NEW_UNALU (s, OP_SEXT_I4, reg, state->right->reg1);
 423
 424                 tree->opcode = OP_X86_LEA;
 425                 tree->dreg = state->reg1;
 426                 tree->sreg1 = state->left->reg1;
 427                 tree->sreg2 = reg;
 428                 tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
 429                 tree->backend.shift_amount = fast_log2 [size];
 430                 mono_bblock_add_inst (s->cbb, tree);
 431         } else {
 432                 int mult_reg = mono_regstate_next_int (s->rs);
 433                 int add_reg = mono_regstate_next_int (s->rs);
 434                 MONO_EMIT_NEW_BIALU_IMM (s, OP_MUL_IMM, mult_reg, state->right->reg1, size);
 435                 MONO_EMIT_NEW_BIALU (s, CEE_ADD, add_reg, mult_reg, state->left->reg1);
 436                 MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, state->reg1, add_reg, G_STRUCT_OFFSET (MonoArray, vector));
 437         }
 438 }
 439
 440 stmt: CEE_STIND_R8 (OP_REGVAR, freg) {
 441         /* nothing to do: the value is already on the FP stack */
 442 }
 443
 444 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
 445         int con = state->right->right->tree->inst_c0;
 446
 447         if (con == 1) {
 448                 tree->opcode = OP_X86_INC_MEMBASE;
 449         } else {
 450                 tree->opcode = OP_X86_ADD_MEMBASE_IMM;
 451                 tree->inst_imm = con;
 452         }
 453
 454         tree->inst_basereg = state->left->tree->inst_basereg;
 455         tree->inst_offset = state->left->tree->inst_offset;
 456         mono_bblock_add_inst (s->cbb, tree);
 457 } cost {
 458         MBTREE_TYPE *t1 = state->right->left->left->tree;
 459         MBTREE_TYPE *t2 = state->left->tree;
 460         MBCOND (t1->inst_basereg == t2->inst_basereg &&
 461                 t1->inst_offset == t2->inst_offset);
 462         return 2;
 463 }
 464
 465 stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)) {
 466         int con = state->right->right->tree->inst_c0;
 467
 468         if (con == 1) {
 469                 tree->opcode = OP_X86_DEC_MEMBASE;
 470         } else {
 471                 tree->opcode = OP_X86_SUB_MEMBASE_IMM;
 472                 tree->inst_imm = con;
 473         }
 474
 475         tree->inst_basereg = state->left->tree->inst_basereg;
 476         tree->inst_offset = state->left->tree->inst_offset;
 477         mono_bblock_add_inst (s->cbb, tree);
 478 } cost {
 479         MBTREE_TYPE *t1 = state->right->left->left->tree;
 480         MBTREE_TYPE *t2 = state->left->tree;
 481         MBCOND (t1->inst_basereg == t2->inst_basereg &&
 482                 t1->inst_offset == t2->inst_offset);
 483         return 2;
 484 }
 485
 486 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_SUB (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
 487         int con = state->right->right->tree->inst_c0;
 488         int dreg = state->left->tree->dreg;
 489         int sreg = state->right->left->left->tree->dreg;
 490
 491         if (con == 1) {
 492                 if (dreg != sreg)
 493                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 494                 tree->opcode = OP_X86_DEC_REG;
 495                 tree->dreg = tree->sreg1 = dreg;
 496         } else if (con == -1) {
 497                 if (dreg != sreg)
 498                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 499                 tree->opcode = OP_X86_INC_REG;
 500                 tree->dreg = tree->sreg1 = dreg;
 501         } else {
 502                 tree->opcode = OP_SUB_IMM;
 503                 tree->inst_imm = con;
 504                 tree->sreg1 = sreg;
 505                 tree->dreg = dreg;
 506         }
 507         mono_bblock_add_inst (s->cbb, tree);
 508 }
 509
 510 stmt: CEE_STIND_I (OP_REGVAR, CEE_ADD (CEE_LDIND_I (OP_REGVAR), OP_ICONST)),
 511 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_ADD (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
 512         int con = state->right->right->tree->inst_c0;
 513         int dreg = state->left->tree->dreg;
 514         int sreg = state->right->left->left->tree->dreg;
 515
 516         if (con == 1) {
 517                 if (dreg != sreg)
 518                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 519                 tree->opcode = OP_X86_INC_REG;
 520                 tree->dreg = tree->sreg1 = dreg;
 521         } else if (con == -1) {
 522                 if (dreg != sreg)
 523                         MONO_EMIT_NEW_UNALU (s, OP_MOVE, dreg, sreg);
 524                 tree->opcode = OP_X86_DEC_REG;
 525                 tree->dreg = tree->sreg1 = dreg;
 526         } else {
 527                 tree->opcode = OP_ADD_IMM;
 528                 tree->inst_imm = con;
 529                 tree->sreg1 = sreg;
 530                 tree->dreg = dreg;
 531         }
 532         mono_bblock_add_inst (s->cbb, tree);
 533 }
 534
 535 reg: CEE_LDIND_I2 (OP_REGVAR) {
 536         MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);
 537 }
 538
 539 # The XOR rule
 540 stmt: CEE_STIND_I8 (OP_REGVAR, OP_ICONST),
 541 stmt: CEE_STIND_I4 (OP_REGVAR, OP_ICONST),
 542 stmt: CEE_STIND_I2 (OP_REGVAR, OP_ICONST),
 543 stmt: CEE_STIND_I1 (OP_REGVAR, OP_ICONST),
 544 stmt: CEE_STIND_REF (OP_REGVAR, OP_ICONST),
 545 stmt: CEE_STIND_I (OP_REGVAR, OP_ICONST),
 546 stmt: CEE_STIND_I8 (OP_REGVAR, OP_I8CONST),
 547 stmt: CEE_STIND_I4 (OP_REGVAR, OP_I8CONST),
 548 stmt: CEE_STIND_I2 (OP_REGVAR, OP_I8CONST),
 549 stmt: CEE_STIND_I1 (OP_REGVAR, OP_I8CONST),
 550 stmt: CEE_STIND_REF (OP_REGVAR, OP_I8CONST),
 551 stmt: CEE_STIND_I (OP_REGVAR, OP_I8CONST) {
 552         int r = state->left->tree->dreg;
 553         MONO_EMIT_BIALU (s, tree, CEE_XOR, r, r, r);
 554 } cost {
 555         MBCOND (!state->right->tree->inst_c0);
 556
 557         return 0;
 558 }
 559
 560 # on x86, fp compare overwrites EAX, so we must
 561 # either improve the local register allocator or
 562 # emit coarse opcodes which saves EAX for us.
 563
 564 reg: OP_CEQ (OP_COMPARE (freg, freg)),
 565 reg: OP_CLT (OP_COMPARE (freg, freg)),
 566 reg: OP_CGT (OP_COMPARE (freg, freg)),
 567 reg: OP_CLT_UN (OP_COMPARE (freg, freg)),
 568 reg: OP_CGT_UN (OP_COMPARE (freg, freg)) {
 569         MONO_EMIT_BIALU (s, tree, ceq_to_fceq (tree->opcode), state->reg1, state->left->left->reg1,
 570                          state->left->right->reg1);
 571 }
 572
 573 # fpcflags overwrites EAX, but this does not matter for statements
 574 # because we are the last operation in the tree.
 575
 576 stmt: CEE_BNE_UN (fpcflags),
 577 stmt: CEE_BEQ (fpcflags),
 578 stmt: CEE_BLT (fpcflags),
 579 stmt: CEE_BLT_UN (fpcflags),
 580 stmt: CEE_BGT (fpcflags),
 581 stmt: CEE_BGT_UN (fpcflags),
 582 stmt: CEE_BGE  (fpcflags),
 583 stmt: CEE_BGE_UN (fpcflags),
 584 stmt: CEE_BLE  (fpcflags),
 585 stmt: CEE_BLE_UN (fpcflags) {
 586         tree->opcode = cbranch_to_fcbranch (tree->opcode);
 587         mono_bblock_add_inst (s->cbb, tree);
 588 }
 589
 590 stmt: CEE_POP (freg) "0" {
 591         /* we need to pop the value from the x86 FP stack */
 592         MONO_EMIT_UNALU (s, tree, OP_X86_FPOP, -1, state->left->reg1);
 593 }
 594
 595 # override the rules in inssel-float.brg that work for machines with FP registers
 596
 597 freg: OP_FCONV_TO_R8 (freg) "0" {
 598         tree->opcode = OP_FMOVE;
 599         tree->sreg1 = state->left->reg1;
 600         tree->dreg = state->reg1;
 601         mono_bblock_add_inst (s->cbb, tree);
 602 }
 603
 604 freg: OP_FCONV_TO_R4 (freg) "0" {
 605         tree->opcode = OP_FMOVE;
 606         tree->sreg1 = state->left->reg1;
 607         tree->dreg = state->reg1;
 608         mono_bblock_add_inst (s->cbb, tree);
 609 }
 610
 611 reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) {
 612         MonoInst *base = state->right->left->tree;
 613
 614         MONO_EMIT_BIALU_MEMBASE (cfg, tree, OP_X86_ADD_MEMBASE, state->reg1, state->left->reg1, base->inst_basereg, base->inst_offset);
 615 }
 616
 617 reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) {
 618         MonoInst *base = state->right->left->tree;
 619
 620         MONO_EMIT_BIALU_MEMBASE (cfg, tree, OP_X86_SUB_MEMBASE, state->reg1, state->left->reg1, base->inst_basereg, base->inst_offset);
 621 }
 622
 623 reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) {
 624         MonoInst *base = state->right->left->tree;
 625
 626         MONO_EMIT_BIALU_MEMBASE (cfg, tree, OP_X86_MUL_MEMBASE, state->reg1, state->left->reg1, base->inst_basereg, base->inst_offset);
 627 }
 628
 629 reg: OP_LSHL (reg, reg),
 630 reg: OP_LSHR (reg, reg),
 631 reg: OP_LSHR_UN (reg, reg),
 632 reg: OP_LMUL (reg, reg),
 633 reg: OP_LDIV (reg, reg),
 634 reg: OP_LDIV_UN (reg, reg),
 635 reg: OP_LREM (reg, reg),
 636 reg: OP_LREM_UN (reg, reg),
 637 reg: OP_LMUL_OVF (reg, reg),
 638 reg: OP_LMUL_OVF_UN (reg, reg) "0" {
 639         MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
 640 }
 641
 642 reg: OP_LMUL (reg, OP_I8CONST),
 643 reg: OP_LSHL (reg, OP_ICONST),
 644 reg: OP_LSHR (reg, OP_ICONST),
 645 reg: OP_LSHR_UN (reg, OP_ICONST) {
 646         MONO_EMIT_BIALU_IMM (s, tree, bialu_to_bialu_imm (tree->opcode), state->reg1, state->left->reg1, state->right->tree->inst_c0);
 647 } cost {
 648         MBCOND (mono_arch_is_inst_imm (state->right->tree->inst_c0));
 649         return 0;
 650 }
 651
 652 reg: OP_ATOMIC_ADD_NEW_I4 (base, reg),
 653 reg: OP_ATOMIC_ADD_NEW_I8 (base, reg),
 654 reg: OP_ATOMIC_ADD_I4 (base, reg),
 655 reg: OP_ATOMIC_ADD_I8 (base, reg),
 656 reg: OP_ATOMIC_EXCHANGE_I4 (base, reg),
 657 reg: OP_ATOMIC_EXCHANGE_I8 (base, reg) {
 658         tree->opcode = tree->opcode;
 659         tree->dreg = state->reg1;
 660         tree->sreg2 = state->right->reg1;
 661         tree->inst_basereg = state->left->tree->inst_basereg;
 662         tree->inst_offset = state->left->tree->inst_offset;
 663
 664         mono_bblock_add_inst (s->cbb, tree);
 665 }
 666
 667 # Optimized call instructions
 668 # mono_arch_patch_delegate_trampoline depends on these
 669 reg: OP_CALL_REG (CEE_LDIND_I (base)),
 670 freg: OP_FCALL_REG (CEE_LDIND_I (base)),
 671 reg: OP_LCALL_REG (CEE_LDIND_I (base)) {
 672         tree->opcode = call_reg_to_call_membase (tree->opcode);
 673         tree->inst_basereg = state->left->left->tree->inst_basereg;
 674         tree->inst_offset = state->left->left->tree->inst_offset;
 675         tree->dreg = state->reg1;
 676         mono_bblock_add_inst (s->cbb, tree);
 677 }
 678
 679 stmt: OP_VOIDCALL_REG (CEE_LDIND_I (base)) {
 680         tree->opcode = call_reg_to_call_membase (tree->opcode);
 681         tree->inst_basereg = state->left->left->tree->inst_basereg;
 682         tree->inst_offset = state->left->left->tree->inst_offset;
 683         mono_bblock_add_inst (s->cbb, tree);
 684 }
 685
 686 stmt: OP_VCALL_REG (CEE_LDIND_I (base), reg) {
 687         mono_arch_emit_this_vret_args (s, (MonoCallInst*)tree, -1, -1, state->right->reg1);
 688
 689         tree->opcode = call_reg_to_call_membase (tree->opcode);
 690         tree->inst_basereg = state->left->left->tree->inst_basereg;
 691         tree->inst_offset = state->left->left->tree->inst_offset;
 692         tree->dreg = state->reg1;
 693         mono_bblock_add_inst (s->cbb, tree);
 694 }
 695
 696 %%
 697
 698 static int
 699 bialu_to_bialu_imm (int opcode)
 700 {
 701         switch (opcode) {
 702         case OP_LMUL:
 703                 return OP_LMUL_IMM;
 704         case OP_LSHL:
 705                 return OP_LSHL_IMM;
 706         case OP_LSHR:
 707                 return OP_LSHR_IMM;
 708         case OP_LSHR_UN:
 709                 return OP_LSHR_UN_IMM;
 710         default:
 711                 g_assert_not_reached ();
 712         }
 713
 714         return -1;
 715 }
 716
 717 static int
 718 cbranch_to_fcbranch (int opcode)
 719 {
 720         switch (opcode) {
 721         case CEE_BNE_UN:
 722                 return OP_FBNE_UN;
 723         case CEE_BEQ:
 724                 return OP_FBEQ;
 725         case CEE_BLT:
 726                 return OP_FBLT;
 727         case CEE_BLT_UN:
 728                 return OP_FBLT_UN;
 729         case CEE_BGT:
 730                 return OP_FBGT;
 731         case CEE_BGT_UN:
 732                 return OP_FBGT_UN;
 733         case CEE_BGE:
 734                 return OP_FBGE;
 735         case CEE_BGE_UN:
 736                 return OP_FBGE_UN;
 737         case CEE_BLE:
 738                 return OP_FBLE;
 739         case CEE_BLE_UN:
 740                 return OP_FBLE_UN;
 741         default:
 742                 g_assert_not_reached ();
 743         }
 744
 745         return -1;
 746 }
 747
 748 static int
 749 ceq_to_fceq (int opcode)
 750 {
 751         switch (opcode) {
 752         case OP_CEQ:
 753                 return OP_FCEQ;
 754         case OP_CLT:
 755                 return OP_FCLT;
 756         case OP_CGT:
 757                 return OP_FCGT;
 758         case OP_CLT_UN:
 759                 return OP_FCLT_UN;
 760         case OP_CGT_UN:
 761                 return OP_FCGT_UN;
 762         default:
 763                 g_assert_not_reached ();
 764         }
 765
 766         return -1;
 767 }
 768
 769 static int
 770 call_reg_to_call_membase (int opcode)
 771 {
 772         switch (opcode) {
 773         case OP_CALL_REG:
 774                 return OP_CALL_MEMBASE;
 775         case OP_FCALL_REG:
 776                 return OP_FCALL_MEMBASE;
 777         case OP_VCALL_REG:
 778                 return OP_VCALL_MEMBASE;
 779         case OP_LCALL_REG:
 780                 return OP_LCALL_MEMBASE;
 781         case OP_VOIDCALL_REG:
 782                 return OP_VOIDCALL_MEMBASE;
 783         default:
 784                 g_assert_not_reached ();
 785         }
 786
 787         return -1;
 788 }