1 # sparc32 cpu description file
2 # this file is read by genmdesc to pruduce a table with all the relevant information
3 # about the cpu instructions that may be used by the register allocator, the scheduler
4 # and other parts of the arch-dependent part of mini.
6 # An opcode name is followed by a colon and optional specifiers.
7 # A specifier has a name, a colon and a value. Specifiers are separated by white space.
8 # Here is a description of the specifiers valid for this file and their possible values.
10 # dest:register describes the destination register of an instruction
11 # src1:register describes the first source register of an instruction
12 # src2:register describes the second source register of an instruction
14 # register may have the following values:
16 # b base register (used in address references)
17 # f floating point register
18 # l register pair (same as 'i' on v9)
20 # len:number describe the maximun length in bytes of the instruction
21 # number is a positive integer
23 # cost:number describe how many cycles are needed to complete the instruction (unused)
25 # clob:spec describe if the instruction clobbers registers or has special needs
27 # spec can be one of the following characters:
28 # c clobbers caller-save registers
29 # r 'reserves' the destination register until a later instruction unreserves it
30 # used mostly to set output registers in function calls
32 # flags:spec describe if the instruction uses or sets the flags (unused)
34 # spec can be one of the following chars:
37 # m uses and modifies the flags
39 # res:spec describe what units are used in the processor (unused)
41 # delay: describe delay slots (unused)
43 # the required specifiers are: len, clob (if registers are clobbered), the registers
44 # specifiers if the registers are actually used, flags (when scheduling is implemented).
46 # See the code in mini-sparc32.c for more details on how the specifiers are used.
87 call: dest:i clob:c len:40
116 sparc_brz: src1:i len: 8
117 sparc_brlez: src1:i len: 8
118 sparc_brlz: src1:i len: 8
119 sparc_brnz: src1:i len: 8
120 sparc_brgz: src1:i len: 8
121 sparc_brgez: src1:i len: 8
122 sparc_cond_exc_eqz: src1:i len:64
123 sparc_cond_exc_nez: src1:i len:64
124 sparc_cond_exc_ltz: src1:i len:64
125 sparc_cond_exc_gtz: src1:i len:64
126 sparc_cond_exc_gez: src1:i len:64
127 sparc_cond_exc_lez: src1:i len:64
129 ldind.i1: dest:i len:4
130 ldind.u1: dest:i len:4
131 ldind.i2: dest:i len:4
132 ldind.u2: dest:i len:4
133 ldind.i4: dest:i len:4
134 ldind.u4: dest:i len:4
136 ldind.i: dest:i len:4
139 ldind.ref: dest:i len:4
140 stind.ref: src1:b src2:i
141 stind.i1: src1:b src2:i
142 stind.i2: src1:b src2:i
143 stind.i4: src1:b src2:i
145 stind.r4: src1:b src2:f
146 stind.r8: src1:b src2:f
147 add: dest:i src1:i src2:i len:64
148 sub: dest:i src1:i src2:i len:4
149 mul: dest:i src1:i src2:i len:4
150 div: dest:i src1:i src2:i len:64
151 div.un: dest:i src1:i src2:i len:8
152 rem: dest:d src1:i src2:i len:64
153 rem.un: dest:d src1:i src2:i len:64
154 and: dest:i src1:i src2:i len:4
155 or: dest:i src1:i src2:i len:4
156 xor: dest:i src1:i src2:i len:4
157 shl: dest:i src1:i src2:i len:4
158 shr: dest:i src1:i src2:i len:4
159 shr.un: dest:i src1:i src2:i len:4
160 neg: dest:i src1:i len:4
161 not: dest:i src1:i len:4
162 conv.i1: dest:i src1:i len:8
163 conv.i2: dest:i src1:i len:8
164 conv.i4: dest:i src1:i len:4
165 conv.i8: dest:i src1:i len:4
166 conv.r4: dest:f src1:i len:64
167 conv.r8: dest:f src1:i len:64
168 conv.u4: dest:i src1:i len:
169 conv.u8: dest:i src1:i len:4
180 op_rethrow: src1:i len:64
226 conv.ovf.u4: dest:i src1:i len:64
230 ckfinite: dest:f src1:f len:40
233 conv.u2: dest:i src1:i len:8
234 conv.u1: dest:i src1:i len:4
235 conv.i: dest:i src1:i len:4
240 mul.ovf: dest:i src1:i src2:i len:64
241 mul.ovf.un: dest:i src1:i src2:i len:64
244 start_handler: len:64
250 conv.u: dest:i src1:i len:4
262 cgt.un: dest:i len:64
264 clt.un: dest:i len:64
273 localloc: dest:i src1:i len:64
274 sparc_localloc_imm: dest:i len:64
295 compare: src1:i src2:i len:4
296 icompare: src1:i src2:i len:4
297 compare_imm: src1:i len:64
298 icompare_imm: src1:i len:64
299 fcompare: src1:f src2:f len:64
300 lcompare: src1:i src2:i len:4
303 setfret: dest:f src1:f len:8
307 setret: dest:a src1:i len:4
308 setlret: dest:l src1:i src2:i len:8
309 setreg: dest:i src1:i len:4 clob:r
310 setregimm: dest:i len:64 clob:r
311 setfreg: dest:f src1:f len:4 clob:r
312 sparc_setfreg_float: dest:f src1:f len:4 clob:r
313 checkthis: src1:b len:4
314 oparglist: src1:i len:64
315 voidcall: len:64 clob:c
316 voidcall_reg: src1:i len:64 clob:c
317 voidcall_membase: src1:b len:64 clob:c
318 fcall: dest:f len:64 clob:c
319 fcall_reg: dest:f src1:i len:64 clob:c
320 fcall_membase: dest:f src1:b len:64 clob:c
321 lcall: dest:l len:42 clob:c
322 lcall_reg: dest:l src1:i len:64 clob:c
323 lcall_membase: dest:l src1:b len:64 clob:c
325 vcall_reg: src1:i len:64 clob:c
326 vcall_membase: src1:b len:64 clob:c
327 call_reg: dest:i src1:i len:64 clob:c
328 call_membase: dest:i src1:b len:64 clob:c
330 iconst: dest:i len:64
331 i8const: dest:i len:64
332 r4const: dest:f len:64
333 r8const: dest:f len:64
338 store_membase_imm: dest:b len:64
339 store_membase_reg: dest:b src1:i len:64
340 storei1_membase_imm: dest:b len:64
341 storei1_membase_reg: dest:b src1:i len:64
342 storei2_membase_imm: dest:b len:64
343 storei2_membase_reg: dest:b src1:i len:64
344 storei4_membase_imm: dest:b len:64
345 storei4_membase_reg: dest:b src1:i len:64
346 storei8_membase_imm: dest:b len:64 len:64
347 storei8_membase_reg: dest:b src1:i len:64
348 storer4_membase_reg: dest:b src1:f len:64
349 storer8_membase_reg: dest:b src1:f len:64
350 load_membase: dest:i src1:b len:64
351 loadi1_membase: dest:i src1:b len:64
352 loadu1_membase: dest:i src1:b len:64
353 loadi2_membase: dest:i src1:b len:64
354 loadu2_membase: dest:i src1:b len:64
355 loadi4_membase: dest:i src1:b len:64
356 loadu4_membase: dest:i src1:b len:64
357 loadi8_membase: dest:i src1:b len:64
358 loadr4_membase: dest:f src1:b len:64
359 loadr8_membase: dest:f src1:b len:64
360 loadu4_mem: dest:i len:8
361 move: dest:i src1:i len:4
362 add_imm: dest:i src1:i len:64
363 addcc_imm: dest:i src1:i len:64
364 sub_imm: dest:i src1:i len:64
365 subcc_imm: dest:i src1:i len:64
366 mul_imm: dest:i src1:i len:64
367 div_imm: dest:a src1:i src2:i len:64
368 div_un_imm: dest:a src1:i src2:i len:64
369 rem_imm: dest:d src1:i src2:i len:64
370 rem_un_imm: dest:d src1:i src2:i len:64
371 and_imm: dest:i src1:i len:64
372 or_imm: dest:i src1:i len:64
373 xor_imm: dest:i src1:i len:64
374 shl_imm: dest:i src1:i len:64
375 shr_imm: dest:i src1:i len:64
376 shr_un_imm: dest:i src1:i len:64
378 cond_exc_ne_un: len:64
380 cond_exc_lt_un: len:64
382 cond_exc_gt_un: len:64
384 cond_exc_ge_un: len:64
386 cond_exc_le_un: len:64
401 long_shl: dest:i src1:i src2:i len:64
402 long_shr: dest:i src1:i src2:i len:64
403 long_shr_un: dest:i src1:i src2:i len:64
417 long_conv_to_ovf_i: dest:i src1:i src2:i len:48
425 long_conv_to_ovf_i1_un:
426 long_conv_to_ovf_i2_un:
427 long_conv_to_ovf_i4_un:
428 long_conv_to_ovf_i8_un:
429 long_conv_to_ovf_u1_un:
430 long_conv_to_ovf_u2_un:
431 long_conv_to_ovf_u4_un:
432 long_conv_to_ovf_u8_un:
433 long_conv_to_ovf_i_un:
434 long_conv_to_ovf_u_un:
448 long_conv_to_r_un: dest:f src1:i src2:i len:64
450 long_shr_imm: dest:i src1:i len:64
451 long_shr_un_imm: dest:i src1:i len:64
452 long_shl_imm: dest:i src1:i len:64
475 float_add: dest:f src1:f src2:f len:4
476 float_sub: dest:f src1:f src2:f len:4
477 float_mul: dest:f src1:f src2:f len:4
478 float_div: dest:f src1:f src2:f len:4
479 float_div_un: dest:f src1:f src2:f len:4
480 float_rem: dest:f src1:f src2:f len:64
481 float_rem_un: dest:f src1:f src2:f len:64
482 float_neg: dest:f src1:f len:4
483 float_not: dest:f src1:f len:4
484 float_conv_to_i1: dest:i src1:f len:40
485 float_conv_to_i2: dest:i src1:f len:40
486 float_conv_to_i4: dest:i src1:f len:40
487 float_conv_to_i8: dest:l src1:f len:40
488 float_conv_to_r4: dest:f src1:f len:8
490 float_conv_to_u4: dest:i src1:f len:40
491 float_conv_to_u8: dest:l src1:f len:40
492 float_conv_to_u2: dest:i src1:f len:40
493 float_conv_to_u1: dest:i src1:f len:40
494 float_conv_to_i: dest:i src1:f len:40
503 float_conv_to_ovf_i1_un:
504 float_conv_to_ovf_i2_un:
505 float_conv_to_ovf_i4_un:
506 float_conv_to_ovf_i8_un:
507 float_conv_to_ovf_u1_un:
508 float_conv_to_ovf_u2_un:
509 float_conv_to_ovf_u4_un:
510 float_conv_to_ovf_u8_un:
511 float_conv_to_ovf_i_un:
512 float_conv_to_ovf_u_un:
513 float_conv_to_ovf_i1:
514 float_conv_to_ovf_u1:
515 float_conv_to_ovf_i2:
516 float_conv_to_ovf_u2:
517 float_conv_to_ovf_i4:
518 float_conv_to_ovf_u4:
519 float_conv_to_ovf_i8:
520 float_conv_to_ovf_u8:
521 float_ceq: dest:i src1:f src2:f len:64
522 float_cgt: dest:i src1:f src2:f len:64
523 float_cgt_un: dest:i src1:f src2:f len:64
524 float_clt: dest:i src1:f src2:f len:64
525 float_clt_un: dest:i src1:f src2:f len:64
526 float_conv_to_u: dest:i src1:f len:64
528 op_endfilter: src1:i len:64
529 aot_const: dest:i len:64
530 adc: dest:i src1:i src2:i len:4
531 addcc: dest:i src1:i src2:i len:4
532 subcc: dest:i src1:i src2:i len:4
533 adc_imm: dest:i src1:i len:64
534 sbb: dest:i src1:i src2:i len:4
535 sbb_imm: dest:i src1:i len:64
537 op_bigmul: len:2 dest:l src1:a src2:i
538 op_bigmul_un: len:2 dest:l src1:a src2:i
539 fmove: dest:f src1:f len:8
542 int_add: dest:i src1:i src2:i len:64
543 int_sub: dest:i src1:i src2:i len:64
544 int_mul: dest:i src1:i src2:i len:64
545 int_div: dest:i src1:i src2:i len:64
546 int_div_un: dest:i src1:i src2:i len:64
547 int_rem: dest:i src1:i src2:i len:64
548 int_rem_un: dest:i src1:i src2:i len:64
549 int_and: dest:i src1:i src2:i len:64
550 int_or: dest:i src1:i src2:i len:64
551 int_xor: dest:i src1:i src2:i len:64
552 int_shl: dest:i src1:i src2:i len:64
553 int_shr: dest:i src1:i src2:i len:64
554 int_shr_un: dest:i src1:i src2:i len:64
555 int_adc: dest:i src1:i src2:i len:64
556 int_adc_imm: dest:i src1:i len:64
557 int_sbb: dest:i src1:i src2:i len:64
558 int_sbb_imm: dest:i src1:i len:64
559 int_addcc: dest:i src1:i src2:i len:64
560 int_subcc: dest:i src1:i src2:i len:64
561 int_add_imm: dest:i src1:i len:64
562 int_sub_imm: dest:i src1:i len:64
563 int_mul_imm: dest:i src1:i len:64
564 int_div_imm: dest:i src1:i len:64
565 int_div_un_imm: dest:i src1:i len:64
566 int_rem_imm: dest:i src1:i len:64
567 int_rem_un_imm: dest:i src1:i len:64
568 int_and_imm: dest:i src1:i len:64
569 int_or_imm: dest:i src1:i len:64
570 int_xor_imm: dest:i src1:i len:64
571 int_shl_imm: dest:i src1:i len:64
572 int_shr_imm: dest:i src1:i len:64
573 int_shr_un_imm: dest:i src1:i len:64
574 int_neg: dest:i src1:i len:64
575 int_not: dest:i src1:i len:64
576 int_ceq: dest:i len:64
577 int_cgt: dest:i len:64
578 int_cgt_un: dest:i len:64
579 int_clt: dest:i len:64
580 int_clt_un: dest:i len:64