1 # sparc32 cpu description file
2 # this file is read by genmdesc to pruduce a table with all the relevant information
3 # about the cpu instructions that may be used by the register allocator, the scheduler
4 # and other parts of the arch-dependent part of mini.
6 # An opcode name is followed by a colon and optional specifiers.
7 # A specifier has a name, a colon and a value. Specifiers are separated by white space.
8 # Here is a description of the specifiers valid for this file and their possible values.
10 # dest:register describes the destination register of an instruction
11 # src1:register describes the first source register of an instruction
12 # src2:register describes the second source register of an instruction
14 # register may have the following values:
16 # b base register (used in address references)
17 # f floating point register
18 # L register pair (same as 'i' on v9)
19 # l %o0:%o1 register pair (same as 'i' on v9)
22 # len:number describe the maximun length in bytes of the instruction
23 # number is a positive integer
25 # cost:number describe how many cycles are needed to complete the instruction (unused)
27 # clob:spec describe if the instruction clobbers registers or has special needs
29 # spec can be one of the following characters:
30 # c clobbers caller-save registers
31 # r 'reserves' the destination register until a later instruction unreserves it
32 # used mostly to set output registers in function calls
34 # flags:spec describe if the instruction uses or sets the flags (unused)
36 # spec can be one of the following chars:
39 # m uses and modifies the flags
41 # res:spec describe what units are used in the processor (unused)
43 # delay: describe delay slots (unused)
45 # the required specifiers are: len, clob (if registers are clobbered), the registers
46 # specifiers if the registers are actually used, flags (when scheduling is implemented).
48 # See the code in mini-sparc32.c for more details on how the specifiers are used.
56 rethrow: src1:i len:64
59 endfilter: src1:i len:64
61 ckfinite: dest:f src1:f len:40
67 localloc: dest:i src1:i len:64
68 localloc_imm: dest:i len:64
69 compare: src1:i src2:i len:4
70 icompare: src1:i src2:i len:4
71 compare_imm: src1:i len:64
72 icompare_imm: src1:i len:64
73 fcompare: src1:f src2:f len:64
74 lcompare: src1:i src2:i len:4
75 setfret: dest:f src1:f len:8
78 sparc_setfreg_float: dest:f src1:f len:4 clob:r
79 checkthis: src1:b len:4
80 oparglist: src1:i len:64
81 call: dest:o clob:c len:40
82 call_reg: dest:o src1:i len:64 clob:c
83 call_membase: dest:o src1:b len:64 clob:c
84 voidcall: len:64 clob:c
85 voidcall_reg: src1:i len:64 clob:c
86 voidcall_membase: src1:b len:64 clob:c
87 fcall: dest:f len:64 clob:c
88 fcall_reg: dest:f src1:i len:64 clob:c
89 fcall_membase: dest:f src1:b len:64 clob:c
90 lcall: dest:l len:42 clob:c
91 lcall_reg: dest:l src1:i len:64 clob:c
92 lcall_membase: dest:l src1:b len:64 clob:c
94 vcall_reg: src1:i len:64 clob:c
95 vcall_membase: src1:b len:64 clob:c
97 i8const: dest:i len:64
98 r4const: dest:f len:64
99 r8const: dest:f len:64
100 store_membase_imm: dest:b len:64
101 store_membase_reg: dest:b src1:i len:64
102 storei1_membase_imm: dest:b len:64
103 storei1_membase_reg: dest:b src1:i len:64
104 storei2_membase_imm: dest:b len:64
105 storei2_membase_reg: dest:b src1:i len:64
106 storei4_membase_imm: dest:b len:64
107 storei4_membase_reg: dest:b src1:i len:64
108 storei8_membase_imm: dest:b len:64 len:64
109 storei8_membase_reg: dest:b src1:i len:64
110 storer4_membase_reg: dest:b src1:f len:64
111 storer8_membase_reg: dest:b src1:f len:64
112 load_membase: dest:i src1:b len:64
113 loadi1_membase: dest:i src1:b len:64
114 loadu1_membase: dest:i src1:b len:64
115 loadi2_membase: dest:i src1:b len:64
116 loadu2_membase: dest:i src1:b len:64
117 loadi4_membase: dest:i src1:b len:64
118 loadu4_membase: dest:i src1:b len:64
119 loadi8_membase: dest:i src1:b len:64
120 loadr4_membase: dest:f src1:b len:64
121 loadr8_membase: dest:f src1:b len:64
122 loadu4_mem: dest:i len:8
123 move: dest:i src1:i len:4
124 add_imm: dest:i src1:i len:64
125 addcc_imm: dest:i src1:i len:64
126 sub_imm: dest:i src1:i len:64
127 subcc_imm: dest:i src1:i len:64
128 mul_imm: dest:i src1:i len:64
129 div_imm: dest:a src1:i src2:i len:64
130 div_un_imm: dest:a src1:i src2:i len:64
131 rem_imm: dest:d src1:i src2:i len:64
132 rem_un_imm: dest:d src1:i src2:i len:64
133 and_imm: dest:i src1:i len:64
134 or_imm: dest:i src1:i len:64
135 xor_imm: dest:i src1:i len:64
136 shl_imm: dest:i src1:i len:64
137 shr_imm: dest:i src1:i len:64
138 shr_un_imm: dest:i src1:i len:64
140 cond_exc_ne_un: len:64
142 cond_exc_lt_un: len:64
144 cond_exc_gt_un: len:64
146 cond_exc_ge_un: len:64
148 cond_exc_le_un: len:64
163 float_add: dest:f src1:f src2:f len:4
164 float_sub: dest:f src1:f src2:f len:4
165 float_mul: dest:f src1:f src2:f len:4
166 float_div: dest:f src1:f src2:f len:4
167 float_div_un: dest:f src1:f src2:f len:4
168 float_rem: dest:f src1:f src2:f len:64
169 float_rem_un: dest:f src1:f src2:f len:64
170 float_neg: dest:f src1:f len:4
171 float_not: dest:f src1:f len:4
172 float_conv_to_i1: dest:i src1:f len:40
173 float_conv_to_i2: dest:i src1:f len:40
174 float_conv_to_i4: dest:i src1:f len:40
175 float_conv_to_i8: dest:L src1:f len:40
176 float_conv_to_r4: dest:f src1:f len:8
177 float_conv_to_u4: dest:i src1:f len:40
178 float_conv_to_u8: dest:L src1:f len:40
179 float_conv_to_u2: dest:i src1:f len:40
180 float_conv_to_u1: dest:i src1:f len:40
181 float_conv_to_i: dest:i src1:f len:40
182 float_ceq: dest:i src1:f src2:f len:64
183 float_cgt: dest:i src1:f src2:f len:64
184 float_cgt_un: dest:i src1:f src2:f len:64
185 float_clt: dest:i src1:f src2:f len:64
186 float_clt_un: dest:i src1:f src2:f len:64
187 float_conv_to_u: dest:i src1:f len:64
189 aot_const: dest:i len:64
190 adc: dest:i src1:i src2:i len:4
191 addcc: dest:i src1:i src2:i len:4
192 subcc: dest:i src1:i src2:i len:4
193 adc_imm: dest:i src1:i len:64
194 sbb: dest:i src1:i src2:i len:4
195 sbb_imm: dest:i src1:i len:64
197 bigmul: len:2 dest:L src1:a src2:i
198 bigmul_un: len:2 dest:L src1:a src2:i
199 fmove: dest:f src1:f len:8
202 int_add: dest:i src1:i src2:i len:64
203 int_sub: dest:i src1:i src2:i len:64
204 int_mul: dest:i src1:i src2:i len:64
205 int_div: dest:i src1:i src2:i len:64
206 int_div_un: dest:i src1:i src2:i len:64
207 int_rem: dest:i src1:i src2:i len:64
208 int_rem_un: dest:i src1:i src2:i len:64
209 int_and: dest:i src1:i src2:i len:64
210 int_or: dest:i src1:i src2:i len:64
211 int_xor: dest:i src1:i src2:i len:64
212 int_shl: dest:i src1:i src2:i len:64
213 int_shr: dest:i src1:i src2:i len:64
214 int_shr_un: dest:i src1:i src2:i len:64
215 int_adc: dest:i src1:i src2:i len:64
216 int_adc_imm: dest:i src1:i len:64
217 int_sbb: dest:i src1:i src2:i len:64
218 int_sbb_imm: dest:i src1:i len:64
219 int_addcc: dest:i src1:i src2:i len:64
220 int_subcc: dest:i src1:i src2:i len:64
221 int_add_imm: dest:i src1:i len:64
222 int_sub_imm: dest:i src1:i len:64
223 int_mul_imm: dest:i src1:i len:64
224 int_div_imm: dest:i src1:i len:64
225 int_div_un_imm: dest:i src1:i len:64
226 int_rem_imm: dest:i src1:i len:64
227 int_rem_un_imm: dest:i src1:i len:64
228 int_and_imm: dest:i src1:i len:64
229 int_or_imm: dest:i src1:i len:64
230 int_xor_imm: dest:i src1:i len:64
231 int_shl_imm: dest:i src1:i len:64
232 int_shr_imm: dest:i src1:i len:64
233 int_shr_un_imm: dest:i src1:i len:64
234 int_mul_ovf: dest:i src1:i src2:i len:64
235 int_mul_ovf_un: dest:i src1:i src2:i len:64
236 int_conv_to_i1: dest:i src1:i len:8
237 int_conv_to_i2: dest:i src1:i len:8
238 int_conv_to_i4: dest:i src1:i len:4
239 int_conv_to_i8: dest:i src1:i len:4
240 int_conv_to_r4: dest:f src1:i len:64
241 int_conv_to_r8: dest:f src1:i len:64
242 int_conv_to_u4: dest:i src1:i len:4
243 int_conv_to_u8: dest:i src1:i len:4
244 int_conv_to_u2: dest:i src1:i len:8
245 int_conv_to_u1: dest:i src1:i len:4
246 int_conv_to_i: dest:i src1:i len:4
247 int_neg: dest:i src1:i len:64
248 int_not: dest:i src1:i len:64
249 int_ceq: dest:i len:64
250 int_cgt: dest:i len:64
251 int_cgt_un: dest:i len:64
252 int_clt: dest:i len:64
253 int_clt_un: dest:i len:64
266 long_shl: dest:i src1:i src2:i len:64
267 long_shr: dest:i src1:i src2:i len:64
268 long_shr_un: dest:i src1:i src2:i len:64
269 long_conv_to_ovf_i: dest:i src1:i src2:i len:48
271 long_conv_to_r_un: dest:f src1:i src2:i len:64
272 long_shr_imm: dest:i src1:i len:64
273 long_shr_un_imm: dest:i src1:i len:64
274 long_shl_imm: dest:i src1:i len:64
276 memory_barrier: len:4
278 sparc_brz: src1:i len: 8
279 sparc_brlez: src1:i len: 8
280 sparc_brlz: src1:i len: 8
281 sparc_brnz: src1:i len: 8
282 sparc_brgz: src1:i len: 8
283 sparc_brgez: src1:i len: 8
284 sparc_cond_exc_eqz: src1:i len:64
285 sparc_cond_exc_nez: src1:i len:64
286 sparc_cond_exc_ltz: src1:i len:64
287 sparc_cond_exc_gtz: src1:i len:64
288 sparc_cond_exc_gez: src1:i len:64
289 sparc_cond_exc_lez: src1:i len:64
298 not_null: src1:i len:0
300 jump_table: dest:i len:64
303 cond_exc_ine_un: len:64
305 cond_exc_ilt_un: len:64
307 cond_exc_igt_un: len:64
309 cond_exc_ige_un: len:64
311 cond_exc_ile_un: len:64
317 long_conv_to_ovf_i4_2: dest:i src1:i src2:i len:48
319 vcall2: len:40 clob:c
320 vcall2_reg: src1:i len:64 clob:c
321 vcall2_membase: src1:b len:64 clob:c