1 # S/390 cpu description file
2 # this file is read by genmdesc to pruduce a table with all the relevant information
3 # about the cpu instructions that may be used by the regsiter allocator, the scheduler
4 # and other parts of the arch-dependent part of mini.
6 # An opcode name is followed by a colon and optional specifiers.
7 # A specifier has a name, a colon and a value. Specifiers are separated by white space.
8 # Here is a description of the specifiers valid for this file and their possible values.
10 # dest:register describes the destination register of an instruction
11 # src1:register describes the first source register of an instruction
12 # src2:register describes the second source register of an instruction
14 # register may have the following values:
16 # a r3 register (output from calls)
17 # b base register (used in address references)
18 # f floating point register
20 # len:number describe the maximun length in bytes of the instruction
21 # number is a positive integer
23 # cost:number describe how many cycles are needed to complete the instruction (unused)
25 # clob:spec describe if the instruction clobbers registers or has special needs
27 # spec can be one of the following characters:
28 # c clobbers caller-save registers
29 # r 'reserves' the destination register until a later instruction unreserves it
30 # used mostly to set output registers in function calls
32 # flags:spec describe if the instruction uses or sets the flags (unused)
34 # spec can be one of the following chars:
37 # m uses and modifies the flags
39 # res:spec describe what units are used in the processor (unused)
41 # delay: describe delay slots (unused)
43 # the required specifiers are: len, clob (if registers are clobbered), the registers
44 # specifiers if the registers are actually used, flags (when scheduling is implemented).
46 # See the code in mini-x86.c for more details on how the specifiers are used.
49 adc: dest:i src1:i src2:i len:6
50 adc_imm: dest:i src1:i len:14
51 add_imm: dest:i src1:i len:24
52 add_ovf_carry: dest:i src1:1 src2:i len:28
53 add_ovf_un_carry: dest:i src1:1 src2:i len:12
54 addcc: dest:i src1:i src2:i len:12
55 and_imm: dest:i src1:i len:24
56 aot_const: dest:i len:8
57 atomic_add_i4: src1:b src2:i dest:i len:28
58 atomic_add_i8: src1:b src2:i dest:i len:30
59 atomic_exchange_i4: src1:b src2:i dest:i len:18
60 atomic_exchange_i8: src1:b src2:i dest:i len:24
64 call: dest:o clob:c len:26
65 call_handler: len:12 clob:c
66 call_membase: dest:o src1:b len:12 clob:c
67 call_reg: dest:o src1:i len:8 clob:c
71 checkthis: src1:b len:16
72 ckfinite: dest:f src1:f len:22
75 compare: src1:i src2:i len:4
76 compare_imm: src1:i len:20
91 div_imm: dest:i src1:i src2:i len:24
92 div_un_imm: dest:i src1:i src2:i len:24
94 fcall: dest:g len:26 clob:c
95 fcall_membase: dest:g src1:b len:14 clob:c
96 fcall_reg: dest:g src1:i len:10 clob:c
97 fcompare: src1:f src2:f len:14
98 float_add: dest:f src1:f src2:f len:6
109 float_ceq: dest:i src1:f src2:f len:16
110 float_cgt: dest:i src1:f src2:f len:16
111 float_cgt_un: dest:i src1:f src2:f len:16
112 float_clt: dest:i src1:f src2:f len:16
113 float_clt_un: dest:i src1:f src2:f len:16
114 float_conv_to_i1: dest:i src1:f len:50
115 float_conv_to_i2: dest:i src1:f len:50
116 float_conv_to_i4: dest:i src1:f len:50
117 float_conv_to_i8: dest:l src1:f len:50
118 float_conv_to_i: dest:i src1:f len:52
119 float_conv_to_r4: dest:f src1:f len:8
120 float_conv_to_u1: dest:i src1:f len:72
121 float_conv_to_u2: dest:i src1:f len:72
122 float_conv_to_u4: dest:i src1:f len:72
123 float_conv_to_u8: dest:i src1:f len:72
124 float_conv_to_u: dest:i src1:f len:36
125 float_div: dest:f src1:f src2:f len:6
126 float_div_un: dest:f src1:f src2:f len:6
127 float_mul: dest:f src1:f src2:f len:6
128 float_neg: dest:f src1:f len:6
129 float_not: dest:f src1:f len:6
130 float_rem: dest:f src1:f src2:f len:16
131 float_rem_un: dest:f src1:f src2:f len:16
132 float_sub: dest:f src1:f src2:f len:6
133 fmove: dest:f src1:f len:4
134 i8const: dest:i len:20
135 icompare: src1:i src2:i len:4
136 icompare_imm: src1:i len:18
137 iconst: dest:i len:40
140 lcall: dest:o len:22 clob:c
141 lcall_membase: dest:o src1:b len:12 clob:c
142 lcall_reg: dest:o src1:i len:8 clob:c
143 lcompare: src1:i src2:i len:4
144 load_membase: dest:i src1:b len:30
145 loadi1_membase: dest:i src1:b len:40
146 loadi2_membase: dest:i src1:b len:30
147 loadi4_membase: dest:i src1:b len:30
148 loadi8_membase: dest:i src1:b len:30
149 loadr4_membase: dest:f src1:b len:28
150 loadr8_membase: dest:f src1:b len:28
151 loadu1_membase: dest:i src1:b len:30
152 loadu2_membase: dest:i src1:b len:30
153 loadu4_mem: dest:i len:8
154 loadu4_membase: dest:i src1:b len:30
155 localloc: dest:i src1:i len:106
156 memory_barrier: len: 10
157 move: dest:i src1:i len:4
158 mul_imm: dest:i src1:i len:24
161 oparglist: src1:i len:28
162 bigmul: len:2 dest:i src1:a src2:i
163 bigmul_un: len:2 dest:i src1:a src2:i
164 endfilter: src1:i len:28
165 rethrow: src1:i len:26
166 or_imm: dest:i src1:i len:24
167 r4const: dest:f len:26
168 r8const: dest:f len:24
169 rem_imm: dest:i src1:i src2:i len:24
170 rem_un_imm: dest:i src1:i src2:i len:24
171 s390_bkchain: len: 8 dest:i src1:i
172 s390_move: len:48 dest:b src1:b
173 s390_setf4ret: dest:f src1:f len:4
174 sbb: dest:i src1:i src2:i len:6
175 sbb_imm: dest:i src1:i len:14
177 sext_i4: dest:i src1:i len:4
178 zext_i4: dest:i src1:i len:4
179 shl_imm: dest:i src1:i len:10
180 shr_imm: dest:i src1:i len:10
181 shr_un_imm: dest:i src1:i len:10
182 sqrt: dest:f src1:f len:4
183 start_handler: len:26
184 store_membase_imm: dest:b len:46
185 store_membase_reg: dest:b src1:i len:26
186 storei1_membase_imm: dest:b len:46
187 storei1_membase_reg: dest:b src1:i len:26
188 storei2_membase_imm: dest:b len:46
189 storei2_membase_reg: dest:b src1:i len:26
190 storei4_membase_imm: dest:b len:46
191 storei4_membase_reg: dest:b src1:i len:26
192 storei8_membase_imm: dest:b len:46
193 storei8_membase_reg: dest:b src1:i len:26
194 storer4_membase_reg: dest:b src1:f len:28
195 storer8_membase_reg: dest:b src1:f len:24
196 sub_imm: dest:i src1:i len:18
197 sub_ovf_carry: dest:i src1:1 src2:i len:28
198 sub_ovf_un_carry: dest:i src1:1 src2:i len:12
199 subcc: dest:i src1:i src2:i len:12
201 tls_get: len:40 dest:i
203 vcall_membase: src1:b len:12 clob:c
204 vcall_reg: src1:i len:8 clob:c
205 voidcall: len:22 clob:c
206 voidcall_membase: src1:b len:12 clob:c
207 voidcall_reg: src1:i len:8 clob:c
208 xor_imm: dest:i src1:i len:20
211 int_adc: dest:i src1:i src2:i len:12
212 int_adc_imm: dest:i src1:i len:14
213 int_addcc: dest:i src1:i src2:i len:12
214 int_add: dest:i src1:i src2:i len:12
215 int_add_imm: dest:i src1:i len:20
216 int_and: dest:i src1:i src2:i len:12
217 int_and_imm: dest:i src1:i len:24
228 int_ceq: dest:i len:12
229 int_cgt: dest:i len:12
230 int_cgt_un: dest:i len:12
231 int_clt: dest:i len:12
232 int_clt_un: dest:i len:12
233 int_div: dest:a src1:i src2:i len:16
234 int_div_imm: dest:a src1:i len:24
235 int_div_un: dest:a src1:i src2:i len:16
236 int_div_un_imm: dest:a src1:i len:24
237 int_mul: dest:i src1:i src2:i len:16
238 int_mul_imm: dest:i src1:i len:24
239 int_mul_ovf: dest:i src1:i src2:i len:44
240 int_mul_ovf_un: dest:i src1:i src2:i len:22
241 int_add_ovf: dest:i src1:i src2:i len:32
242 int_add_ovf_un: dest:i src1:i src2:i len:32
243 int_sub_ovf: dest:i src1:i src2:i len:32
244 int_sub_ovf_un: dest:i src1:i src2:i len:32
245 int_neg: dest:i src1:i len:12
246 int_not: dest:i src1:i len:12
247 int_or: dest:i src1:i src2:i len:12
248 int_or_imm: dest:i src1:i len:24
249 int_rem: dest:d src1:i src2:i len:16
250 int_rem_imm: dest:d src1:i len:24
251 int_rem_un: dest:d src1:i src2:i len:16
252 int_rem_un_imm: dest:d src1:i len:24
253 int_sbb: dest:i src1:i src2:i len:6
254 int_sbb_imm: dest:i src1:i len:14
255 int_shl: dest:i src1:i src2:i clob:s len:12
256 int_shl_imm: dest:i src1:i len:10
257 int_shr: dest:i src1:i src2:i clob:s len:12
258 int_shr_imm: dest:i src1:i len:10
259 int_shr_un: dest:i src1:i src2:i clob:s len:12
260 int_shr_un_imm: dest:i src1:i len:10
261 int_subcc: dest:i src1:i src2:i len:12
262 int_sub: dest:i src1:i src2:i len:12
263 int_sub_imm: dest:i src1:i len:20
264 int_xor: dest:i src1:i src2:i len:12
265 int_xor_imm: dest:i src1:i len:24
266 int_conv_to_r4: dest:f src1:i len:16
267 int_conv_to_r8: dest:f src1:i len:16
270 long_add: dest:i src1:i src2:i len:12
271 long_sub: dest:i src1:i src2:i len:12
272 long_add_ovf: dest:i src1:i src2:i len:32
273 long_add_ovf_un: dest:i src1:i src2:i len:32
274 long_div: dest:i src1:i src2:i len:12
275 long_div_un: dest:i src1:i src2:i len:16
276 long_mul: dest:i src1:i src2:i len:12
277 long_mul_imm: dest:i src1:i len:20
278 long_mul_ovf: dest:i src1:i src2:i len:56
279 long_mul_ovf_un: dest:i src1:i src2:i len:64
280 long_and: dest:i src1:i src2:i len:8
281 long_or: dest:i src1:i src2:i len:8
282 long_xor: dest:i src1:i src2:i len:8
283 long_neg: dest:i src1:i len:6
284 long_not: dest:i src1:i len:12
285 long_rem: dest:i src1:i src2:i len:12
286 long_rem_un: dest:i src1:i src2:i len:16
287 long_shl: dest:i src1:i src2:i len:14
288 long_shl_imm: dest:i src1:i len:14
289 long_shr_un: dest:i src1:i src2:i len:14
290 long_shr: dest:i src1:i src2:i len:14
291 long_shr_imm: dest:i src1:i len:14
292 long_shr_un_imm: dest:i src1:i len:14
293 long_sub_imm: dest:i src1:i len:16
294 long_sub_ovf: dest:i src1:i src2:i len:16
295 long_sub_ovf_un: dest:i src1:i src2:i len:28
297 long_conv_to_i1: dest:i src1:i len:12
298 long_conv_to_i2: dest:i src1:i len:12
299 long_conv_to_i4: dest:i src1:i len:4
300 long_conv_to_i8: dest:i src1:i len:4
301 long_conv_to_i: dest:i src1:i len:4
302 long_conv_to_ovf_i: dest:i src1:i src2:i len:44
303 long_conv_to_ovf_i4_un: dest:i src1:i len:50
304 long_conv_to_ovf_u4: dest:i src1:i len:48
305 long_conv_to_ovf_u8_un: dest:i src1:i len:4
306 long_conv_to_r4: dest:f src1:i len:16
307 long_conv_to_r8: dest:f src1:i len:16
308 long_conv_to_u1: dest:i src1:i len:16
309 long_conv_to_u2: dest:i src1:i len:24
310 long_conv_to_u4: dest:i src1:i len:4
311 long_conv_to_u8: dest:i src1:i len:4
312 long_conv_to_u: dest:i src1:i len:4
313 long_conv_to_r_un: dest:f src1:i len:37
327 dummy_use: src1:i len:0
330 not_null: src1:i len:0
332 jump_table: dest:i len:24
334 int_conv_to_i1: dest:i src1:i len:12
335 int_conv_to_i2: dest:i src1:i len:12
336 int_conv_to_i4: dest:i src1:i len:2
337 int_conv_to_i: dest:i src1:i len:2
338 int_conv_to_u1: dest:i src1:i len:10
339 int_conv_to_u2: dest:i src1:i len:16
340 int_conv_to_u4: dest:i src1:i
341 int_conv_to_r_un: dest:f src1:i len:37
346 cond_exc_ige_un: len:8
348 cond_exc_igt_un: len:8
350 cond_exc_ile_un: len:8
352 cond_exc_ilt_un: len:8
354 cond_exc_ine_un: len:8
358 lcompare_imm: src1:i len:20
360 long_add_imm: dest:i src1:i len:20
362 long_ceq: dest:i len:12
363 long_cgt_un: dest:i len:12
364 long_cgt: dest:i len:12
365 long_clt_un: dest:i len:12
366 long_clt: dest:i len:12
368 vcall2: len:22 clob:c
369 vcall2_membase: src1:b len:12 clob:c
370 vcall2_reg: src1:i len:8 clob:c
372 s390_int_add_ovf: len:32 dest:i src1:i src2:i
373 s390_int_add_ovf_un: len:32 dest:i src1:i src2:i
374 s390_int_sub_ovf: len:32 dest:i src1:i src2:i
375 s390_int_sub_ovf_un: len:32 dest:i src1:i src2:i
377 s390_long_add_ovf: dest:i src1:i src2:i len:32
378 s390_long_add_ovf_un: dest:i src1:i src2:i len:32
379 s390_long_sub_ovf: dest:i src1:i src2:i len:32
380 s390_long_sub_ovf_un: dest:i src1:i src2:i len:32
382 gc_liveness_def: len:0
383 gc_liveness_use: len:0
384 gc_spill_slot_liveness_def: len:0
385 gc_param_slot_liveness_def: len:0