1 # S/390 cpu description file
2 # this file is read by genmdesc to pruduce a table with all the relevant information
3 # about the cpu instructions that may be used by the regsiter allocator, the scheduler
4 # and other parts of the arch-dependent part of mini.
6 # An opcode name is followed by a colon and optional specifiers.
7 # A specifier has a name, a colon and a value. Specifiers are separated by white space.
8 # Here is a description of the specifiers valid for this file and their possible values.
10 # dest:register describes the destination register of an instruction
11 # src1:register describes the first source register of an instruction
12 # src2:register describes the second source register of an instruction
14 # register may have the following values:
16 # a r3 register (output from calls)
17 # b base register (used in address references)
18 # f floating point register
20 # len:number describe the maximun length in bytes of the instruction
21 # number is a positive integer
23 # cost:number describe how many cycles are needed to complete the instruction (unused)
25 # clob:spec describe if the instruction clobbers registers or has special needs
27 # spec can be one of the following characters:
28 # c clobbers caller-save registers
29 # r 'reserves' the destination register until a later instruction unreserves it
30 # used mostly to set output registers in function calls
32 # flags:spec describe if the instruction uses or sets the flags (unused)
34 # spec can be one of the following chars:
37 # m uses and modifies the flags
39 # res:spec describe what units are used in the processor (unused)
41 # delay: describe delay slots (unused)
43 # the required specifiers are: len, clob (if registers are clobbered), the registers
44 # specifiers if the registers are actually used, flags (when scheduling is implemented).
46 # See the code in mini-x86.c for more details on how the specifiers are used.
49 adc: dest:i src1:i src2:i len:6
50 adc_imm: dest:i src1:i len:14
51 add.ovf.un: len: 8 dest:i src1:i src2:i
52 add.ovf: len: 24 dest:i src1:i src2:i
53 add: dest:i src1:i src2:i len:4 clob:1
54 add_imm: dest:i src1:i len:18
55 add_ovf_carry: dest:i src1:1 src2:i len:28
56 add_ovf_un_carry: dest:i src1:1 src2:i len:12
57 addcc: dest:i src1:i src2:i len:6
58 and: dest:i src1:i src2:i len:6 clob:1
59 and_imm: dest:i src1:i len:16
60 aot_const: dest:i len:8
92 call: dest:a clob:c len:6
94 call_membase: dest:a src1:b len:12 clob:c
95 call_reg: dest:a src1:i len:8 clob:c
100 cgt.un: dest:i len:12
102 checkthis: src1:b len:4
103 ckfinite: dest:f src1:f len:22
104 clt.un: dest:i len:12
106 compare: src1:i src2:i len:4
107 compare_imm: src1:i len:14
111 cond_exc_ge_un: len:8
113 cond_exc_gt_un: len:8
115 cond_exc_le_un: len:8
117 cond_exc_lt_un: len:8
119 cond_exc_ne_un: len:8
122 conv.i1: dest:i src1:i len:22
123 conv.i2: dest:i src1:i len:22
124 conv.i4: dest:i src1:i len:2
126 conv.i: dest:i src1:i len:2
147 conv.r.un: dest:f src1:i len:30
148 conv.r4: dest:f src1:i len:4
149 conv.r8: dest:f src1:i len:4
150 conv.u1: dest:i src1:i len:8
151 conv.u2: dest:i src1:i len:14
152 conv.u4: dest:i src1:i
154 conv.u: dest:i src1:i len:4
157 div.un: dest:a src1:i src2:i len:12 clob:d
158 div: dest:a src1:i src2:i len:10 clob:d
159 div_imm: dest:i src1:i src2:i len:24
160 div_un_imm: dest:i src1:i src2:i len:24
165 fcall: dest:f len:10 clob:c
166 fcall_membase: dest:f src1:b len:14 clob:c
167 fcall_reg: dest:f src1:i len:10 clob:c
168 fcompare: src1:f src2:f len:14
169 float_add: dest:f src1:f src2:f len:6
182 float_ceq: dest:i src1:f src2:f len:16
183 float_cgt: dest:i src1:f src2:f len:16
184 float_cgt_un: dest:i src1:f src2:f len:16
185 float_clt: dest:i src1:f src2:f len:16
186 float_clt_un: dest:i src1:f src2:f len:16
187 float_conv_to_i1: dest:i src1:f len:50
188 float_conv_to_i2: dest:i src1:f len:50
189 float_conv_to_i4: dest:i src1:f len:50
190 float_conv_to_i8: dest:l src1:f len:50
191 float_conv_to_i: dest:i src1:f len:52
193 float_conv_to_ovf_i1:
194 float_conv_to_ovf_i1_un:
195 float_conv_to_ovf_i2:
196 float_conv_to_ovf_i2_un:
197 float_conv_to_ovf_i4:
198 float_conv_to_ovf_i4_un:
199 float_conv_to_ovf_i8:
200 float_conv_to_ovf_i8_un:
202 float_conv_to_ovf_i_un:
203 float_conv_to_ovf_u1:
204 float_conv_to_ovf_u1_un:
205 float_conv_to_ovf_u2:
206 float_conv_to_ovf_u2_un:
207 float_conv_to_ovf_u4:
208 float_conv_to_ovf_u4_un:
209 float_conv_to_ovf_u8:
210 float_conv_to_ovf_u8_un:
211 float_conv_to_ovf_u_un:
212 float_conv_to_r4: dest:f src1:f len:4
214 float_conv_to_u1: dest:i src1:f len:52
215 float_conv_to_u2: dest:i src1:f len:52
216 float_conv_to_u4: dest:i src1:f len:52
217 float_conv_to_u8: dest:l src1:f len:52
218 float_conv_to_u: dest:i src1:f len:36
219 float_div: dest:f src1:f src2:f len:6
220 float_div_un: dest:f src1:f src2:f len:6
221 float_mul: dest:f src1:f src2:f len:6
224 float_neg: dest:f src1:f len:6
225 float_not: dest:f src1:f len:6
226 float_rem: dest:f src1:f src2:f len:16
227 float_rem_un: dest:f src1:f src2:f len:16
228 float_sub: dest:f src1:f src2:f len:6
231 fmove: dest:f src1:f len:4
233 iconst: dest:i len:16
240 lcall: dest:l len:8 clob:c
241 lcall_membase: dest:l src1:b len:12 clob:c
242 lcall_reg: dest:l src1:i len:8 clob:c
283 ldind.i1: dest:i len:8
284 ldind.i2: dest:i len:8
285 ldind.i4: dest:i len:8
287 ldind.i: dest:i len:8
290 ldind.ref: dest:i len:8
291 ldind.u1: dest:i len:8
292 ldind.u2: dest:i len:8
293 ldind.u4: dest:i len:8
313 load_membase: dest:i src1:b len:18
314 loadi1_membase: dest:i src1:b len:40
315 loadi2_membase: dest:i src1:b len:22
316 loadi4_membase: dest:i src1:b len:18
317 loadi8_membase: dest:i src1:b
318 loadr4_membase: dest:f src1:b len:18
319 loadr8_membase: dest:f src1:b len:18
320 loadu1_membase: dest:i src1:b len:26
321 loadu2_membase: dest:i src1:b len:26
322 loadu4_mem: dest:i len:8
323 loadu4_membase: dest:i src1:b len:18
325 localloc: dest:i src1:i len:40
352 long_conv_to_ovf_i1_un:
354 long_conv_to_ovf_i2_un:
356 long_conv_to_ovf_i4_un:
358 long_conv_to_ovf_i8_un:
359 long_conv_to_ovf_i: dest:i src1:i src2:i len:44
360 long_conv_to_ovf_i_un:
362 long_conv_to_ovf_u1_un:
364 long_conv_to_ovf_u2_un:
366 long_conv_to_ovf_u4_un:
368 long_conv_to_ovf_u8_un:
370 long_conv_to_ovf_u_un:
373 long_conv_to_r_un: dest:f src1:i src2:i len:37
382 long_mul_ovf: len: 18
383 long_mul_ovf_un: len: 18
406 move: dest:i src1:i len:4
407 mul.ovf.un: dest:i src1:i src2:i len:20 clob:1
408 mul.ovf: dest:i src1:i src2:i len:42 clob:1
409 mul: dest:i src1:i src2:i len:4 clob:1
410 mul_imm: dest:i src1:i len:18
411 neg: dest:i src1:i len:4 clob:1
415 not: dest:i src1:i len:8 clob:1
416 op_bigmul: len:2 dest:l src1:a src2:i
417 op_bigmul_un: len:2 dest:l src1:a src2:i
418 op_endfilter: src1:i len:12
419 or: dest:i src1:i src2:i len:4 clob:1
420 or_imm: dest:i src1:i len:16
433 r4const: dest:f len:22
434 r8const: dest:f len:18
440 rem.un: dest:d src1:i src2:i len:12 clob:d
441 rem: dest:d src1:i src2:i len:10 clob:d
442 rem_imm: dest:i src1:i src2:i len:24
443 rem_un_imm: dest:i src1:i src2:i len:24
448 s390_move: len:48 dest:b src1:b
449 sbb: dest:i src1:i src2:i len:6
450 sbb_imm: dest:i src1:i len:14
451 setfreg: dest:f src1:f len:4 clob:r
452 setlret: src1:i src2:i len:12
453 setreg: dest:i src1:i len:4 clob:r
454 setregimm: dest:i len:16 clob:r
455 setret: dest:a src1:i len:4
456 shl: dest:i src1:i src2:i clob:s len:6
457 shl_imm: dest:i src1:i len:8
458 shr.un: dest:i src1:i src2:i clob:s len:6
459 shr: dest:i src1:i src2:i clob:s len:6
460 shr_imm: dest:i src1:i len:8
461 shr_un_imm: dest:i src1:i len:8
463 sqrt: dest:f src1:f len:4
466 start_handler: len:18
476 stind.i1: src1:b src2:i
477 stind.i2: src1:b src2:i
478 stind.i4: src1:b src2:i
481 stind.r4: src1:b src2:f
482 stind.r8: src1:b src2:f
483 stind.ref: src1:b src2:i
492 store_membase_imm: dest:b len:32
493 store_membase_reg: dest:b src1:i len:18
494 storei1_membase_imm: dest:b len:32
495 storei1_membase_reg: dest:b src1:i len:18
496 storei2_membase_imm: dest:b len:32
497 storei2_membase_reg: dest:b src1:i len:18
498 storei4_membase_imm: dest:b len:32
499 storei4_membase_reg: dest:b src1:i len:18
500 storei8_membase_imm: dest:b
501 storei8_membase_reg: dest:b src1:i
502 storer4_membase_reg: dest:b src1:f len:20
503 storer8_membase_reg: dest:b src1:f len:20
505 sub.ovf.un: len:10 dest:i src1:i src2:i
506 sub.ovf: len:24 dest:i src1:i src2:i
507 sub: dest:i src1:i src2:i len:4 clob:1
508 sub_imm: dest:i src1:i len:18
509 sub_ovf_carry: dest:i src1:1 src2:i len:28
510 sub_ovf_un_carry: dest:i src1:1 src2:i len:12
511 subcc: dest:i src1:i src2:i len:6
519 vcall_membase: src1:b len:12 clob:c
520 vcall_reg: src1:i len:8 clob:c
521 voidcall: len:8 clob:c
522 voidcall_membase: src1:b len:12 clob:c
523 voidcall_reg: src1:i len:8 clob:c
525 xor: dest:i src1:i src2:i len:4 clob:1
526 xor_imm: dest:i src1:i len:16