1 # S/390 64-bit cpu description file
2 # this file is read by genmdesc to pruduce a table with all the relevant information
3 # about the cpu instructions that may be used by the regsiter allocator, the scheduler
4 # and other parts of the arch-dependent part of mini.
6 # An opcode name is followed by a colon and optional specifiers.
7 # A specifier has a name, a colon and a value. Specifiers are separated by white space.
8 # Here is a description of the specifiers valid for this file and their possible values.
10 # dest:register describes the destination register of an instruction
11 # src1:register describes the first source register of an instruction
12 # src2:register describes the second source register of an instruction
14 # register may have the following values:
16 # a r3 register (output from calls)
17 # b base register (used in address references)
18 # f floating point register
20 # len:number describe the maximun length in bytes of the instruction
21 # number is a positive integer
23 # cost:number describe how many cycles are needed to complete the instruction (unused)
25 # clob:spec describe if the instruction clobbers registers or has special needs
27 # spec can be one of the following characters:
28 # c clobbers caller-save registers
29 # r 'reserves' the destination register until a later instruction unreserves it
30 # used mostly to set output registers in function calls
32 # flags:spec describe if the instruction uses or sets the flags (unused)
34 # spec can be one of the following chars:
37 # m uses and modifies the flags
39 # res:spec describe what units are used in the processor (unused)
41 # delay: describe delay slots (unused)
43 # the required specifiers are: len, clob (if registers are clobbered), the registers
44 # specifiers if the registers are actually used, flags (when scheduling is implemented).
46 # See the code in mini-x86.c for more details on how the specifiers are used.
49 adc: dest:i src1:i src2:i len:6
50 adc_imm: dest:i src1:i len:18
51 add.ovf.un: len: 10 dest:i src1:i src2:i
52 add.ovf: len: 24 dest:i src1:i src2:i
53 add: dest:i src1:i src2:i len:6
54 add_imm: dest:i src1:i len:18
55 addcc_imm: dest:i src1:i len:18
56 add_ovf_carry: dest:i src1:1 src2:i len:28
57 add_ovf_un_carry: dest:i src1:1 src2:i len:28
58 addcc: dest:i src1:i src2:i len:6
59 and: dest:i src1:i src2:i len:6
60 and_imm: dest:i src1:i len:16
61 aot_const: dest:i len:8
62 atomic_add_i4: src1:b src2:i dest:i len:20
63 atomic_exchange_i4: src1:b src2:i dest:i len:20
64 atomic_add_new_i4: src1:b src2:i dest:i len:24
78 call: dest:o len:6 clob:c
80 call_membase: dest:o src1:b len:12 clob:c
81 call_reg: dest:o src1:i len:8 clob:c
85 checkthis: src1:b len:4
86 ckfinite: dest:f src1:f len:22
89 compare: src1:i src2:i len:4
90 compare_imm: src1:i len:14
100 cond_exc_lt_un: len:8
102 cond_exc_ne_un: len:8
105 conv.i1: dest:i src1:i len:26
106 conv.i2: dest:i src1:i len:26
107 conv.i4: dest:i src1:i len:2
108 conv.i: dest:i src1:i len:2
109 conv.r.un: dest:f src1:i len:30
110 conv.r4: dest:f src1:i len:4
111 conv.r8: dest:f src1:i len:4
112 conv.u1: dest:i src1:i len:8
113 conv.u2: dest:i src1:i len:16
114 conv.u4: dest:i src1:i
115 conv.u: dest:i src1:i len:4
116 div.un: dest:a src1:i src2:i len:12
117 div: dest:a src1:i src2:i len:10
118 div_imm: dest:i src1:i src2:i len:24
119 div_un_imm: dest:i src1:i src2:i len:24
121 fcall: dest:g len:10 clob:c
122 fcall_membase: dest:g src1:b len:14 clob:c
123 fcall_reg: dest:g src1:i len:10 clob:c
124 fcompare: src1:f src2:f len:14
125 float_add: dest:f src1:f src2:f len:6
136 float_ceq: dest:i src1:f src2:f len:16
137 float_cgt: dest:i src1:f src2:f len:16
138 float_cgt_un: dest:i src1:f src2:f len:16
139 float_clt: dest:i src1:f src2:f len:16
140 float_clt_un: dest:i src1:f src2:f len:16
141 float_conv_to_i1: dest:i src1:f len:50
142 float_conv_to_i2: dest:i src1:f len:50
143 float_conv_to_i4: dest:i src1:f len:50
144 float_conv_to_i8: dest:l src1:f len:50
145 float_conv_to_i: dest:i src1:f len:52
146 float_conv_to_r4: dest:f src1:f len:4
147 float_conv_to_u1: dest:i src1:f len:62
148 float_conv_to_u2: dest:i src1:f len:62
149 float_conv_to_u4: dest:i src1:f len:62
150 float_conv_to_u8: dest:l src1:f len:62
151 float_conv_to_u: dest:i src1:f len:36
152 float_div: dest:f src1:f src2:f len:6
153 float_div_un: dest:f src1:f src2:f len:6
154 float_mul: dest:f src1:f src2:f len:6
155 float_neg: dest:f src1:f len:6
156 float_not: dest:f src1:f len:6
157 float_rem: dest:f src1:f src2:f len:16
158 float_rem_un: dest:f src1:f src2:f len:16
159 float_sub: dest:f src1:f src2:f len:6
160 fmove: dest:f src1:f len:4
161 iconst: dest:i len:16
164 lcall: dest:L len:8 clob:c
165 lcall_membase: dest:L src1:b len:12 clob:c
166 lcall_reg: dest:L src1:i len:8 clob:c
167 ldind.i1: dest:i len:8
168 ldind.i2: dest:i len:8
169 ldind.i4: dest:i len:8
170 ldind.i: dest:i len:8
171 ldind.ref: dest:i len:8
172 ldind.u1: dest:i len:8
173 ldind.u2: dest:i len:8
174 ldind.u4: dest:i len:8
175 load_membase: dest:i src1:b len:18
176 loadi1_membase: dest:i src1:b len:40
177 loadi2_membase: dest:i src1:b len:24
178 loadi4_membase: dest:i src1:b len:18
179 loadi8_membase: dest:i src1:b
180 loadr4_membase: dest:f src1:b len:20
181 loadr8_membase: dest:f src1:b len:18
182 loadu1_membase: dest:i src1:b len:26
183 loadu2_membase: dest:i src1:b len:26
184 loadu4_mem: dest:i len:8
185 loadu4_membase: dest:i src1:b len:18
186 localloc: dest:i src1:i len:72
187 long_add: len: 18 dest:l src1:l src2:i clob:1
188 long_add_ovf_un: len:22 dest:l src1:l src2:i clob:1
189 long_add_ovf: len:28 dest:l src1:l src2:i clob:1
190 long_conv_to_ovf_i: dest:i src1:i src2:i len:44
191 long_conv_to_r_un: dest:f src1:i src2:i len:37
192 long_mul_ovf: len: 18
193 long_mul_ovf_un: len: 18
194 long_sub: len: 18 dest:l src1:l src2:i clob:1
195 long_sub_ovf_un: len:22 dest:l src1:l src2:i clob:1
196 long_sub_ovf: len:36 dest:l src1:l src2:i clob:1
197 memory_barrier: len: 10
198 move: dest:i src1:i len:4
199 mul.ovf.un: dest:i src1:i src2:i len:20
200 mul.ovf: dest:i src1:i src2:i len:42
201 mul: dest:i src1:i src2:i len:6
202 mul_imm: dest:i src1:i len:20
203 neg: dest:i src1:i len:4
205 not: dest:i src1:i len:8
206 bigmul: len:2 dest:l src1:a src2:i
207 bigmul_un: len:2 dest:l src1:a src2:i
208 endfilter: src1:i len:12
209 rethrow: src1:i len:8
210 oparglist: src1:i len:20
211 or: dest:i src1:i src2:i len:4
212 or_imm: dest:i src1:i len:16
215 r4const: dest:f len:22
216 r8const: dest:f len:18
217 rem.un: dest:d src1:i src2:i len:12
218 rem: dest:d src1:i src2:i len:10
219 rem_imm: dest:i src1:i src2:i len:24
220 rem_un_imm: dest:i src1:i src2:i len:24
221 s390_bkchain: len:16 dest:i src1:i
222 s390_move: len:48 dest:b src1:b
223 s390_setf4ret: dest:f src1:f len:4
224 tls_get: dest:i len:44
225 sbb: dest:i src1:i src2:i len:8
226 sbb_imm: dest:i src1:i len:18
227 setfreg: dest:f src1:f len:4
228 setlret: src1:i src2:i len:12
229 setreg: dest:i src1:i len:4
230 setregimm: dest:i len:18
231 setret: dest:a src1:i len:6
232 shl: dest:i src1:i src2:i clob:s len:8
233 shl_imm: dest:i src1:i len:8
234 shr.un: dest:i src1:i src2:i clob:s len:8
235 shr: dest:i src1:i src2:i clob:s len:8
236 shr_imm: dest:i src1:i len:8
237 shr_un_imm: dest:i src1:i len:8
238 sqrt: dest:f src1:f len:4
239 start_handler: len:18
240 stind.i1: src1:b src2:i
241 stind.i2: src1:b src2:i
242 stind.i4: src1:b src2:i
243 stind.r4: src1:b src2:f
244 stind.r8: src1:b src2:f
245 stind.ref: src1:b src2:i
246 store_membase_imm: dest:b len:32
247 store_membase_reg: dest:b src1:i len:18
248 storei1_membase_imm: dest:b len:32
249 storei1_membase_reg: dest:b src1:i len:18
250 storei2_membase_imm: dest:b len:32
251 storei2_membase_reg: dest:b src1:i len:18
252 storei4_membase_imm: dest:b len:32
253 storei4_membase_reg: dest:b src1:i len:18
254 storei8_membase_imm: dest:b
255 storei8_membase_reg: dest:b src1:i
256 storer4_membase_reg: dest:b src1:f len:22
257 storer8_membase_reg: dest:b src1:f len:22
258 sub.ovf.un: len:10 dest:i src1:i src2:i
259 sub.ovf: len:24 dest:i src1:i src2:i
260 sub: dest:i src1:i src2:i len:6
261 sub_imm: dest:i src1:i len:18
262 subcc_imm: dest:i src1:i len:18
263 sub_ovf_carry: dest:i src1:1 src2:i len:28
264 sub_ovf_un_carry: dest:i src1:1 src2:i len:28
265 subcc: dest:i src1:i src2:i len:6
268 vcall_membase: src1:b len:12 clob:c
269 vcall_reg: src1:i len:8 clob:c
270 voidcall: len:8 clob:c
271 voidcall_membase: src1:b len:12 clob:c
272 voidcall_reg: src1:i len:8 clob:c
273 xor: dest:i src1:i src2:i len:4
274 xor_imm: dest:i src1:i len:16