1 # S/390 64-bit cpu description file
2 # this file is read by genmdesc to pruduce a table with all the relevant information
3 # about the cpu instructions that may be used by the regsiter allocator, the scheduler
4 # and other parts of the arch-dependent part of mini.
6 # An opcode name is followed by a colon and optional specifiers.
7 # A specifier has a name, a colon and a value. Specifiers are separated by white space.
8 # Here is a description of the specifiers valid for this file and their possible values.
10 # dest:register describes the destination register of an instruction
11 # src1:register describes the first source register of an instruction
12 # src2:register describes the second source register of an instruction
14 # register may have the following values:
16 # a r3 register (output from calls)
17 # b base register (used in address references)
18 # f floating point register
20 # len:number describe the maximun length in bytes of the instruction
21 # number is a positive integer
23 # cost:number describe how many cycles are needed to complete the instruction (unused)
25 # clob:spec describe if the instruction clobbers registers or has special needs
27 # spec can be one of the following characters:
28 # c clobbers caller-save registers
29 # r 'reserves' the destination register until a later instruction unreserves it
30 # used mostly to set output registers in function calls
32 # flags:spec describe if the instruction uses or sets the flags (unused)
34 # spec can be one of the following chars:
37 # m uses and modifies the flags
39 # res:spec describe what units are used in the processor (unused)
41 # delay: describe delay slots (unused)
43 # the required specifiers are: len, clob (if registers are clobbered), the registers
44 # specifiers if the registers are actually used, flags (when scheduling is implemented).
46 # See the code in mini-x86.c for more details on how the specifiers are used.
49 adc: dest:i src1:i src2:i len:6
50 adc_imm: dest:i src1:i len:14
51 add.ovf.un: len: 8 dest:i src1:i src2:i
52 add.ovf: len: 24 dest:i src1:i src2:i
53 add: dest:i src1:i src2:i len:4 clob:1
54 add_imm: dest:i src1:i len:18
55 addcc_imm: dest:i src1:i len:18
56 add_ovf_carry: dest:i src1:1 src2:i len:28
57 add_ovf_un_carry: dest:i src1:1 src2:i len:12
58 addcc: dest:i src1:i src2:i len:6
59 and: dest:i src1:i src2:i len:6 clob:1
60 and_imm: dest:i src1:i len:16
61 aot_const: dest:i len:8
93 call: dest:a clob:c len:6
95 call_membase: dest:a src1:b len:12 clob:c
96 call_reg: dest:a src1:i len:8 clob:c
101 cgt.un: dest:i len:12
103 checkthis: src1:b len:4
104 ckfinite: dest:f src1:f len:22
105 clt.un: dest:i len:12
107 compare: src1:i src2:i len:4
108 compare_imm: src1:i len:14
112 cond_exc_ge_un: len:8
114 cond_exc_gt_un: len:8
116 cond_exc_le_un: len:8
118 cond_exc_lt_un: len:8
120 cond_exc_ne_un: len:8
123 conv.i1: dest:i src1:i len:24
124 conv.i2: dest:i src1:i len:24
125 conv.i4: dest:i src1:i len:2
127 conv.i: dest:i src1:i len:2
148 conv.r.un: dest:f src1:i len:30
149 conv.r4: dest:f src1:i len:4
150 conv.r8: dest:f src1:i len:4
151 conv.u1: dest:i src1:i len:8
152 conv.u2: dest:i src1:i len:14
153 conv.u4: dest:i src1:i
155 conv.u: dest:i src1:i len:4
158 div.un: dest:a src1:i src2:i len:12 clob:d
159 div: dest:a src1:i src2:i len:10 clob:d
160 div_imm: dest:i src1:i src2:i len:24
161 div_un_imm: dest:i src1:i src2:i len:24
166 fcall: dest:f len:10 clob:c
167 fcall_membase: dest:f src1:b len:14 clob:c
168 fcall_reg: dest:f src1:i len:10 clob:c
169 fcompare: src1:f src2:f len:14
170 float_add: dest:f src1:f src2:f len:6
183 float_ceq: dest:i src1:f src2:f len:16
184 float_cgt: dest:i src1:f src2:f len:16
185 float_cgt_un: dest:i src1:f src2:f len:16
186 float_clt: dest:i src1:f src2:f len:16
187 float_clt_un: dest:i src1:f src2:f len:16
188 float_conv_to_i1: dest:i src1:f len:50
189 float_conv_to_i2: dest:i src1:f len:50
190 float_conv_to_i4: dest:i src1:f len:50
191 float_conv_to_i8: dest:l src1:f len:50
192 float_conv_to_i: dest:i src1:f len:52
194 float_conv_to_ovf_i1:
195 float_conv_to_ovf_i1_un:
196 float_conv_to_ovf_i2:
197 float_conv_to_ovf_i2_un:
198 float_conv_to_ovf_i4:
199 float_conv_to_ovf_i4_un:
200 float_conv_to_ovf_i8:
201 float_conv_to_ovf_i8_un:
203 float_conv_to_ovf_i_un:
204 float_conv_to_ovf_u1:
205 float_conv_to_ovf_u1_un:
206 float_conv_to_ovf_u2:
207 float_conv_to_ovf_u2_un:
208 float_conv_to_ovf_u4:
209 float_conv_to_ovf_u4_un:
210 float_conv_to_ovf_u8:
211 float_conv_to_ovf_u8_un:
212 float_conv_to_ovf_u_un:
213 float_conv_to_r4: dest:f src1:f len:4
215 float_conv_to_u1: dest:i src1:f len:62
216 float_conv_to_u2: dest:i src1:f len:62
217 float_conv_to_u4: dest:i src1:f len:62
218 float_conv_to_u8: dest:l src1:f len:62
219 float_conv_to_u: dest:i src1:f len:36
220 float_div: dest:f src1:f src2:f len:6
221 float_div_un: dest:f src1:f src2:f len:6
222 float_mul: dest:f src1:f src2:f len:6
225 float_neg: dest:f src1:f len:6
226 float_not: dest:f src1:f len:6
227 float_rem: dest:f src1:f src2:f len:16
228 float_rem_un: dest:f src1:f src2:f len:16
229 float_sub: dest:f src1:f src2:f len:6
232 fmove: dest:f src1:f len:4
234 iconst: dest:i len:16
241 lcall: dest:l len:8 clob:c
242 lcall_membase: dest:l src1:b len:12 clob:c
243 lcall_reg: dest:l src1:i len:8 clob:c
284 ldind.i1: dest:i len:8
285 ldind.i2: dest:i len:8
286 ldind.i4: dest:i len:8
288 ldind.i: dest:i len:8
291 ldind.ref: dest:i len:8
292 ldind.u1: dest:i len:8
293 ldind.u2: dest:i len:8
294 ldind.u4: dest:i len:8
314 load_membase: dest:i src1:b len:18
315 loadi1_membase: dest:i src1:b len:40
316 loadi2_membase: dest:i src1:b len:24
317 loadi4_membase: dest:i src1:b len:18
318 loadi8_membase: dest:i src1:b
319 loadr4_membase: dest:f src1:b len:20
320 loadr8_membase: dest:f src1:b len:18
321 loadu1_membase: dest:i src1:b len:26
322 loadu2_membase: dest:i src1:b len:26
323 loadu4_mem: dest:i len:8
324 loadu4_membase: dest:i src1:b len:18
326 localloc: dest:i src1:i len:62
353 long_conv_to_ovf_i1_un:
355 long_conv_to_ovf_i2_un:
357 long_conv_to_ovf_i4_un:
359 long_conv_to_ovf_i8_un:
360 long_conv_to_ovf_i: dest:i src1:i src2:i len:44
361 long_conv_to_ovf_i_un:
363 long_conv_to_ovf_u1_un:
365 long_conv_to_ovf_u2_un:
367 long_conv_to_ovf_u4_un:
369 long_conv_to_ovf_u8_un:
371 long_conv_to_ovf_u_un:
374 long_conv_to_r_un: dest:f src1:i src2:i len:37
383 long_mul_ovf: len: 18
384 long_mul_ovf_un: len: 18
407 move: dest:i src1:i len:4
408 mul.ovf.un: dest:i src1:i src2:i len:20 clob:1
409 mul.ovf: dest:i src1:i src2:i len:42 clob:1
410 mul: dest:i src1:i src2:i len:4 clob:1
411 mul_imm: dest:i src1:i len:18
412 neg: dest:i src1:i len:4 clob:1
416 not: dest:i src1:i len:8 clob:1
417 op_bigmul: len:2 dest:l src1:a src2:i
418 op_bigmul_un: len:2 dest:l src1:a src2:i
419 op_endfilter: src1:i len:12
420 op_rethrow: src1:i len:8
421 oparglist: src1:i len:20
422 or: dest:i src1:i src2:i len:4 clob:1
423 or_imm: dest:i src1:i len:16
436 r4const: dest:f len:22
437 r8const: dest:f len:18
443 rem.un: dest:d src1:i src2:i len:12 clob:d
444 rem: dest:d src1:i src2:i len:10 clob:d
445 rem_imm: dest:i src1:i src2:i len:24
446 rem_un_imm: dest:i src1:i src2:i len:24
450 s390_move: len:48 dest:b src1:b
451 s390_setf4ret: dest:f src1:f len:4 clob:r
452 s390_tls_get: dest:i len:44
453 sbb: dest:i src1:i src2:i len:6
454 sbb_imm: dest:i src1:i len:14
455 setfreg: dest:f src1:f len:4 clob:r
456 setlret: src1:i src2:i len:12
457 setreg: dest:i src1:i len:4 clob:r
458 setregimm: dest:i len:18 clob:r
459 setret: dest:a src1:i len:6
460 shl: dest:i src1:i src2:i clob:s len:6
461 shl_imm: dest:i src1:i len:8
462 shr.un: dest:i src1:i src2:i clob:s len:6
463 shr: dest:i src1:i src2:i clob:s len:6
464 shr_imm: dest:i src1:i len:8
465 shr_un_imm: dest:i src1:i len:8
467 sqrt: dest:f src1:f len:4
470 start_handler: len:18
480 stind.i1: src1:b src2:i
481 stind.i2: src1:b src2:i
482 stind.i4: src1:b src2:i
485 stind.r4: src1:b src2:f
486 stind.r8: src1:b src2:f
487 stind.ref: src1:b src2:i
496 store_membase_imm: dest:b len:32
497 store_membase_reg: dest:b src1:i len:18
498 storei1_membase_imm: dest:b len:32
499 storei1_membase_reg: dest:b src1:i len:18
500 storei2_membase_imm: dest:b len:32
501 storei2_membase_reg: dest:b src1:i len:18
502 storei4_membase_imm: dest:b len:32
503 storei4_membase_reg: dest:b src1:i len:18
504 storei8_membase_imm: dest:b
505 storei8_membase_reg: dest:b src1:i
506 storer4_membase_reg: dest:b src1:f len:22
507 storer8_membase_reg: dest:b src1:f len:22
509 sub.ovf.un: len:10 dest:i src1:i src2:i
510 sub.ovf: len:24 dest:i src1:i src2:i
511 sub: dest:i src1:i src2:i len:4 clob:1
512 sub_imm: dest:i src1:i len:18
513 subcc_imm: dest:i src1:i len:18
514 sub_ovf_carry: dest:i src1:1 src2:i len:28
515 sub_ovf_un_carry: dest:i src1:1 src2:i len:12
516 subcc: dest:i src1:i src2:i len:6
524 vcall_membase: src1:b len:12 clob:c
525 vcall_reg: src1:i len:8 clob:c
526 voidcall: len:8 clob:c
527 voidcall_membase: src1:b len:12 clob:c
528 voidcall_reg: src1:i len:8 clob:c
530 xor: dest:i src1:i src2:i len:4 clob:1
531 xor_imm: dest:i src1:i len:16