1 # S/390 64-bit cpu description file
2 # this file is read by genmdesc to pruduce a table with all the relevant information
3 # about the cpu instructions that may be used by the regsiter allocator, the scheduler
4 # and other parts of the arch-dependent part of mini.
6 # An opcode name is followed by a colon and optional specifiers.
7 # A specifier has a name, a colon and a value. Specifiers are separated by white space.
8 # Here is a description of the specifiers valid for this file and their possible values.
10 # dest:register describes the destination register of an instruction
11 # src1:register describes the first source register of an instruction
12 # src2:register describes the second source register of an instruction
14 # register may have the following values:
16 # a r3 register (output from calls)
17 # b base register (used in address references)
18 # f floating point register
20 # len:number describe the maximun length in bytes of the instruction
21 # number is a positive integer
23 # cost:number describe how many cycles are needed to complete the instruction (unused)
25 # clob:spec describe if the instruction clobbers registers or has special needs
27 # spec can be one of the following characters:
28 # c clobbers caller-save registers
29 # r 'reserves' the destination register until a later instruction unreserves it
30 # used mostly to set output registers in function calls
32 # flags:spec describe if the instruction uses or sets the flags (unused)
34 # spec can be one of the following chars:
37 # m uses and modifies the flags
39 # res:spec describe what units are used in the processor (unused)
41 # delay: describe delay slots (unused)
43 # the required specifiers are: len, clob (if registers are clobbered), the registers
44 # specifiers if the registers are actually used, flags (when scheduling is implemented).
46 # See the code in mini-x86.c for more details on how the specifiers are used.
49 adc: dest:i src1:i src2:i len:6
50 adc_imm: dest:i src1:i len:18
51 add.ovf.un: len: 10 dest:i src1:i src2:i
52 add.ovf: len: 24 dest:i src1:i src2:i
53 add: dest:i src1:i src2:i len:6
54 add_imm: dest:i src1:i len:18
55 addcc_imm: dest:i src1:i len:18
56 add_ovf_carry: dest:i src1:1 src2:i len:28
57 add_ovf_un_carry: dest:i src1:1 src2:i len:28
58 addcc: dest:i src1:i src2:i len:6
59 and: dest:i src1:i src2:i len:6
60 and_imm: dest:i src1:i len:16
61 aot_const: dest:i len:8
64 atomic_add_i4: src1:b src2:i dest:i len:20
65 atomic_exchange_i4: src1:b src2:i dest:i len:20
66 atomic_add_new_i4: src1:b src2:i dest:i len:24
96 call: dest:o len:6 clob:c
98 call_membase: dest:o src1:b len:12 clob:c
99 call_reg: dest:o src1:i len:8 clob:c
104 cgt.un: dest:i len:12
106 checkthis: src1:b len:4
107 ckfinite: dest:f src1:f len:22
108 clt.un: dest:i len:12
110 compare: src1:i src2:i len:4
111 compare_imm: src1:i len:14
115 cond_exc_ge_un: len:8
117 cond_exc_gt_un: len:8
119 cond_exc_le_un: len:8
121 cond_exc_lt_un: len:8
123 cond_exc_ne_un: len:8
126 conv.i1: dest:i src1:i len:26
127 conv.i2: dest:i src1:i len:26
128 conv.i4: dest:i src1:i len:2
130 conv.i: dest:i src1:i len:2
151 conv.r.un: dest:f src1:i len:30
152 conv.r4: dest:f src1:i len:4
153 conv.r8: dest:f src1:i len:4
154 conv.u1: dest:i src1:i len:8
155 conv.u2: dest:i src1:i len:16
156 conv.u4: dest:i src1:i
158 conv.u: dest:i src1:i len:4
161 div.un: dest:a src1:i src2:i len:12
162 div: dest:a src1:i src2:i len:10
163 div_imm: dest:i src1:i src2:i len:24
164 div_un_imm: dest:i src1:i src2:i len:24
168 fcall: dest:g len:10 clob:c
169 fcall_membase: dest:g src1:b len:14 clob:c
170 fcall_reg: dest:g src1:i len:10 clob:c
171 fcompare: src1:f src2:f len:14
172 float_add: dest:f src1:f src2:f len:6
185 float_ceq: dest:i src1:f src2:f len:16
186 float_cgt: dest:i src1:f src2:f len:16
187 float_cgt_un: dest:i src1:f src2:f len:16
188 float_clt: dest:i src1:f src2:f len:16
189 float_clt_un: dest:i src1:f src2:f len:16
190 float_conv_to_i1: dest:i src1:f len:50
191 float_conv_to_i2: dest:i src1:f len:50
192 float_conv_to_i4: dest:i src1:f len:50
193 float_conv_to_i8: dest:l src1:f len:50
194 float_conv_to_i: dest:i src1:f len:52
196 float_conv_to_ovf_i1:
197 float_conv_to_ovf_i1_un:
198 float_conv_to_ovf_i2:
199 float_conv_to_ovf_i2_un:
200 float_conv_to_ovf_i4:
201 float_conv_to_ovf_i4_un:
202 float_conv_to_ovf_i8:
203 float_conv_to_ovf_i8_un:
205 float_conv_to_ovf_i_un:
206 float_conv_to_ovf_u1:
207 float_conv_to_ovf_u1_un:
208 float_conv_to_ovf_u2:
209 float_conv_to_ovf_u2_un:
210 float_conv_to_ovf_u4:
211 float_conv_to_ovf_u4_un:
212 float_conv_to_ovf_u8:
213 float_conv_to_ovf_u8_un:
214 float_conv_to_ovf_u_un:
215 float_conv_to_r4: dest:f src1:f len:4
217 float_conv_to_u1: dest:i src1:f len:62
218 float_conv_to_u2: dest:i src1:f len:62
219 float_conv_to_u4: dest:i src1:f len:62
220 float_conv_to_u8: dest:l src1:f len:62
221 float_conv_to_u: dest:i src1:f len:36
222 float_div: dest:f src1:f src2:f len:6
223 float_div_un: dest:f src1:f src2:f len:6
224 float_mul: dest:f src1:f src2:f len:6
227 float_neg: dest:f src1:f len:6
228 float_not: dest:f src1:f len:6
229 float_rem: dest:f src1:f src2:f len:16
230 float_rem_un: dest:f src1:f src2:f len:16
231 float_sub: dest:f src1:f src2:f len:6
234 fmove: dest:f src1:f len:4
236 iconst: dest:i len:16
243 lcall: dest:L len:8 clob:c
244 lcall_membase: dest:L src1:b len:12 clob:c
245 lcall_reg: dest:L src1:i len:8 clob:c
286 ldind.i1: dest:i len:8
287 ldind.i2: dest:i len:8
288 ldind.i4: dest:i len:8
290 ldind.i: dest:i len:8
293 ldind.ref: dest:i len:8
294 ldind.u1: dest:i len:8
295 ldind.u2: dest:i len:8
296 ldind.u4: dest:i len:8
316 load_membase: dest:i src1:b len:18
317 loadi1_membase: dest:i src1:b len:40
318 loadi2_membase: dest:i src1:b len:24
319 loadi4_membase: dest:i src1:b len:18
320 loadi8_membase: dest:i src1:b
321 loadr4_membase: dest:f src1:b len:20
322 loadr8_membase: dest:f src1:b len:18
323 loadu1_membase: dest:i src1:b len:26
324 loadu2_membase: dest:i src1:b len:26
325 loadu4_mem: dest:i len:8
326 loadu4_membase: dest:i src1:b len:18
328 localloc: dest:i src1:i len:72
329 long_add: len: 18 dest:l src1:l src2:i clob:1
331 long_add_ovf_un: len:22 dest:l src1:l src2:i clob:1
332 long_add_ovf: len:28 dest:l src1:l src2:i clob:1
355 long_conv_to_ovf_i1_un:
357 long_conv_to_ovf_i2_un:
359 long_conv_to_ovf_i4_un:
361 long_conv_to_ovf_i8_un:
362 long_conv_to_ovf_i: dest:i src1:i src2:i len:44
363 long_conv_to_ovf_i_un:
365 long_conv_to_ovf_u1_un:
367 long_conv_to_ovf_u2_un:
369 long_conv_to_ovf_u4_un:
371 long_conv_to_ovf_u8_un:
373 long_conv_to_ovf_u_un:
376 long_conv_to_r_un: dest:f src1:i src2:i len:37
385 long_mul_ovf: len: 18
386 long_mul_ovf_un: len: 18
398 long_sub: len: 18 dest:l src1:l src2:i clob:1
400 long_sub_ovf_un: len:22 dest:l src1:l src2:i clob:1
401 long_sub_ovf: len:36 dest:l src1:l src2:i clob:1
403 memory_barrier: len: 10
410 move: dest:i src1:i len:4
411 mul.ovf.un: dest:i src1:i src2:i len:20
412 mul.ovf: dest:i src1:i src2:i len:42
413 mul: dest:i src1:i src2:i len:6
414 mul_imm: dest:i src1:i len:20
415 neg: dest:i src1:i len:4
419 not: dest:i src1:i len:8
420 bigmul: len:2 dest:l src1:a src2:i
421 bigmul_un: len:2 dest:l src1:a src2:i
422 endfilter: src1:i len:12
423 rethrow: src1:i len:8
424 oparglist: src1:i len:20
425 or: dest:i src1:i src2:i len:4
426 or_imm: dest:i src1:i len:16
439 r4const: dest:f len:22
440 r8const: dest:f len:18
446 rem.un: dest:d src1:i src2:i len:12
447 rem: dest:d src1:i src2:i len:10
448 rem_imm: dest:i src1:i src2:i len:24
449 rem_un_imm: dest:i src1:i src2:i len:24
453 s390_bkchain: len:16 dest:i src1:i
454 s390_move: len:48 dest:b src1:b
455 s390_setf4ret: dest:f src1:f len:4
456 tls_get: dest:i len:44
457 sbb: dest:i src1:i src2:i len:8
458 sbb_imm: dest:i src1:i len:18
459 setfreg: dest:f src1:f len:4
460 setlret: src1:i src2:i len:12
461 setreg: dest:i src1:i len:4
462 setregimm: dest:i len:18
463 setret: dest:a src1:i len:6
464 shl: dest:i src1:i src2:i clob:s len:8
465 shl_imm: dest:i src1:i len:8
466 shr.un: dest:i src1:i src2:i clob:s len:8
467 shr: dest:i src1:i src2:i clob:s len:8
468 shr_imm: dest:i src1:i len:8
469 shr_un_imm: dest:i src1:i len:8
471 sqrt: dest:f src1:f len:4
474 start_handler: len:18
484 stind.i1: src1:b src2:i
485 stind.i2: src1:b src2:i
486 stind.i4: src1:b src2:i
489 stind.r4: src1:b src2:f
490 stind.r8: src1:b src2:f
491 stind.ref: src1:b src2:i
500 store_membase_imm: dest:b len:32
501 store_membase_reg: dest:b src1:i len:18
502 storei1_membase_imm: dest:b len:32
503 storei1_membase_reg: dest:b src1:i len:18
504 storei2_membase_imm: dest:b len:32
505 storei2_membase_reg: dest:b src1:i len:18
506 storei4_membase_imm: dest:b len:32
507 storei4_membase_reg: dest:b src1:i len:18
508 storei8_membase_imm: dest:b
509 storei8_membase_reg: dest:b src1:i
510 storer4_membase_reg: dest:b src1:f len:22
511 storer8_membase_reg: dest:b src1:f len:22
513 sub.ovf.un: len:10 dest:i src1:i src2:i
514 sub.ovf: len:24 dest:i src1:i src2:i
515 sub: dest:i src1:i src2:i len:6
516 sub_imm: dest:i src1:i len:18
517 subcc_imm: dest:i src1:i len:18
518 sub_ovf_carry: dest:i src1:1 src2:i len:28
519 sub_ovf_un_carry: dest:i src1:1 src2:i len:28
520 subcc: dest:i src1:i src2:i len:6
528 vcall_membase: src1:b len:12 clob:c
529 vcall_reg: src1:i len:8 clob:c
530 voidcall: len:8 clob:c
531 voidcall_membase: src1:b len:12 clob:c
532 voidcall_reg: src1:i len:8 clob:c
534 xor: dest:i src1:i src2:i len:4
535 xor_imm: dest:i src1:i len:16