1 # powerpc cpu description file
2 # this file is read by genmdesc to pruduce a table with all the relevant information
3 # about the cpu instructions that may be used by the regsiter allocator, the scheduler
4 # and other parts of the arch-dependent part of mini.
6 # An opcode name is followed by a colon and optional specifiers.
7 # A specifier has a name, a colon and a value. Specifiers are separated by white space.
8 # Here is a description of the specifiers valid for this file and their possible values.
10 # dest:register describes the destination register of an instruction
11 # src1:register describes the first source register of an instruction
12 # src2:register describes the second source register of an instruction
14 # register may have the following values:
16 # a r3 register (output from calls)
17 # b base register (used in address references)
18 # f floating point register
20 # len:number describe the maximun length in bytes of the instruction
21 # number is a positive integer
23 # cost:number describe how many cycles are needed to complete the instruction (unused)
25 # clob:spec describe if the instruction clobbers registers or has special needs
27 # spec can be one of the following characters:
28 # c clobbers caller-save registers
29 # r 'reserves' the destination register until a later instruction unreserves it
30 # used mostly to set output registers in function calls
32 # flags:spec describe if the instruction uses or sets the flags (unused)
34 # spec can be one of the following chars:
37 # m uses and modifies the flags
39 # res:spec describe what units are used in the processor (unused)
41 # delay: describe delay slots (unused)
43 # the required specifiers are: len, clob (if registers are clobbered), the registers
44 # specifiers if the registers are actually used, flags (when scheduling is implemented).
46 # See the code in mini-x86.c for more details on how the specifiers are used.
53 call: dest:a clob:c len:36
56 rethrow: src1:i len:40
57 ckfinite: dest:f src1:f
58 ppc_check_finite: src1:i len:16
59 add_ovf_carry: dest:i src1:i src2:i len:16
60 sub_ovf_carry: dest:i src1:i src2:i len:16
61 add_ovf_un_carry: dest:i src1:i src2:i len:16
62 sub_ovf_un_carry: dest:i src1:i src2:i len:16
70 localloc: dest:i src1:i len:60
71 compare: src1:i src2:i len:4
72 compare_imm: src1:i len:12
73 fcompare: src1:f src2:f len:12
74 oparglist: src1:i len:12
75 setlret: src1:i src2:i len:12
76 checkthis: src1:b len:4
77 voidcall: len:36 clob:c
78 voidcall_reg: src1:i len:16 clob:c
79 voidcall_membase: src1:b len:12 clob:c
80 fcall: dest:g len:36 clob:c
81 fcall_reg: dest:g src1:i len:16 clob:c
82 fcall_membase: dest:g src1:b len:12 clob:c
83 lcall: dest:a len:36 clob:c
84 lcall_reg: dest:a src1:i len:16 clob:c
85 lcall_membase: dest:a src1:b len:12 clob:c
87 vcall_reg: src1:i len:16 clob:c
88 vcall_membase: src1:b len:12 clob:c
89 call_reg: dest:a src1:i len:16 clob:c
90 call_membase: dest:a src1:b len:12 clob:c
92 i8const: dest:i len:20
93 r4const: dest:f len:12
94 r8const: dest:f len:24
96 store_membase_reg: dest:b src1:i len:12
97 storei1_membase_reg: dest:b src1:i len:12
98 storei2_membase_reg: dest:b src1:i len:12
99 storei4_membase_reg: dest:b src1:i len:12
100 storei8_membase_reg: dest:b src1:i len:12
101 storer4_membase_reg: dest:b src1:f len:16
102 storer8_membase_reg: dest:b src1:f len:12
103 load_membase: dest:i src1:b len:12
104 loadi1_membase: dest:i src1:b len:16
105 loadu1_membase: dest:i src1:b len:12
106 loadi2_membase: dest:i src1:b len:12
107 loadu2_membase: dest:i src1:b len:12
108 loadi4_membase: dest:i src1:b len:12
109 loadu4_membase: dest:i src1:b len:12
110 loadi8_membase: dest:i src1:b len:12
111 loadr4_membase: dest:f src1:b len:12
112 loadr8_membase: dest:f src1:b len:12
113 load_memindex: dest:i src1:b src2:i len:4
114 loadi1_memindex: dest:i src1:b src2:i len:8
115 loadu1_memindex: dest:i src1:b src2:i len:4
116 loadi2_memindex: dest:i src1:b src2:i len:4
117 loadu2_memindex: dest:i src1:b src2:i len:4
118 loadi4_memindex: dest:i src1:b src2:i len:4
119 loadu4_memindex: dest:i src1:b src2:i len:4
120 loadr4_memindex: dest:f src1:b src2:i len:4
121 loadr8_memindex: dest:f src1:b src2:i len:4
122 store_memindex: dest:b src1:i src2:i len:4
123 storei1_memindex: dest:b src1:i src2:i len:4
124 storei2_memindex: dest:b src1:i src2:i len:4
125 storei4_memindex: dest:b src1:i src2:i len:4
126 storer4_memindex: dest:b src1:i src2:i len:8
127 storer8_memindex: dest:b src1:i src2:i len:4
128 loadu4_mem: dest:i len:8
129 move: dest:i src1:i len:4
130 fmove: dest:f src1:f len:4
131 add_imm: dest:i src1:i len:4
132 sub_imm: dest:i src1:i len:4
133 mul_imm: dest:i src1:i len:4
134 # there is no actual support for division or reminder by immediate
135 # we simulate them, though (but we need to change the burg rules
136 # to allocate a symbolic reg for src2)
137 div_imm: dest:i src1:i src2:i len:20
138 div_un_imm: dest:i src1:i src2:i len:12
139 rem_imm: dest:i src1:i src2:i len:28
140 rem_un_imm: dest:i src1:i src2:i len:16
141 and_imm: dest:i src1:i len:4
142 or_imm: dest:i src1:i len:4
143 xor_imm: dest:i src1:i len:4
144 shl_imm: dest:i src1:i len:4
145 shr_imm: dest:i src1:i len:4
146 shr_un_imm: dest:i src1:i len:4
148 cond_exc_ne_un: len:8
150 cond_exc_lt_un: len:8
152 cond_exc_gt_un: len:8
154 cond_exc_ge_un: len:8
156 cond_exc_le_un: len:8
161 long_conv_to_ovf_i: dest:i src1:i src2:i len:32
163 long_conv_to_r_un: dest:f src1:i src2:i len:37
174 float_add: dest:f src1:f src2:f len:4
175 float_sub: dest:f src1:f src2:f len:4
176 float_mul: dest:f src1:f src2:f len:4
177 float_div: dest:f src1:f src2:f len:4
178 float_div_un: dest:f src1:f src2:f len:4
179 float_rem: dest:f src1:f src2:f len:16
180 float_rem_un: dest:f src1:f src2:f len:16
181 float_neg: dest:f src1:f len:4
182 float_not: dest:f src1:f len:4
183 float_conv_to_i1: dest:i src1:f len:40
184 float_conv_to_i2: dest:i src1:f len:40
185 float_conv_to_i4: dest:i src1:f len:40
186 float_conv_to_i8: dest:i src1:f len:40
187 float_conv_to_r4: dest:f src1:f len:4
188 float_conv_to_u4: dest:i src1:f len:40
189 float_conv_to_u8: dest:i src1:f len:40
190 float_conv_to_u2: dest:i src1:f len:40
191 float_conv_to_u1: dest:i src1:f len:40
192 float_conv_to_i: dest:i src1:f len:40
193 float_ceq: dest:i src1:f src2:f len:16
194 float_cgt: dest:i src1:f src2:f len:16
195 float_cgt_un: dest:i src1:f src2:f len:20
196 float_clt: dest:i src1:f src2:f len:16
197 float_clt_un: dest:i src1:f src2:f len:20
198 float_conv_to_u: dest:i src1:f len:36
200 endfilter: src1:i len:20
201 aot_const: dest:i len:8
202 load_gotaddr: dest:i len:32
203 got_entry: dest:i src1:b len:32
204 sqrt: dest:f src1:f len:4
205 adc: dest:i src1:i src2:i len:4
206 addcc: dest:i src1:i src2:i len:4
207 subcc: dest:i src1:i src2:i len:4
208 addcc_imm: dest:i src1:i len:4
209 sbb: dest:i src1:i src2:i len:4
211 ppc_subfic: dest:i src1:i len:4
212 ppc_subfze: dest:i src1:i len:4
213 bigmul: len:12 dest:i src1:i src2:i
214 bigmul_un: len:12 dest:i src1:i src2:i
215 tls_get: len:8 dest:i
221 not_null: src1:i len:0
224 int_add: dest:i src1:i src2:i len:4
225 int_sub: dest:i src1:i src2:i len:4
226 int_mul: dest:i src1:i src2:i len:4
227 int_div: dest:i src1:i src2:i len:40
228 int_div_un: dest:i src1:i src2:i len:16
229 int_rem: dest:i src1:i src2:i len:48
230 int_rem_un: dest:i src1:i src2:i len:24
231 int_and: dest:i src1:i src2:i len:4
232 int_or: dest:i src1:i src2:i len:4
233 int_xor: dest:i src1:i src2:i len:4
234 int_shl: dest:i src1:i src2:i len:4
235 int_shr: dest:i src1:i src2:i len:4
236 int_shr_un: dest:i src1:i src2:i len:4
237 int_neg: dest:i src1:i len:4
238 int_not: dest:i src1:i len:4
239 int_conv_to_i1: dest:i src1:i len:8
240 int_conv_to_i2: dest:i src1:i len:8
241 int_conv_to_i4: dest:i src1:i len:4
242 sext_i4: dest:i src1:i len:4
243 int_conv_to_r4: dest:f src1:i len:20
244 int_conv_to_r8: dest:f src1:i len:16
245 int_conv_to_u4: dest:i src1:i len:4
246 int_conv_to_u2: dest:i src1:i len:8
247 int_conv_to_u1: dest:i src1:i len:4
258 int_add_ovf: dest:i src1:i src2:i len:16
259 int_add_ovf_un: dest:i src1:i src2:i len:16
260 int_mul_ovf: dest:i src1:i src2:i len:16
261 int_mul_ovf_un: dest:i src1:i src2:i len:16
262 int_sub_ovf: dest:i src1:i src2:i len:16
263 int_sub_ovf_un: dest:i src1:i src2:i len:16
265 int_adc: dest:i src1:i src2:i len:4
266 int_addcc: dest:i src1:i src2:i len:4
267 int_subcc: dest:i src1:i src2:i len:4
268 int_sbb: dest:i src1:i src2:i len:4
269 int_adc_imm: dest:i src1:i len:12
270 int_sbb_imm: dest:i src1:i len:12
272 int_add_imm: dest:i src1:i len:4
273 int_sub_imm: dest:i src1:i len:12
274 int_mul_imm: dest:i src1:i len:12
275 int_div_imm: dest:i src1:i len:20
276 int_div_un_imm: dest:i src1:i len:12
277 int_rem_imm: dest:i src1:i len:28
278 int_rem_un_imm: dest:i src1:i len:16
279 int_and_imm: dest:i src1:i len:12
280 int_or_imm: dest:i src1:i len:12
281 int_xor_imm: dest:i src1:i len:12
282 int_shl_imm: dest:i src1:i len:8
283 int_shr_imm: dest:i src1:i len:8
284 int_shr_un_imm: dest:i src1:i len:8
286 int_ceq: dest:i len:12
287 int_cgt: dest:i len:12
288 int_cgt_un: dest:i len:12
289 int_clt: dest:i len:12
290 int_clt_un: dest:i len:12
293 cond_exc_ine_un: len:8
295 cond_exc_ilt_un: len:8
297 cond_exc_igt_un: len:8
299 cond_exc_ige_un: len:8
301 cond_exc_ile_un: len:8
307 icompare: src1:i src2:i len:4
308 icompare_imm: src1:i len:12
311 long_add: dest:i src1:i src2:i len:4
312 long_sub: dest:i src1:i src2:i len:4
313 long_mul: dest:i src1:i src2:i len:4
314 long_mul_imm: dest:i src1:i len:4
315 long_div: dest:i src1:i src2:i len:40
316 long_div_un: dest:i src1:i src2:i len:16
317 long_rem: dest:i src1:i src2:i len:48
318 long_rem_un: dest:i src1:i src2:i len:24
319 long_and: dest:i src1:i src2:i len:4
320 long_or: dest:i src1:i src2:i len:4
321 long_xor: dest:i src1:i src2:i len:4
322 long_shl: dest:i src1:i src2:i len:4
323 long_shl_imm: dest:i src1:i len:4
324 long_shr: dest:i src1:i src2:i len:4
325 long_shr_un: dest:i src1:i src2:i len:4
326 long_shr_imm: dest:i src1:i len:4
327 long_shr_un_imm: dest:i src1:i len:4
328 long_neg: dest:i src1:i len:4
329 long_not: dest:i src1:i len:4
330 long_conv_to_i1: dest:i src1:i len:4
331 long_conv_to_i2: dest:i src1:i len:4
332 long_conv_to_i4: dest:i src1:i len:4
333 long_conv_to_r4: dest:f src1:i len:16
334 long_conv_to_r8: dest:f src1:i len:12
335 long_conv_to_u4: dest:i src1:i
336 long_conv_to_u2: dest:i src1:i len:4
337 long_conv_to_u1: dest:i src1:i len:4
338 zext_i4: dest:i src1:i len:4
350 long_add_ovf: dest:i src1:i src2:i len:16
351 long_add_ovf_un: dest:i src1:i src2:i len:16
352 long_mul_ovf: dest:i src1:i src2:i len:16
353 long_mul_ovf_un: dest:i src1:i src2:i len:16
354 long_sub_ovf: dest:i src1:i src2:i len:16
355 long_sub_ovf_un: dest:i src1:i src2:i len:16
357 long_ceq: dest:i len:12
358 long_cgt: dest:i len:12
359 long_cgt_un: dest:i len:12
360 long_clt: dest:i len:12
361 long_clt_un: dest:i len:12
363 long_add_imm: dest:i src1:i clob:1 len:4
364 long_sub_imm: dest:i src1:i clob:1 len:4
365 long_and_imm: dest:i src1:i clob:1 len:4
366 long_or_imm: dest:i src1:i clob:1 len:4
367 long_xor_imm: dest:i src1:i clob:1 len:4
369 lcompare: src1:i src2:i len:4
370 lcompare_imm: src1:i len:12
372 #long_conv_to_ovf_i4_2: dest:i src1:i src2:i len:30
374 vcall2: len:36 clob:c
375 vcall2_reg: src1:i len:16 clob:c
376 vcall2_membase: src1:b len:12 clob:c
378 jump_table: dest:i len:20
380 atomic_add_new_i4: src1:b src2:i dest:i len:20
381 atomic_add_new_i8: src1:b src2:i dest:i len:20
383 atomic_cas_i4: src1:b src2:i src3:i dest:i len:30
384 atomic_cas_i8: src1:b src2:i src3:i dest:i len:30