1 # powerpc cpu description file
2 # this file is read by genmdesc to pruduce a table with all the relevant information
3 # about the cpu instructions that may be used by the regsiter allocator, the scheduler
4 # and other parts of the arch-dependent part of mini.
6 # An opcode name is followed by a colon and optional specifiers.
7 # A specifier has a name, a colon and a value. Specifiers are separated by white space.
8 # Here is a description of the specifiers valid for this file and their possible values.
10 # dest:register describes the destination register of an instruction
11 # src1:register describes the first source register of an instruction
12 # src2:register describes the second source register of an instruction
14 # register may have the following values:
16 # a r3 register (output from calls)
17 # b base register (used in address references)
18 # f floating point register
20 # len:number describe the maximun length in bytes of the instruction
21 # number is a positive integer
23 # cost:number describe how many cycles are needed to complete the instruction (unused)
25 # clob:spec describe if the instruction clobbers registers or has special needs
27 # spec can be one of the following characters:
28 # c clobbers caller-save registers
29 # r 'reserves' the destination register until a later instruction unreserves it
30 # used mostly to set output registers in function calls
32 # flags:spec describe if the instruction uses or sets the flags (unused)
34 # spec can be one of the following chars:
37 # m uses and modifies the flags
39 # res:spec describe what units are used in the processor (unused)
41 # delay: describe delay slots (unused)
43 # the required specifiers are: len, clob (if registers are clobbered), the registers
44 # specifiers if the registers are actually used, flags (when scheduling is implemented).
46 # See the code in mini-x86.c for more details on how the specifiers are used.
54 call: dest:a clob:c len:16
57 rethrow: src1:i len:20
58 ckfinite: dest:f src1:f
59 ppc_check_finite: src1:i len:16
60 add_ovf_carry: dest:i src1:i src2:i len:16
61 sub_ovf_carry: dest:i src1:i src2:i len:16
62 add_ovf_un_carry: dest:i src1:i src2:i len:16
63 sub_ovf_un_carry: dest:i src1:i src2:i len:16
71 localloc: dest:i src1:i len:60
72 compare: src1:i src2:i len:4
73 compare_imm: src1:i len:12
74 fcompare: src1:f src2:f len:12
75 oparglist: src1:i len:12
76 setlret: src1:i src2:i len:12
77 checkthis: src1:b len:4
78 voidcall: len:16 clob:c
79 voidcall_reg: src1:i len:16 clob:c
80 voidcall_membase: src1:b len:16 clob:c
81 fcall: dest:g len:16 clob:c
82 fcall_reg: dest:g src1:i len:16 clob:c
83 fcall_membase: dest:g src1:b len:16 clob:c
84 lcall: dest:l len:16 clob:c
85 lcall_reg: dest:l src1:i len:16 clob:c
86 lcall_membase: dest:l src1:b len:16 clob:c
88 vcall_reg: src1:i len:16 clob:c
89 vcall_membase: src1:b len:16 clob:c
90 call_reg: dest:a src1:i len:16 clob:c
91 call_membase: dest:a src1:b len:16 clob:c
93 r4const: dest:f len:12
94 r8const: dest:f len:24
96 store_membase_reg: dest:b src1:i len:12
97 storei1_membase_reg: dest:b src1:i len:12
98 storei2_membase_reg: dest:b src1:i len:12
99 storei4_membase_reg: dest:b src1:i len:12
100 storer4_membase_reg: dest:b src1:f len:16
101 storer8_membase_reg: dest:b src1:f len:12
102 load_membase: dest:i src1:b len:12
103 loadi1_membase: dest:i src1:b len:16
104 loadu1_membase: dest:i src1:b len:12
105 loadi2_membase: dest:i src1:b len:12
106 loadu2_membase: dest:i src1:b len:12
107 loadi4_membase: dest:i src1:b len:12
108 loadu4_membase: dest:i src1:b len:12
109 loadr4_membase: dest:f src1:b len:12
110 loadr8_membase: dest:f src1:b len:12
111 load_memindex: dest:i src1:b src2:i len:4
112 loadi1_memindex: dest:i src1:b src2:i len:8
113 loadu1_memindex: dest:i src1:b src2:i len:4
114 loadi2_memindex: dest:i src1:b src2:i len:4
115 loadu2_memindex: dest:i src1:b src2:i len:4
116 loadi4_memindex: dest:i src1:b src2:i len:4
117 loadu4_memindex: dest:i src1:b src2:i len:4
118 loadr4_memindex: dest:f src1:b src2:i len:4
119 loadr8_memindex: dest:f src1:b src2:i len:4
120 store_memindex: dest:b src1:i src2:i len:4
121 storei1_memindex: dest:b src1:i src2:i len:4
122 storei2_memindex: dest:b src1:i src2:i len:4
123 storei4_memindex: dest:b src1:i src2:i len:4
124 storer4_memindex: dest:b src1:i src2:i len:8
125 storer8_memindex: dest:b src1:i src2:i len:4
126 loadu4_mem: dest:i len:8
127 move: dest:i src1:i len:4
128 fmove: dest:f src1:f len:4
129 add_imm: dest:i src1:i len:4
130 sub_imm: dest:i src1:i len:4
131 mul_imm: dest:i src1:i len:4
132 # there is no actual support for division or reminder by immediate
133 # we simulate them, though (but we need to change the burg rules
134 # to allocate a symbolic reg for src2)
135 div_imm: dest:i src1:i src2:i len:20
136 div_un_imm: dest:i src1:i src2:i len:12
137 rem_imm: dest:i src1:i src2:i len:28
138 rem_un_imm: dest:i src1:i src2:i len:16
139 and_imm: dest:i src1:i len:4
140 or_imm: dest:i src1:i len:4
141 xor_imm: dest:i src1:i len:4
142 shl_imm: dest:i src1:i len:4
143 shr_imm: dest:i src1:i len:4
144 shr_un_imm: dest:i src1:i len:4
146 cond_exc_ne_un: len:8
148 cond_exc_lt_un: len:8
150 cond_exc_gt_un: len:8
152 cond_exc_ge_un: len:8
154 cond_exc_le_un: len:8
159 long_conv_to_ovf_i: dest:i src1:i src2:i len:32
161 long_conv_to_r_un: dest:f src1:i src2:i len:37
172 float_add: dest:f src1:f src2:f len:4
173 float_sub: dest:f src1:f src2:f len:4
174 float_mul: dest:f src1:f src2:f len:4
175 float_div: dest:f src1:f src2:f len:4
176 float_div_un: dest:f src1:f src2:f len:4
177 float_rem: dest:f src1:f src2:f len:16
178 float_rem_un: dest:f src1:f src2:f len:16
179 float_neg: dest:f src1:f len:4
180 float_not: dest:f src1:f len:4
181 float_conv_to_i1: dest:i src1:f len:40
182 float_conv_to_i2: dest:i src1:f len:40
183 float_conv_to_i4: dest:i src1:f len:40
184 float_conv_to_i8: dest:l src1:f len:40
185 float_conv_to_r4: dest:f src1:f len:4
186 float_conv_to_u4: dest:i src1:f len:40
187 float_conv_to_u8: dest:l src1:f len:40
188 float_conv_to_u2: dest:i src1:f len:40
189 float_conv_to_u1: dest:i src1:f len:40
190 float_conv_to_i: dest:i src1:f len:40
191 float_ceq: dest:i src1:f src2:f len:16
192 float_cgt: dest:i src1:f src2:f len:16
193 float_cgt_un: dest:i src1:f src2:f len:20
194 float_clt: dest:i src1:f src2:f len:16
195 float_clt_un: dest:i src1:f src2:f len:20
196 float_conv_to_u: dest:i src1:f len:36
197 call_handler: len:12 clob:c
198 endfilter: src1:i len:32
199 aot_const: dest:i len:8
200 load_gotaddr: dest:i len:32
201 got_entry: dest:i src1:b len:32
202 sqrt: dest:f src1:f len:4
203 adc: dest:i src1:i src2:i len:4
204 addcc: dest:i src1:i src2:i len:4
205 subcc: dest:i src1:i src2:i len:4
206 addcc_imm: dest:i src1:i len:4
207 sbb: dest:i src1:i src2:i len:4
209 ppc_subfic: dest:i src1:i len:4
210 ppc_subfze: dest:i src1:i len:4
211 bigmul: len:12 dest:l src1:i src2:i
212 bigmul_un: len:12 dest:l src1:i src2:i
213 tls_get: len:20 dest:i
216 dummy_use: src1:i len:0
219 not_null: src1:i len:0
222 int_add: dest:i src1:i src2:i len:4
223 int_sub: dest:i src1:i src2:i len:4
224 int_mul: dest:i src1:i src2:i len:4
225 int_div: dest:i src1:i src2:i len:40
226 int_div_un: dest:i src1:i src2:i len:16
227 int_rem: dest:i src1:i src2:i len:48
228 int_rem_un: dest:i src1:i src2:i len:24
229 int_and: dest:i src1:i src2:i len:4
230 int_or: dest:i src1:i src2:i len:4
231 int_xor: dest:i src1:i src2:i len:4
232 int_shl: dest:i src1:i src2:i len:4
233 int_shr: dest:i src1:i src2:i len:4
234 int_shr_un: dest:i src1:i src2:i len:4
235 int_neg: dest:i src1:i len:4
236 int_not: dest:i src1:i len:4
237 int_conv_to_i1: dest:i src1:i len:8
238 int_conv_to_i2: dest:i src1:i len:8
239 int_conv_to_i4: dest:i src1:i len:4
240 int_conv_to_r4: dest:f src1:i len:36
241 int_conv_to_r8: dest:f src1:i len:36
242 int_conv_to_u4: dest:i src1:i
243 int_conv_to_u2: dest:i src1:i len:8
244 int_conv_to_u1: dest:i src1:i len:4
255 int_add_ovf: dest:i src1:i src2:i len:16
256 int_add_ovf_un: dest:i src1:i src2:i len:16
257 int_mul_ovf: dest:i src1:i src2:i len:16
258 int_mul_ovf_un: dest:i src1:i src2:i len:16
259 int_sub_ovf: dest:i src1:i src2:i len:16
260 int_sub_ovf_un: dest:i src1:i src2:i len:16
262 int_adc: dest:i src1:i src2:i len:4
263 int_addcc: dest:i src1:i src2:i len:4
264 int_subcc: dest:i src1:i src2:i len:4
265 int_sbb: dest:i src1:i src2:i len:4
266 int_adc_imm: dest:i src1:i len:12
267 int_sbb_imm: dest:i src1:i len:12
269 int_add_imm: dest:i src1:i len:12
270 int_sub_imm: dest:i src1:i len:12
271 int_mul_imm: dest:i src1:i len:12
272 int_div_imm: dest:i src1:i len:20
273 int_div_un_imm: dest:i src1:i len:12
274 int_rem_imm: dest:i src1:i len:28
275 int_rem_un_imm: dest:i src1:i len:16
276 int_and_imm: dest:i src1:i len:12
277 int_or_imm: dest:i src1:i len:12
278 int_xor_imm: dest:i src1:i len:12
279 int_shl_imm: dest:i src1:i len:8
280 int_shr_imm: dest:i src1:i len:8
281 int_shr_un_imm: dest:i src1:i len:8
283 int_ceq: dest:i len:12
284 int_cgt: dest:i len:12
285 int_cgt_un: dest:i len:12
286 int_clt: dest:i len:12
287 int_clt_un: dest:i len:12
290 cond_exc_ine_un: len:8
292 cond_exc_ilt_un: len:8
294 cond_exc_igt_un: len:8
296 cond_exc_ige_un: len:8
298 cond_exc_ile_un: len:8
304 icompare: src1:i src2:i len:4
305 icompare_imm: src1:i len:12
307 long_conv_to_ovf_i4_2: dest:i src1:i src2:i len:32
309 vcall2: len:20 clob:c
310 vcall2_reg: src1:i len:8 clob:c
311 vcall2_membase: src1:b len:16 clob:c
313 jump_table: dest:i len:8
315 atomic_cas_i4: src1:b src2:i src3:i dest:i len:30