1 # mips cpu description file
2 # this file is read by genmdesc to pruduce a table with all the relevant
3 # information about the cpu instructions that may be used by the regsiter
4 # allocator, the scheduler and other parts of the arch-dependent part of mini.
6 # An opcode name is followed by a colon and optional specifiers.
7 # A specifier has a name, a colon and a value.
8 # Specifiers are separated by white space.
9 # Here is a description of the specifiers valid for this file and their
12 # dest:register describes the destination register of an instruction
13 # src1:register describes the first source register of an instruction
14 # src2:register describes the second source register of an instruction
16 # register may have the following values:
18 # l integer register pair
19 # v v0 register (output from calls)
20 # V v0/v1 register pair (output from calls)
22 # b base register (used in address references)
23 # f floating point register (pair - always)
24 # g floating point register return pair (f0/f1)
26 # len:number describe the maximun length in bytes of the instruction
27 # number is a positive integer
29 # cost:number describe how many cycles are needed to complete the instruction (unused)
31 # clob:spec describe if the instruction clobbers registers or has special needs
33 # spec can be one of the following characters:
34 # c clobbers caller-save registers
35 # r 'reserves' the destination register until a later instruction unreserves it
36 # used mostly to set output registers in function calls
38 # flags:spec describe if the instruction uses or sets the flags (unused)
40 # spec can be one of the following chars:
43 # m uses and modifies the flags
45 # res:spec describe what units are used in the processor (unused)
47 # delay: describe delay slots (unused)
49 # the required specifiers are: len, clob (if registers are clobbered), the registers
50 # specifiers if the registers are actually used, flags (when scheduling is implemented).
52 # See the code in mini-x86.c for more details on how the specifiers are used.
59 call: dest:v clob:c len:20
63 callvirt: dest:v clob:c len:20
64 int_conv_to_r_un: dest:f src1:i len:32
66 rethrow: src1:i len:24
67 ckfinite: dest:f src1:f len:52
75 localloc: dest:i src1:i len:60
76 compare: src1:i src2:i len:20
77 compare_imm: src1:i len:20
78 fcompare: src1:f src2:f len:12
79 oparglist: src1:i len:12
80 setlret: src1:i src2:i len:12
81 checkthis: src1:b len:4
83 voidcall: len:20 clob:c
84 voidcall_reg: src1:i len:20 clob:c
85 voidcall_membase: src1:b len:20 clob:c
87 fcall: dest:g len:20 clob:c
88 fcall_reg: dest:g src1:i len:20 clob:c
89 fcall_membase: dest:g src1:b len:20 clob:c
91 lcall: dest:V len:28 clob:c
92 lcall_reg: dest:V src1:i len:28 clob:c
93 lcall_membase: dest:V src1:b len:28 clob:c
95 call_reg: dest:v src1:i len:20 clob:c
96 call_membase: dest:v src1:b len:20 clob:c
99 vcall_reg: src1:i len:20 clob:c
100 vcall_membase: src1:b len:20 clob:c
102 vcall2: len:16 clob:c
103 vcall2_reg: src1:i len:20 clob:c
104 vcall2_membase: src1:b len:20 clob:c
106 jump_table: dest:i len:8
108 iconst: dest:i len:12
109 i8const: dest:l len:24
110 r4const: dest:f len:20
111 r8const: dest:f len:28
113 store_membase_imm: dest:b len:20
114 store_membase_reg: dest:b src1:i len:20
115 storei1_membase_imm: dest:b len:20
116 storei1_membase_reg: dest:b src1:i len:20
117 storei2_membase_imm: dest:b len:20
118 storei2_membase_reg: dest:b src1:i len:20
119 storei4_membase_imm: dest:b len:20
120 storei4_membase_reg: dest:b src1:i len:20
121 storei8_membase_imm: dest:b
122 storei8_membase_reg: dest:b src1:i len:20
123 storer4_membase_reg: dest:b src1:f len:20
124 storer8_membase_reg: dest:b src1:f len:20
125 load_membase: dest:i src1:b len:20
126 loadi1_membase: dest:i src1:b len:20
127 loadu1_membase: dest:i src1:b len:20
128 loadi2_membase: dest:i src1:b len:20
129 loadu2_membase: dest:i src1:b len:20
130 loadi4_membase: dest:i src1:b len:20
131 loadu4_membase: dest:i src1:b len:20
132 loadi8_membase: dest:i src1:b len:20
133 loadr4_membase: dest:f src1:b len:20
134 loadr8_membase: dest:f src1:b len:20
135 load_memindex: dest:i src1:b src2:i len:4
136 loadi1_memindex: dest:i src1:b src2:i len:12
137 loadu1_memindex: dest:i src1:b src2:i len:12
138 loadi2_memindex: dest:i src1:b src2:i len:12
139 loadu2_memindex: dest:i src1:b src2:i len:12
140 loadi4_memindex: dest:i src1:b src2:i len:12
141 loadu4_memindex: dest:i src1:b src2:i len:12
142 loadr4_memindex: dest:f src1:b src2:i len:12
143 loadr8_memindex: dest:f src1:b src2:i len:12
144 store_memindex: dest:b src1:i src2:i len:12
145 storei1_memindex: dest:b src1:i src2:i len:12
146 storei2_memindex: dest:b src1:i src2:i len:12
147 storei4_memindex: dest:b src1:i src2:i len:12
148 storer4_memindex: dest:b src1:f src2:i len:12
149 storer8_memindex: dest:b src1:f src2:i len:12
150 loadu4_mem: dest:i len:8
151 move: dest:i src1:i len:4
152 fmove: dest:f src1:f len:8
153 add_imm: dest:i src1:i len:12
154 sub_imm: dest:i src1:i len:12
155 mul_imm: dest:i src1:i len:20
156 # there is no actual support for division or reminder by immediate
157 # we simulate them, though (but we need to change the burg rules
158 # to allocate a symbolic reg for src2)
159 div_imm: dest:i src1:i src2:i len:20
160 div_un_imm: dest:i src1:i src2:i len:12
161 rem_imm: dest:i src1:i src2:i len:28
162 rem_un_imm: dest:i src1:i src2:i len:16
163 and_imm: dest:i src1:i len:12
164 or_imm: dest:i src1:i len:12
165 xor_imm: dest:i src1:i len:12
166 shl_imm: dest:i src1:i len:8
167 shr_imm: dest:i src1:i len:8
168 shr_un_imm: dest:i src1:i len:8
171 dummy_use: src1:i len:0
174 not_null: src1:i len:0
177 int_add: dest:i src1:i src2:i len:4
178 int_sub: dest:i src1:i src2:i len:4
179 int_mul: dest:i src1:i src2:i len:4
180 int_div: dest:i src1:i src2:i len:84
181 int_div_un: dest:i src1:i src2:i len:40
182 int_rem: dest:i src1:i src2:i len:84
183 int_rem_un: dest:i src1:i src2:i len:40
184 int_and: dest:i src1:i src2:i len:4
185 int_or: dest:i src1:i src2:i len:4
186 int_xor: dest:i src1:i src2:i len:4
187 int_shl: dest:i src1:i src2:i len:4
188 int_shr: dest:i src1:i src2:i len:4
189 int_shr_un: dest:i src1:i src2:i len:4
190 int_neg: dest:i src1:i len:4
191 int_not: dest:i src1:i len:4
192 int_conv_to_i1: dest:i src1:i len:8
193 int_conv_to_i2: dest:i src1:i len:8
194 int_conv_to_i4: dest:i src1:i len:4
195 int_conv_to_r4: dest:f src1:i len:36
196 int_conv_to_r8: dest:f src1:i len:36
197 int_conv_to_u4: dest:i src1:i
198 int_conv_to_u2: dest:i src1:i len:8
199 int_conv_to_u1: dest:i src1:i len:4
210 int_add_ovf: dest:i src1:i src2:i len:16
211 int_add_ovf_un: dest:i src1:i src2:i len:16
212 int_mul_ovf: dest:i src1:i src2:i len:56
213 int_mul_ovf_un: dest:i src1:i src2:i len:56
214 int_sub_ovf: dest:i src1:i src2:i len:16
215 int_sub_ovf_un: dest:i src1:i src2:i len:16
217 int_adc: dest:i src1:i src2:i len:4
218 int_addcc: dest:i src1:i src2:i len:4
219 int_subcc: dest:i src1:i src2:i len:4
220 int_sbb: dest:i src1:i src2:i len:4
221 int_adc_imm: dest:i src1:i len:12
222 int_sbb_imm: dest:i src1:i len:12
224 int_add_imm: dest:i src1:i len:12
225 int_sub_imm: dest:i src1:i len:12
226 int_mul_imm: dest:i src1:i len:12
227 int_div_imm: dest:i src1:i len:20
228 int_div_un_imm: dest:i src1:i len:12
229 int_rem_imm: dest:i src1:i len:28
230 int_rem_un_imm: dest:i src1:i len:16
231 int_and_imm: dest:i src1:i len:12
232 int_or_imm: dest:i src1:i len:12
233 int_xor_imm: dest:i src1:i len:12
234 int_shl_imm: dest:i src1:i len:8
235 int_shr_imm: dest:i src1:i len:8
236 int_shr_un_imm: dest:i src1:i len:8
238 int_ceq: dest:i len:16
239 int_cgt: dest:i len:16
240 int_cgt_un: dest:i len:16
241 int_clt: dest:i len:16
242 int_clt_un: dest:i len:16
245 cond_exc_ne_un: len:32
247 cond_exc_lt_un: len:32
249 cond_exc_gt_un: len:32
251 cond_exc_ge_un: len:32
253 cond_exc_le_un: len:32
260 cond_exc_ine_un: len:32
262 cond_exc_ilt_un: len:32
264 cond_exc_igt_un: len:32
266 cond_exc_ige_un: len:32
268 cond_exc_ile_un: len:32
274 icompare: src1:i src2:i len:4
275 icompare_imm: src1:i len:12
278 long_add: dest:i src1:i src2:i len:4
279 long_sub: dest:i src1:i src2:i len:4
280 long_mul: dest:i src1:i src2:i len:8
281 long_mul_imm: dest:i src1:i len:4
282 long_div: dest:i src1:i src2:i len:40
283 long_div_un: dest:i src1:i src2:i len:16
284 long_rem: dest:i src1:i src2:i len:48
285 long_rem_un: dest:i src1:i src2:i len:24
286 long_and: dest:i src1:i src2:i len:4
287 long_or: dest:i src1:i src2:i len:4
288 long_xor: dest:i src1:i src2:i len:4
289 long_shl: dest:i src1:i src2:i len:4
290 long_shl_imm: dest:i src1:i len:4
291 long_shr: dest:i src1:i src2:i len:4
292 long_shr_un: dest:i src1:i src2:i len:4
293 long_shr_imm: dest:i src1:i len:4
294 long_shr_un_imm: dest:i src1:i len:4
295 long_neg: dest:i src1:i len:4
296 long_not: dest:i src1:i len:4
297 long_conv_to_i1: dest:i src1:l len:32
298 long_conv_to_i2: dest:i src1:l len:32
299 long_conv_to_i4: dest:i src1:l len:32
300 long_conv_to_r4: dest:f src1:l len:32
301 long_conv_to_r8: dest:f src1:l len:32
302 long_conv_to_u4: dest:i src1:l len:32
303 long_conv_to_u8: dest:l src1:l len:32
304 long_conv_to_u2: dest:i src1:l len:32
305 long_conv_to_u1: dest:i src1:l len:32
306 long_conv_to_i: dest:i src1:l len:32
307 long_conv_to_ovf_i: dest:i src1:i src2:i len:32
308 long_conv_to_ovf_i4_2: dest:i src1:i src2:i len:32
309 zext_i4: dest:i src1:i len:16
310 sext_i4: dest:i src1:i len:16
322 long_add_ovf: dest:i src1:i src2:i len:16
323 long_add_ovf_un: dest:i src1:i src2:i len:16
324 long_mul_ovf: dest:i src1:i src2:i len:16
325 long_mul_ovf_un: dest:i src1:i src2:i len:16
326 long_sub_ovf: dest:i src1:i src2:i len:16
327 long_sub_ovf_un: dest:i src1:i src2:i len:16
329 long_ceq: dest:i len:12
330 long_cgt: dest:i len:12
331 long_cgt_un: dest:i len:12
332 long_clt: dest:i len:12
333 long_clt_un: dest:i len:12
335 long_add_imm: dest:i src1:i clob:1 len:4
336 long_sub_imm: dest:i src1:i clob:1 len:4
337 long_and_imm: dest:i src1:i clob:1 len:4
338 long_or_imm: dest:i src1:i clob:1 len:4
339 long_xor_imm: dest:i src1:i clob:1 len:4
341 lcompare: src1:i src2:i len:4
342 lcompare_imm: src1:i len:12
344 long_conv_to_r_un: dest:f src1:i src2:i len:37
357 float_add: dest:f src1:f src2:f len:4
358 float_sub: dest:f src1:f src2:f len:4
359 float_mul: dest:f src1:f src2:f len:4
360 float_div: dest:f src1:f src2:f len:4
361 float_div_un: dest:f src1:f src2:f len:4
362 float_rem: dest:f src1:f src2:f len:16
363 float_rem_un: dest:f src1:f src2:f len:16
364 float_neg: dest:f src1:f len:4
365 float_not: dest:f src1:f len:4
366 float_conv_to_i1: dest:i src1:f len:40
367 float_conv_to_i2: dest:i src1:f len:40
368 float_conv_to_i4: dest:i src1:f len:40
369 float_conv_to_i8: dest:l src1:f len:40
370 float_conv_to_r4: dest:f src1:f len:8
371 float_conv_to_u4: dest:i src1:f len:40
372 float_conv_to_u8: dest:l src1:f len:40
373 float_conv_to_u2: dest:i src1:f len:40
374 float_conv_to_u1: dest:i src1:f len:40
375 float_conv_to_i: dest:i src1:f len:40
376 float_ceq: dest:i src1:f src2:f len:20
377 float_cgt: dest:i src1:f src2:f len:20
378 float_cgt_un: dest:i src1:f src2:f len:20
379 float_clt: dest:i src1:f src2:f len:20
380 float_clt_un: dest:i src1:f src2:f len:20
381 float_conv_to_u: dest:i src1:f len:36
382 call_handler: len:20 clob:c
383 endfilter: src1:i len:16
384 aot_const: dest:i len:8
385 sqrt: dest:f src1:f len:4
386 adc: dest:i src1:i src2:i len:4
387 addcc: dest:i src1:i src2:i len:4
388 subcc: dest:i src1:i src2:i len:4
389 adc_imm: dest:i src1:i len:12
390 addcc_imm: dest:i src1:i len:12
391 subcc_imm: dest:i src1:i len:12
392 sbb: dest:i src1:i src2:i len:4
393 sbb_imm: dest:i src1:i len:12
395 #ppc_subfic: dest:i src1:i len:4
396 #ppc_subfze: dest:i src1:i len:4
397 bigmul: len:52 dest:l src1:i src2:i
398 bigmul_un: len:52 dest:l src1:i src2:i
399 tls_get: len:8 dest:i
400 mips_beq: src1:i src2:i len:24
401 mips_bgez: src1:i len:24
402 mips_bgtz: src1:i len:24
403 mips_blez: src1:i len:24
404 mips_bltz: src1:i len:24
405 mips_bne: src1:i src2:i len:24
406 mips_cvtsd: dest:f src1:f len:8
407 mips_fbeq: src1:f src2:f len:16
408 mips_fbge: src1:f src2:f len:16
409 mips_fbge_un: src1:f src2:f len:16
410 mips_fbgt: src1:f src2:f len:16
411 mips_fbgt_un: src1:f src2:f len:16
412 mips_fble: src1:f src2:f len:16
413 mips_fble_un: src1:f src2:f len:16
414 mips_fblt: src1:f src2:f len:16
415 mips_fblt_un: src1:f src2:f len:16
416 mips_fbne: src1:f src2:f len:16
417 mips_lwc1: dest:f src1:b len:16
418 mips_mtc1_s: dest:f src1:i len:8
419 mips_mtc1_s2: dest:f src1:i src2:i len:8
420 mips_mfc1_s: dest:i src1:f len:8
421 mips_mtc1_d: dest:f src1:i len:8
422 mips_mfc1_d: dest:i src1:f len:8
423 mips_slti: dest:i src1:i len:4
424 mips_slt: dest:i src1:i src2:i len:4
425 mips_sltiu: dest:i src1:i len:4
426 mips_sltu: dest:i src1:i src2:i len:4
427 mips_cond_exc_eq: src1:i src2:i len:44
428 mips_cond_exc_ge: src1:i src2:i len:44
429 mips_cond_exc_gt: src1:i src2:i len:44
430 mips_cond_exc_le: src1:i src2:i len:44
431 mips_cond_exc_lt: src1:i src2:i len:44
432 mips_cond_exc_ne_un: src1:i src2:i len:44
433 mips_cond_exc_ge_un: src1:i src2:i len:44
434 mips_cond_exc_gt_un: src1:i src2:i len:44
435 mips_cond_exc_le_un: src1:i src2:i len:44
436 mips_cond_exc_lt_un: src1:i src2:i len:44
437 mips_cond_exc_ov: src1:i src2:i len:44
438 mips_cond_exc_no: src1:i src2:i len:44
439 mips_cond_exc_c: src1:i src2:i len:44
440 mips_cond_exc_nc: src1:i src2:i len:44
441 mips_cond_exc_ieq: src1:i src2:i len:44
442 mips_cond_exc_ige: src1:i src2:i len:44
443 mips_cond_exc_igt: src1:i src2:i len:44
444 mips_cond_exc_ile: src1:i src2:i len:44
445 mips_cond_exc_ilt: src1:i src2:i len:44
446 mips_cond_exc_ine_un: src1:i src2:i len:44
447 mips_cond_exc_ige_un: src1:i src2:i len:44
448 mips_cond_exc_igt_un: src1:i src2:i len:44
449 mips_cond_exc_ile_un: src1:i src2:i len:44
450 mips_cond_exc_ilt_un: src1:i src2:i len:44
451 mips_cond_exc_iov: src1:i src2:i len:44
452 mips_cond_exc_ino: src1:i src2:i len:44
453 mips_cond_exc_ic: src1:i src2:i len:44
454 mips_cond_exc_inc: src1:i src2:i len:44