1 # mips cpu description file
2 # this file is read by genmdesc to pruduce a table with all the relevant
3 # information about the cpu instructions that may be used by the regsiter
4 # allocator, the scheduler and other parts of the arch-dependent part of mini.
6 # An opcode name is followed by a colon and optional specifiers.
7 # A specifier has a name, a colon and a value.
8 # Specifiers are separated by white space.
9 # Here is a description of the specifiers valid for this file and their
12 # dest:register describes the destination register of an instruction
13 # src1:register describes the first source register of an instruction
14 # src2:register describes the second source register of an instruction
16 # register may have the following values:
18 # l integer register pair
19 # v v0 register (output from calls)
20 # V v0/v1 register pair (output from calls)
22 # b base register (used in address references)
23 # f floating point register (pair - always)
24 # g floating point register return pair (f0/f1)
26 # len:number describe the maximun length in bytes of the instruction
27 # number is a positive integer
29 # cost:number describe how many cycles are needed to complete the instruction (unused)
31 # clob:spec describe if the instruction clobbers registers or has special needs
33 # spec can be one of the following characters:
34 # c clobbers caller-save registers
35 # r 'reserves' the destination register until a later instruction unreserves it
36 # used mostly to set output registers in function calls
38 # flags:spec describe if the instruction uses or sets the flags (unused)
40 # spec can be one of the following chars:
43 # m uses and modifies the flags
45 # res:spec describe what units are used in the processor (unused)
47 # delay: describe delay slots (unused)
49 # the required specifiers are: len, clob (if registers are clobbered), the registers
50 # specifiers if the registers are actually used, flags (when scheduling is implemented).
52 # See the code in mini-x86.c for more details on how the specifiers are used.
59 call: dest:v clob:c len:20
63 callvirt: dest:v clob:c len:20
64 int_conv_to_r_un: dest:f src1:i len:32
66 rethrow: src1:i len:24
67 ckfinite: dest:f src1:f len:24
75 localloc: dest:i src1:i len:60
76 compare: src1:i src2:i len:20
77 compare_imm: src1:i len:20
78 fcompare: src1:f src2:f len:12
79 oparglist: src1:i len:12
80 setlret: src1:i src2:i len:12
81 checkthis: src1:b len:4
83 voidcall: len:20 clob:c
84 voidcall_reg: src1:i len:20 clob:c
85 voidcall_membase: src1:b len:20 clob:c
87 fcall: dest:g len:20 clob:c
88 fcall_reg: dest:g src1:i len:20 clob:c
89 fcall_membase: dest:g src1:b len:20 clob:c
91 lcall: dest:V len:28 clob:c
92 lcall_reg: dest:V src1:i len:28 clob:c
93 lcall_membase: dest:V src1:b len:28 clob:c
95 call_reg: dest:v src1:i len:20 clob:c
96 call_membase: dest:v src1:b len:20 clob:c
99 vcall_reg: src1:i len:20 clob:c
100 vcall_membase: src1:b len:20 clob:c
102 vcall2: len:16 clob:c
103 vcall2_reg: src1:i len:20 clob:c
104 vcall2_membase: src1:b len:20 clob:c
106 jump_table: dest:i len:8
108 iconst: dest:i len:12
109 r4const: dest:f len:20
110 r8const: dest:f len:28
112 store_membase_imm: dest:b len:20
113 store_membase_reg: dest:b src1:i len:16
114 storei1_membase_imm: dest:b len:20
115 storei1_membase_reg: dest:b src1:i len:16
116 storei2_membase_imm: dest:b len:20
117 storei2_membase_reg: dest:b src1:i len:16
118 storei4_membase_imm: dest:b len:20
119 storei4_membase_reg: dest:b src1:i len:16
120 storei8_membase_imm: dest:b
121 storei8_membase_reg: dest:b src1:i
122 storer4_membase_reg: dest:b src1:f len:16
123 storer8_membase_reg: dest:b src1:f len:16
124 load_membase: dest:i src1:b len:16
125 loadi1_membase: dest:i src1:b len:16
126 loadu1_membase: dest:i src1:b len:16
127 loadi2_membase: dest:i src1:b len:16
128 loadu2_membase: dest:i src1:b len:16
129 loadi4_membase: dest:i src1:b len:16
130 loadu4_membase: dest:i src1:b len:16
131 loadi8_membase: dest:i src1:b
132 loadr4_membase: dest:f src1:b len:16
133 loadr8_membase: dest:f src1:b len:16
134 loadu4_mem: dest:i len:8
135 move: dest:i src1:i len:4
136 fmove: dest:f src1:f len:8
137 add_imm: dest:i src1:i len:12
138 sub_imm: dest:i src1:i len:12
139 mul_imm: dest:i src1:i len:20
140 # there is no actual support for division or reminder by immediate
141 # we simulate them, though (but we need to change the burg rules
142 # to allocate a symbolic reg for src2)
143 div_imm: dest:i src1:i src2:i len:20
144 div_un_imm: dest:i src1:i src2:i len:12
145 rem_imm: dest:i src1:i src2:i len:28
146 rem_un_imm: dest:i src1:i src2:i len:16
147 and_imm: dest:i src1:i len:12
148 or_imm: dest:i src1:i len:12
149 xor_imm: dest:i src1:i len:12
150 shl_imm: dest:i src1:i len:8
151 shr_imm: dest:i src1:i len:8
152 shr_un_imm: dest:i src1:i len:8
158 not_null: src1:i len:0
161 int_add: dest:i src1:i src2:i len:4
162 int_sub: dest:i src1:i src2:i len:4
163 int_mul: dest:i src1:i src2:i len:4
164 int_div: dest:i src1:i src2:i len:76
165 int_div_un: dest:i src1:i src2:i len:16
166 int_rem: dest:i src1:i src2:i len:76
167 int_rem_un: dest:i src1:i src2:i len:24
168 int_and: dest:i src1:i src2:i len:4
169 int_or: dest:i src1:i src2:i len:4
170 int_xor: dest:i src1:i src2:i len:4
171 int_shl: dest:i src1:i src2:i len:4
172 int_shr: dest:i src1:i src2:i len:4
173 int_shr_un: dest:i src1:i src2:i len:4
174 int_neg: dest:i src1:i len:4
175 int_not: dest:i src1:i len:4
176 int_conv_to_i1: dest:i src1:i len:8
177 int_conv_to_i2: dest:i src1:i len:8
178 int_conv_to_i4: dest:i src1:i len:4
179 int_conv_to_r4: dest:f src1:i len:36
180 int_conv_to_r8: dest:f src1:i len:36
181 int_conv_to_u4: dest:i src1:i
182 int_conv_to_u2: dest:i src1:i len:8
183 int_conv_to_u1: dest:i src1:i len:4
194 int_add_ovf: dest:i src1:i src2:i len:16
195 int_add_ovf_un: dest:i src1:i src2:i len:16
196 int_mul_ovf: dest:i src1:i src2:i len:16
197 int_mul_ovf_un: dest:i src1:i src2:i len:16
198 int_sub_ovf: dest:i src1:i src2:i len:16
199 int_sub_ovf_un: dest:i src1:i src2:i len:16
201 int_adc: dest:i src1:i src2:i len:4
202 int_addcc: dest:i src1:i src2:i len:4
203 int_subcc: dest:i src1:i src2:i len:4
204 int_sbb: dest:i src1:i src2:i len:4
205 int_adc_imm: dest:i src1:i len:12
206 int_sbb_imm: dest:i src1:i len:12
208 int_add_imm: dest:i src1:i len:12
209 int_sub_imm: dest:i src1:i len:12
210 int_mul_imm: dest:i src1:i len:12
211 int_div_imm: dest:i src1:i len:20
212 int_div_un_imm: dest:i src1:i len:12
213 int_rem_imm: dest:i src1:i len:28
214 int_rem_un_imm: dest:i src1:i len:16
215 int_and_imm: dest:i src1:i len:12
216 int_or_imm: dest:i src1:i len:12
217 int_xor_imm: dest:i src1:i len:12
218 int_shl_imm: dest:i src1:i len:8
219 int_shr_imm: dest:i src1:i len:8
220 int_shr_un_imm: dest:i src1:i len:8
222 int_ceq: dest:i len:16
223 int_cgt: dest:i len:16
224 int_cgt_un: dest:i len:16
225 int_clt: dest:i len:16
226 int_clt_un: dest:i len:16
229 cond_exc_ine_un: len:8
232 cond_exc_ne_un: len:32
234 cond_exc_lt_un: len:32
236 cond_exc_gt_un: len:32
238 cond_exc_ge_un: len:32
240 cond_exc_le_un: len:32
246 icompare: src1:i src2:i len:4
247 icompare_imm: src1:i len:12
249 long_conv_to_i1: dest:i src1:l len:32
250 long_conv_to_i2: dest:i src1:l len:32
251 long_conv_to_i4: dest:i src1:l len:32
252 long_conv_to_r4: dest:f src1:l len:32
253 long_conv_to_r8: dest:f src1:l len:32
254 long_conv_to_u4: dest:i src1:l len:32
255 long_conv_to_u8: dest:l src1:l len:32
256 long_conv_to_u2: dest:i src1:l len:32
257 long_conv_to_u1: dest:i src1:l len:32
258 long_conv_to_i: dest:i src1:l len:32
259 long_conv_to_ovf_i: dest:i src1:i src2:i len:32
262 long_conv_to_r_un: dest:f src1:i src2:i len:37
275 float_add: dest:f src1:f src2:f len:4
276 float_sub: dest:f src1:f src2:f len:4
277 float_mul: dest:f src1:f src2:f len:4
278 float_div: dest:f src1:f src2:f len:4
279 float_div_un: dest:f src1:f src2:f len:4
280 float_rem: dest:f src1:f src2:f len:16
281 float_rem_un: dest:f src1:f src2:f len:16
282 float_neg: dest:f src1:f len:4
283 float_not: dest:f src1:f len:4
284 float_conv_to_i1: dest:i src1:f len:40
285 float_conv_to_i2: dest:i src1:f len:40
286 float_conv_to_i4: dest:i src1:f len:40
287 float_conv_to_i8: dest:l src1:f len:40
288 float_conv_to_r4: dest:f src1:f len:8
289 float_conv_to_u4: dest:i src1:f len:40
290 float_conv_to_u8: dest:l src1:f len:40
291 float_conv_to_u2: dest:i src1:f len:40
292 float_conv_to_u1: dest:i src1:f len:40
293 float_conv_to_i: dest:i src1:f len:40
294 float_ceq: dest:i src1:f src2:f len:20
295 float_cgt: dest:i src1:f src2:f len:20
296 float_cgt_un: dest:i src1:f src2:f len:20
297 float_clt: dest:i src1:f src2:f len:20
298 float_clt_un: dest:i src1:f src2:f len:20
299 float_conv_to_u: dest:i src1:f len:36
301 endfilter: src1:i len:16
302 aot_const: dest:i len:8
303 sqrt: dest:f src1:f len:4
304 adc: dest:i src1:i src2:i len:4
305 addcc: dest:i src1:i src2:i len:4
306 subcc: dest:i src1:i src2:i len:4
307 adc_imm: dest:i src1:i len:12
308 addcc_imm: dest:i src1:i len:12
309 subcc_imm: dest:i src1:i len:12
310 sbb: dest:i src1:i src2:i len:4
311 sbb_imm: dest:i src1:i len:12
313 #ppc_subfic: dest:i src1:i len:4
314 #ppc_subfze: dest:i src1:i len:4
315 bigmul: len:52 dest:l src1:i src2:i
316 bigmul_un: len:52 dest:l src1:i src2:i
317 tls_get: len:8 dest:i
318 mips_beq: src1:i src2:i len:24
319 mips_bgez: src1:i len:24
320 mips_bgtz: src1:i len:24
321 mips_blez: src1:i len:24
322 mips_bltz: src1:i len:24
323 mips_bne: src1:i src2:i len:24
324 mips_cvtsd: dest:f src1:f len:8
325 mips_fbeq: src1:f src2:f len:16
326 mips_fbge: src1:f src2:f len:16
327 mips_fbge_un: src1:f src2:f len:16
328 mips_fbgt: src1:f src2:f len:16
329 mips_fbgt_un: src1:f src2:f len:16
330 mips_fble: src1:f src2:f len:16
331 mips_fble_un: src1:f src2:f len:16
332 mips_fblt: src1:f src2:f len:16
333 mips_fblt_un: src1:f src2:f len:16
334 mips_fbne: src1:f src2:f len:16
335 mips_lwc1: dest:f src1:b len:16
336 mips_mtc1_s: dest:f src1:i len:8
337 mips_mfc1_s: dest:i src1:f len:8
338 mips_mtc1_d: dest:f src1:i len:8
339 mips_mfc1_d: dest:i src1:f len:8
340 mips_slti: dest:i src1:i len:4
341 mips_slt: dest:i src1:i src2:i len:4
342 mips_sltiu: dest:i src1:i len:4
343 mips_sltu: dest:i src1:i src2:i len:4
344 mips_xori: dest:i src1:i len:4
345 mips_cond_exc_eq: src1:i src2:i len:40
346 mips_cond_exc_ge: src1:i src2:i len:40
347 mips_cond_exc_gt: src1:i src2:i len:40
348 mips_cond_exc_le: src1:i src2:i len:40
349 mips_cond_exc_lt: src1:i src2:i len:40
350 mips_cond_exc_ne_un: src1:i src2:i len:40
351 mips_cond_exc_ge_un: src1:i src2:i len:40
352 mips_cond_exc_gt_un: src1:i src2:i len:40
353 mips_cond_exc_le_un: src1:i src2:i len:44
354 mips_cond_exc_lt_un: src1:i src2:i len:40
355 mips_cond_exc_ov: src1:i src2:i len:40
356 mips_cond_exc_no: src1:i src2:i len:40
357 mips_cond_exc_c: src1:i src2:i len:40
358 mips_cond_exc_nc: src1:i src2:i len:40
359 mips_cond_exc_ieq: src1:i src2:i len:40
360 mips_cond_exc_ige: src1:i src2:i len:40
361 mips_cond_exc_igt: src1:i src2:i len:40
362 mips_cond_exc_ile: src1:i src2:i len:40
363 mips_cond_exc_ilt: src1:i src2:i len:40
364 mips_cond_exc_ine_un: src1:i src2:i len:40
365 mips_cond_exc_ige_un: src1:i src2:i len:40
366 mips_cond_exc_igt_un: src1:i src2:i len:40
367 mips_cond_exc_ile_un: src1:i src2:i len:40
368 mips_cond_exc_ilt_un: src1:i src2:i len:40
369 mips_cond_exc_iov: src1:i src2:i len:40
370 mips_cond_exc_ino: src1:i src2:i len:40
371 mips_cond_exc_ic: src1:i src2:i len:40
372 mips_cond_exc_inc: src1:i src2:i len:40