1 # hppa cpu description file
2 # this file is read by genmdesc to pruduce a table with all the relevant information
3 # about the cpu instructions that may be used by the register allocator, the scheduler
4 # and other parts of the arch-dependent part of mini.
6 # An opcode name is followed by a colon and optional specifiers.
7 # A specifier has a name, a colon and a value. Specifiers are separated by white space.
8 # Here is a description of the specifiers valid for this file and their possible values.
10 # dest:register describes the destination register of an instruction
11 # src1:register describes the first source register of an instruction
12 # src2:register describes the second source register of an instruction
14 # register may have the following values:
16 # a r28 register (output from calls)
17 # b base register (used in address references)
18 # f floating point register
22 # len:number describe the maximun length in bytes of the instruction
23 # number is a positive integer
25 # cost:number describe how many cycles are needed to complete the instruction (unused)
27 # clob:spec describe if the instruction clobbers registers or has special needs
29 # spec can be one of the following characters:
30 # c clobbers caller-save registers
31 # r 'reserves' the destination register until a later instruction unreserves it
32 # used mostly to set output registers in function calls
34 # flags:spec describe if the instruction uses or sets the flags (unused)
36 # spec can be one of the following chars:
39 # m uses and modifies the flags
41 # res:spec describe what units are used in the processor (unused)
43 # delay: describe delay slots (unused)
45 # the required specifiers are: len, clob (if registers are clobbered), the registers
46 # specifiers if the registers are actually used, flags (when scheduling is implemented).
48 # See the code in mini-hppa.c for more details on how the specifiers are used.
65 ldind.i1: src1:i dest:i len:4
66 ldind.u1: src1:i dest:i len:4
67 ldind.i2: src1:i dest:i len:4
68 ldind.u2: src1:i dest:i len:4
69 ldind.i4: src1:i dest:i len:4
70 ldind.u4: src1:i dest:i len:4
71 ldind.i: src1:i dest:i len:4
72 ldind.ref: src1:i dest:i len:4
73 stind.ref: src1:b src2:i
74 stind.i1: src1:b src2:i
75 stind.i2: src1:b src2:i
76 stind.i4: src1:b src2:i
77 stind.r4: src1:b src2:f
78 stind.r8: src1:b src2:f
79 add: dest:i src1:i src2:i len:64
80 sub: dest:i src1:i src2:i len:4
81 mul: dest:i src1:i src2:i len:4
82 div: dest:i src1:i src2:i len:64
83 div.un: dest:i src1:i src2:i len:8
84 rem: dest:d src1:i src2:i len:64
85 rem.un: dest:d src1:i src2:i len:64
86 and: dest:i src1:i src2:i len:4
87 or: dest:i src1:i src2:i len:4
88 xor: dest:i src1:i src2:i len:4
89 shl: dest:i src1:i src2:i clob:1 len:16
90 shr: dest:i src1:i src2:i clob:1 len:16
91 shr.un: dest:i src1:i src2:i clob:1 len:16
92 neg: dest:i src1:i len:4
93 not: dest:i src1:i len:4
94 conv.i1: dest:i src1:i len:8
95 conv.i2: dest:i src1:i len:8
96 conv.i4: dest:i src1:i len:4
97 conv.i8: dest:i src1:i len:4
98 conv.r4: dest:f src1:i len:64
99 conv.r8: dest:f src1:i len:64
100 conv.u4: dest:i src1:i len:4
101 conv.u8: dest:i src1:i len:4
103 op_rethrow: src1:i len:64
104 conv.ovf.u4: dest:i src1:i len:64
105 ckfinite: dest:f src1:f len:40
106 conv.u2: dest:i src1:i len:8
107 conv.u1: dest:i src1:i len:4
108 conv.i: dest:i src1:i len:4
109 mul.ovf: dest:i src1:i src2:i len:64
110 mul.ovf.un: dest:i src1:i src2:i len:64
111 start_handler: len:64
114 conv.u: dest:i src1:i len:4
118 cgt.un: dest:i len:64
120 clt.un: dest:i len:64
121 localloc: dest:i src1:i len:64
122 compare: src1:i src2:i len:4
123 icompare: src1:i src2:i len:4
124 compare_imm: src1:i len:64
125 icompare_imm: src1:i len:64
126 fcompare: src1:f src2:f len:64
127 lcompare: src1:i src2:i len:4
128 setfret: dest:f src1:f len:8
131 setret: dest:a src1:i len:4
132 setlret: dest:a src1:i len:8
133 setreg: dest:i src1:i len:4 clob:r
134 setfreg: dest:f src1:f len:4 clob:r
135 checkthis: src1:b len:4
136 oparglist: src1:i len:64
137 call: dest:a clob:c len:32
138 call_reg: dest:a src1:i len:64 clob:c
139 call_membase: dest:a src1:b len:64 clob:c
140 voidcall: len:64 clob:c
141 voidcall_reg: src1:i len:64 clob:c
142 voidcall_membase: src1:b len:64 clob:c
143 fcall: dest:f len:64 clob:c
144 fcall_reg: dest:f src1:i len:64 clob:c
145 fcall_membase: dest:f src1:b len:64 clob:c
146 lcall: dest:L len:42 clob:c
147 lcall_reg: dest:L src1:i len:64 clob:c
148 lcall_membase: dest:L src1:b len:64 clob:c
150 vcall_reg: src1:i len:64 clob:c
151 vcall_membase: src1:b len:64 clob:c
152 iconst: dest:i len:64
153 i8const: dest:i len:64
154 r4const: dest:f len:64
155 r8const: dest:f len:64
156 store_membase_imm: dest:b len:64
157 store_membase_reg: dest:b src1:i len:64
158 storei1_membase_imm: dest:b len:64
159 storei1_membase_reg: dest:b src1:i len:64
160 storei2_membase_imm: dest:b len:64
161 storei2_membase_reg: dest:b src1:i len:64
162 storei4_membase_imm: dest:b len:64
163 storei4_membase_reg: dest:b src1:i len:64
164 storei8_membase_imm: dest:b len:64 len:64
165 storei8_membase_reg: dest:b src1:i len:64
166 storer4_membase_reg: dest:b src1:f len:64
167 storer8_membase_reg: dest:b src1:f len:64
168 load_membase: dest:i src1:b len:64
169 loadi1_membase: dest:i src1:b len:64
170 loadu1_membase: dest:i src1:b len:64
171 loadi2_membase: dest:i src1:b len:64
172 loadu2_membase: dest:i src1:b len:64
173 loadi4_membase: dest:i src1:b len:64
174 loadu4_membase: dest:i src1:b len:64
175 loadi8_membase: dest:i src1:b len:64
176 loadr4_membase: dest:f src1:b len:64
177 loadr8_membase: dest:f src1:b len:64
178 loadu4_mem: dest:i len:8
179 move: dest:i src1:i len:4
180 add_imm: dest:i src1:i len:64
181 addcc_imm: dest:i src1:i len:64
182 sub_imm: dest:i src1:i len:64
183 subcc_imm: dest:i src1:i len:64
184 mul_imm: dest:i src1:i len:64
185 div_imm: dest:a src1:i src2:i len:64
186 div_un_imm: dest:a src1:i src2:i len:64
187 rem_imm: dest:d src1:i src2:i len:64
188 rem_un_imm: dest:d src1:i src2:i len:64
189 and_imm: dest:i src1:i len:64
190 or_imm: dest:i src1:i len:64
191 xor_imm: dest:i src1:i len:64
192 shl_imm: dest:i src1:i clob:1 len:20
193 shr_imm: dest:i src1:i clob:1 len:20
194 shr_un_imm: dest:i src1:i clob:1 len:20
195 hppa_cond_exc_eq: src1:i src2:i len:64
196 hppa_cond_exc_ge: src1:i src2:i len:64
197 hppa_cond_exc_gt: src1:i src2:i len:64
198 hppa_cond_exc_le: src1:i src2:i len:64
199 hppa_cond_exc_lt: src1:i src2:i len:64
200 hppa_cond_exc_ne_un: src1:i src2:i len:64
201 hppa_cond_exc_ge_un: src1:i src2:i len:64
202 hppa_cond_exc_gt_un: src1:i src2:i len:64
203 hppa_cond_exc_le_un: src1:i src2:i len:64
204 hppa_cond_exc_lt_un: src1:i src2:i len:64
205 hppa_cond_exc_ov: src1:i src2:i len:64
206 hppa_cond_exc_no: src1:i src2:i len:64
207 hppa_cond_exc_c: src1:i src2:i len:64
208 hppa_cond_exc_nc: src1:i src2:i len:64
209 long_shl: dest:i src1:i src2:i clob:1 len:64
210 long_shr: dest:i src1:i src2:i clob:1 len:64
211 long_shr_un: dest:i src1:i src2:i clob:1 len:64
212 long_conv_to_ovf_i: dest:i src1:i src2:i len:48
214 long_conv_to_r_un: dest:f src1:i src2:i len:64
215 long_shr_imm: dest:i src1:i clob:1 len:64
216 long_shr_un_imm: dest:i src1:i clob:1 len:64
217 long_shl_imm: dest:i src1:i clob:1 len:64
218 float_beq: src1:f src2:f len:32
219 float_bne_un: src1:f src2:f len:32
220 float_blt: src1:f src2:f len:32
221 float_blt_un: src1:f src2:f len:32
222 float_bgt: src1:f src2:f len:32
223 float_btg_un: src1:f src2:f len:32
224 float_bge: src1:f src2:f len:32
225 float_bge_un: src1:f src2:f len:32
226 float_ble: src1:f src2:f len:32
227 float_ble_un: src1:f src2:f len:32
228 float_add: dest:f src1:f src2:f len:4
229 float_sub: dest:f src1:f src2:f len:4
230 float_mul: dest:f src1:f src2:f len:4
231 float_div: dest:f src1:f src2:f len:4
232 float_div_un: dest:f src1:f src2:f len:4
233 float_rem: dest:f src1:f src2:f len:64
234 float_rem_un: dest:f src1:f src2:f len:64
235 float_neg: dest:f src1:f len:4
236 float_not: dest:f src1:f len:4
237 float_conv_to_i1: dest:i src1:f len:40
238 float_conv_to_i2: dest:i src1:f len:40
239 float_conv_to_i4: dest:i src1:f len:40
240 float_conv_to_i8: dest:L src1:f len:40
241 float_conv_to_r4: dest:f src1:f len:8
242 float_conv_to_u4: dest:i src1:f len:40
243 float_conv_to_u8: dest:L src1:f len:40
244 float_conv_to_u2: dest:i src1:f len:40
245 float_conv_to_u1: dest:i src1:f len:40
246 float_conv_to_i: dest:i src1:f len:40
247 float_ceq: dest:i src1:f src2:f len:64
248 float_cgt: dest:i src1:f src2:f len:64
249 float_cgt_un: dest:i src1:f src2:f len:64
250 float_clt: dest:i src1:f src2:f len:64
251 float_clt_un: dest:i src1:f src2:f len:64
252 float_conv_to_u: dest:i src1:f len:64
254 op_endfilter: src1:i len:64
255 aot_const: dest:i len:64
256 adc: dest:i src1:i src2:i len:4
257 addcc: dest:i src1:i src2:i len:4
258 subcc: dest:i src1:i src2:i len:4
259 adc_imm: dest:i src1:i len:64
260 sbb: dest:i src1:i src2:i len:4
261 sbb_imm: dest:i src1:i len:64
263 op_bigmul: len:2 dest:L src1:a src2:i
264 op_bigmul_un: len:2 dest:L src1:a src2:i
265 fmove: dest:f src1:f len:8
268 int_add: dest:i src1:i src2:i len:64
269 int_sub: dest:i src1:i src2:i len:64
270 int_mul: dest:i src1:i src2:i len:64
271 int_div: dest:i src1:i src2:i len:64
272 int_div_un: dest:i src1:i src2:i len:64
273 int_rem: dest:i src1:i src2:i len:64
274 int_rem_un: dest:i src1:i src2:i len:64
275 int_and: dest:i src1:i src2:i len:64
276 int_or: dest:i src1:i src2:i len:64
277 int_xor: dest:i src1:i src2:i len:64
278 int_shl: dest:i src1:i src2:i clob:1 len:64
279 int_shr: dest:i src1:i src2:i clob:1 len:64
280 int_shr_un: dest:i src1:i src2:i clob:1 len:64
281 int_adc: dest:i src1:i src2:i len:64
282 int_adc_imm: dest:i src1:i len:64
283 int_sbb: dest:i src1:i src2:i len:64
284 int_sbb_imm: dest:i src1:i len:64
285 int_addcc: dest:i src1:i src2:i len:64
286 int_subcc: dest:i src1:i src2:i len:64
287 int_add_imm: dest:i src1:i len:64
288 int_sub_imm: dest:i src1:i len:64
289 int_mul_imm: dest:i src1:i len:64
290 int_div_imm: dest:i src1:i len:64
291 int_div_un_imm: dest:i src1:i len:64
292 int_rem_imm: dest:i src1:i len:64
293 int_rem_un_imm: dest:i src1:i len:64
294 int_and_imm: dest:i src1:i len:64
295 int_or_imm: dest:i src1:i len:64
296 int_xor_imm: dest:i src1:i len:64
297 int_shl_imm: dest:i src1:i clob:1 len:64
298 int_shr_imm: dest:i src1:i clob:1 len:64
299 int_shr_un_imm: dest:i src1:i clob:1 len:64
300 int_neg: dest:i src1:i len:64
301 int_not: dest:i src1:i len:64
302 int_ceq: dest:i len:64
303 int_cgt: dest:i len:64
304 int_cgt_un: dest:i len:64
305 int_clt: dest:i len:64
306 int_clt_un: dest:i len:64
318 memory_barrier: len:4
320 hppa_beq: src1:i src2:i len:32
321 hppa_bne: src1:i src2:i len:32
322 hppa_blt: src1:i src2:i len:32
323 hppa_blt_un: src1:i src2:i len:32
324 hppa_ble: src1:i src2:i len:32
325 hppa_ble_un: src1:i src2:i len:32
326 hppa_bgt: src1:i src2:i len:32
327 hppa_bgt_un: src1:i src2:i len:32
328 hppa_bge: src1:i src2:i len:32
329 hppa_bge_un: src1:i src2:i len:32
331 hppa_xmpyu: dest:f src1:f src2:f len:4
332 hppa_add_ovf: dest:i src1:i src2:i len:24
333 hppa_sub_ovf: dest:i src1:i src2:i len:24
334 hppa_addc_ovf: dest:i src1:i src2:i len:24
335 hppa_subb_ovf: dest:i src1:i src2:i len:24
336 hppa_ceq: dest:i src1:i src2:i len:8
337 hppa_clt: dest:i src1:i src2:i len:8
338 hppa_clt_un: dest:i src1:i src2:i len:8
339 hppa_cgt: dest:i src1:i src2:i len:8
340 hppa_cgt_un: dest:i src1:i src2:i len:8
342 hppa_outarg_r4const: dest:f len:12 clob:r
343 hppa_outarg_regoffset: dest:i src1:b len:8
345 hppa_loadr4_left: dest:f src1:b len:12
346 hppa_loadr4_right: dest:f src1:b len:12
347 hppa_storer4_left: dest:b src1:f len:12
348 hppa_storer4_right: dest:b src1:f len:12
350 hppa_setf4reg: dest:f src1:f len:4