1 # x86-class cpu description file
2 # this file is read by genmdesc to pruduce a table with all the relevant information
3 # about the cpu instructions that may be used by the regsiter allocator, the scheduler
4 # and other parts of the arch-dependent part of mini.
6 # An opcode name is followed by a colon and optional specifiers.
7 # A specifier has a name, a colon and a value. Specifiers are separated by white space.
8 # Here is a description of the specifiers valid for this file and their possible values.
10 # dest:register describes the destination register of an instruction
11 # src1:register describes the first source register of an instruction
12 # src2:register describes the second source register of an instruction
15 # b base register (used in address references)
16 # f floating point register
19 # l long reg (forced eax:edx)
21 # c register which can be used as a byte register (RAX..RDX)
23 # len:number describe the maximun length in bytes of the instruction
24 # number is a positive integer. If the length is not specified
25 # it defaults to zero. But lengths are only checked if the given opcode
26 # is encountered during compilation. Some opcodes, like CONV_U4 are
27 # transformed into other opcodes in the brg files, so they do not show up
28 # during code generation.
30 # cost:number describe how many cycles are needed to complete the instruction (unused)
32 # clob:spec describe if the instruction clobbers registers or has special needs
34 # c clobbers caller-save registers
35 # 1 clobbers the first source register
38 # x both the source operands are clobbered (xchg)
41 # flags:spec describe if the instruction uses or sets the flags (unused)
45 # m uses and modifies the flags
47 # res:spec describe what units are used in the processor (unused)
49 # delay: describe delay slots (unused)
51 # the required specifiers are: len, clob (if registers are clobbered), the registers
52 # specifiers if the registers are actually used, flags (when scheduling is implemented).
54 # See the code in mini-x86.c for more details on how the specifiers are used.
71 long_add: dest:i src1:i src2:i len:3 clob:1
72 long_sub: dest:i src1:i src2:i len:3 clob:1
73 long_mul: dest:i src1:i src2:i len:4 clob:1
74 long_div: dest:a src1:a src2:i len:16 clob:d
75 long_div_un: dest:a src1:a src2:i len:16 clob:d
76 long_rem: dest:d src1:a src2:i len:16 clob:a
77 long_rem_un: dest:d src1:a src2:i len:16 clob:a
78 long_and: dest:i src1:i src2:i len:3 clob:1
79 long_or: dest:i src1:i src2:i len:3 clob:1
80 long_xor: dest:i src1:i src2:i len:3 clob:1
81 long_shl: dest:i src1:i src2:s clob:1 len:3
82 long_shr: dest:i src1:i src2:s clob:1 len:3
83 long_shr_un: dest:i src1:i src2:s clob:1 len:3
84 long_neg: dest:i src1:i len:3 clob:1
85 long_not: dest:i src1:i len:3 clob:1
86 long_conv_to_i1: dest:i src1:i len:4
87 long_conv_to_i2: dest:i src1:i len:4
88 long_conv_to_i4: dest:i src1:i len:3
89 long_conv_to_i8: dest:i src1:i len:3
90 long_conv_to_r4: dest:f src1:i len:9
91 long_conv_to_r8: dest:f src1:i len:9
92 long_conv_to_u4: dest:i src1:i len:3
93 long_conv_to_u8: dest:i src1:i len:3
94 long_conv_to_r_un: dest:f src1:i len:64
95 long_conv_to_ovf_i4_un: dest:i src1:i len:16
96 long_conv_to_ovf_u4: dest:i src1:i len:15
97 long_conv_to_u2: dest:i src1:i len:4
98 long_conv_to_u1: dest:i src1:i len:4
99 zext_i4: dest:i src1:i len:4
101 long_mul_imm: dest:i src1:i clob:1 len:12
102 long_min: dest:i src1:i src2:i len:16 clob:1
103 long_max: dest:i src1:i src2:i len:16 clob:1
106 rethrow: src1:i len:18
109 endfilter: src1:a len:9
110 ckfinite: dest:f src1:f len:43
111 mul.ovf: dest:i src1:i src2:i clob:1 len:10
112 # this opcode is handled specially in the code generator
113 mul.ovf.un: dest:i src1:i src2:i len:18
119 localloc: dest:i src1:i len:84
120 compare: src1:i src2:i len:3
121 lcompare: src1:i src2:i len:3
122 icompare: src1:i src2:i len:3
123 compare_imm: src1:i len:13
124 icompare_imm: src1:i len:8
125 fcompare: src1:f src2:f clob:a len:13
126 oparglist: src1:b len:11
129 setret: dest:a src1:i len:3
130 setlret: dest:i src1:i src2:i len:5
131 checkthis: src1:b len:5
132 call: dest:a clob:c len:64
133 voidcall: clob:c len:64
134 voidcall_reg: src1:i clob:c len:64
135 voidcall_membase: src1:b clob:c len:64
136 fcall: dest:f len:64 clob:c
137 fcall_reg: dest:f src1:i len:64 clob:c
138 fcall_membase: dest:f src1:b len:64 clob:c
139 lcall: dest:a len:64 clob:c
140 lcall_reg: dest:a src1:i len:64 clob:c
141 lcall_membase: dest:a src1:b len:64 clob:c
143 vcall_reg: src1:i len:64 clob:c
144 vcall_membase: src1:b len:64 clob:c
145 call_reg: dest:a src1:i len:64 clob:c
146 call_membase: dest:a src1:b len:64 clob:c
147 iconst: dest:i len:10
148 i8const: dest:i len:18
149 r4const: dest:f len:14
150 r8const: dest:f len:9
151 store_membase_imm: dest:b len:15
152 store_membase_reg: dest:b src1:i len:9
153 storei8_membase_reg: dest:b src1:i len:9
154 storei1_membase_imm: dest:b len:11
155 storei1_membase_reg: dest:b src1:c len:9
156 storei2_membase_imm: dest:b len:13
157 storei2_membase_reg: dest:b src1:i len:9
158 storei4_membase_imm: dest:b len:13
159 storei4_membase_reg: dest:b src1:i len:9
160 storei8_membase_imm: dest:b len:18
161 storer4_membase_reg: dest:b src1:f len:15
162 storer8_membase_reg: dest:b src1:f len:10
163 load_membase: dest:i src1:b len:15
164 loadi1_membase: dest:c src1:b len:9
165 loadu1_membase: dest:c src1:b len:9
166 loadi2_membase: dest:i src1:b len:9
167 loadu2_membase: dest:i src1:b len:9
168 loadi4_membase: dest:i src1:b len:9
169 loadu4_membase: dest:i src1:b len:9
170 loadi8_membase: dest:i src1:b len:18
171 loadr4_membase: dest:f src1:b len:16
172 loadr8_membase: dest:f src1:b len:16
173 loadr8_spill_membase: src1:b len:9
174 loadu4_mem: dest:i len:10
175 amd64_loadi8_memindex: dest:i src1:i src2:i len:10
176 move: dest:i src1:i len:3
177 add_imm: dest:i src1:i len:8 clob:1
178 sub_imm: dest:i src1:i len:8 clob:1
179 mul_imm: dest:i src1:i len:11
180 # there is no actual support for division or reminder by immediate
181 # we simulate them, though (but we need to change the burg rules
182 # to allocate a symbolic reg for src2)
183 div_imm: dest:a src1:i src2:i len:16 clob:d
184 div_un_imm: dest:a src1:i src2:i len:16 clob:d
185 rem_imm: dest:d src1:i src2:i len:16 clob:a
186 rem_un_imm: dest:d src1:i src2:i len:16 clob:a
187 and_imm: dest:i src1:i len:8 clob:1
188 or_imm: dest:i src1:i len:8 clob:1
189 xor_imm: dest:i src1:i len:8 clob:1
190 shl_imm: dest:i src1:i len:8 clob:1
191 shr_imm: dest:i src1:i len:8 clob:1
192 shr_un_imm: dest:i src1:i len:8 clob:1
194 cond_exc_ne_un: len:8
196 cond_exc_lt_un: len:8
198 cond_exc_gt_un: len:8
200 cond_exc_ge_un: len:8
202 cond_exc_le_un: len:8
210 long_conv_to_ovf_i: dest:i src1:i src2:i len:40
211 long_mul_ovf: dest:i src1:i src2:i clob:1 len:16
212 long_mul_ovf_un: dest:i src1:i src2:i len:22
213 long_shr_imm: dest:i src1:i clob:1 len:11
214 long_shr_un_imm: dest:i src1:i clob:1 len:11
215 long_shl_imm: dest:i src1:i clob:1 len:11
238 float_add: dest:f src1:f src2:f len:5
239 float_sub: dest:f src1:f src2:f len:5
240 float_mul: dest:f src1:f src2:f len:5
241 float_div: dest:f src1:f src2:f len:5
242 float_div_un: dest:f src1:f src2:f len:5
243 float_rem: dest:f src1:f src2:f len:19
244 float_rem_un: dest:f src1:f src2:f len:19
245 float_neg: dest:f src1:f len:23
246 float_not: dest:f src1:f len:3
247 float_conv_to_i1: dest:i src1:f len:49
248 float_conv_to_i2: dest:i src1:f len:49
249 float_conv_to_i4: dest:i src1:f len:49
250 float_conv_to_i8: dest:i src1:f len:49
251 float_conv_to_u4: dest:i src1:f len:49
252 float_conv_to_u8: dest:i src1:f len:49
253 float_conv_to_u2: dest:i src1:f len:49
254 float_conv_to_u1: dest:i src1:f len:49
255 float_conv_to_i: dest:i src1:f len:49
256 float_conv_to_ovf_i: dest:a src1:f len:40
257 float_conv_to_ovd_u: dest:a src1:f len:40
259 float_ceq: dest:i src1:f src2:f len:35
260 float_cgt: dest:i src1:f src2:f len:35
261 float_cgt_un: dest:i src1:f src2:f len:48
262 float_clt: dest:i src1:f src2:f len:35
263 float_clt_un: dest:i src1:f src2:f len:42
264 float_ceq_membase: dest:i src1:f src2:b len:35
265 float_cgt_membase: dest:i src1:f src2:b len:35
266 float_cgt_un_membase: dest:i src1:f src2:b len:48
267 float_clt_membase: dest:i src1:f src2:b len:35
268 float_clt_un_membase: dest:i src1:f src2:b len:42
269 float_conv_to_u: dest:i src1:f len:46
270 fmove: dest:f src1:f len:8
272 aot_const: dest:i len:10
273 x86_test_null: src1:i len:5
274 x86_compare_membase_reg: src1:b src2:i len:9
275 x86_compare_membase_imm: src1:b len:13
276 x86_compare_reg_membase: src1:i src2:b len:8
277 x86_inc_reg: dest:i src1:i clob:1 len:3
278 x86_inc_membase: src1:b len:8
279 x86_dec_reg: dest:i src1:i clob:1 len:3
280 x86_dec_membase: src1:b len:8
281 x86_add_membase_imm: src1:b len:13
282 x86_sub_membase_imm: src1:b len:13
283 x86_push: src1:i len:3
285 x86_push_membase: src1:b len:8
286 x86_push_obj: src1:b len:40
287 x86_lea: dest:i src1:i src2:i len:8
288 x86_lea_membase: dest:i src1:i len:11
289 x86_xchg: src1:i src2:i clob:x len:2
290 x86_fpop: src1:f len:3
291 x86_fp_load_i8: dest:f src1:b len:8
292 x86_fp_load_i4: dest:f src1:b len:8
293 x86_seteq_membase: src1:b len:9
294 x86_add_membase: dest:i src1:i src2:b clob:1 len:13
295 x86_sub_membase: dest:i src1:i src2:b clob:1 len:13
296 x86_mul_membase: dest:i src1:i src2:b clob:1 len:14
297 tls_get: dest:i len:16
298 amd64_test_null: src1:i len:5
299 amd64_icompare_membase_reg: src1:b src2:i len:8
300 amd64_icompare_membase_imm: src1:b len:13
301 amd64_icompare_reg_membase: src1:i src2:b len:8
302 amd64_set_xmmreg_r4: dest:f src1:f len:14 clob:m
303 amd64_set_xmmreg_r8: dest:f src1:f len:14 clob:m
304 amd64_save_sp_to_lmf: len:16
305 atomic_add_i4: src1:b src2:i dest:i len:32
306 atomic_add_new_i4: src1:b src2:i dest:i len:32
307 atomic_exchange_i4: src1:b src2:i dest:i len:32
308 atomic_add_i8: src1:b src2:i dest:i len:32
309 atomic_add_new_i8: src1:b src2:i dest:i len:32
310 atomic_exchange_i8: src1:b src2:i dest:i len:32
311 memory_barrier: len:16
312 adc: dest:i src1:i src2:i len:3 clob:1
313 addcc: dest:i src1:i src2:i len:3 clob:1
314 subcc: dest:i src1:i src2:i len:3 clob:1
315 adc_imm: dest:i src1:i len:8 clob:1
316 sbb: dest:i src1:i src2:i len:3 clob:1
317 sbb_imm: dest:i src1:i len:8 clob:1
319 sin: dest:f src1:f len:32
320 cos: dest:f src1:f len:32
321 abs: dest:f src1:f len:32
322 tan: dest:f src1:f len:59
323 atan: dest:f src1:f len:9
324 sqrt: dest:f src1:f len:32
325 bigmul: len:3 dest:i src1:a src2:i
326 bigmul_un: len:3 dest:i src1:a src2:i
327 sext_i1: dest:i src1:i len:4
328 sext_i2: dest:i src1:i len:4
329 sext_i4: dest:i src1:i len:8
332 int_add: dest:i src1:i src2:i clob:1 len:4
333 int_sub: dest:i src1:i src2:i clob:1 len:4
334 int_mul: dest:i src1:i src2:i clob:1 len:4
335 int_mul_ovf: dest:i src1:i src2:i clob:1 len:32
336 int_mul_ovf_un: dest:i src1:i src2:i clob:1 len:32
337 int_div: dest:a src1:a src2:i clob:d len:32
338 int_div_un: dest:a src1:a src2:i clob:d len:32
339 int_rem: dest:d src1:a src2:i clob:a len:32
340 int_rem_un: dest:d src1:a src2:i clob:a len:32
341 int_and: dest:i src1:i src2:i clob:1 len:4
342 int_or: dest:i src1:i src2:i clob:1 len:4
343 int_xor: dest:i src1:i src2:i clob:1 len:4
344 int_shl: dest:i src1:i src2:s clob:1 len:4
345 int_shr: dest:i src1:i src2:s clob:1 len:4
346 int_shr_un: dest:i src1:i src2:s clob:1 len:4
347 int_adc: dest:i src1:i src2:i clob:1 len:4
348 int_adc_imm: dest:i src1:i clob:1 len:8
349 int_sbb: dest:i src1:i src2:i clob:1 len:4
350 int_sbb_imm: dest:i src1:i clob:1 len:8
351 int_addcc: dest:i src1:i src2:i clob:1 len:16
352 int_subcc: dest:i src1:i src2:i clob:1 len:16
353 int_add_imm: dest:i src1:i clob:1 len:8
354 int_sub_imm: dest:i src1:i clob:1 len:8
355 int_mul_imm: dest:i src1:i clob:1 len:32
356 int_div_imm: dest:a src1:i clob:d len:32
357 int_div_un_imm: dest:a src1:i clob:d len:32
358 int_rem_imm: dest:d src1:i clob:a len:32
359 int_rem_un_imm: dest:d src1:i clob:a len:32
360 int_and_imm: dest:i src1:i clob:1 len:8
361 int_or_imm: dest:i src1:i clob:1 len:8
362 int_xor_imm: dest:i src1:i clob:1 len:8
363 int_shl_imm: dest:i src1:i clob:1 len:8
364 int_shr_imm: dest:i src1:i clob:1 len:8
365 int_shr_un_imm: dest:i src1:i clob:1 len:8
366 int_min: dest:i src1:i src2:i len:16 clob:1
367 int_max: dest:i src1:i src2:i len:16 clob:1
369 int_neg: dest:i src1:i clob:1 len:4
370 int_not: dest:i src1:i clob:1 len:4
371 int_conv_to_r4: dest:f src1:i len:9
372 int_conv_to_r8: dest:f src1:i len:9
373 int_ceq: dest:c len:8
374 int_cgt: dest:c len:8
375 int_cgt_un: dest:c len:8
376 int_clt: dest:c len:8
377 int_clt_un: dest:c len:8