1 # x86-class cpu description file
2 # this file is read by genmdesc to pruduce a table with all the relevant information
3 # about the cpu instructions that may be used by the regsiter allocator, the scheduler
4 # and other parts of the arch-dependent part of mini.
6 # An opcode name is followed by a colon and optional specifiers.
7 # A specifier has a name, a colon and a value. Specifiers are separated by white space.
8 # Here is a description of the specifiers valid for this file and their possible values.
10 # dest:register describes the destination register of an instruction
11 # src1:register describes the first source register of an instruction
12 # src2:register describes the second source register of an instruction
15 # b base register (used in address references)
16 # f floating point register
19 # l long reg (forced eax:edx)
21 # c register which can be used as a byte register (RAX..RDX)
23 # len:number describe the maximun length in bytes of the instruction
24 # number is a positive integer. If the length is not specified
25 # it defaults to zero. But lengths are only checked if the given opcode
26 # is encountered during compilation. Some opcodes, like CONV_U4 are
27 # transformed into other opcodes in the brg files, so they do not show up
28 # during code generation.
30 # cost:number describe how many cycles are needed to complete the instruction (unused)
32 # clob:spec describe if the instruction clobbers registers or has special needs
34 # c clobbers caller-save registers
35 # 1 clobbers the first source register
38 # x both the source operands are clobbered (xchg)
41 # flags:spec describe if the instruction uses or sets the flags (unused)
45 # m uses and modifies the flags
47 # res:spec describe what units are used in the processor (unused)
49 # delay: describe delay slots (unused)
51 # the required specifiers are: len, clob (if registers are clobbered), the registers
52 # specifiers if the registers are actually used, flags (when scheduling is implemented).
54 # See the code in mini-x86.c for more details on how the specifiers are used.
61 long_add: dest:i src1:i src2:i len:3 clob:1
62 long_sub: dest:i src1:i src2:i len:3 clob:1
63 long_mul: dest:i src1:i src2:i len:4 clob:1
64 long_div: dest:a src1:a src2:i len:16 clob:d
65 long_div_un: dest:a src1:a src2:i len:16 clob:d
66 long_rem: dest:d src1:a src2:i len:16 clob:a
67 long_rem_un: dest:d src1:a src2:i len:16 clob:a
68 long_and: dest:i src1:i src2:i len:3 clob:1
69 long_or: dest:i src1:i src2:i len:3 clob:1
70 long_xor: dest:i src1:i src2:i len:3 clob:1
71 long_shl: dest:i src1:i src2:s clob:1 len:3
72 long_shr: dest:i src1:i src2:s clob:1 len:3
73 long_shr_un: dest:i src1:i src2:s clob:1 len:3
74 long_neg: dest:i src1:i len:3 clob:1
75 long_not: dest:i src1:i len:3 clob:1
76 long_conv_to_i1: dest:i src1:i len:4
77 long_conv_to_i2: dest:i src1:i len:4
78 long_conv_to_i4: dest:i src1:i len:3
79 long_conv_to_i8: dest:i src1:i len:3
80 long_conv_to_r4: dest:f src1:i len:9
81 long_conv_to_r8: dest:f src1:i len:9
82 long_conv_to_u4: dest:i src1:i len:3
83 long_conv_to_u8: dest:i src1:i len:3
84 long_conv_to_r_un: dest:f src1:i len:64
85 long_conv_to_ovf_i4_un: dest:i src1:i len:16
86 long_conv_to_ovf_u4: dest:i src1:i len:15
87 long_conv_to_u2: dest:i src1:i len:4
88 long_conv_to_u1: dest:i src1:i len:4
89 zext_i4: dest:i src1:i len:4
91 long_mul_imm: dest:i src1:i clob:1 len:12
92 long_min: dest:i src1:i src2:i len:16 clob:1
93 long_min_un: dest:i src1:i src2:i len:16 clob:1
94 long_max: dest:i src1:i src2:i len:16 clob:1
95 long_max_un: dest:i src1:i src2:i len:16 clob:1
98 rethrow: src1:i len:18
101 endfilter: src1:a len:9
102 ckfinite: dest:f src1:f len:43
108 localloc: dest:i src1:i len:84
109 compare: src1:i src2:i len:3
110 lcompare: src1:i src2:i len:3
111 icompare: src1:i src2:i len:3
112 compare_imm: src1:i len:13
113 icompare_imm: src1:i len:8
114 fcompare: src1:f src2:f clob:a len:13
115 oparglist: src1:b len:11
117 setret: dest:a src1:i len:3
118 setlret: dest:i src1:i src2:i len:5
119 checkthis: src1:b len:5
120 call: dest:a clob:c len:32
121 voidcall: clob:c len:32
122 voidcall_reg: src1:i clob:c len:32
123 voidcall_membase: src1:b clob:c len:32
124 fcall: dest:f len:64 clob:c
125 fcall_reg: dest:f src1:i len:64 clob:c
126 fcall_membase: dest:f src1:b len:64 clob:c
127 lcall: dest:a len:64 clob:c
128 lcall_reg: dest:a src1:i len:64 clob:c
129 lcall_membase: dest:a src1:b len:64 clob:c
131 vcall_reg: src1:i len:64 clob:c
132 vcall_membase: src1:b len:64 clob:c
133 call_reg: dest:a src1:i len:32 clob:c
134 call_membase: dest:a src1:b len:32 clob:c
135 iconst: dest:i len:10
136 i8const: dest:i len:10
137 r4const: dest:f len:14
138 r8const: dest:f len:9
139 store_membase_imm: dest:b len:15
140 store_membase_reg: dest:b src1:i len:9
141 storei8_membase_reg: dest:b src1:i len:9
142 storei1_membase_imm: dest:b len:11
143 storei1_membase_reg: dest:b src1:c len:9
144 storei2_membase_imm: dest:b len:13
145 storei2_membase_reg: dest:b src1:i len:9
146 storei4_membase_imm: dest:b len:13
147 storei4_membase_reg: dest:b src1:i len:9
148 storei8_membase_imm: dest:b len:18
149 storer4_membase_reg: dest:b src1:f len:15
150 storer8_membase_reg: dest:b src1:f len:10
151 load_membase: dest:i src1:b len:8
152 loadi1_membase: dest:c src1:b len:9
153 loadu1_membase: dest:c src1:b len:9
154 loadi2_membase: dest:i src1:b len:9
155 loadu2_membase: dest:i src1:b len:9
156 loadi4_membase: dest:i src1:b len:9
157 loadu4_membase: dest:i src1:b len:9
158 loadi8_membase: dest:i src1:b len:18
159 loadr4_membase: dest:f src1:b len:16
160 loadr8_membase: dest:f src1:b len:16
161 loadr8_spill_membase: src1:b len:9
162 loadu4_mem: dest:i len:10
163 amd64_loadi8_memindex: dest:i src1:i src2:i len:10
164 move: dest:i src1:i len:3
165 add_imm: dest:i src1:i len:8 clob:1
166 sub_imm: dest:i src1:i len:8 clob:1
167 mul_imm: dest:i src1:i len:11
168 # there is no actual support for division or reminder by immediate
169 # we simulate them, though (but we need to change the burg rules
170 # to allocate a symbolic reg for src2)
171 div_imm: dest:a src1:i src2:i len:16 clob:d
172 div_un_imm: dest:a src1:i src2:i len:16 clob:d
173 rem_imm: dest:d src1:i src2:i len:16 clob:a
174 rem_un_imm: dest:d src1:i src2:i len:16 clob:a
175 and_imm: dest:i src1:i len:8 clob:1
176 or_imm: dest:i src1:i len:8 clob:1
177 xor_imm: dest:i src1:i len:8 clob:1
178 shl_imm: dest:i src1:i len:8 clob:1
179 shr_imm: dest:i src1:i len:8 clob:1
180 shr_un_imm: dest:i src1:i len:8 clob:1
182 cond_exc_ne_un: len:8
184 cond_exc_lt_un: len:8
186 cond_exc_gt_un: len:8
188 cond_exc_ge_un: len:8
190 cond_exc_le_un: len:8
198 long_conv_to_ovf_i: dest:i src1:i src2:i len:40
199 long_mul_ovf: dest:i src1:i src2:i clob:1 len:16
200 long_mul_ovf_un: dest:i src1:i src2:i len:22
201 long_shr_imm: dest:i src1:i clob:1 len:11
202 long_shr_un_imm: dest:i src1:i clob:1 len:11
203 long_shl_imm: dest:i src1:i clob:1 len:11
226 float_add: dest:f src1:f src2:f clob:1 len:5
227 float_sub: dest:f src1:f src2:f clob:1 len:5
228 float_mul: dest:f src1:f src2:f clob:1 len:5
229 float_div: dest:f src1:f src2:f clob:1 len:5
230 float_div_un: dest:f src1:f src2:f clob:1 len:5
231 float_rem: dest:f src1:f src2:f clob:1 len:19
232 float_rem_un: dest:f src1:f src2:f clob:1 len:19
233 float_neg: dest:f src1:f clob:1 len:23
234 float_not: dest:f src1:f clob:1 len:3
235 float_conv_to_i1: dest:i src1:f len:49
236 float_conv_to_i2: dest:i src1:f len:49
237 float_conv_to_i4: dest:i src1:f len:49
238 float_conv_to_i8: dest:i src1:f len:49
239 float_conv_to_u4: dest:i src1:f len:49
240 float_conv_to_u8: dest:i src1:f len:49
241 float_conv_to_u2: dest:i src1:f len:49
242 float_conv_to_u1: dest:i src1:f len:49
243 float_conv_to_i: dest:i src1:f len:49
244 float_conv_to_ovf_i: dest:a src1:f len:40
245 float_conv_to_ovd_u: dest:a src1:f len:40
247 float_ceq: dest:i src1:f src2:f len:35
248 float_cgt: dest:i src1:f src2:f len:35
249 float_cgt_un: dest:i src1:f src2:f len:48
250 float_clt: dest:i src1:f src2:f len:35
251 float_clt_un: dest:i src1:f src2:f len:42
252 float_ceq_membase: dest:i src1:f src2:b len:35
253 float_cgt_membase: dest:i src1:f src2:b len:35
254 float_cgt_un_membase: dest:i src1:f src2:b len:48
255 float_clt_membase: dest:i src1:f src2:b len:35
256 float_clt_un_membase: dest:i src1:f src2:b len:42
257 float_conv_to_u: dest:i src1:f len:46
258 fmove: dest:f src1:f len:8
260 aot_const: dest:i len:10
261 x86_test_null: src1:i len:5
262 x86_compare_membase_reg: src1:b src2:i len:9
263 x86_compare_membase_imm: src1:b len:13
264 x86_compare_reg_membase: src1:i src2:b len:8
265 x86_inc_reg: dest:i src1:i clob:1 len:3
266 x86_inc_membase: src1:b len:8
267 x86_dec_reg: dest:i src1:i clob:1 len:3
268 x86_dec_membase: src1:b len:8
269 x86_add_membase_imm: src1:b len:13
270 x86_sub_membase_imm: src1:b len:13
271 x86_push: src1:i len:3
273 x86_push_membase: src1:b len:8
274 x86_push_obj: src1:b len:40
275 x86_lea: dest:i src1:i src2:i len:8
276 x86_lea_membase: dest:i src1:i len:11
277 x86_xchg: src1:i src2:i clob:x len:2
278 x86_fpop: src1:f len:3
279 x86_seteq_membase: src1:b len:9
281 x86_add_reg_membase: dest:i src1:i src2:b clob:1 len:13
282 x86_sub_reg_membase: dest:i src1:i src2:b clob:1 len:13
283 x86_mul_reg_membase: dest:i src1:i src2:b clob:1 len:13
284 x86_and_reg_membase: dest:i src1:i src2:b clob:1 len:13
285 x86_or_reg_membase: dest:i src1:i src2:b clob:1 len:13
286 x86_xor_reg_membase: dest:i src1:i src2:b clob:1 len:13
288 amd64_test_null: src1:i len:5
289 amd64_icompare_membase_reg: src1:b src2:i len:8
290 amd64_icompare_membase_imm: src1:b len:13
291 amd64_icompare_reg_membase: src1:i src2:b len:8
292 amd64_set_xmmreg_r4: dest:f src1:f len:14 clob:m
293 amd64_set_xmmreg_r8: dest:f src1:f len:14 clob:m
294 amd64_save_sp_to_lmf: len:16
295 tls_get: dest:i len:16
296 atomic_add_i4: src1:b src2:i dest:i len:32
297 atomic_add_new_i4: src1:b src2:i dest:i len:32
298 atomic_exchange_i4: src1:b src2:i dest:a len:32
299 atomic_add_i8: src1:b src2:i dest:i len:32
300 atomic_add_new_i8: src1:b src2:i dest:i len:32
301 atomic_exchange_i8: src1:b src2:i dest:a len:32
302 atomic_cas_imm_i4: src1:b src2:i dest:a len:32
303 atomic_cas_imm_i8: src1:b src2:i dest:a len:32
304 memory_barrier: len:16
305 adc: dest:i src1:i src2:i len:3 clob:1
306 addcc: dest:i src1:i src2:i len:3 clob:1
307 subcc: dest:i src1:i src2:i len:3 clob:1
308 adc_imm: dest:i src1:i len:8 clob:1
309 sbb: dest:i src1:i src2:i len:3 clob:1
310 sbb_imm: dest:i src1:i len:8 clob:1
312 sin: dest:f src1:f len:32
313 cos: dest:f src1:f len:32
314 abs: dest:f src1:f clob:1 len:32
315 tan: dest:f src1:f len:59
316 atan: dest:f src1:f len:9
317 sqrt: dest:f src1:f len:32
318 bigmul: len:3 dest:i src1:a src2:i
319 bigmul_un: len:3 dest:i src1:a src2:i
320 sext_i1: dest:i src1:i len:4
321 sext_i2: dest:i src1:i len:4
322 sext_i4: dest:i src1:i len:8
325 int_add: dest:i src1:i src2:i clob:1 len:4
326 int_sub: dest:i src1:i src2:i clob:1 len:4
327 int_mul: dest:i src1:i src2:i clob:1 len:4
328 int_mul_ovf: dest:i src1:i src2:i clob:1 len:32
329 int_mul_ovf_un: dest:i src1:i src2:i clob:1 len:32
330 int_div: dest:a src1:a src2:i clob:d len:32
331 int_div_un: dest:a src1:a src2:i clob:d len:32
332 int_rem: dest:d src1:a src2:i clob:a len:32
333 int_rem_un: dest:d src1:a src2:i clob:a len:32
334 int_and: dest:i src1:i src2:i clob:1 len:4
335 int_or: dest:i src1:i src2:i clob:1 len:4
336 int_xor: dest:i src1:i src2:i clob:1 len:4
337 int_shl: dest:i src1:i src2:s clob:1 len:4
338 int_shr: dest:i src1:i src2:s clob:1 len:4
339 int_shr_un: dest:i src1:i src2:s clob:1 len:4
340 int_adc: dest:i src1:i src2:i clob:1 len:4
341 int_adc_imm: dest:i src1:i clob:1 len:8
342 int_sbb: dest:i src1:i src2:i clob:1 len:4
343 int_sbb_imm: dest:i src1:i clob:1 len:8
344 int_addcc: dest:i src1:i src2:i clob:1 len:16
345 int_subcc: dest:i src1:i src2:i clob:1 len:16
346 int_add_imm: dest:i src1:i clob:1 len:8
347 int_sub_imm: dest:i src1:i clob:1 len:8
348 int_mul_imm: dest:i src1:i clob:1 len:32
349 int_div_imm: dest:a src1:i clob:d len:32
350 int_div_un_imm: dest:a src1:i clob:d len:32
351 int_rem_imm: dest:d src1:i clob:a len:32
352 int_rem_un_imm: dest:d src1:i clob:a len:32
353 int_and_imm: dest:i src1:i clob:1 len:8
354 int_or_imm: dest:i src1:i clob:1 len:8
355 int_xor_imm: dest:i src1:i clob:1 len:8
356 int_shl_imm: dest:i src1:i clob:1 len:8
357 int_shr_imm: dest:i src1:i clob:1 len:8
358 int_shr_un_imm: dest:i src1:i clob:1 len:8
359 int_min: dest:i src1:i src2:i len:16 clob:1
360 int_max: dest:i src1:i src2:i len:16 clob:1
361 int_min_un: dest:i src1:i src2:i len:16 clob:1
362 int_max_un: dest:i src1:i src2:i len:16 clob:1
364 int_neg: dest:i src1:i clob:1 len:4
365 int_not: dest:i src1:i clob:1 len:4
366 int_conv_to_r4: dest:f src1:i len:9
367 int_conv_to_r8: dest:f src1:i len:9
368 int_ceq: dest:c len:8
369 int_cgt: dest:c len:8
370 int_cgt_un: dest:c len:8
371 int_clt: dest:c len:8
372 int_clt_un: dest:c len:8