1 /* Macros for DPI ops, auto-generated from template */
6 /* Rd := imm8 ROR rot */
7 #define ARM_MOV_REG_IMM_COND(p, reg, imm8, rot, cond) \
8 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_MOV, reg, 0, imm8, rot, cond)
9 #define ARM_MOV_REG_IMM(p, reg, imm8, rot) \
10 ARM_MOV_REG_IMM_COND(p, reg, imm8, rot, ARMCOND_AL)
12 #define ARM_MOVS_REG_IMM_COND(p, reg, imm8, rot, cond) \
13 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_MOV, reg, 0, imm8, rot, cond)
14 #define ARM_MOVS_REG_IMM(p, reg, imm8, rot) \
15 ARM_MOVS_REG_IMM_COND(p, reg, imm8, rot, ARMCOND_AL)
18 #define _MOV_REG_IMM_COND(reg, imm8, rot, cond) \
19 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_MOV, reg, 0, imm8, rot, cond)
20 #define _MOV_REG_IMM(reg, imm8, rot) \
21 _MOV_REG_IMM_COND(reg, imm8, rot, ARMCOND_AL)
23 #define _MOVS_REG_IMM_COND(reg, imm8, rot, cond) \
24 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_MOV, reg, 0, imm8, rot, cond)
25 #define _MOVS_REG_IMM(reg, imm8, rot) \
26 _MOVS_REG_IMM_COND(reg, imm8, rot, ARMCOND_AL)
31 #define ARM_MOV_REG_IMM8_COND(p, reg, imm8, cond) \
32 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_MOV, reg, 0, imm8, 0, cond)
33 #define ARM_MOV_REG_IMM8(p, reg, imm8) \
34 ARM_MOV_REG_IMM8_COND(p, reg, imm8, ARMCOND_AL)
36 #define ARM_MOVS_REG_IMM8_COND(p, reg, imm8, cond) \
37 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_MOV, reg, 0, imm8, 0, cond)
38 #define ARM_MOVS_REG_IMM8(p, reg, imm8) \
39 ARM_MOVS_REG_IMM8_COND(p, reg, imm8, ARMCOND_AL)
42 #define _MOV_REG_IMM8_COND(reg, imm8, cond) \
43 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_MOV, reg, 0, imm8, 0, cond)
44 #define _MOV_REG_IMM8(reg, imm8) \
45 _MOV_REG_IMM8_COND(reg, imm8, ARMCOND_AL)
47 #define _MOVS_REG_IMM8_COND(reg, imm8, cond) \
48 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_MOV, reg, 0, imm8, 0, cond)
49 #define _MOVS_REG_IMM8(reg, imm8) \
50 _MOVS_REG_IMM8_COND(reg, imm8, ARMCOND_AL)
55 #define ARM_MOV_REG_REG_COND(p, rd, rm, cond) \
56 ARM_DPIOP_REG_REG_COND(p, ARMOP_MOV, rd, 0, rm, cond)
57 #define ARM_MOV_REG_REG(p, rd, rm) \
58 ARM_MOV_REG_REG_COND(p, rd, rm, ARMCOND_AL)
60 #define ARM_MOVS_REG_REG_COND(p, rd, rm, cond) \
61 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_MOV, rd, 0, rm, cond)
62 #define ARM_MOVS_REG_REG(p, rd, rm) \
63 ARM_MOVS_REG_REG_COND(p, rd, rm, ARMCOND_AL)
66 #define _MOV_REG_REG_COND(rd, rm, cond) \
67 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_MOV, rd, 0, rm, cond)
68 #define _MOV_REG_REG(rd, rm) \
69 _MOV_REG_REG_COND(rd, rm, ARMCOND_AL)
71 #define _MOVS_REG_REG_COND(rd, rm, cond) \
72 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_MOV, rd, 0, rm, cond)
73 #define _MOVS_REG_REG(rd, rm) \
74 _MOVS_REG_REG_COND(rd, rm, ARMCOND_AL)
78 /* Rd := Rm <shift_type> imm_shift */
79 #define ARM_MOV_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, cond) \
80 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_MOV, rd, 0, rm, shift_type, imm_shift, cond)
81 #define ARM_MOV_REG_IMMSHIFT(p, rd, rm, shift_type, imm_shift) \
82 ARM_MOV_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, ARMCOND_AL)
84 #define ARM_MOVS_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, cond) \
85 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_MOV, rd, 0, rm, shift_type, imm_shift, cond)
86 #define ARM_MOVS_REG_IMMSHIFT(p, rd, rm, shift_type, imm_shift) \
87 ARM_MOVS_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, ARMCOND_AL)
90 #define _MOV_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, cond) \
91 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_MOV, rd, 0, rm, shift_type, imm_shift, cond)
92 #define _MOV_REG_IMMSHIFT(rd, rm, shift_type, imm_shift) \
93 _MOV_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, ARMCOND_AL)
95 #define _MOVS_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, cond) \
96 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_MOV, rd, 0, rm, shift_type, imm_shift, cond)
97 #define _MOVS_REG_IMMSHIFT(rd, rm, shift_type, imm_shift) \
98 _MOVS_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, ARMCOND_AL)
103 /* Rd := (Rm <shift_type> Rs) */
104 #define ARM_MOV_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, cond) \
105 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_MOV, rd, 0, rm, shift_type, rs, cond)
106 #define ARM_MOV_REG_REGSHIFT(p, rd, rm, shift_type, rs) \
107 ARM_MOV_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, ARMCOND_AL)
109 #define ARM_MOVS_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, cond) \
110 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_MOV, rd, 0, rm, shift_type, rs, cond)
111 #define ARM_MOVS_REG_REGSHIFT(p, rd, rm, shift_type, rs) \
112 ARM_MOVS_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, ARMCOND_AL)
115 #define _MOV_REG_REGSHIFT_COND(rd, rm, shift_type, rs, cond) \
116 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_MOV, rd, 0, rm, shift_type, rs, cond)
117 #define _MOV_REG_REGSHIFT(rd, rm, shift_type, rs) \
118 _MOV_REG_REGSHIFT_COND(rd, rm, shift_type, rs, ARMCOND_AL)
120 #define _MOVS_REG_REGSHIFT_COND(rd, rm, shift_type, rs, cond) \
121 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_MOV, rd, 0, rm, shift_type, rs, cond)
122 #define _MOVS_REG_REGSHIFT(rd, rm, shift_type, rs) \
123 _MOVS_REG_REGSHIFT_COND(rd, rm, shift_type, rs, ARMCOND_AL)
127 /* Rd := imm8 ROR rot */
128 #define ARM_MVN_REG_IMM_COND(p, reg, imm8, rot, cond) \
129 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_MVN, reg, 0, imm8, rot, cond)
130 #define ARM_MVN_REG_IMM(p, reg, imm8, rot) \
131 ARM_MVN_REG_IMM_COND(p, reg, imm8, rot, ARMCOND_AL)
133 #define ARM_MVNS_REG_IMM_COND(p, reg, imm8, rot, cond) \
134 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_MVN, reg, 0, imm8, rot, cond)
135 #define ARM_MVNS_REG_IMM(p, reg, imm8, rot) \
136 ARM_MVNS_REG_IMM_COND(p, reg, imm8, rot, ARMCOND_AL)
139 #define _MVN_REG_IMM_COND(reg, imm8, rot, cond) \
140 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_MVN, reg, 0, imm8, rot, cond)
141 #define _MVN_REG_IMM(reg, imm8, rot) \
142 _MVN_REG_IMM_COND(reg, imm8, rot, ARMCOND_AL)
144 #define _MVNS_REG_IMM_COND(reg, imm8, rot, cond) \
145 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_MVN, reg, 0, imm8, rot, cond)
146 #define _MVNS_REG_IMM(reg, imm8, rot) \
147 _MVNS_REG_IMM_COND(reg, imm8, rot, ARMCOND_AL)
152 #define ARM_MVN_REG_IMM8_COND(p, reg, imm8, cond) \
153 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_MVN, reg, 0, imm8, 0, cond)
154 #define ARM_MVN_REG_IMM8(p, reg, imm8) \
155 ARM_MVN_REG_IMM8_COND(p, reg, imm8, ARMCOND_AL)
157 #define ARM_MVNS_REG_IMM8_COND(p, reg, imm8, cond) \
158 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_MVN, reg, 0, imm8, 0, cond)
159 #define ARM_MVNS_REG_IMM8(p, reg, imm8) \
160 ARM_MVNS_REG_IMM8_COND(p, reg, imm8, ARMCOND_AL)
163 #define _MVN_REG_IMM8_COND(reg, imm8, cond) \
164 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_MVN, reg, 0, imm8, 0, cond)
165 #define _MVN_REG_IMM8(reg, imm8) \
166 _MVN_REG_IMM8_COND(reg, imm8, ARMCOND_AL)
168 #define _MVNS_REG_IMM8_COND(reg, imm8, cond) \
169 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_MVN, reg, 0, imm8, 0, cond)
170 #define _MVNS_REG_IMM8(reg, imm8) \
171 _MVNS_REG_IMM8_COND(reg, imm8, ARMCOND_AL)
176 #define ARM_MVN_REG_REG_COND(p, rd, rm, cond) \
177 ARM_DPIOP_REG_REG_COND(p, ARMOP_MVN, rd, 0, rm, cond)
178 #define ARM_MVN_REG_REG(p, rd, rm) \
179 ARM_MVN_REG_REG_COND(p, rd, rm, ARMCOND_AL)
181 #define ARM_MVNS_REG_REG_COND(p, rd, rm, cond) \
182 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_MVN, rd, 0, rm, cond)
183 #define ARM_MVNS_REG_REG(p, rd, rm) \
184 ARM_MVNS_REG_REG_COND(p, rd, rm, ARMCOND_AL)
187 #define _MVN_REG_REG_COND(rd, rm, cond) \
188 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_MVN, rd, 0, rm, cond)
189 #define _MVN_REG_REG(rd, rm) \
190 _MVN_REG_REG_COND(rd, rm, ARMCOND_AL)
192 #define _MVNS_REG_REG_COND(rd, rm, cond) \
193 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_MVN, rd, 0, rm, cond)
194 #define _MVNS_REG_REG(rd, rm) \
195 _MVNS_REG_REG_COND(rd, rm, ARMCOND_AL)
199 /* Rd := Rm <shift_type> imm_shift */
200 #define ARM_MVN_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, cond) \
201 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_MVN, rd, 0, rm, shift_type, imm_shift, cond)
202 #define ARM_MVN_REG_IMMSHIFT(p, rd, rm, shift_type, imm_shift) \
203 ARM_MVN_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, ARMCOND_AL)
205 #define ARM_MVNS_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, cond) \
206 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_MVN, rd, 0, rm, shift_type, imm_shift, cond)
207 #define ARM_MVNS_REG_IMMSHIFT(p, rd, rm, shift_type, imm_shift) \
208 ARM_MVNS_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, ARMCOND_AL)
211 #define _MVN_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, cond) \
212 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_MVN, rd, 0, rm, shift_type, imm_shift, cond)
213 #define _MVN_REG_IMMSHIFT(rd, rm, shift_type, imm_shift) \
214 _MVN_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, ARMCOND_AL)
216 #define _MVNS_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, cond) \
217 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_MVN, rd, 0, rm, shift_type, imm_shift, cond)
218 #define _MVNS_REG_IMMSHIFT(rd, rm, shift_type, imm_shift) \
219 _MVNS_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, ARMCOND_AL)
224 /* Rd := (Rm <shift_type> Rs) */
225 #define ARM_MVN_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, cond) \
226 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_MVN, rd, 0, rm, shift_type, rs, cond)
227 #define ARM_MVN_REG_REGSHIFT(p, rd, rm, shift_type, rs) \
228 ARM_MVN_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, ARMCOND_AL)
230 #define ARM_MVNS_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, cond) \
231 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_MVN, rd, 0, rm, shift_type, rs, cond)
232 #define ARM_MVNS_REG_REGSHIFT(p, rd, rm, shift_type, rs) \
233 ARM_MVNS_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, ARMCOND_AL)
236 #define _MVN_REG_REGSHIFT_COND(rd, rm, shift_type, rs, cond) \
237 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_MVN, rd, 0, rm, shift_type, rs, cond)
238 #define _MVN_REG_REGSHIFT(rd, rm, shift_type, rs) \
239 _MVN_REG_REGSHIFT_COND(rd, rm, shift_type, rs, ARMCOND_AL)
241 #define _MVNS_REG_REGSHIFT_COND(rd, rm, shift_type, rs, cond) \
242 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_MVN, rd, 0, rm, shift_type, rs, cond)
243 #define _MVNS_REG_REGSHIFT(rd, rm, shift_type, rs) \
244 _MVNS_REG_REGSHIFT_COND(rd, rm, shift_type, rs, ARMCOND_AL)
249 /* DPIs, arithmetic and logical */
253 /* Rd := Rn AND (imm8 ROR rot) ; rot is power of 2 */
254 #define ARM_AND_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
255 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_AND, rd, rn, imm8, rot, cond)
256 #define ARM_AND_REG_IMM(p, rd, rn, imm8, rot) \
257 ARM_AND_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
258 #define ARM_ANDS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
259 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_AND, rd, rn, imm8, rot, cond)
260 #define ARM_ANDS_REG_IMM(p, rd, rn, imm8, rot) \
261 ARM_ANDS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
264 #define _AND_REG_IMM_COND(rd, rn, imm8, rot, cond) \
265 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_AND, rd, rn, imm8, rot, cond)
266 #define _AND_REG_IMM(rd, rn, imm8, rot) \
267 _AND_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
268 #define _ANDS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
269 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_AND, rd, rn, imm8, rot, cond)
270 #define _ANDS_REG_IMM(rd, rn, imm8, rot) \
271 _ANDS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
275 /* Rd := Rn AND imm8 */
276 #define ARM_AND_REG_IMM8_COND(p, rd, rn, imm8, cond) \
277 ARM_AND_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
278 #define ARM_AND_REG_IMM8(p, rd, rn, imm8) \
279 ARM_AND_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
280 #define ARM_ANDS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
281 ARM_ANDS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
282 #define ARM_ANDS_REG_IMM8(p, rd, rn, imm8) \
283 ARM_ANDS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
286 #define _AND_REG_IMM8_COND(rd, rn, imm8, cond) \
287 _AND_REG_IMM_COND(rd, rn, imm8, 0, cond)
288 #define _AND_REG_IMM8(rd, rn, imm8) \
289 _AND_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
290 #define _ANDS_REG_IMM8_COND(rd, rn, imm8, cond) \
291 _ANDS_REG_IMM_COND(rd, rn, imm8, 0, cond)
292 #define _ANDS_REG_IMM8(rd, rn, imm8) \
293 _ANDS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
297 /* Rd := Rn AND Rm */
298 #define ARM_AND_REG_REG_COND(p, rd, rn, rm, cond) \
299 ARM_DPIOP_REG_REG_COND(p, ARMOP_AND, rd, rn, rm, cond)
300 #define ARM_AND_REG_REG(p, rd, rn, rm) \
301 ARM_AND_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
302 #define ARM_ANDS_REG_REG_COND(p, rd, rn, rm, cond) \
303 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_AND, rd, rn, rm, cond)
304 #define ARM_ANDS_REG_REG(p, rd, rn, rm) \
305 ARM_ANDS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
308 #define _AND_REG_REG_COND(rd, rn, rm, cond) \
309 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_AND, rd, rn, rm, cond)
310 #define _AND_REG_REG(rd, rn, rm) \
311 _AND_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
312 #define _ANDS_REG_REG_COND(rd, rn, rm, cond) \
313 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_AND, rd, rn, rm, cond)
314 #define _ANDS_REG_REG(rd, rn, rm) \
315 _ANDS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
319 /* Rd := Rn AND (Rm <shift_type> imm_shift) */
320 #define ARM_AND_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
321 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_AND, rd, rn, rm, shift_type, imm_shift, cond)
322 #define ARM_AND_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
323 ARM_AND_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
324 #define ARM_ANDS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
325 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_AND, rd, rn, rm, shift_type, imm_shift, cond)
326 #define ARM_ANDS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
327 ARM_ANDS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
330 #define _AND_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
331 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_AND, rd, rn, rm, shift_type, imm_shift, cond)
332 #define _AND_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
333 _AND_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
334 #define _ANDS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
335 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_AND, rd, rn, rm, shift_type, imm_shift, cond)
336 #define _ANDS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
337 _ANDS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
341 /* Rd := Rn AND (Rm <shift_type> Rs) */
342 #define ARM_AND_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
343 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_AND, rd, rn, rm, shift_t, rs, cond)
344 #define ARM_AND_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
345 ARM_AND_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
346 #define ARM_ANDS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
347 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_AND, rd, rn, rm, shift_t, rs, cond)
348 #define ARM_ANDS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
349 ARM_ANDS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
352 #define _AND_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
353 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_AND, rd, rn, rm, shift_t, rs, cond)
354 #define _AND_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
355 _AND_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
356 #define _ANDS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
357 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_AND, rd, rn, rm, shift_t, rs, cond)
358 #define _ANDS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
359 _ANDS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
365 /* Rd := Rn EOR (imm8 ROR rot) ; rot is power of 2 */
366 #define ARM_EOR_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
367 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_EOR, rd, rn, imm8, rot, cond)
368 #define ARM_EOR_REG_IMM(p, rd, rn, imm8, rot) \
369 ARM_EOR_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
370 #define ARM_EORS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
371 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_EOR, rd, rn, imm8, rot, cond)
372 #define ARM_EORS_REG_IMM(p, rd, rn, imm8, rot) \
373 ARM_EORS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
376 #define _EOR_REG_IMM_COND(rd, rn, imm8, rot, cond) \
377 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_EOR, rd, rn, imm8, rot, cond)
378 #define _EOR_REG_IMM(rd, rn, imm8, rot) \
379 _EOR_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
380 #define _EORS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
381 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_EOR, rd, rn, imm8, rot, cond)
382 #define _EORS_REG_IMM(rd, rn, imm8, rot) \
383 _EORS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
387 /* Rd := Rn EOR imm8 */
388 #define ARM_EOR_REG_IMM8_COND(p, rd, rn, imm8, cond) \
389 ARM_EOR_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
390 #define ARM_EOR_REG_IMM8(p, rd, rn, imm8) \
391 ARM_EOR_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
392 #define ARM_EORS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
393 ARM_EORS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
394 #define ARM_EORS_REG_IMM8(p, rd, rn, imm8) \
395 ARM_EORS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
398 #define _EOR_REG_IMM8_COND(rd, rn, imm8, cond) \
399 _EOR_REG_IMM_COND(rd, rn, imm8, 0, cond)
400 #define _EOR_REG_IMM8(rd, rn, imm8) \
401 _EOR_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
402 #define _EORS_REG_IMM8_COND(rd, rn, imm8, cond) \
403 _EORS_REG_IMM_COND(rd, rn, imm8, 0, cond)
404 #define _EORS_REG_IMM8(rd, rn, imm8) \
405 _EORS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
409 /* Rd := Rn EOR Rm */
410 #define ARM_EOR_REG_REG_COND(p, rd, rn, rm, cond) \
411 ARM_DPIOP_REG_REG_COND(p, ARMOP_EOR, rd, rn, rm, cond)
412 #define ARM_EOR_REG_REG(p, rd, rn, rm) \
413 ARM_EOR_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
414 #define ARM_EORS_REG_REG_COND(p, rd, rn, rm, cond) \
415 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_EOR, rd, rn, rm, cond)
416 #define ARM_EORS_REG_REG(p, rd, rn, rm) \
417 ARM_EORS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
420 #define _EOR_REG_REG_COND(rd, rn, rm, cond) \
421 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_EOR, rd, rn, rm, cond)
422 #define _EOR_REG_REG(rd, rn, rm) \
423 _EOR_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
424 #define _EORS_REG_REG_COND(rd, rn, rm, cond) \
425 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_EOR, rd, rn, rm, cond)
426 #define _EORS_REG_REG(rd, rn, rm) \
427 _EORS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
431 /* Rd := Rn EOR (Rm <shift_type> imm_shift) */
432 #define ARM_EOR_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
433 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_EOR, rd, rn, rm, shift_type, imm_shift, cond)
434 #define ARM_EOR_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
435 ARM_EOR_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
436 #define ARM_EORS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
437 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_EOR, rd, rn, rm, shift_type, imm_shift, cond)
438 #define ARM_EORS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
439 ARM_EORS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
442 #define _EOR_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
443 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_EOR, rd, rn, rm, shift_type, imm_shift, cond)
444 #define _EOR_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
445 _EOR_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
446 #define _EORS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
447 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_EOR, rd, rn, rm, shift_type, imm_shift, cond)
448 #define _EORS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
449 _EORS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
453 /* Rd := Rn EOR (Rm <shift_type> Rs) */
454 #define ARM_EOR_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
455 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_EOR, rd, rn, rm, shift_t, rs, cond)
456 #define ARM_EOR_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
457 ARM_EOR_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
458 #define ARM_EORS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
459 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_EOR, rd, rn, rm, shift_t, rs, cond)
460 #define ARM_EORS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
461 ARM_EORS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
464 #define _EOR_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
465 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_EOR, rd, rn, rm, shift_t, rs, cond)
466 #define _EOR_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
467 _EOR_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
468 #define _EORS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
469 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_EOR, rd, rn, rm, shift_t, rs, cond)
470 #define _EORS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
471 _EORS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
477 /* Rd := Rn SUB (imm8 ROR rot) ; rot is power of 2 */
478 #define ARM_SUB_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
479 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_SUB, rd, rn, imm8, rot, cond)
480 #define ARM_SUB_REG_IMM(p, rd, rn, imm8, rot) \
481 ARM_SUB_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
482 #define ARM_SUBS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
483 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_SUB, rd, rn, imm8, rot, cond)
484 #define ARM_SUBS_REG_IMM(p, rd, rn, imm8, rot) \
485 ARM_SUBS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
488 #define _SUB_REG_IMM_COND(rd, rn, imm8, rot, cond) \
489 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_SUB, rd, rn, imm8, rot, cond)
490 #define _SUB_REG_IMM(rd, rn, imm8, rot) \
491 _SUB_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
492 #define _SUBS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
493 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_SUB, rd, rn, imm8, rot, cond)
494 #define _SUBS_REG_IMM(rd, rn, imm8, rot) \
495 _SUBS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
499 /* Rd := Rn SUB imm8 */
500 #define ARM_SUB_REG_IMM8_COND(p, rd, rn, imm8, cond) \
501 ARM_SUB_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
502 #define ARM_SUB_REG_IMM8(p, rd, rn, imm8) \
503 ARM_SUB_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
504 #define ARM_SUBS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
505 ARM_SUBS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
506 #define ARM_SUBS_REG_IMM8(p, rd, rn, imm8) \
507 ARM_SUBS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
510 #define _SUB_REG_IMM8_COND(rd, rn, imm8, cond) \
511 _SUB_REG_IMM_COND(rd, rn, imm8, 0, cond)
512 #define _SUB_REG_IMM8(rd, rn, imm8) \
513 _SUB_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
514 #define _SUBS_REG_IMM8_COND(rd, rn, imm8, cond) \
515 _SUBS_REG_IMM_COND(rd, rn, imm8, 0, cond)
516 #define _SUBS_REG_IMM8(rd, rn, imm8) \
517 _SUBS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
521 /* Rd := Rn SUB Rm */
522 #define ARM_SUB_REG_REG_COND(p, rd, rn, rm, cond) \
523 ARM_DPIOP_REG_REG_COND(p, ARMOP_SUB, rd, rn, rm, cond)
524 #define ARM_SUB_REG_REG(p, rd, rn, rm) \
525 ARM_SUB_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
526 #define ARM_SUBS_REG_REG_COND(p, rd, rn, rm, cond) \
527 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_SUB, rd, rn, rm, cond)
528 #define ARM_SUBS_REG_REG(p, rd, rn, rm) \
529 ARM_SUBS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
532 #define _SUB_REG_REG_COND(rd, rn, rm, cond) \
533 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_SUB, rd, rn, rm, cond)
534 #define _SUB_REG_REG(rd, rn, rm) \
535 _SUB_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
536 #define _SUBS_REG_REG_COND(rd, rn, rm, cond) \
537 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_SUB, rd, rn, rm, cond)
538 #define _SUBS_REG_REG(rd, rn, rm) \
539 _SUBS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
543 /* Rd := Rn SUB (Rm <shift_type> imm_shift) */
544 #define ARM_SUB_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
545 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_SUB, rd, rn, rm, shift_type, imm_shift, cond)
546 #define ARM_SUB_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
547 ARM_SUB_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
548 #define ARM_SUBS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
549 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_SUB, rd, rn, rm, shift_type, imm_shift, cond)
550 #define ARM_SUBS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
551 ARM_SUBS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
554 #define _SUB_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
555 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_SUB, rd, rn, rm, shift_type, imm_shift, cond)
556 #define _SUB_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
557 _SUB_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
558 #define _SUBS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
559 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_SUB, rd, rn, rm, shift_type, imm_shift, cond)
560 #define _SUBS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
561 _SUBS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
565 /* Rd := Rn SUB (Rm <shift_type> Rs) */
566 #define ARM_SUB_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
567 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_SUB, rd, rn, rm, shift_t, rs, cond)
568 #define ARM_SUB_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
569 ARM_SUB_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
570 #define ARM_SUBS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
571 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_SUB, rd, rn, rm, shift_t, rs, cond)
572 #define ARM_SUBS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
573 ARM_SUBS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
576 #define _SUB_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
577 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_SUB, rd, rn, rm, shift_t, rs, cond)
578 #define _SUB_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
579 _SUB_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
580 #define _SUBS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
581 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_SUB, rd, rn, rm, shift_t, rs, cond)
582 #define _SUBS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
583 _SUBS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
589 /* Rd := Rn RSB (imm8 ROR rot) ; rot is power of 2 */
590 #define ARM_RSB_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
591 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_RSB, rd, rn, imm8, rot, cond)
592 #define ARM_RSB_REG_IMM(p, rd, rn, imm8, rot) \
593 ARM_RSB_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
594 #define ARM_RSBS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
595 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_RSB, rd, rn, imm8, rot, cond)
596 #define ARM_RSBS_REG_IMM(p, rd, rn, imm8, rot) \
597 ARM_RSBS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
600 #define _RSB_REG_IMM_COND(rd, rn, imm8, rot, cond) \
601 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_RSB, rd, rn, imm8, rot, cond)
602 #define _RSB_REG_IMM(rd, rn, imm8, rot) \
603 _RSB_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
604 #define _RSBS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
605 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_RSB, rd, rn, imm8, rot, cond)
606 #define _RSBS_REG_IMM(rd, rn, imm8, rot) \
607 _RSBS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
611 /* Rd := Rn RSB imm8 */
612 #define ARM_RSB_REG_IMM8_COND(p, rd, rn, imm8, cond) \
613 ARM_RSB_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
614 #define ARM_RSB_REG_IMM8(p, rd, rn, imm8) \
615 ARM_RSB_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
616 #define ARM_RSBS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
617 ARM_RSBS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
618 #define ARM_RSBS_REG_IMM8(p, rd, rn, imm8) \
619 ARM_RSBS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
622 #define _RSB_REG_IMM8_COND(rd, rn, imm8, cond) \
623 _RSB_REG_IMM_COND(rd, rn, imm8, 0, cond)
624 #define _RSB_REG_IMM8(rd, rn, imm8) \
625 _RSB_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
626 #define _RSBS_REG_IMM8_COND(rd, rn, imm8, cond) \
627 _RSBS_REG_IMM_COND(rd, rn, imm8, 0, cond)
628 #define _RSBS_REG_IMM8(rd, rn, imm8) \
629 _RSBS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
633 /* Rd := Rn RSB Rm */
634 #define ARM_RSB_REG_REG_COND(p, rd, rn, rm, cond) \
635 ARM_DPIOP_REG_REG_COND(p, ARMOP_RSB, rd, rn, rm, cond)
636 #define ARM_RSB_REG_REG(p, rd, rn, rm) \
637 ARM_RSB_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
638 #define ARM_RSBS_REG_REG_COND(p, rd, rn, rm, cond) \
639 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_RSB, rd, rn, rm, cond)
640 #define ARM_RSBS_REG_REG(p, rd, rn, rm) \
641 ARM_RSBS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
644 #define _RSB_REG_REG_COND(rd, rn, rm, cond) \
645 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_RSB, rd, rn, rm, cond)
646 #define _RSB_REG_REG(rd, rn, rm) \
647 _RSB_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
648 #define _RSBS_REG_REG_COND(rd, rn, rm, cond) \
649 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_RSB, rd, rn, rm, cond)
650 #define _RSBS_REG_REG(rd, rn, rm) \
651 _RSBS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
655 /* Rd := Rn RSB (Rm <shift_type> imm_shift) */
656 #define ARM_RSB_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
657 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_RSB, rd, rn, rm, shift_type, imm_shift, cond)
658 #define ARM_RSB_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
659 ARM_RSB_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
660 #define ARM_RSBS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
661 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_RSB, rd, rn, rm, shift_type, imm_shift, cond)
662 #define ARM_RSBS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
663 ARM_RSBS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
666 #define _RSB_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
667 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_RSB, rd, rn, rm, shift_type, imm_shift, cond)
668 #define _RSB_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
669 _RSB_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
670 #define _RSBS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
671 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_RSB, rd, rn, rm, shift_type, imm_shift, cond)
672 #define _RSBS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
673 _RSBS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
677 /* Rd := Rn RSB (Rm <shift_type> Rs) */
678 #define ARM_RSB_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
679 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_RSB, rd, rn, rm, shift_t, rs, cond)
680 #define ARM_RSB_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
681 ARM_RSB_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
682 #define ARM_RSBS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
683 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_RSB, rd, rn, rm, shift_t, rs, cond)
684 #define ARM_RSBS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
685 ARM_RSBS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
688 #define _RSB_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
689 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_RSB, rd, rn, rm, shift_t, rs, cond)
690 #define _RSB_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
691 _RSB_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
692 #define _RSBS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
693 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_RSB, rd, rn, rm, shift_t, rs, cond)
694 #define _RSBS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
695 _RSBS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
701 /* Rd := Rn ADD (imm8 ROR rot) ; rot is power of 2 */
702 #define ARM_ADD_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
703 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_ADD, rd, rn, imm8, rot, cond)
704 #define ARM_ADD_REG_IMM(p, rd, rn, imm8, rot) \
705 ARM_ADD_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
706 #define ARM_ADDS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
707 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_ADD, rd, rn, imm8, rot, cond)
708 #define ARM_ADDS_REG_IMM(p, rd, rn, imm8, rot) \
709 ARM_ADDS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
712 #define _ADD_REG_IMM_COND(rd, rn, imm8, rot, cond) \
713 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_ADD, rd, rn, imm8, rot, cond)
714 #define _ADD_REG_IMM(rd, rn, imm8, rot) \
715 _ADD_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
716 #define _ADDS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
717 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_ADD, rd, rn, imm8, rot, cond)
718 #define _ADDS_REG_IMM(rd, rn, imm8, rot) \
719 _ADDS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
723 /* Rd := Rn ADD imm8 */
724 #define ARM_ADD_REG_IMM8_COND(p, rd, rn, imm8, cond) \
725 ARM_ADD_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
726 #define ARM_ADD_REG_IMM8(p, rd, rn, imm8) \
727 ARM_ADD_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
728 #define ARM_ADDS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
729 ARM_ADDS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
730 #define ARM_ADDS_REG_IMM8(p, rd, rn, imm8) \
731 ARM_ADDS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
734 #define _ADD_REG_IMM8_COND(rd, rn, imm8, cond) \
735 _ADD_REG_IMM_COND(rd, rn, imm8, 0, cond)
736 #define _ADD_REG_IMM8(rd, rn, imm8) \
737 _ADD_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
738 #define _ADDS_REG_IMM8_COND(rd, rn, imm8, cond) \
739 _ADDS_REG_IMM_COND(rd, rn, imm8, 0, cond)
740 #define _ADDS_REG_IMM8(rd, rn, imm8) \
741 _ADDS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
745 /* Rd := Rn ADD Rm */
746 #define ARM_ADD_REG_REG_COND(p, rd, rn, rm, cond) \
747 ARM_DPIOP_REG_REG_COND(p, ARMOP_ADD, rd, rn, rm, cond)
748 #define ARM_ADD_REG_REG(p, rd, rn, rm) \
749 ARM_ADD_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
750 #define ARM_ADDS_REG_REG_COND(p, rd, rn, rm, cond) \
751 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_ADD, rd, rn, rm, cond)
752 #define ARM_ADDS_REG_REG(p, rd, rn, rm) \
753 ARM_ADDS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
756 #define _ADD_REG_REG_COND(rd, rn, rm, cond) \
757 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_ADD, rd, rn, rm, cond)
758 #define _ADD_REG_REG(rd, rn, rm) \
759 _ADD_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
760 #define _ADDS_REG_REG_COND(rd, rn, rm, cond) \
761 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_ADD, rd, rn, rm, cond)
762 #define _ADDS_REG_REG(rd, rn, rm) \
763 _ADDS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
767 /* Rd := Rn ADD (Rm <shift_type> imm_shift) */
768 #define ARM_ADD_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
769 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_ADD, rd, rn, rm, shift_type, imm_shift, cond)
770 #define ARM_ADD_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
771 ARM_ADD_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
772 #define ARM_ADDS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
773 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_ADD, rd, rn, rm, shift_type, imm_shift, cond)
774 #define ARM_ADDS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
775 ARM_ADDS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
778 #define _ADD_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
779 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_ADD, rd, rn, rm, shift_type, imm_shift, cond)
780 #define _ADD_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
781 _ADD_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
782 #define _ADDS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
783 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_ADD, rd, rn, rm, shift_type, imm_shift, cond)
784 #define _ADDS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
785 _ADDS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
789 /* Rd := Rn ADD (Rm <shift_type> Rs) */
790 #define ARM_ADD_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
791 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_ADD, rd, rn, rm, shift_t, rs, cond)
792 #define ARM_ADD_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
793 ARM_ADD_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
794 #define ARM_ADDS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
795 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_ADD, rd, rn, rm, shift_t, rs, cond)
796 #define ARM_ADDS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
797 ARM_ADDS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
800 #define _ADD_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
801 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_ADD, rd, rn, rm, shift_t, rs, cond)
802 #define _ADD_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
803 _ADD_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
804 #define _ADDS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
805 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_ADD, rd, rn, rm, shift_t, rs, cond)
806 #define _ADDS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
807 _ADDS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
813 /* Rd := Rn ADC (imm8 ROR rot) ; rot is power of 2 */
814 #define ARM_ADC_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
815 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_ADC, rd, rn, imm8, rot, cond)
816 #define ARM_ADC_REG_IMM(p, rd, rn, imm8, rot) \
817 ARM_ADC_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
818 #define ARM_ADCS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
819 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_ADC, rd, rn, imm8, rot, cond)
820 #define ARM_ADCS_REG_IMM(p, rd, rn, imm8, rot) \
821 ARM_ADCS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
824 #define _ADC_REG_IMM_COND(rd, rn, imm8, rot, cond) \
825 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_ADC, rd, rn, imm8, rot, cond)
826 #define _ADC_REG_IMM(rd, rn, imm8, rot) \
827 _ADC_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
828 #define _ADCS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
829 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_ADC, rd, rn, imm8, rot, cond)
830 #define _ADCS_REG_IMM(rd, rn, imm8, rot) \
831 _ADCS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
835 /* Rd := Rn ADC imm8 */
836 #define ARM_ADC_REG_IMM8_COND(p, rd, rn, imm8, cond) \
837 ARM_ADC_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
838 #define ARM_ADC_REG_IMM8(p, rd, rn, imm8) \
839 ARM_ADC_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
840 #define ARM_ADCS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
841 ARM_ADCS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
842 #define ARM_ADCS_REG_IMM8(p, rd, rn, imm8) \
843 ARM_ADCS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
846 #define _ADC_REG_IMM8_COND(rd, rn, imm8, cond) \
847 _ADC_REG_IMM_COND(rd, rn, imm8, 0, cond)
848 #define _ADC_REG_IMM8(rd, rn, imm8) \
849 _ADC_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
850 #define _ADCS_REG_IMM8_COND(rd, rn, imm8, cond) \
851 _ADCS_REG_IMM_COND(rd, rn, imm8, 0, cond)
852 #define _ADCS_REG_IMM8(rd, rn, imm8) \
853 _ADCS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
857 /* Rd := Rn ADC Rm */
858 #define ARM_ADC_REG_REG_COND(p, rd, rn, rm, cond) \
859 ARM_DPIOP_REG_REG_COND(p, ARMOP_ADC, rd, rn, rm, cond)
860 #define ARM_ADC_REG_REG(p, rd, rn, rm) \
861 ARM_ADC_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
862 #define ARM_ADCS_REG_REG_COND(p, rd, rn, rm, cond) \
863 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_ADC, rd, rn, rm, cond)
864 #define ARM_ADCS_REG_REG(p, rd, rn, rm) \
865 ARM_ADCS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
868 #define _ADC_REG_REG_COND(rd, rn, rm, cond) \
869 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_ADC, rd, rn, rm, cond)
870 #define _ADC_REG_REG(rd, rn, rm) \
871 _ADC_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
872 #define _ADCS_REG_REG_COND(rd, rn, rm, cond) \
873 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_ADC, rd, rn, rm, cond)
874 #define _ADCS_REG_REG(rd, rn, rm) \
875 _ADCS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
879 /* Rd := Rn ADC (Rm <shift_type> imm_shift) */
880 #define ARM_ADC_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
881 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_ADC, rd, rn, rm, shift_type, imm_shift, cond)
882 #define ARM_ADC_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
883 ARM_ADC_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
884 #define ARM_ADCS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
885 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_ADC, rd, rn, rm, shift_type, imm_shift, cond)
886 #define ARM_ADCS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
887 ARM_ADCS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
890 #define _ADC_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
891 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_ADC, rd, rn, rm, shift_type, imm_shift, cond)
892 #define _ADC_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
893 _ADC_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
894 #define _ADCS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
895 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_ADC, rd, rn, rm, shift_type, imm_shift, cond)
896 #define _ADCS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
897 _ADCS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
901 /* Rd := Rn ADC (Rm <shift_type> Rs) */
902 #define ARM_ADC_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
903 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_ADC, rd, rn, rm, shift_t, rs, cond)
904 #define ARM_ADC_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
905 ARM_ADC_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
906 #define ARM_ADCS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
907 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_ADC, rd, rn, rm, shift_t, rs, cond)
908 #define ARM_ADCS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
909 ARM_ADCS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
912 #define _ADC_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
913 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_ADC, rd, rn, rm, shift_t, rs, cond)
914 #define _ADC_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
915 _ADC_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
916 #define _ADCS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
917 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_ADC, rd, rn, rm, shift_t, rs, cond)
918 #define _ADCS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
919 _ADCS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
925 /* Rd := Rn SBC (imm8 ROR rot) ; rot is power of 2 */
926 #define ARM_SBC_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
927 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_SBC, rd, rn, imm8, rot, cond)
928 #define ARM_SBC_REG_IMM(p, rd, rn, imm8, rot) \
929 ARM_SBC_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
930 #define ARM_SBCS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
931 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_SBC, rd, rn, imm8, rot, cond)
932 #define ARM_SBCS_REG_IMM(p, rd, rn, imm8, rot) \
933 ARM_SBCS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
936 #define _SBC_REG_IMM_COND(rd, rn, imm8, rot, cond) \
937 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_SBC, rd, rn, imm8, rot, cond)
938 #define _SBC_REG_IMM(rd, rn, imm8, rot) \
939 _SBC_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
940 #define _SBCS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
941 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_SBC, rd, rn, imm8, rot, cond)
942 #define _SBCS_REG_IMM(rd, rn, imm8, rot) \
943 _SBCS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
947 /* Rd := Rn SBC imm8 */
948 #define ARM_SBC_REG_IMM8_COND(p, rd, rn, imm8, cond) \
949 ARM_SBC_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
950 #define ARM_SBC_REG_IMM8(p, rd, rn, imm8) \
951 ARM_SBC_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
952 #define ARM_SBCS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
953 ARM_SBCS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
954 #define ARM_SBCS_REG_IMM8(p, rd, rn, imm8) \
955 ARM_SBCS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
958 #define _SBC_REG_IMM8_COND(rd, rn, imm8, cond) \
959 _SBC_REG_IMM_COND(rd, rn, imm8, 0, cond)
960 #define _SBC_REG_IMM8(rd, rn, imm8) \
961 _SBC_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
962 #define _SBCS_REG_IMM8_COND(rd, rn, imm8, cond) \
963 _SBCS_REG_IMM_COND(rd, rn, imm8, 0, cond)
964 #define _SBCS_REG_IMM8(rd, rn, imm8) \
965 _SBCS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
969 /* Rd := Rn SBC Rm */
970 #define ARM_SBC_REG_REG_COND(p, rd, rn, rm, cond) \
971 ARM_DPIOP_REG_REG_COND(p, ARMOP_SBC, rd, rn, rm, cond)
972 #define ARM_SBC_REG_REG(p, rd, rn, rm) \
973 ARM_SBC_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
974 #define ARM_SBCS_REG_REG_COND(p, rd, rn, rm, cond) \
975 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_SBC, rd, rn, rm, cond)
976 #define ARM_SBCS_REG_REG(p, rd, rn, rm) \
977 ARM_SBCS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
980 #define _SBC_REG_REG_COND(rd, rn, rm, cond) \
981 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_SBC, rd, rn, rm, cond)
982 #define _SBC_REG_REG(rd, rn, rm) \
983 _SBC_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
984 #define _SBCS_REG_REG_COND(rd, rn, rm, cond) \
985 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_SBC, rd, rn, rm, cond)
986 #define _SBCS_REG_REG(rd, rn, rm) \
987 _SBCS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
991 /* Rd := Rn SBC (Rm <shift_type> imm_shift) */
992 #define ARM_SBC_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
993 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_SBC, rd, rn, rm, shift_type, imm_shift, cond)
994 #define ARM_SBC_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
995 ARM_SBC_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
996 #define ARM_SBCS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
997 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_SBC, rd, rn, rm, shift_type, imm_shift, cond)
998 #define ARM_SBCS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
999 ARM_SBCS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1002 #define _SBC_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
1003 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_SBC, rd, rn, rm, shift_type, imm_shift, cond)
1004 #define _SBC_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
1005 _SBC_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1006 #define _SBCS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
1007 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_SBC, rd, rn, rm, shift_type, imm_shift, cond)
1008 #define _SBCS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
1009 _SBCS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1013 /* Rd := Rn SBC (Rm <shift_type> Rs) */
1014 #define ARM_SBC_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
1015 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_SBC, rd, rn, rm, shift_t, rs, cond)
1016 #define ARM_SBC_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
1017 ARM_SBC_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
1018 #define ARM_SBCS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
1019 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_SBC, rd, rn, rm, shift_t, rs, cond)
1020 #define ARM_SBCS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
1021 ARM_SBCS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
1024 #define _SBC_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
1025 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_SBC, rd, rn, rm, shift_t, rs, cond)
1026 #define _SBC_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
1027 _SBC_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
1028 #define _SBCS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
1029 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_SBC, rd, rn, rm, shift_t, rs, cond)
1030 #define _SBCS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
1031 _SBCS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
1037 /* Rd := Rn RSC (imm8 ROR rot) ; rot is power of 2 */
1038 #define ARM_RSC_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
1039 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_RSC, rd, rn, imm8, rot, cond)
1040 #define ARM_RSC_REG_IMM(p, rd, rn, imm8, rot) \
1041 ARM_RSC_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
1042 #define ARM_RSCS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
1043 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_RSC, rd, rn, imm8, rot, cond)
1044 #define ARM_RSCS_REG_IMM(p, rd, rn, imm8, rot) \
1045 ARM_RSCS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
1048 #define _RSC_REG_IMM_COND(rd, rn, imm8, rot, cond) \
1049 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_RSC, rd, rn, imm8, rot, cond)
1050 #define _RSC_REG_IMM(rd, rn, imm8, rot) \
1051 _RSC_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
1052 #define _RSCS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
1053 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_RSC, rd, rn, imm8, rot, cond)
1054 #define _RSCS_REG_IMM(rd, rn, imm8, rot) \
1055 _RSCS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
1059 /* Rd := Rn RSC imm8 */
1060 #define ARM_RSC_REG_IMM8_COND(p, rd, rn, imm8, cond) \
1061 ARM_RSC_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
1062 #define ARM_RSC_REG_IMM8(p, rd, rn, imm8) \
1063 ARM_RSC_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
1064 #define ARM_RSCS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
1065 ARM_RSCS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
1066 #define ARM_RSCS_REG_IMM8(p, rd, rn, imm8) \
1067 ARM_RSCS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
1070 #define _RSC_REG_IMM8_COND(rd, rn, imm8, cond) \
1071 _RSC_REG_IMM_COND(rd, rn, imm8, 0, cond)
1072 #define _RSC_REG_IMM8(rd, rn, imm8) \
1073 _RSC_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
1074 #define _RSCS_REG_IMM8_COND(rd, rn, imm8, cond) \
1075 _RSCS_REG_IMM_COND(rd, rn, imm8, 0, cond)
1076 #define _RSCS_REG_IMM8(rd, rn, imm8) \
1077 _RSCS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
1081 /* Rd := Rn RSC Rm */
1082 #define ARM_RSC_REG_REG_COND(p, rd, rn, rm, cond) \
1083 ARM_DPIOP_REG_REG_COND(p, ARMOP_RSC, rd, rn, rm, cond)
1084 #define ARM_RSC_REG_REG(p, rd, rn, rm) \
1085 ARM_RSC_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
1086 #define ARM_RSCS_REG_REG_COND(p, rd, rn, rm, cond) \
1087 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_RSC, rd, rn, rm, cond)
1088 #define ARM_RSCS_REG_REG(p, rd, rn, rm) \
1089 ARM_RSCS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
1092 #define _RSC_REG_REG_COND(rd, rn, rm, cond) \
1093 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_RSC, rd, rn, rm, cond)
1094 #define _RSC_REG_REG(rd, rn, rm) \
1095 _RSC_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
1096 #define _RSCS_REG_REG_COND(rd, rn, rm, cond) \
1097 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_RSC, rd, rn, rm, cond)
1098 #define _RSCS_REG_REG(rd, rn, rm) \
1099 _RSCS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
1103 /* Rd := Rn RSC (Rm <shift_type> imm_shift) */
1104 #define ARM_RSC_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
1105 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_RSC, rd, rn, rm, shift_type, imm_shift, cond)
1106 #define ARM_RSC_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
1107 ARM_RSC_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1108 #define ARM_RSCS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
1109 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_RSC, rd, rn, rm, shift_type, imm_shift, cond)
1110 #define ARM_RSCS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
1111 ARM_RSCS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1114 #define _RSC_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
1115 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_RSC, rd, rn, rm, shift_type, imm_shift, cond)
1116 #define _RSC_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
1117 _RSC_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1118 #define _RSCS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
1119 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_RSC, rd, rn, rm, shift_type, imm_shift, cond)
1120 #define _RSCS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
1121 _RSCS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1125 /* Rd := Rn RSC (Rm <shift_type> Rs) */
1126 #define ARM_RSC_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
1127 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_RSC, rd, rn, rm, shift_t, rs, cond)
1128 #define ARM_RSC_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
1129 ARM_RSC_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
1130 #define ARM_RSCS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
1131 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_RSC, rd, rn, rm, shift_t, rs, cond)
1132 #define ARM_RSCS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
1133 ARM_RSCS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
1136 #define _RSC_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
1137 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_RSC, rd, rn, rm, shift_t, rs, cond)
1138 #define _RSC_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
1139 _RSC_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
1140 #define _RSCS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
1141 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_RSC, rd, rn, rm, shift_t, rs, cond)
1142 #define _RSCS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
1143 _RSCS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
1149 /* Rd := Rn ORR (imm8 ROR rot) ; rot is power of 2 */
1150 #define ARM_ORR_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
1151 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_ORR, rd, rn, imm8, rot, cond)
1152 #define ARM_ORR_REG_IMM(p, rd, rn, imm8, rot) \
1153 ARM_ORR_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
1154 #define ARM_ORRS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
1155 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_ORR, rd, rn, imm8, rot, cond)
1156 #define ARM_ORRS_REG_IMM(p, rd, rn, imm8, rot) \
1157 ARM_ORRS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
1160 #define _ORR_REG_IMM_COND(rd, rn, imm8, rot, cond) \
1161 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_ORR, rd, rn, imm8, rot, cond)
1162 #define _ORR_REG_IMM(rd, rn, imm8, rot) \
1163 _ORR_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
1164 #define _ORRS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
1165 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_ORR, rd, rn, imm8, rot, cond)
1166 #define _ORRS_REG_IMM(rd, rn, imm8, rot) \
1167 _ORRS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
1171 /* Rd := Rn ORR imm8 */
1172 #define ARM_ORR_REG_IMM8_COND(p, rd, rn, imm8, cond) \
1173 ARM_ORR_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
1174 #define ARM_ORR_REG_IMM8(p, rd, rn, imm8) \
1175 ARM_ORR_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
1176 #define ARM_ORRS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
1177 ARM_ORRS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
1178 #define ARM_ORRS_REG_IMM8(p, rd, rn, imm8) \
1179 ARM_ORRS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
1182 #define _ORR_REG_IMM8_COND(rd, rn, imm8, cond) \
1183 _ORR_REG_IMM_COND(rd, rn, imm8, 0, cond)
1184 #define _ORR_REG_IMM8(rd, rn, imm8) \
1185 _ORR_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
1186 #define _ORRS_REG_IMM8_COND(rd, rn, imm8, cond) \
1187 _ORRS_REG_IMM_COND(rd, rn, imm8, 0, cond)
1188 #define _ORRS_REG_IMM8(rd, rn, imm8) \
1189 _ORRS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
1193 /* Rd := Rn ORR Rm */
1194 #define ARM_ORR_REG_REG_COND(p, rd, rn, rm, cond) \
1195 ARM_DPIOP_REG_REG_COND(p, ARMOP_ORR, rd, rn, rm, cond)
1196 #define ARM_ORR_REG_REG(p, rd, rn, rm) \
1197 ARM_ORR_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
1198 #define ARM_ORRS_REG_REG_COND(p, rd, rn, rm, cond) \
1199 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_ORR, rd, rn, rm, cond)
1200 #define ARM_ORRS_REG_REG(p, rd, rn, rm) \
1201 ARM_ORRS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
1204 #define _ORR_REG_REG_COND(rd, rn, rm, cond) \
1205 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_ORR, rd, rn, rm, cond)
1206 #define _ORR_REG_REG(rd, rn, rm) \
1207 _ORR_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
1208 #define _ORRS_REG_REG_COND(rd, rn, rm, cond) \
1209 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_ORR, rd, rn, rm, cond)
1210 #define _ORRS_REG_REG(rd, rn, rm) \
1211 _ORRS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
1215 /* Rd := Rn ORR (Rm <shift_type> imm_shift) */
1216 #define ARM_ORR_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
1217 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_ORR, rd, rn, rm, shift_type, imm_shift, cond)
1218 #define ARM_ORR_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
1219 ARM_ORR_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1220 #define ARM_ORRS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
1221 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_ORR, rd, rn, rm, shift_type, imm_shift, cond)
1222 #define ARM_ORRS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
1223 ARM_ORRS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1226 #define _ORR_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
1227 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_ORR, rd, rn, rm, shift_type, imm_shift, cond)
1228 #define _ORR_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
1229 _ORR_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1230 #define _ORRS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
1231 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_ORR, rd, rn, rm, shift_type, imm_shift, cond)
1232 #define _ORRS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
1233 _ORRS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1237 /* Rd := Rn ORR (Rm <shift_type> Rs) */
1238 #define ARM_ORR_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
1239 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_ORR, rd, rn, rm, shift_t, rs, cond)
1240 #define ARM_ORR_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
1241 ARM_ORR_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
1242 #define ARM_ORRS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
1243 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_ORR, rd, rn, rm, shift_t, rs, cond)
1244 #define ARM_ORRS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
1245 ARM_ORRS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
1248 #define _ORR_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
1249 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_ORR, rd, rn, rm, shift_t, rs, cond)
1250 #define _ORR_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
1251 _ORR_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
1252 #define _ORRS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
1253 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_ORR, rd, rn, rm, shift_t, rs, cond)
1254 #define _ORRS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
1255 _ORRS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
1261 /* Rd := Rn BIC (imm8 ROR rot) ; rot is power of 2 */
1262 #define ARM_BIC_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
1263 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_BIC, rd, rn, imm8, rot, cond)
1264 #define ARM_BIC_REG_IMM(p, rd, rn, imm8, rot) \
1265 ARM_BIC_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
1266 #define ARM_BICS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
1267 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_BIC, rd, rn, imm8, rot, cond)
1268 #define ARM_BICS_REG_IMM(p, rd, rn, imm8, rot) \
1269 ARM_BICS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
1272 #define _BIC_REG_IMM_COND(rd, rn, imm8, rot, cond) \
1273 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_BIC, rd, rn, imm8, rot, cond)
1274 #define _BIC_REG_IMM(rd, rn, imm8, rot) \
1275 _BIC_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
1276 #define _BICS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
1277 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_BIC, rd, rn, imm8, rot, cond)
1278 #define _BICS_REG_IMM(rd, rn, imm8, rot) \
1279 _BICS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
1283 /* Rd := Rn BIC imm8 */
1284 #define ARM_BIC_REG_IMM8_COND(p, rd, rn, imm8, cond) \
1285 ARM_BIC_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
1286 #define ARM_BIC_REG_IMM8(p, rd, rn, imm8) \
1287 ARM_BIC_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
1288 #define ARM_BICS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
1289 ARM_BICS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
1290 #define ARM_BICS_REG_IMM8(p, rd, rn, imm8) \
1291 ARM_BICS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
1294 #define _BIC_REG_IMM8_COND(rd, rn, imm8, cond) \
1295 _BIC_REG_IMM_COND(rd, rn, imm8, 0, cond)
1296 #define _BIC_REG_IMM8(rd, rn, imm8) \
1297 _BIC_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
1298 #define _BICS_REG_IMM8_COND(rd, rn, imm8, cond) \
1299 _BICS_REG_IMM_COND(rd, rn, imm8, 0, cond)
1300 #define _BICS_REG_IMM8(rd, rn, imm8) \
1301 _BICS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
1305 /* Rd := Rn BIC Rm */
1306 #define ARM_BIC_REG_REG_COND(p, rd, rn, rm, cond) \
1307 ARM_DPIOP_REG_REG_COND(p, ARMOP_BIC, rd, rn, rm, cond)
1308 #define ARM_BIC_REG_REG(p, rd, rn, rm) \
1309 ARM_BIC_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
1310 #define ARM_BICS_REG_REG_COND(p, rd, rn, rm, cond) \
1311 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_BIC, rd, rn, rm, cond)
1312 #define ARM_BICS_REG_REG(p, rd, rn, rm) \
1313 ARM_BICS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
1316 #define _BIC_REG_REG_COND(rd, rn, rm, cond) \
1317 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_BIC, rd, rn, rm, cond)
1318 #define _BIC_REG_REG(rd, rn, rm) \
1319 _BIC_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
1320 #define _BICS_REG_REG_COND(rd, rn, rm, cond) \
1321 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_BIC, rd, rn, rm, cond)
1322 #define _BICS_REG_REG(rd, rn, rm) \
1323 _BICS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
1327 /* Rd := Rn BIC (Rm <shift_type> imm_shift) */
1328 #define ARM_BIC_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
1329 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_BIC, rd, rn, rm, shift_type, imm_shift, cond)
1330 #define ARM_BIC_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
1331 ARM_BIC_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1332 #define ARM_BICS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
1333 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_BIC, rd, rn, rm, shift_type, imm_shift, cond)
1334 #define ARM_BICS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
1335 ARM_BICS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1338 #define _BIC_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
1339 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_BIC, rd, rn, rm, shift_type, imm_shift, cond)
1340 #define _BIC_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
1341 _BIC_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1342 #define _BICS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
1343 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_BIC, rd, rn, rm, shift_type, imm_shift, cond)
1344 #define _BICS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
1345 _BICS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1349 /* Rd := Rn BIC (Rm <shift_type> Rs) */
1350 #define ARM_BIC_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
1351 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_BIC, rd, rn, rm, shift_t, rs, cond)
1352 #define ARM_BIC_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
1353 ARM_BIC_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
1354 #define ARM_BICS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
1355 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_BIC, rd, rn, rm, shift_t, rs, cond)
1356 #define ARM_BICS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
1357 ARM_BICS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
1360 #define _BIC_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
1361 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_BIC, rd, rn, rm, shift_t, rs, cond)
1362 #define _BIC_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
1363 _BIC_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
1364 #define _BICS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
1365 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_BIC, rd, rn, rm, shift_t, rs, cond)
1366 #define _BICS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
1367 _BICS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
1375 /* DPIs, comparison */
1377 /* PSR := TST Rn, (imm8 ROR 2*rot) */
1378 #define ARM_TST_REG_IMM_COND(p, rn, imm8, rot, cond) \
1379 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_TST, 0, rn, imm8, rot, cond)
1380 #define ARM_TST_REG_IMM(p, rn, imm8, rot) \
1381 ARM_TST_REG_IMM_COND(p, rn, imm8, rot, ARMCOND_AL)
1384 #define _TST_REG_IMM_COND(rn, imm8, rot, cond) \
1385 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_TST, 0, rn, imm8, rot, cond)
1386 #define _TST_REG_IMM(rn, imm8, rot) \
1387 _TST_REG_IMM_COND(rn, imm8, rot, ARMCOND_AL)
1391 /* PSR := TST Rn, imm8 */
1392 #define ARM_TST_REG_IMM8_COND(p, rn, imm8, cond) \
1393 ARM_TST_REG_IMM_COND(p, rn, imm8, 0, cond)
1394 #define ARM_TST_REG_IMM8(p, rn, imm8) \
1395 ARM_TST_REG_IMM8_COND(p, rn, imm8, ARMCOND_AL)
1398 #define _TST_REG_IMM8_COND(rn, imm8, cond) \
1399 _TST_REG_IMM_COND(rn, imm8, 0, cond)
1400 #define _TST_REG_IMM8(rn, imm8) \
1401 _TST_REG_IMM8_COND(rn, imm8, ARMCOND_AL)
1405 /* PSR := TST Rn, Rm */
1406 #define ARM_TST_REG_REG_COND(p, rn, rm, cond) \
1407 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_TST, 0, rn, rm, cond)
1408 #define ARM_TST_REG_REG(p, rn, rm) \
1409 ARM_TST_REG_REG_COND(p, rn, rm, ARMCOND_AL)
1412 #define _TST_REG_REG_COND(rn, rm, cond) \
1413 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_TST, 0, rn, rm, cond)
1414 #define _TST_REG_REG(rn, rm) \
1415 _TST_REG_REG_COND(rn, rm, ARMCOND_AL)
1419 /* PSR := TST Rn, (Rm <shift_type> imm8) */
1420 #define ARM_TST_REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, cond) \
1421 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_TST, 0, rn, rm, shift_type, imm_shift, cond)
1422 #define ARM_TST_REG_IMMSHIFT(p, rn, rm, shift_type, imm_shift) \
1423 ARM_TST_REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1426 #define _TST_REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, cond) \
1427 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_TST, 0, rn, rm, shift_type, imm_shift, cond)
1428 #define _TST_REG_IMMSHIFT(rn, rm, shift_type, imm_shift) \
1429 _TST_REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, ARMCOND_AL)
1433 /* PSR := TEQ Rn, (imm8 ROR 2*rot) */
1434 #define ARM_TEQ_REG_IMM_COND(p, rn, imm8, rot, cond) \
1435 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_TEQ, 0, rn, imm8, rot, cond)
1436 #define ARM_TEQ_REG_IMM(p, rn, imm8, rot) \
1437 ARM_TEQ_REG_IMM_COND(p, rn, imm8, rot, ARMCOND_AL)
1440 #define _TEQ_REG_IMM_COND(rn, imm8, rot, cond) \
1441 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_TEQ, 0, rn, imm8, rot, cond)
1442 #define _TEQ_REG_IMM(rn, imm8, rot) \
1443 _TEQ_REG_IMM_COND(rn, imm8, rot, ARMCOND_AL)
1447 /* PSR := TEQ Rn, imm8 */
1448 #define ARM_TEQ_REG_IMM8_COND(p, rn, imm8, cond) \
1449 ARM_TEQ_REG_IMM_COND(p, rn, imm8, 0, cond)
1450 #define ARM_TEQ_REG_IMM8(p, rn, imm8) \
1451 ARM_TEQ_REG_IMM8_COND(p, rn, imm8, ARMCOND_AL)
1454 #define _TEQ_REG_IMM8_COND(rn, imm8, cond) \
1455 _TEQ_REG_IMM_COND(rn, imm8, 0, cond)
1456 #define _TEQ_REG_IMM8(rn, imm8) \
1457 _TEQ_REG_IMM8_COND(rn, imm8, ARMCOND_AL)
1461 /* PSR := TEQ Rn, Rm */
1462 #define ARM_TEQ_REG_REG_COND(p, rn, rm, cond) \
1463 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_TEQ, 0, rn, rm, cond)
1464 #define ARM_TEQ_REG_REG(p, rn, rm) \
1465 ARM_TEQ_REG_REG_COND(p, rn, rm, ARMCOND_AL)
1468 #define _TEQ_REG_REG_COND(rn, rm, cond) \
1469 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_TEQ, 0, rn, rm, cond)
1470 #define _TEQ_REG_REG(rn, rm) \
1471 _TEQ_REG_REG_COND(rn, rm, ARMCOND_AL)
1475 /* PSR := TEQ Rn, (Rm <shift_type> imm8) */
1476 #define ARM_TEQ_REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, cond) \
1477 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_TEQ, 0, rn, rm, shift_type, imm_shift, cond)
1478 #define ARM_TEQ_REG_IMMSHIFT(p, rn, rm, shift_type, imm_shift) \
1479 ARM_TEQ_REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1482 #define _TEQ_REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, cond) \
1483 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_TEQ, 0, rn, rm, shift_type, imm_shift, cond)
1484 #define _TEQ_REG_IMMSHIFT(rn, rm, shift_type, imm_shift) \
1485 _TEQ_REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, ARMCOND_AL)
1489 /* PSR := CMP Rn, (imm8 ROR 2*rot) */
1490 #define ARM_CMP_REG_IMM_COND(p, rn, imm8, rot, cond) \
1491 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_CMP, 0, rn, imm8, rot, cond)
1492 #define ARM_CMP_REG_IMM(p, rn, imm8, rot) \
1493 ARM_CMP_REG_IMM_COND(p, rn, imm8, rot, ARMCOND_AL)
1496 #define _CMP_REG_IMM_COND(rn, imm8, rot, cond) \
1497 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_CMP, 0, rn, imm8, rot, cond)
1498 #define _CMP_REG_IMM(rn, imm8, rot) \
1499 _CMP_REG_IMM_COND(rn, imm8, rot, ARMCOND_AL)
1503 /* PSR := CMP Rn, imm8 */
1504 #define ARM_CMP_REG_IMM8_COND(p, rn, imm8, cond) \
1505 ARM_CMP_REG_IMM_COND(p, rn, imm8, 0, cond)
1506 #define ARM_CMP_REG_IMM8(p, rn, imm8) \
1507 ARM_CMP_REG_IMM8_COND(p, rn, imm8, ARMCOND_AL)
1510 #define _CMP_REG_IMM8_COND(rn, imm8, cond) \
1511 _CMP_REG_IMM_COND(rn, imm8, 0, cond)
1512 #define _CMP_REG_IMM8(rn, imm8) \
1513 _CMP_REG_IMM8_COND(rn, imm8, ARMCOND_AL)
1517 /* PSR := CMP Rn, Rm */
1518 #define ARM_CMP_REG_REG_COND(p, rn, rm, cond) \
1519 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_CMP, 0, rn, rm, cond)
1520 #define ARM_CMP_REG_REG(p, rn, rm) \
1521 ARM_CMP_REG_REG_COND(p, rn, rm, ARMCOND_AL)
1524 #define _CMP_REG_REG_COND(rn, rm, cond) \
1525 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_CMP, 0, rn, rm, cond)
1526 #define _CMP_REG_REG(rn, rm) \
1527 _CMP_REG_REG_COND(rn, rm, ARMCOND_AL)
1531 /* PSR := CMP Rn, (Rm <shift_type> imm8) */
1532 #define ARM_CMP_REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, cond) \
1533 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_CMP, 0, rn, rm, shift_type, imm_shift, cond)
1534 #define ARM_CMP_REG_IMMSHIFT(p, rn, rm, shift_type, imm_shift) \
1535 ARM_CMP_REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1538 #define _CMP_REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, cond) \
1539 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_CMP, 0, rn, rm, shift_type, imm_shift, cond)
1540 #define _CMP_REG_IMMSHIFT(rn, rm, shift_type, imm_shift) \
1541 _CMP_REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, ARMCOND_AL)
1545 /* PSR := CMN Rn, (imm8 ROR 2*rot) */
1546 #define ARM_CMN_REG_IMM_COND(p, rn, imm8, rot, cond) \
1547 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_CMN, 0, rn, imm8, rot, cond)
1548 #define ARM_CMN_REG_IMM(p, rn, imm8, rot) \
1549 ARM_CMN_REG_IMM_COND(p, rn, imm8, rot, ARMCOND_AL)
1552 #define _CMN_REG_IMM_COND(rn, imm8, rot, cond) \
1553 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_CMN, 0, rn, imm8, rot, cond)
1554 #define _CMN_REG_IMM(rn, imm8, rot) \
1555 _CMN_REG_IMM_COND(rn, imm8, rot, ARMCOND_AL)
1559 /* PSR := CMN Rn, imm8 */
1560 #define ARM_CMN_REG_IMM8_COND(p, rn, imm8, cond) \
1561 ARM_CMN_REG_IMM_COND(p, rn, imm8, 0, cond)
1562 #define ARM_CMN_REG_IMM8(p, rn, imm8) \
1563 ARM_CMN_REG_IMM8_COND(p, rn, imm8, ARMCOND_AL)
1566 #define _CMN_REG_IMM8_COND(rn, imm8, cond) \
1567 _CMN_REG_IMM_COND(rn, imm8, 0, cond)
1568 #define _CMN_REG_IMM8(rn, imm8) \
1569 _CMN_REG_IMM8_COND(rn, imm8, ARMCOND_AL)
1573 /* PSR := CMN Rn, Rm */
1574 #define ARM_CMN_REG_REG_COND(p, rn, rm, cond) \
1575 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_CMN, 0, rn, rm, cond)
1576 #define ARM_CMN_REG_REG(p, rn, rm) \
1577 ARM_CMN_REG_REG_COND(p, rn, rm, ARMCOND_AL)
1580 #define _CMN_REG_REG_COND(rn, rm, cond) \
1581 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_CMN, 0, rn, rm, cond)
1582 #define _CMN_REG_REG(rn, rm) \
1583 _CMN_REG_REG_COND(rn, rm, ARMCOND_AL)
1587 /* PSR := CMN Rn, (Rm <shift_type> imm8) */
1588 #define ARM_CMN_REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, cond) \
1589 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_CMN, 0, rn, rm, shift_type, imm_shift, cond)
1590 #define ARM_CMN_REG_IMMSHIFT(p, rn, rm, shift_type, imm_shift) \
1591 ARM_CMN_REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1594 #define _CMN_REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, cond) \
1595 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_CMN, 0, rn, rm, shift_type, imm_shift, cond)
1596 #define _CMN_REG_IMMSHIFT(rn, rm, shift_type, imm_shift) \
1597 _CMN_REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, ARMCOND_AL)