mips/ngen.c

   1 /* mips/ngen.c *****************************************************************
   2
   3         Copyright (c) 1997 A. Krall, R. Grafl, M. Gschwind, M. Probst
   4
   5         See file COPYRIGHT for information on usage and disclaimer of warranties
   6
   7         Contains the codegenerator for an MIPS (R4000 or higher) processor.
   8         This module generates MIPS machine code for a sequence of intermediate
   9         code commands (ICMDs).
  10
  11         Authors: Andreas  Krall      EMAIL: cacao@complang.tuwien.ac.at
  12
  13         Last Change: $Id: ngen.c 232 2003-02-13 11:35:40Z stefan $
  14
  15 *******************************************************************************/
  16
  17 #include "jitdef.h"   /* phil */
  18
  19 #include <errno.h>
  20 #include <unistd.h>
  21
  22 /* *****************************************************************************
  23
  24 Datatypes and Register Allocations:
  25 -----------------------------------
  26
  27 On 64-bit-machines (like the MIPS) all operands are stored in the
  28 registers in a 64-bit form, even when the correspondig JavaVM operands
  29 only need 32 bits. This is done by a canonical representation:
  30
  31 32-bit integers are allways stored as sign-extended 64-bit values (this
  32 approach is directly supported by the MIPS architecture and is very easy
  33 to implement).
  34
  35 32-bit-floats are stored in a 64-bit double precision register by simply
  36 expanding the exponent and mantissa with zeroes. (also supported by the
  37 architecture)
  38
  39
  40 Stackframes:
  41
  42 The calling conventions and the layout of the stack is  explained in detail
  43 in the documention file: calling.doc
  44
  45 *******************************************************************************/
  46
  47
  48 /* additional functions and macros to generate code ***************************/
  49
  50 /* #define BlockPtrOfPC(pc)        block+block_index[pc] */
  51 #define BlockPtrOfPC(pc)  ((basicblock *) iptr->target)
  52
  53
  54 #ifdef STATISTICS
  55 #define COUNT_SPILLS count_spills++
  56 #else
  57 #define COUNT_SPILLS
  58 #endif
  59
  60
  61 /* gen_nullptr_check(objreg) */
  62
  63 #ifdef SOFTNULLPTRCHECK
  64 #define gen_nullptr_check(objreg) \
  65         if (checknull) {\
  66         M_BEQZ((objreg), 0);\
  67         mcode_addxnullrefs(mcodeptr);\
  68         M_NOP;\
  69         }
  70 #else
  71 #define gen_nullptr_check(objreg)
  72 #endif
  73
  74
  75 /* MCODECHECK(icnt) */
  76
  77 #define MCODECHECK(icnt) \
  78         if((mcodeptr+(icnt))>mcodeend)mcodeptr=mcode_increase((u1*)mcodeptr)
  79
  80 /* M_INTMOVE:
  81      generates an integer-move from register a to b.
  82      if a and b are the same int-register, no code will be generated.
  83 */
  84
  85 #define M_INTMOVE(a,b) if(a!=b){M_MOV(a,b);}
  86
  87
  88 /* M_FLTMOVE:
  89     generates a floating-point-move from register a to b.
  90     if a and b are the same float-register, no code will be generated
  91 */
  92
  93 #define M_FLTMOVE(a,b) {if(a!=b){M_DMOV(a,b);}}
  94
  95 #define M_TFLTMOVE(t,a,b) \
  96         {if(a!=b) \
  97                 if ((t)==TYPE_DBL) \
  98                     {M_DMOV(a,b);} \
  99                 else {M_FMOV(a,b);} \
 100         }
 101
 102 #define M_TFLD(t,a,b,disp) \
 103     if ((t)==TYPE_DBL) \
 104           {M_DLD(a,b,disp);} \
 105     else \
 106           {M_FLD(a,b,disp);}
 107
 108 #define M_TFST(t,a,b,disp) \
 109     if ((t)==TYPE_DBL) \
 110           {M_DST(a,b,disp);} \
 111     else \
 112           {M_FST(a,b,disp);}
 113
 114 #define M_CCFLTMOVE(t1,t2,a,b) \
 115         if ((t1)==(t2)) \
 116           {M_TFLTMOVE(t1,a,b);} \
 117         else \
 118           if ((t1)==TYPE_DBL) \
 119                 {M_CVTDF(a,b);} \
 120           else \
 121                 {M_CVTFD(a,b);}
 122
 123 #define M_CCFLD(t1,t2,a,b,disp) \
 124     if ((t1)==(t2)) \
 125           {M_DLD(a,b,disp);} \
 126         else { \
 127           M_DLD(REG_FTMP1,b,disp); \
 128           if ((t1)==TYPE_DBL) \
 129             {M_CVTDF(REG_FTMP1,a);} \
 130           else \
 131             {M_CVTFD(REG_FTMP1,a);} \
 132         }
 133
 134 #define M_CCFST(t1,t2,a,b,disp) \
 135     if ((t1)==(t2)) \
 136           {M_DST(a,b,disp);} \
 137         else { \
 138           if ((t1)==TYPE_DBL) \
 139             {M_CVTDF(a,REG_FTMP1);} \
 140           else \
 141             {M_CVTFD(a,REG_FTMP1);} \
 142           M_DST(REG_FTMP1,b,disp); \
 143         }
 144
 145
 146 /* var_to_reg_xxx:
 147     this function generates code to fetch data from a pseudo-register
 148     into a real register.
 149     If the pseudo-register has actually been assigned to a real
 150     register, no code will be emitted, since following operations
 151     can use this register directly.
 152
 153     v: pseudoregister to be fetched from
 154     tempregnum: temporary register to be used if v is actually spilled to ram
 155
 156     return: the register number, where the operand can be found after
 157             fetching (this wil be either tempregnum or the register
 158             number allready given to v)
 159 */
 160
 161 #define var_to_reg_int(regnr,v,tempnr) { \
 162         if ((v)->flags & INMEMORY) \
 163                 {COUNT_SPILLS;M_LLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 164         else regnr=(v)->regoff; \
 165 }
 166
 167
 168 #define var_to_reg_flt(regnr,v,tempnr) { \
 169         if ((v)->flags & INMEMORY) \
 170                 {COUNT_SPILLS;M_DLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 171         else regnr=(v)->regoff; \
 172 }
 173
 174
 175 /* reg_of_var:
 176     This function determines a register, to which the result of an operation
 177     should go, when it is ultimatively intended to store the result in
 178     pseudoregister v.
 179     If v is assigned to an actual register, this register will be returned.
 180     Otherwise (when v is spilled) this function returns tempregnum.
 181     If not already done, regoff and flags are set in the stack location.
 182 */
 183
 184 static int reg_of_var(stackptr v, int tempregnum)
 185 {
 186         varinfo      *var;
 187
 188         switch (v->varkind) {
 189                 case TEMPVAR:
 190                         if (!(v->flags & INMEMORY))
 191                                 return(v->regoff);
 192                         break;
 193                 case STACKVAR:
 194                         var = &(interfaces[v->varnum][v->type]);
 195                         v->regoff = var->regoff;
 196                         if (!(var->flags & INMEMORY))
 197                                 return(var->regoff);
 198                         break;
 199                 case LOCALVAR:
 200                         var = &(locals[v->varnum][v->type]);
 201                         v->regoff = var->regoff;
 202                         if (!(var->flags & INMEMORY))
 203                                 return(var->regoff);
 204                         break;
 205                 case ARGVAR:
 206                         v->regoff = v->varnum;
 207                         if (IS_FLT_DBL_TYPE(v->type)) {
 208                                 if (v->varnum < fltreg_argnum) {
 209                                         v->regoff = argfltregs[v->varnum];
 210                                         return(argfltregs[v->varnum]);
 211                                         }
 212                                 }
 213                         else
 214                                 if (v->varnum < intreg_argnum) {
 215                                         v->regoff = argintregs[v->varnum];
 216                                         return(argintregs[v->varnum]);
 217                                         }
 218                         v->regoff -= intreg_argnum;
 219                         break;
 220                 }
 221         v->flags |= INMEMORY;
 222         return tempregnum;
 223 }
 224
 225
 226 /* store_reg_to_var_xxx:
 227     This function generates the code to store the result of an operation
 228     back into a spilled pseudo-variable.
 229     If the pseudo-variable has not been spilled in the first place, this
 230     function will generate nothing.
 231
 232     v ............ Pseudovariable
 233     tempregnum ... Number of the temporary registers as returned by
 234                    reg_of_var.
 235 */
 236
 237 #define store_reg_to_var_int(sptr, tempregnum) {       \
 238         if ((sptr)->flags & INMEMORY) {                    \
 239                 COUNT_SPILLS;                                  \
 240                 M_LST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 241                 }                                              \
 242         }
 243
 244 #define store_reg_to_var_flt(sptr, tempregnum) {       \
 245         if ((sptr)->flags & INMEMORY) {                    \
 246                 COUNT_SPILLS;                                  \
 247                 M_DST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 248                 }                                              \
 249         }
 250
 251
 252 void docacheflush(u1 *p, long bytelen, int dummy);
 253
 254 /* NullPointerException handlers and exception handling initialisation        */
 255
 256 /* NullPointerException signal handler for hardware null pointer check */
 257
 258 void catch_NullPointerException(int sig, int code, struct sigcontext *sigctx)
 259 {
 260         sigset_t nsig;
 261         int      instr;
 262         long     faultaddr;
 263
 264         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 265
 266         instr = *((int*)(sigctx->sc_pc));
 267         faultaddr = sigctx->sc_regs[(instr >> 21) & 0x1f];
 268
 269         if (faultaddr == 0) {
 270                 signal(sig, (void*) catch_NullPointerException); /* reinstall handler */
 271                 sigemptyset(&nsig);
 272                 sigaddset(&nsig, sig);
 273                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 274                 sigctx->sc_regs[REG_ITMP1_XPTR] =
 275                                             (long) proto_java_lang_NullPointerException;
 276                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 277                 sigctx->sc_pc = (long) asm_handle_nat_exception;
 278                 }
 279         else {
 280         faultaddr += (long) ((instr << 16) >> 16);
 281                 fprintf(stderr, "faulting address: 0x%lx at 0x%lx\n", (long) faultaddr, (long) sigctx->sc_pc);
 282                 panic("Stack overflow");
 283                 }
 284 }
 285
 286 void createcalljava ();
 287
 288
 289 void init_exceptions(void)
 290 {
 291
 292         createcalljava();
 293
 294         /* install signal handlers we need to convert to exceptions */
 295
 296         if (!checknull) {
 297
 298 #if defined(SIGSEGV)
 299                 signal(SIGSEGV, (void*) catch_NullPointerException);
 300 #endif
 301
 302 #if defined(SIGBUS)
 303                 signal(SIGBUS, (void*) catch_NullPointerException);
 304 #endif
 305                 }
 306 }
 307
 308
 309 /* function gen_mcode **********************************************************
 310
 311         generates machine code
 312
 313 *******************************************************************************/
 314
 315 #define         MethodPointer   -8
 316 #define         FrameSize       -12
 317 #define     IsSync          -16
 318 #define     IsLeaf          -20
 319 #define     IntSave         -24
 320 #define     FltSave         -28
 321 #define     ExTableSize     -32
 322 #define     ExTableStart    -32
 323
 324 #if POINTERSIZE==8
 325 #define     ExEntrySize     -32
 326 #define     ExStartPC       -8
 327 #define     ExEndPC         -16
 328 #define     ExHandlerPC     -24
 329 #define     ExCatchType     -32
 330 #else
 331 #define     ExEntrySize     -16
 332 #define     ExStartPC       -4
 333 #define     ExEndPC         -8
 334 #define     ExHandlerPC     -12
 335 #define     ExCatchType     -16
 336 #endif
 337
 338 static void gen_mcode()
 339 {
 340         int  len, s1, s2, s3, d, bbs;
 341         s4   a;
 342         s4          *mcodeptr;
 343         stackptr    src;
 344         varinfo     *var;
 345         basicblock  *bptr;
 346         instruction *iptr;
 347         xtable *ex;
 348
 349         {
 350         int p, pa, t, l, r;
 351
 352         savedregs_num = (isleafmethod) ? 0 : 1;           /* space to save the RA */
 353
 354         /* space to save used callee saved registers */
 355
 356         savedregs_num += (savintregcnt - maxsavintreguse);
 357         savedregs_num += (savfltregcnt - maxsavfltreguse);
 358
 359         parentargs_base = maxmemuse + savedregs_num;
 360
 361 #ifdef USE_THREADS                 /* space to save argument of monitor_enter */
 362
 363         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 364                 parentargs_base++;
 365
 366 #endif
 367
 368         /* adjust frame size for 16 byte alignment */
 369
 370         if (parentargs_base & 1)
 371                 parentargs_base++;
 372
 373         /* create method header */
 374
 375 #if POINTERSIZE==4
 376         (void) dseg_addaddress(method);                         /* Filler         */
 377 #endif
 378         (void) dseg_addaddress(method);                         /* MethodPointer  */
 379         (void) dseg_adds4(parentargs_base * 8);                 /* FrameSize      */
 380
 381 #ifdef USE_THREADS
 382
 383         /* IsSync contains the offset relative to the stack pointer for the
 384            argument of monitor_exit used in the exception handler. Since the
 385            offset could be zero and give a wrong meaning of the flag it is
 386            offset by one.
 387         */
 388
 389         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 390                 (void) dseg_adds4((maxmemuse + 1) * 8);             /* IsSync         */
 391         else
 392
 393 #endif
 394
 395         (void) dseg_adds4(0);                                   /* IsSync         */
 396
 397         (void) dseg_adds4(isleafmethod);                        /* IsLeaf         */
 398         (void) dseg_adds4(savintregcnt - maxsavintreguse);      /* IntSave        */
 399         (void) dseg_adds4(savfltregcnt - maxsavfltreguse);      /* FltSave        */
 400         (void) dseg_adds4(exceptiontablelength);                /* ExTableSize    */
 401
 402         /* create exception table */
 403
 404         for (ex = extable; ex != NULL; ex = ex->down) {
 405
 406 #ifdef LOOP_DEBUG
 407                 if (ex->start != NULL)
 408                         printf("adding start - %d - ", ex->start->debug_nr);
 409                 else {
 410                         printf("PANIC - start is NULL");
 411                         exit(-1);
 412                 }
 413 #endif
 414
 415                 dseg_addtarget(ex->start);
 416
 417 #ifdef LOOP_DEBUG
 418                 if (ex->end != NULL)
 419                         printf("adding end - %d - ", ex->end->debug_nr);
 420                 else {
 421                         printf("PANIC - end is NULL");
 422                         exit(-1);
 423                 }
 424 #endif
 425
 426                 dseg_addtarget(ex->end);
 427
 428 #ifdef LOOP_DEBUG
 429                 if (ex->handler != NULL)
 430                         printf("adding handler - %d\n", ex->handler->debug_nr);
 431                 else {
 432                         printf("PANIC - handler is NULL");
 433                         exit(-1);
 434                 }
 435 #endif
 436
 437                 dseg_addtarget(ex->handler);
 438
 439                 (void) dseg_addaddress(ex->catchtype);
 440                 }
 441
 442         /* initialize mcode variables */
 443
 444         mcodeptr = (s4*) mcodebase;
 445         mcodeend = (s4*) (mcodebase + mcodesize);
 446         MCODECHECK(128 + mparamcount);
 447
 448         /* create stack frame (if necessary) */
 449
 450         if (parentargs_base)
 451                 {M_LDA (REG_SP, REG_SP, -parentargs_base * 8);}
 452
 453         /* save return address and used callee saved registers */
 454
 455         p = parentargs_base;
 456         if (!isleafmethod)
 457                 {p--;  M_LST (REG_RA, REG_SP, 8*p);}
 458         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
 459                 {p--; M_LST (savintregs[r], REG_SP, 8 * p);}
 460         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
 461                 {p--; M_DST (savfltregs[r], REG_SP, 8 * p);}
 462
 463         /* save monitorenter argument */
 464
 465 #ifdef USE_THREADS
 466         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 467                 if (method->flags & ACC_STATIC) {
 468                         p = dseg_addaddress (class);
 469                         M_ALD(REG_ITMP1, REG_PV, p);
 470                         M_AST(REG_ITMP1, REG_SP, 8 * maxmemuse);
 471                         }
 472                 else {
 473                         M_AST (argintregs[0], REG_SP, 8 * maxmemuse);
 474                         }
 475                 }
 476 #endif
 477
 478         /* copy argument registers to stack and call trace function with pointer
 479            to arguments on stack. ToDo: save floating point registers !!!!!!!!!
 480         */
 481
 482         if (runverbose) {
 483                 M_LDA (REG_SP, REG_SP, -(18*8));
 484
 485                 M_LST(REG_RA,        REG_SP,  1*8);
 486
 487                 M_LST(argintregs[0], REG_SP,  2*8);
 488                 M_LST(argintregs[1], REG_SP,  3*8);
 489                 M_LST(argintregs[2], REG_SP,  4*8);
 490                 M_LST(argintregs[3], REG_SP,  5*8);
 491                 M_LST(argintregs[4], REG_SP,  6*8);
 492                 M_LST(argintregs[5], REG_SP,  7*8);
 493                 M_LST(argintregs[6], REG_SP,  8*8);
 494                 M_LST(argintregs[7], REG_SP,  9*8);
 495
 496                 M_DST(argfltregs[0], REG_SP, 10*8);
 497                 M_DST(argfltregs[1], REG_SP, 11*8);
 498                 M_DST(argfltregs[2], REG_SP, 12*8);
 499                 M_DST(argfltregs[3], REG_SP, 13*8);
 500                 M_DST(argfltregs[4], REG_SP, 14*8);
 501                 M_DST(argfltregs[5], REG_SP, 15*8);
 502                 M_DST(argfltregs[6], REG_SP, 16*8);
 503                 M_DST(argfltregs[7], REG_SP, 17*8);
 504
 505                 p = dseg_addaddress (method);
 506                 M_ALD(REG_ITMP1, REG_PV, p);
 507                 M_LST(REG_ITMP1, REG_SP, 0);
 508                 p = dseg_addaddress ((void*) (builtin_trace_args));
 509                 M_ALD(REG_ITMP3, REG_PV, p);
 510                 M_JSR(REG_RA, REG_ITMP3);
 511                 M_NOP;
 512
 513                 M_LLD(REG_RA,        REG_SP,  1*8);
 514
 515                 M_LLD(argintregs[0], REG_SP,  2*8);
 516                 M_LLD(argintregs[1], REG_SP,  3*8);
 517                 M_LLD(argintregs[2], REG_SP,  4*8);
 518                 M_LLD(argintregs[3], REG_SP,  5*8);
 519                 M_LLD(argintregs[4], REG_SP,  6*8);
 520                 M_LLD(argintregs[5], REG_SP,  7*8);
 521                 M_LLD(argintregs[6], REG_SP,  8*8);
 522                 M_LLD(argintregs[7], REG_SP,  9*8);
 523
 524                 M_DLD(argfltregs[0], REG_SP, 10*8);
 525                 M_DLD(argfltregs[1], REG_SP, 11*8);
 526                 M_DLD(argfltregs[2], REG_SP, 12*8);
 527                 M_DLD(argfltregs[3], REG_SP, 13*8);
 528                 M_DLD(argfltregs[4], REG_SP, 14*8);
 529                 M_DLD(argfltregs[5], REG_SP, 15*8);
 530                 M_DLD(argfltregs[6], REG_SP, 16*8);
 531                 M_DLD(argfltregs[7], REG_SP, 17*8);
 532
 533                 M_LDA (REG_SP, REG_SP, 18*8);
 534                 }
 535
 536         /* take arguments out of register or stack frame */
 537
 538         for (p = 0, l = 0; p < mparamcount; p++) {
 539                 t = mparamtypes[p];
 540                 var = &(locals[l][t]);
 541                 l++;
 542                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 543                         l++;
 544                 if (var->type < 0)
 545                         continue;
 546                 r = var->regoff;
 547                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 548                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 549                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 550                                         {M_INTMOVE (argintregs[p], r);}
 551                                 else                                 /* reg arg -> spilled    */
 552                                         M_LST (argintregs[p], REG_SP, 8 * r);
 553                                 }
 554                         else {                                   /* stack arguments       */
 555                                 pa = p - INT_ARG_CNT;
 556                                 if (!(var->flags & INMEMORY))        /* stack arg -> register */
 557                                         M_LLD (r, REG_SP, 8 * (parentargs_base + pa));
 558                                 else {                               /* stack arg -> spilled  */
 559                                         M_LLD (REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 560                                         M_LST (REG_ITMP1, REG_SP, 8 * r);
 561                                         }
 562                                 }
 563                         }
 564                 else {                                       /* floating args         */
 565                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 566                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 567                                         {M_TFLTMOVE (var->type, argfltregs[p], r);}
 568                                 else                                             /* reg arg -> spilled    */
 569                                         M_DST (argfltregs[p], REG_SP, 8 * r);
 570                                 }
 571                         else {                                   /* stack arguments       */
 572                                 pa = p - FLT_ARG_CNT;
 573                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 574                                         M_DLD (r, REG_SP, 8 * (parentargs_base + pa) );
 575                                 } else {                             /* stack-arg -> spilled  */
 576                                         M_DLD (REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 577                                         M_DST (REG_FTMP1, REG_SP, 8 * r);
 578                                         }
 579                                 }
 580                         }
 581                 }  /* end for */
 582
 583         /* call trace function */
 584
 585         if (runverbose && !isleafmethod) {
 586                 M_LDA (REG_SP, REG_SP, -8);
 587                 p = dseg_addaddress (method);
 588                 M_ALD(REG_ITMP1, REG_PV, p);
 589                 M_AST(REG_ITMP1, REG_SP, 0);
 590                 p = dseg_addaddress ((void*) (builtin_trace_args));
 591                 M_ALD(REG_ITMP3, REG_PV, p);
 592                 M_JSR(REG_RA, REG_ITMP3);
 593                 M_NOP;
 594                 M_LDA(REG_SP, REG_SP, 8);
 595                 }
 596
 597         /* call monitorenter function */
 598
 599 #ifdef USE_THREADS
 600         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 601                 int disp;
 602                 p = dseg_addaddress ((void*) (builtin_monitorenter));
 603                 M_ALD(REG_ITMP3, REG_PV, p);
 604                 M_JSR(REG_RA, REG_ITMP3);
 605                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
 606                 disp = -(int)((u1*) mcodeptr - mcodebase);
 607                 M_LDA(REG_PV, REG_RA, disp);
 608                 }
 609 #endif
 610         }
 611
 612         /* end of header generation */
 613
 614         /* walk through all basic blocks */
 615         for (/* bbs = block_count, */ bptr = block; /* --bbs >= 0 */ bptr != NULL; bptr = bptr->next) {
 616
 617                 bptr -> mpc = (int)((u1*) mcodeptr - mcodebase);
 618
 619                 if (bptr->flags >= BBREACHED) {
 620
 621                 /* branch resolving */
 622
 623                 {
 624                 branchref *brefs;
 625                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 626                         gen_resolvebranch((u1*) mcodebase + brefs->branchpos,
 627                                           brefs->branchpos, bptr->mpc);
 628                         }
 629                 }
 630
 631                 /* copy interface registers to their destination */
 632
 633                 src = bptr->instack;
 634                 len = bptr->indepth;
 635                 MCODECHECK(64+len);
 636                 while (src != NULL) {
 637                         len--;
 638                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 639                                 d = reg_of_var(src, REG_ITMP1);
 640                                 M_INTMOVE(REG_ITMP1, d);
 641                                 store_reg_to_var_int(src, d);
 642                                 }
 643                         else {
 644                                 d = reg_of_var(src, REG_IFTMP);
 645                                 if ((src->varkind != STACKVAR)) {
 646                                         s2 = src->type;
 647                                         if (IS_FLT_DBL_TYPE(s2)) {
 648                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 649                                                         s1 = interfaces[len][s2].regoff;
 650                                                         M_TFLTMOVE(s2,s1,d);
 651                                                         }
 652                                                 else {
 653                                                         M_DLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 654                                                         }
 655                                                 store_reg_to_var_flt(src, d);
 656                                                 }
 657                                         else {
 658                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 659                                                         s1 = interfaces[len][s2].regoff;
 660                                                         M_INTMOVE(s1,d);
 661                                                         }
 662                                                 else {
 663                                                         M_LLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 664                                                         }
 665                                                 store_reg_to_var_int(src, d);
 666                                                 }
 667                                         }
 668                                 }
 669                         src = src->prev;
 670                         }
 671
 672                 /* walk through all instructions */
 673
 674                 src = bptr->instack;
 675                 len = bptr->icount;
 676                 for (iptr = bptr->iinstr;
 677                     len > 0;
 678                     src = iptr->dst, len--, iptr++) {
 679
 680         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 681         switch (iptr->opc) {
 682
 683                 case ICMD_NOP:        /* ...  ==> ...                                 */
 684                         break;
 685
 686                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 687
 688                         var_to_reg_int(s1, src, REG_ITMP1);
 689                         M_BEQZ(s1, 0);
 690                         mcode_addxnullrefs(mcodeptr);
 691                         M_NOP;
 692                         break;
 693
 694                 /* constant operations ************************************************/
 695
 696 #define ICONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_IADD_IMM(REG_ZERO,c,r);} \
 697                     else if(((c)>=0)&&((c)<=0xffff)){M_OR_IMM(REG_ZERO,c,r);} \
 698                     else{a=dseg_adds4(c);M_ILD(r,REG_PV,a);}
 699
 700 #define LCONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LADD_IMM(REG_ZERO,c,r);} \
 701                     else if(((c)>=0)&&((c)<=0xffff)){M_OR_IMM(REG_ZERO,c,r);} \
 702                     else{a=dseg_adds8(c);M_LLD(r,REG_PV,a);}
 703
 704                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 705                                       /* op1 = 0, val.i = constant                    */
 706
 707                         d = reg_of_var(iptr->dst, REG_ITMP1);
 708                         ICONST(d, iptr->val.i);
 709                         store_reg_to_var_int(iptr->dst, d);
 710                         break;
 711
 712                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 713                                       /* op1 = 0, val.l = constant                    */
 714
 715                         d = reg_of_var(iptr->dst, REG_ITMP1);
 716                         LCONST(d, iptr->val.l);
 717                         store_reg_to_var_int(iptr->dst, d);
 718                         break;
 719
 720                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 721                                       /* op1 = 0, val.f = constant                    */
 722
 723                         d = reg_of_var (iptr->dst, REG_FTMP1);
 724                         a = dseg_addfloat (iptr->val.f);
 725                         M_FLD(d, REG_PV, a);
 726                         store_reg_to_var_flt (iptr->dst, d);
 727                         break;
 728
 729                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 730                                       /* op1 = 0, val.d = constant                    */
 731
 732                         d = reg_of_var (iptr->dst, REG_FTMP1);
 733                         a = dseg_adddouble (iptr->val.d);
 734                         M_DLD(d, REG_PV, a);
 735                         store_reg_to_var_flt (iptr->dst, d);
 736                         break;
 737
 738                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 739                                       /* op1 = 0, val.a = constant                    */
 740
 741                         d = reg_of_var(iptr->dst, REG_ITMP1);
 742                         if (iptr->val.a) {
 743                                 a = dseg_addaddress (iptr->val.a);
 744                                 M_ALD(d, REG_PV, a);
 745                                 }
 746                         else {
 747                                 M_INTMOVE(REG_ZERO, d);
 748                                 }
 749                         store_reg_to_var_int(iptr->dst, d);
 750                         break;
 751
 752
 753                 /* load/store operations **********************************************/
 754
 755                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 756                 case ICMD_LLOAD:      /* op1 = local variable                         */
 757                 case ICMD_ALOAD:
 758
 759                         d = reg_of_var(iptr->dst, REG_ITMP1);
 760                         if ((iptr->dst->varkind == LOCALVAR) &&
 761                             (iptr->dst->varnum == iptr->op1))
 762                                 break;
 763                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 764                         if (var->flags & INMEMORY)
 765                                 M_LLD(d, REG_SP, 8 * var->regoff);
 766                         else
 767                                 {M_INTMOVE(var->regoff,d);}
 768                         store_reg_to_var_int(iptr->dst, d);
 769                         break;
 770
 771                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 772                 case ICMD_DLOAD:      /* op1 = local variable                         */
 773
 774                         d = reg_of_var(iptr->dst, REG_FTMP1);
 775                         if ((iptr->dst->varkind == LOCALVAR) &&
 776                             (iptr->dst->varnum == iptr->op1))
 777                                 break;
 778                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 779                         {
 780                                 int t2 = ((iptr->opc == ICMD_FLOAD) ? TYPE_FLT : TYPE_DBL);
 781                                 if (var->flags & INMEMORY)
 782                                         {M_CCFLD(var->type,t2,d, REG_SP, 8 * var->regoff);}
 783                                 else
 784                                         {M_CCFLTMOVE(var->type,t2,var->regoff,d);}
 785                         }
 786                         store_reg_to_var_flt(iptr->dst, d);
 787                         break;
 788
 789
 790                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 791                 case ICMD_LSTORE:     /* op1 = local variable                         */
 792                 case ICMD_ASTORE:
 793
 794                         if ((src->varkind == LOCALVAR) &&
 795                             (src->varnum == iptr->op1))
 796                                 break;
 797                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 798                         if (var->flags & INMEMORY) {
 799                                 var_to_reg_int(s1, src, REG_ITMP1);
 800                                 M_LST(s1, REG_SP, 8 * var->regoff);
 801                                 }
 802                         else {
 803                                 var_to_reg_int(s1, src, var->regoff);
 804                                 M_INTMOVE(s1, var->regoff);
 805                                 }
 806                         break;
 807
 808                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 809                 case ICMD_DSTORE:     /* op1 = local variable                         */
 810
 811                         if ((src->varkind == LOCALVAR) &&
 812                             (src->varnum == iptr->op1))
 813                                 break;
 814                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 815                         {
 816                                 int t1 = ((iptr->opc == ICMD_FSTORE) ? TYPE_FLT : TYPE_DBL);
 817                                 if (var->flags & INMEMORY) {
 818                                         var_to_reg_flt(s1, src, REG_FTMP1);
 819                                         M_CCFST(t1,var->type,s1, REG_SP, 8 * var->regoff);
 820                                         }
 821                                 else {
 822                                         var_to_reg_flt(s1, src, var->regoff);
 823                                         M_CCFLTMOVE(t1,var->type,s1, var->regoff);
 824                                         }
 825                         }
 826                         break;
 827
 828
 829                 /* pop/dup/swap operations ********************************************/
 830
 831                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 832
 833                 case ICMD_POP:        /* ..., value  ==> ...                          */
 834                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 835                         break;
 836
 837 #define M_COPY(from,to) \
 838                         d = reg_of_var(to, REG_IFTMP); \
 839                         if ((from->regoff != to->regoff) || \
 840                             ((from->flags ^ to->flags) & INMEMORY)) { \
 841                                 if (IS_FLT_DBL_TYPE(from->type)) { \
 842                                         var_to_reg_flt(s1, from, d); \
 843                                         M_TFLTMOVE(from->type,s1,d); \
 844                                         store_reg_to_var_flt(to, d); \
 845                                         }\
 846                                 else { \
 847                                         var_to_reg_int(s1, from, d); \
 848                                         M_INTMOVE(s1,d); \
 849                                         store_reg_to_var_int(to, d); \
 850                                         }\
 851                                 }
 852
 853                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 854                         M_COPY(src, iptr->dst);
 855                         break;
 856
 857                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 858
 859                         M_COPY(src,       iptr->dst->prev->prev);
 860
 861                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 862
 863                         M_COPY(src,       iptr->dst);
 864                         M_COPY(src->prev, iptr->dst->prev);
 865                         break;
 866
 867                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 868
 869                         M_COPY(src->prev,       iptr->dst->prev->prev->prev);
 870
 871                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 872
 873                         M_COPY(src,             iptr->dst);
 874                         M_COPY(src->prev,       iptr->dst->prev);
 875                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 876                         M_COPY(src, iptr->dst->prev->prev->prev);
 877                         break;
 878
 879                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 880
 881                         M_COPY(src,                   iptr->dst);
 882                         M_COPY(src->prev,             iptr->dst->prev);
 883                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 884                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 885                         M_COPY(src,       iptr->dst->prev->prev->prev->prev);
 886                         M_COPY(src->prev, iptr->dst->prev->prev->prev->prev->prev);
 887                         break;
 888
 889                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 890
 891                         M_COPY(src, iptr->dst->prev);
 892                         M_COPY(src->prev, iptr->dst);
 893                         break;
 894
 895
 896                 /* integer operations *************************************************/
 897
 898                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 899
 900                         var_to_reg_int(s1, src, REG_ITMP1);
 901                         d = reg_of_var(iptr->dst, REG_ITMP3);
 902                         M_ISUB(REG_ZERO, s1, d);
 903                         store_reg_to_var_int(iptr->dst, d);
 904                         break;
 905
 906                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 907
 908                         var_to_reg_int(s1, src, REG_ITMP1);
 909                         d = reg_of_var(iptr->dst, REG_ITMP3);
 910                         M_LSUB(REG_ZERO, s1, d);
 911                         store_reg_to_var_int(iptr->dst, d);
 912                         break;
 913
 914                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 915
 916                         var_to_reg_int(s1, src, REG_ITMP1);
 917                         d = reg_of_var(iptr->dst, REG_ITMP3);
 918                         M_INTMOVE(s1, d);
 919                         store_reg_to_var_int(iptr->dst, d);
 920                         break;
 921
 922                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 923
 924                         var_to_reg_int(s1, src, REG_ITMP1);
 925                         d = reg_of_var(iptr->dst, REG_ITMP3);
 926                         M_IADD(s1, REG_ZERO, d );
 927                         store_reg_to_var_int(iptr->dst, d);
 928                         break;
 929
 930                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 931
 932                         var_to_reg_int(s1, src, REG_ITMP1);
 933                         d = reg_of_var(iptr->dst, REG_ITMP3);
 934                         M_LSLL_IMM(s1, 56, d);
 935                         M_LSRA_IMM( d, 56, d);
 936                         store_reg_to_var_int(iptr->dst, d);
 937                         break;
 938
 939                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 940
 941                         var_to_reg_int(s1, src, REG_ITMP1);
 942                         d = reg_of_var(iptr->dst, REG_ITMP3);
 943             M_CZEXT(s1, d);
 944                         store_reg_to_var_int(iptr->dst, d);
 945                         break;
 946
 947                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 948
 949                         var_to_reg_int(s1, src, REG_ITMP1);
 950                         d = reg_of_var(iptr->dst, REG_ITMP3);
 951                         M_LSLL_IMM(s1, 48, d);
 952                         M_LSRA_IMM( d, 48, d);
 953                         store_reg_to_var_int(iptr->dst, d);
 954                         break;
 955
 956
 957                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 958
 959                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 960                         var_to_reg_int(s2, src, REG_ITMP2);
 961                         d = reg_of_var(iptr->dst, REG_ITMP3);
 962                         M_IADD(s1, s2, d);
 963                         store_reg_to_var_int(iptr->dst, d);
 964                         break;
 965
 966                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 967                                       /* val.i = constant                             */
 968
 969                         var_to_reg_int(s1, src, REG_ITMP1);
 970                         d = reg_of_var(iptr->dst, REG_ITMP3);
 971                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
 972                                 M_IADD_IMM(s1, iptr->val.i, d);
 973                                 }
 974                         else {
 975                                 ICONST(REG_ITMP2, iptr->val.i);
 976                                 M_IADD(s1, REG_ITMP2, d);
 977                                 }
 978                         store_reg_to_var_int(iptr->dst, d);
 979                         break;
 980
 981                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 982
 983                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 984                         var_to_reg_int(s2, src, REG_ITMP2);
 985                         d = reg_of_var(iptr->dst, REG_ITMP3);
 986                         M_LADD(s1, s2, d);
 987                         store_reg_to_var_int(iptr->dst, d);
 988                         break;
 989
 990                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 991                                       /* val.l = constant                             */
 992
 993                         var_to_reg_int(s1, src, REG_ITMP1);
 994                         d = reg_of_var(iptr->dst, REG_ITMP3);
 995                         if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
 996                                 M_LADD_IMM(s1, iptr->val.l, d);
 997                                 }
 998                         else {
 999                                 LCONST(REG_ITMP2, iptr->val.l);
1000                                 M_LADD(s1, REG_ITMP2, d);
1001                                 }
1002                         store_reg_to_var_int(iptr->dst, d);
1003                         break;
1004
1005                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1006
1007                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1008                         var_to_reg_int(s2, src, REG_ITMP2);
1009                         d = reg_of_var(iptr->dst, REG_ITMP3);
1010                         M_ISUB(s1, s2, d);
1011                         store_reg_to_var_int(iptr->dst, d);
1012                         break;
1013
1014                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
1015                                       /* val.i = constant                             */
1016
1017                         var_to_reg_int(s1, src, REG_ITMP1);
1018                         d = reg_of_var(iptr->dst, REG_ITMP3);
1019                         if ((iptr->val.i >= -32767) && (iptr->val.i <= 32768)) {
1020                                 M_IADD_IMM(s1, -iptr->val.i, d);
1021                                 }
1022                         else {
1023                                 ICONST(REG_ITMP2, iptr->val.i);
1024                                 M_ISUB(s1, REG_ITMP2, d);
1025                                 }
1026                         store_reg_to_var_int(iptr->dst, d);
1027                         break;
1028
1029                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1030
1031                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1032                         var_to_reg_int(s2, src, REG_ITMP2);
1033                         d = reg_of_var(iptr->dst, REG_ITMP3);
1034                         M_LSUB(s1, s2, d);
1035                         store_reg_to_var_int(iptr->dst, d);
1036                         break;
1037
1038                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
1039                                       /* val.l = constant                             */
1040
1041                         var_to_reg_int(s1, src, REG_ITMP1);
1042                         d = reg_of_var(iptr->dst, REG_ITMP3);
1043                         if ((iptr->val.l >= -32767) && (iptr->val.l <= 32768)) {
1044                                 M_LADD_IMM(s1, -iptr->val.l, d);
1045                                 }
1046                         else {
1047                                 LCONST(REG_ITMP2, iptr->val.l);
1048                                 M_LSUB(s1, REG_ITMP2, d);
1049                                 }
1050                         store_reg_to_var_int(iptr->dst, d);
1051                         break;
1052
1053                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1054
1055                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1056                         var_to_reg_int(s2, src, REG_ITMP2);
1057                         d = reg_of_var(iptr->dst, REG_ITMP3);
1058                         M_IMUL(s1, s2);
1059                         M_MFLO(d);
1060                         M_NOP;
1061                         M_NOP;
1062                         store_reg_to_var_int(iptr->dst, d);
1063                         break;
1064
1065                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
1066                                       /* val.i = constant                             */
1067
1068                         var_to_reg_int(s1, src, REG_ITMP1);
1069                         d = reg_of_var(iptr->dst, REG_ITMP3);
1070                         ICONST(REG_ITMP2, iptr->val.i);
1071                         M_IMUL(s1, REG_ITMP2);
1072                         M_MFLO(d);
1073                         M_NOP;
1074                         M_NOP;
1075                         store_reg_to_var_int(iptr->dst, d);
1076                         break;
1077
1078                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1079
1080                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1081                         var_to_reg_int(s2, src, REG_ITMP2);
1082                         d = reg_of_var(iptr->dst, REG_ITMP3);
1083                         M_LMUL(s1, s2);
1084                         M_MFLO(d);
1085                         M_NOP;
1086                         M_NOP;
1087                         store_reg_to_var_int(iptr->dst, d);
1088                         break;
1089
1090                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
1091                                       /* val.l = constant                             */
1092
1093                         var_to_reg_int(s1, src, REG_ITMP1);
1094                         d = reg_of_var(iptr->dst, REG_ITMP3);
1095                         LCONST(REG_ITMP2, iptr->val.l);
1096                         M_LMUL(s1, REG_ITMP2);
1097                         M_MFLO(d);
1098                         M_NOP;
1099                         M_NOP;
1100                         store_reg_to_var_int(iptr->dst, d);
1101                         break;
1102
1103                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1104
1105                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1106                         var_to_reg_int(s2, src, REG_ITMP2);
1107                         d = reg_of_var(iptr->dst, REG_ITMP3);
1108                         M_IDIV(s1, s2);
1109                         M_MFLO(d);
1110                         M_NOP;
1111                         M_NOP;
1112                         store_reg_to_var_int(iptr->dst, d);
1113                         break;
1114 #if 0
1115                 case ICMD_IDIVCONST:  /* ..., value  ==> ..., value / constant        */
1116                                       /* val.i = constant                             */
1117
1118                         var_to_reg_int(s1, src, REG_ITMP1);
1119                         d = reg_of_var(iptr->dst, REG_ITMP3);
1120                         ICONST(REG_ITMP2, iptr->val.i);
1121                         M_IDIV(s1, REG_ITMP2);
1122                         M_MFLO(d);
1123                         M_NOP;
1124                         M_NOP;
1125                         store_reg_to_var_int(iptr->dst, d);
1126                         break;
1127 #endif
1128                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1129
1130                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1131                         var_to_reg_int(s2, src, REG_ITMP2);
1132                         d = reg_of_var(iptr->dst, REG_ITMP3);
1133                         M_LDIV(s1, s2);
1134                         M_MFLO(d);
1135                         M_NOP;
1136                         M_NOP;
1137                         store_reg_to_var_int(iptr->dst, d);
1138                         break;
1139 #if 0
1140                 case ICMD_LDIVCONST:  /* ..., value  ==> ..., value / constant        */
1141                                       /* val.l = constant                             */
1142
1143                         var_to_reg_int(s1, src, REG_ITMP1);
1144                         d = reg_of_var(iptr->dst, REG_ITMP3);
1145                         LCONST(REG_ITMP2, iptr->val.l);
1146                         M_LDIV(s1, REG_ITMP2);
1147                         M_MFLO(d);
1148                         M_NOP;
1149                         M_NOP;
1150                         store_reg_to_var_int(iptr->dst, d);
1151                         break;
1152 #endif
1153                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1154
1155                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1156                         var_to_reg_int(s2, src, REG_ITMP2);
1157                         d = reg_of_var(iptr->dst, REG_ITMP3);
1158                         M_IDIV(s1, s2);
1159                         M_MFHI(d);
1160                         M_NOP;
1161                         M_NOP;
1162                         store_reg_to_var_int(iptr->dst, d);
1163                         break;
1164 #if 0
1165                 case ICMD_IREMCONST:  /* ..., value  ==> ..., value % constant        */
1166                                       /* val.i = constant                             */
1167
1168                         var_to_reg_int(s1, src, REG_ITMP1);
1169                         d = reg_of_var(iptr->dst, REG_ITMP3);
1170                         ICONST(REG_ITMP2, iptr->val.i);
1171                         M_IDIV(s1, REG_ITMP2);
1172                         M_MFHI(d);
1173                         M_NOP;
1174                         M_NOP;
1175                         store_reg_to_var_int(iptr->dst, d);
1176                         break;
1177 #endif
1178                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1179
1180                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1181                         var_to_reg_int(s2, src, REG_ITMP2);
1182                         d = reg_of_var(iptr->dst, REG_ITMP3);
1183                         M_LDIV(s1, s2);
1184                         M_MFHI(d);
1185                         M_NOP;
1186                         M_NOP;
1187                         store_reg_to_var_int(iptr->dst, d);
1188                         break;
1189 #if 0
1190                 case ICMD_LREMCONST:  /* ..., value  ==> ..., value % constant        */
1191                                       /* val.l = constant                             */
1192
1193                         var_to_reg_int(s1, src, REG_ITMP1);
1194                         d = reg_of_var(iptr->dst, REG_ITMP3);
1195                         LCONST(REG_ITMP2, iptr->val.l);
1196                         M_LDIV(s1, REG_ITMP2);
1197                         M_MFHI(d);
1198                         M_NOP;
1199                         M_NOP;
1200                         store_reg_to_var_int(iptr->dst, d);
1201                         break;
1202 #endif
1203                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
1204                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
1205
1206                         var_to_reg_int(s1, src, REG_ITMP1);
1207                         d = reg_of_var(iptr->dst, REG_ITMP3);
1208                         M_LSRA_IMM(s1, 63, REG_ITMP2);
1209                         M_LSRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
1210                         M_LADD(s1, REG_ITMP2, REG_ITMP2);
1211                         M_LSRA_IMM(REG_ITMP2, iptr->val.i, d);
1212                         store_reg_to_var_int(iptr->dst, d);
1213                         break;
1214
1215                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1216
1217                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1218                         var_to_reg_int(s2, src, REG_ITMP2);
1219                         d = reg_of_var(iptr->dst, REG_ITMP3);
1220                         M_ISLL(s1, s2, d);
1221                         store_reg_to_var_int(iptr->dst, d);
1222                         break;
1223
1224                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1225                                       /* val.i = constant                             */
1226
1227                         var_to_reg_int(s1, src, REG_ITMP1);
1228                         d = reg_of_var(iptr->dst, REG_ITMP3);
1229                         M_ISLL_IMM(s1, iptr->val.i, d);
1230                         store_reg_to_var_int(iptr->dst, d);
1231                         break;
1232
1233                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1234
1235                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1236                         var_to_reg_int(s2, src, REG_ITMP2);
1237                         d = reg_of_var(iptr->dst, REG_ITMP3);
1238                         M_ISRA(s1, s2, d);
1239                         store_reg_to_var_int(iptr->dst, d);
1240                         break;
1241
1242                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1243                                       /* val.i = constant                             */
1244
1245                         var_to_reg_int(s1, src, REG_ITMP1);
1246                         d = reg_of_var(iptr->dst, REG_ITMP3);
1247                         M_ISRA_IMM(s1, iptr->val.i, d);
1248                         store_reg_to_var_int(iptr->dst, d);
1249                         break;
1250
1251                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1252
1253                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1254                         var_to_reg_int(s2, src, REG_ITMP2);
1255                         d = reg_of_var(iptr->dst, REG_ITMP3);
1256                         M_ISRL(s1, s2, d);
1257                         store_reg_to_var_int(iptr->dst, d);
1258                         break;
1259
1260                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1261                                       /* val.i = constant                             */
1262
1263                         var_to_reg_int(s1, src, REG_ITMP1);
1264                         d = reg_of_var(iptr->dst, REG_ITMP3);
1265                         M_ISRL_IMM(s1, iptr->val.i, d);
1266                         store_reg_to_var_int(iptr->dst, d);
1267                         break;
1268
1269                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1270
1271                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1272                         var_to_reg_int(s2, src, REG_ITMP2);
1273                         d = reg_of_var(iptr->dst, REG_ITMP3);
1274                         M_LSLL(s1, s2, d);
1275                         store_reg_to_var_int(iptr->dst, d);
1276                         break;
1277
1278                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1279                                       /* val.l = constant                             */
1280
1281                         var_to_reg_int(s1, src, REG_ITMP1);
1282                         d = reg_of_var(iptr->dst, REG_ITMP3);
1283                         M_LSLL_IMM(s1, iptr->val.l, d);
1284                         store_reg_to_var_int(iptr->dst, d);
1285                         break;
1286
1287                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1288
1289                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1290                         var_to_reg_int(s2, src, REG_ITMP2);
1291                         d = reg_of_var(iptr->dst, REG_ITMP3);
1292                         M_LSRA(s1, s2, d);
1293                         store_reg_to_var_int(iptr->dst, d);
1294                         break;
1295
1296                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1297                                       /* val.l = constant                             */
1298
1299                         var_to_reg_int(s1, src, REG_ITMP1);
1300                         d = reg_of_var(iptr->dst, REG_ITMP3);
1301                         M_LSRA_IMM(s1, iptr->val.l, d);
1302                         store_reg_to_var_int(iptr->dst, d);
1303                         break;
1304
1305                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1306
1307                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1308                         var_to_reg_int(s2, src, REG_ITMP2);
1309                         d = reg_of_var(iptr->dst, REG_ITMP3);
1310                         M_LSRL(s1, s2, d);
1311                         store_reg_to_var_int(iptr->dst, d);
1312                         break;
1313
1314                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1315                                       /* val.l = constant                             */
1316
1317                         var_to_reg_int(s1, src, REG_ITMP1);
1318                         d = reg_of_var(iptr->dst, REG_ITMP3);
1319                         M_LSRL_IMM(s1, iptr->val.l, d);
1320                         store_reg_to_var_int(iptr->dst, d);
1321                         break;
1322
1323                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1324                 case ICMD_LAND:
1325
1326                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1327                         var_to_reg_int(s2, src, REG_ITMP2);
1328                         d = reg_of_var(iptr->dst, REG_ITMP3);
1329                         M_AND(s1, s2, d);
1330                         store_reg_to_var_int(iptr->dst, d);
1331                         break;
1332
1333                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1334                                       /* val.i = constant                             */
1335
1336                         var_to_reg_int(s1, src, REG_ITMP1);
1337                         d = reg_of_var(iptr->dst, REG_ITMP3);
1338                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1339                                 M_AND_IMM(s1, iptr->val.i, d);
1340                                 }
1341                         else {
1342                                 ICONST(REG_ITMP2, iptr->val.i);
1343                                 M_AND(s1, REG_ITMP2, d);
1344                                 }
1345                         store_reg_to_var_int(iptr->dst, d);
1346                         break;
1347
1348                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1349                                       /* val.i = constant                             */
1350
1351                         var_to_reg_int(s1, src, REG_ITMP1);
1352                         d = reg_of_var(iptr->dst, REG_ITMP3);
1353                         if (s1 == d) {
1354                                 M_MOV(s1, REG_ITMP1);
1355                                 s1 = REG_ITMP1;
1356                                 }
1357                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1358                                 M_AND_IMM(s1, iptr->val.i, d);
1359                                 M_BGEZ(s1, 4);
1360                                 M_NOP;
1361                                 M_ISUB(REG_ZERO, s1, d);
1362                                 M_AND_IMM(d, iptr->val.i, d);
1363                                 }
1364                         else {
1365                                 ICONST(REG_ITMP2, iptr->val.i);
1366                                 M_AND(s1, REG_ITMP2, d);
1367                                 M_BGEZ(s1, 4);
1368                                 M_NOP;
1369                                 M_ISUB(REG_ZERO, s1, d);
1370                                 M_AND(d, REG_ITMP2, d);
1371                                 }
1372                         M_ISUB(REG_ZERO, d, d);
1373                         store_reg_to_var_int(iptr->dst, d);
1374                         break;
1375
1376                 case ICMD_IREM0X10001:  /* ..., value  ==> ..., value % 0x100001      */
1377
1378 /*          b = value & 0xffff;
1379                         a = value >> 16;
1380                         a = ((b - a) & 0xffff) + (b < a);
1381 */
1382                         var_to_reg_int(s1, src, REG_ITMP1);
1383                         d = reg_of_var(iptr->dst, REG_ITMP3);
1384                         if (s1 == d) {
1385                                 M_MOV(s1, REG_ITMP3);
1386                                 s1 = REG_ITMP3;
1387                                 }
1388                         M_BLTZ(s1, 7);
1389             M_CZEXT(s1, REG_ITMP2);                             /* delay slot */
1390                         M_ISRA_IMM(s1, 16, d);
1391                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1392                         M_ISUB(REG_ITMP2, d, d);
1393             M_CZEXT(d, d);
1394                         M_BR(7);
1395                         M_IADD(d, REG_ITMP1, d);                            /* delay slot */
1396
1397                         M_LUI(REG_ITMP2, 1);
1398                         M_IADD_IMM(REG_ITMP2, 1, REG_ITMP2);
1399                         M_IDIV(s1, REG_ITMP2);
1400                         M_MFHI(d);
1401                         M_NOP;
1402                         M_NOP;
1403                         store_reg_to_var_int(iptr->dst, d);
1404                         break;
1405
1406                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1407                                       /* val.l = constant                             */
1408
1409                         var_to_reg_int(s1, src, REG_ITMP1);
1410                         d = reg_of_var(iptr->dst, REG_ITMP3);
1411                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1412                                 M_AND_IMM(s1, iptr->val.l, d);
1413                                 }
1414                         else {
1415                                 LCONST(REG_ITMP2, iptr->val.l);
1416                                 M_AND(s1, REG_ITMP2, d);
1417                                 }
1418                         store_reg_to_var_int(iptr->dst, d);
1419                         break;
1420
1421                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1422                                       /* val.l = constant                             */
1423
1424                         var_to_reg_int(s1, src, REG_ITMP1);
1425                         d = reg_of_var(iptr->dst, REG_ITMP3);
1426                         if (s1 == d) {
1427                                 M_MOV(s1, REG_ITMP1);
1428                                 s1 = REG_ITMP1;
1429                                 }
1430                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1431                                 M_AND_IMM(s1, iptr->val.l, d);
1432                                 M_BGEZ(s1, 4);
1433                                 M_NOP;
1434                                 M_LSUB(REG_ZERO, s1, d);
1435                                 M_AND_IMM(d, iptr->val.l, d);
1436                                 }
1437                         else {
1438                                 LCONST(REG_ITMP2, iptr->val.l);
1439                                 M_AND(s1, REG_ITMP2, d);
1440                                 M_BGEZ(s1, 4);
1441                                 M_NOP;
1442                                 M_LSUB(REG_ZERO, s1, d);
1443                                 M_AND(d, REG_ITMP2, d);
1444                                 }
1445                         M_LSUB(REG_ZERO, d, d);
1446                         store_reg_to_var_int(iptr->dst, d);
1447                         break;
1448
1449                 case ICMD_LREM0X10001:/* ..., value  ==> ..., value % 0x10001         */
1450
1451                         var_to_reg_int(s1, src, REG_ITMP1);
1452                         d = reg_of_var(iptr->dst, REG_ITMP3);
1453                         M_LUI(REG_ITMP2, 1);
1454                         M_LADD_IMM(REG_ITMP2, 1, REG_ITMP2);
1455                         M_LDIV(s1, REG_ITMP2);
1456                         M_MFHI(d);
1457                         M_NOP;
1458                         M_NOP;
1459                         store_reg_to_var_int(iptr->dst, d);
1460                         break;
1461
1462                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1463                 case ICMD_LOR:
1464
1465                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1466                         var_to_reg_int(s2, src, REG_ITMP2);
1467                         d = reg_of_var(iptr->dst, REG_ITMP3);
1468                         M_OR( s1,s2, d);
1469                         store_reg_to_var_int(iptr->dst, d);
1470                         break;
1471
1472                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1473                                       /* val.i = constant                             */
1474
1475                         var_to_reg_int(s1, src, REG_ITMP1);
1476                         d = reg_of_var(iptr->dst, REG_ITMP3);
1477                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1478                                 M_OR_IMM(s1, iptr->val.i, d);
1479                                 }
1480                         else {
1481                                 ICONST(REG_ITMP2, iptr->val.i);
1482                                 M_OR(s1, REG_ITMP2, d);
1483                                 }
1484                         store_reg_to_var_int(iptr->dst, d);
1485                         break;
1486
1487                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1488                                       /* val.l = constant                             */
1489
1490                         var_to_reg_int(s1, src, REG_ITMP1);
1491                         d = reg_of_var(iptr->dst, REG_ITMP3);
1492                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1493                                 M_OR_IMM(s1, iptr->val.l, d);
1494                                 }
1495                         else {
1496                                 LCONST(REG_ITMP2, iptr->val.l);
1497                                 M_OR(s1, REG_ITMP2, d);
1498                                 }
1499                         store_reg_to_var_int(iptr->dst, d);
1500                         break;
1501
1502                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1503                 case ICMD_LXOR:
1504
1505                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1506                         var_to_reg_int(s2, src, REG_ITMP2);
1507                         d = reg_of_var(iptr->dst, REG_ITMP3);
1508                         M_XOR(s1, s2, d);
1509                         store_reg_to_var_int(iptr->dst, d);
1510                         break;
1511
1512                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1513                                       /* val.i = constant                             */
1514
1515                         var_to_reg_int(s1, src, REG_ITMP1);
1516                         d = reg_of_var(iptr->dst, REG_ITMP3);
1517                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1518                                 M_XOR_IMM(s1, iptr->val.i, d);
1519                                 }
1520                         else {
1521                                 ICONST(REG_ITMP2, iptr->val.i);
1522                                 M_XOR(s1, REG_ITMP2, d);
1523                                 }
1524                         store_reg_to_var_int(iptr->dst, d);
1525                         break;
1526
1527                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1528                                       /* val.l = constant                             */
1529
1530                         var_to_reg_int(s1, src, REG_ITMP1);
1531                         d = reg_of_var(iptr->dst, REG_ITMP3);
1532                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1533                                 M_XOR_IMM(s1, iptr->val.l, d);
1534                                 }
1535                         else {
1536                                 LCONST(REG_ITMP2, iptr->val.l);
1537                                 M_XOR(s1, REG_ITMP2, d);
1538                                 }
1539                         store_reg_to_var_int(iptr->dst, d);
1540                         break;
1541
1542
1543                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1544
1545                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1546                         var_to_reg_int(s2, src, REG_ITMP2);
1547                         d = reg_of_var(iptr->dst, REG_ITMP3);
1548                         M_CMPLT(s1, s2, REG_ITMP3);
1549                         M_CMPLT(s2, s1, REG_ITMP1);
1550                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1551                         store_reg_to_var_int(iptr->dst, d);
1552                         break;
1553
1554
1555                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1556                                       /* op1 = variable, val.i = constant             */
1557
1558                         var = &(locals[iptr->op1][TYPE_INT]);
1559                         if (var->flags & INMEMORY) {
1560                                 s1 = REG_ITMP1;
1561                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1562                                 }
1563                         else
1564                                 s1 = var->regoff;
1565                         M_IADD_IMM(s1, iptr->val.i, s1);
1566                         if (var->flags & INMEMORY)
1567                                 M_LST(s1, REG_SP, 8 * var->regoff);
1568                         break;
1569
1570
1571                 /* floating operations ************************************************/
1572
1573                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1574
1575                         var_to_reg_flt(s1, src, REG_FTMP1);
1576                         d = reg_of_var(iptr->dst, REG_FTMP3);
1577                         M_FNEG(s1, d);
1578                         store_reg_to_var_flt(iptr->dst, d);
1579                         break;
1580
1581                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1582
1583                         var_to_reg_flt(s1, src, REG_FTMP1);
1584                         d = reg_of_var(iptr->dst, REG_FTMP3);
1585                         M_DNEG(s1, d);
1586                         store_reg_to_var_flt(iptr->dst, d);
1587                         break;
1588
1589                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1590
1591                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1592                         var_to_reg_flt(s2, src, REG_FTMP2);
1593                         d = reg_of_var(iptr->dst, REG_FTMP3);
1594                         M_FADD(s1, s2, d);
1595                         store_reg_to_var_flt(iptr->dst, d);
1596                         break;
1597
1598                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1599
1600                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1601                         var_to_reg_flt(s2, src, REG_FTMP2);
1602                         d = reg_of_var(iptr->dst, REG_FTMP3);
1603                         M_DADD(s1, s2, d);
1604                         store_reg_to_var_flt(iptr->dst, d);
1605                         break;
1606
1607                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1608
1609                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1610                         var_to_reg_flt(s2, src, REG_FTMP2);
1611                         d = reg_of_var(iptr->dst, REG_FTMP3);
1612                         M_FSUB(s1, s2, d);
1613                         store_reg_to_var_flt(iptr->dst, d);
1614                         break;
1615
1616                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1617
1618                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1619                         var_to_reg_flt(s2, src, REG_FTMP2);
1620                         d = reg_of_var(iptr->dst, REG_FTMP3);
1621                         M_DSUB(s1, s2, d);
1622                         store_reg_to_var_flt(iptr->dst, d);
1623                         break;
1624
1625                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1626
1627                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1628                         var_to_reg_flt(s2, src, REG_FTMP2);
1629                         d = reg_of_var(iptr->dst, REG_FTMP3);
1630                         M_FMUL(s1, s2, d);
1631                         store_reg_to_var_flt(iptr->dst, d);
1632                         break;
1633
1634                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1635
1636                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1637                         var_to_reg_flt(s2, src, REG_FTMP2);
1638                         d = reg_of_var(iptr->dst, REG_FTMP3);
1639                         M_DMUL(s1, s2, d);
1640                         store_reg_to_var_flt(iptr->dst, d);
1641                         break;
1642
1643                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1644
1645                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1646                         var_to_reg_flt(s2, src, REG_FTMP2);
1647                         d = reg_of_var(iptr->dst, REG_FTMP3);
1648                         M_FDIV(s1, s2, d);
1649                         store_reg_to_var_flt(iptr->dst, d);
1650                         break;
1651
1652                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1653
1654                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1655                         var_to_reg_flt(s2, src, REG_FTMP2);
1656                         d = reg_of_var(iptr->dst, REG_FTMP3);
1657                         M_DDIV(s1, s2, d);
1658                         store_reg_to_var_flt(iptr->dst, d);
1659                         break;
1660
1661                 case ICMD_FREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1662                         panic("FREM");
1663
1664                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1665                         var_to_reg_flt(s2, src, REG_FTMP2);
1666                         d = reg_of_var(iptr->dst, REG_FTMP3);
1667                         M_FDIV(s1,s2, REG_FTMP3);
1668                         M_FLOORFL(REG_FTMP3, REG_FTMP3);
1669                         M_CVTLF(REG_FTMP3, REG_FTMP3);
1670                         M_FMUL(REG_FTMP3, s2, REG_FTMP3);
1671                         M_FSUB(s1, REG_FTMP3, d);
1672                         store_reg_to_var_flt(iptr->dst, d);
1673                     break;
1674
1675                 case ICMD_DREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1676
1677                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1678                         var_to_reg_flt(s2, src, REG_FTMP2);
1679                         d = reg_of_var(iptr->dst, REG_FTMP3);
1680                         M_DDIV(s1,s2, REG_FTMP3);
1681                         M_FLOORDL(REG_FTMP3, REG_FTMP3);
1682                         M_CVTLD(REG_FTMP3, REG_FTMP3);
1683                         M_DMUL(REG_FTMP3, s2, REG_FTMP3);
1684                         M_DSUB(s1, REG_FTMP3, d);
1685                         store_reg_to_var_flt(iptr->dst, d);
1686                     break;
1687
1688                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1689                 case ICMD_L2F:
1690                         var_to_reg_int(s1, src, REG_ITMP1);
1691                         d = reg_of_var(iptr->dst, REG_FTMP3);
1692                         M_MOVLD(s1, d);
1693                         M_CVTLF(d, d);
1694                         store_reg_to_var_flt(iptr->dst, d);
1695                         break;
1696
1697                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1698                 case ICMD_L2D:
1699                         var_to_reg_int(s1, src, REG_ITMP1);
1700                         d = reg_of_var(iptr->dst, REG_FTMP3);
1701                         M_MOVLD(s1, d);
1702                         M_CVTLD(d, d);
1703                         store_reg_to_var_flt(iptr->dst, d);
1704                         break;
1705
1706                 case ICMD_F2I:       /* ..., (float) value  ==> ..., (int) value      */
1707
1708                         var_to_reg_flt(s1, src, REG_FTMP1);
1709                         d = reg_of_var(iptr->dst, REG_ITMP3);
1710                         M_TRUNCFI(s1, REG_FTMP1);
1711                         M_MOVDI(REG_FTMP1, d);
1712                         M_NOP;
1713                         store_reg_to_var_int(iptr->dst, d);
1714                         break;
1715
1716                 case ICMD_D2I:       /* ..., (double) value  ==> ..., (int) value     */
1717
1718                         var_to_reg_flt(s1, src, REG_FTMP1);
1719                         d = reg_of_var(iptr->dst, REG_ITMP3);
1720                         M_TRUNCDI(s1, REG_FTMP1);
1721                         M_MOVDI(REG_FTMP1, d);
1722                         M_NOP;
1723                         store_reg_to_var_int(iptr->dst, d);
1724                         break;
1725
1726                 case ICMD_F2L:       /* ..., (float) value  ==> ..., (long) value     */
1727
1728                         var_to_reg_flt(s1, src, REG_FTMP1);
1729                         d = reg_of_var(iptr->dst, REG_ITMP3);
1730                         M_TRUNCFL(s1, REG_FTMP1);
1731                         M_MOVDL(REG_FTMP1, d);
1732                         M_NOP;
1733                         store_reg_to_var_int(iptr->dst, d);
1734                         break;
1735
1736                 case ICMD_D2L:       /* ..., (double) value  ==> ..., (long) value    */
1737
1738                         var_to_reg_flt(s1, src, REG_FTMP1);
1739                         d = reg_of_var(iptr->dst, REG_ITMP3);
1740                         M_TRUNCDL(s1, REG_FTMP1);
1741                         M_MOVDL(REG_FTMP1, d);
1742                         M_NOP;
1743                         store_reg_to_var_int(iptr->dst, d);
1744                         break;
1745
1746                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1747
1748                         var_to_reg_flt(s1, src, REG_FTMP1);
1749                         d = reg_of_var(iptr->dst, REG_FTMP3);
1750                         M_CVTFD(s1, d);
1751                         store_reg_to_var_flt(iptr->dst, d);
1752                         break;
1753
1754                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1755
1756                         var_to_reg_flt(s1, src, REG_FTMP1);
1757                         d = reg_of_var(iptr->dst, REG_FTMP3);
1758                         M_CVTDF(s1, d);
1759                         store_reg_to_var_flt(iptr->dst, d);
1760                         break;
1761
1762                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1763
1764                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1765                         var_to_reg_flt(s2, src, REG_FTMP2);
1766                         d = reg_of_var(iptr->dst, REG_ITMP3);
1767                         M_FCMPUEQF(s1, s2);
1768                         M_NOP;                             /* compare delay               */
1769                         M_FBF(2);                          /* jump over next instructions */
1770                         M_LSUB_IMM(REG_ZERO, 1, d);        /* delay slot                  */
1771                         M_CLR(d);
1772                         M_FCMPULTF(s2, s1);
1773                         M_NOP;                             /* compare delay               */
1774                         M_FBF(2);                          /* jump over next instruction  */
1775                         M_NOP;
1776                         M_LADD_IMM(REG_ZERO, 1, d);
1777                         store_reg_to_var_int(iptr->dst, d);
1778                         break;
1779
1780                 case ICMD_DCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1781
1782                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1783                         var_to_reg_flt(s2, src, REG_FTMP2);
1784                         d = reg_of_var(iptr->dst, REG_ITMP3);
1785                         M_FCMPUEQD(s1, s2);
1786                         M_NOP;                             /* compare delay               */
1787                         M_FBF(2);                          /* jump over next instructions */
1788                         M_LSUB_IMM(REG_ZERO, 1, d);        /* delay slot                  */
1789                         M_CLR(d);
1790                         M_FCMPULTD(s2, s1);
1791                         M_NOP;                             /* compare delay               */
1792                         M_FBF(2);                          /* jump over next instruction  */
1793                         M_NOP;
1794                         M_LADD_IMM(REG_ZERO, 1, d);
1795                         store_reg_to_var_int(iptr->dst, d);
1796                         break;
1797
1798                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1799
1800                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1801                         var_to_reg_flt(s2, src, REG_FTMP2);
1802                         d = reg_of_var(iptr->dst, REG_ITMP3);
1803                         M_FCMPUEQF(s1, s2);
1804                         M_NOP;                             /* compare delay               */
1805                         M_FBF(2);                          /* jump over next instruction  */
1806                         M_LADD_IMM(REG_ZERO, 1, d);        /* delay slot                  */
1807                         M_CLR(d);
1808                         M_FCMPULTF(s1, s2);
1809                         M_NOP;                             /* compare delay               */
1810                         M_FBF(2);                          /* jump over next instruction  */
1811                         M_NOP;
1812                         M_LSUB_IMM(REG_ZERO, 1, d);
1813                         store_reg_to_var_int(iptr->dst, d);
1814                         break;
1815
1816                 case ICMD_DCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1817
1818                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1819                         var_to_reg_flt(s2, src, REG_FTMP2);
1820                         d = reg_of_var(iptr->dst, REG_ITMP3);
1821                         M_FCMPUEQD(s1, s2);
1822                         M_NOP;                             /* compare delay               */
1823                         M_FBF(2);                          /* jump over next instruction  */
1824                         M_LADD_IMM(REG_ZERO, 1, d);        /* delay slot                  */
1825                         M_CLR(d);
1826                         M_FCMPULTD(s1, s2);
1827                         M_NOP;                             /* compare delay               */
1828                         M_FBF(2);                          /* jump over next instruction  */
1829                         M_NOP;
1830                         M_LSUB_IMM(REG_ZERO, 1, d);
1831                         store_reg_to_var_int(iptr->dst, d);
1832                         break;
1833
1834
1835                 /* memory operations **************************************************/
1836
1837 #define gen_bound_check \
1838                         if (checkbounds) {\
1839                                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1840                                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
1841                                 M_BEQZ(REG_ITMP3, 0);\
1842                                 mcode_addxboundrefs(mcodeptr);\
1843                                 M_NOP;\
1844                                 }
1845
1846                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1847
1848                         var_to_reg_int(s1, src, REG_ITMP1);
1849                         d = reg_of_var(iptr->dst, REG_ITMP3);
1850                         gen_nullptr_check(s1);
1851                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1852                         store_reg_to_var_int(iptr->dst, d);
1853                         break;
1854
1855                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1856
1857                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1858                         var_to_reg_int(s2, src, REG_ITMP2);
1859                         d = reg_of_var(iptr->dst, REG_ITMP3);
1860                         if (iptr->op1 == 0) {
1861                                 gen_nullptr_check(s1);
1862                                 gen_bound_check;
1863                                 }
1864                         M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
1865                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1866                         M_ALD(d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1867                         store_reg_to_var_int(iptr->dst, d);
1868                         break;
1869
1870                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1871
1872                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1873                         var_to_reg_int(s2, src, REG_ITMP2);
1874                         d = reg_of_var(iptr->dst, REG_ITMP3);
1875                         if (iptr->op1 == 0) {
1876                                 gen_nullptr_check(s1);
1877                                 gen_bound_check;
1878                                 }
1879                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1880                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1881                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1882                         store_reg_to_var_int(iptr->dst, d);
1883                         break;
1884
1885                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1886
1887                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1888                         var_to_reg_int(s2, src, REG_ITMP2);
1889                         d = reg_of_var(iptr->dst, REG_ITMP3);
1890                         if (iptr->op1 == 0) {
1891                                 gen_nullptr_check(s1);
1892                                 gen_bound_check;
1893                                 }
1894                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1895                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1896                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1897                         store_reg_to_var_int(iptr->dst, d);
1898                         break;
1899
1900                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1901
1902                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1903                         var_to_reg_int(s2, src, REG_ITMP2);
1904                         d = reg_of_var(iptr->dst, REG_FTMP3);
1905                         if (iptr->op1 == 0) {
1906                                 gen_nullptr_check(s1);
1907                                 gen_bound_check;
1908                                 }
1909                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1910                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1911                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1912                         store_reg_to_var_flt(iptr->dst, d);
1913                         break;
1914
1915                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1916
1917                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1918                         var_to_reg_int(s2, src, REG_ITMP2);
1919                         d = reg_of_var(iptr->dst, REG_FTMP3);
1920                         if (iptr->op1 == 0) {
1921                                 gen_nullptr_check(s1);
1922                                 gen_bound_check;
1923                                 }
1924                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1925                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1926                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1927                         store_reg_to_var_flt(iptr->dst, d);
1928                         break;
1929
1930                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1931
1932                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1933                         var_to_reg_int(s2, src, REG_ITMP2);
1934                         d = reg_of_var(iptr->dst, REG_ITMP3);
1935                         if (iptr->op1 == 0) {
1936                                 gen_nullptr_check(s1);
1937                                 gen_bound_check;
1938                                 }
1939                         M_AADD(s2, s1, REG_ITMP1);
1940                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
1941                         M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1942                         store_reg_to_var_int(iptr->dst, d);
1943                         break;
1944
1945                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1946
1947                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1948                         var_to_reg_int(s2, src, REG_ITMP2);
1949                         d = reg_of_var(iptr->dst, REG_ITMP3);
1950                         if (iptr->op1 == 0) {
1951                                 gen_nullptr_check(s1);
1952                                 gen_bound_check;
1953                                 }
1954                         M_AADD(s2, s1, REG_ITMP1);
1955                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
1956                         M_SLDS(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1957                         store_reg_to_var_int(iptr->dst, d);
1958                         break;
1959
1960                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1961
1962                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1963                         var_to_reg_int(s2, src, REG_ITMP2);
1964                         d = reg_of_var(iptr->dst, REG_ITMP3);
1965                         if (iptr->op1 == 0) {
1966                                 gen_nullptr_check(s1);
1967                                 gen_bound_check;
1968                                 }
1969                         M_AADD(s2, s1, REG_ITMP1);
1970                         M_BLDS(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1971                         store_reg_to_var_int(iptr->dst, d);
1972                         break;
1973
1974
1975                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1976
1977                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1978                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1979                         if (iptr->op1 == 0) {
1980                                 gen_nullptr_check(s1);
1981                                 gen_bound_check;
1982                                 }
1983                         var_to_reg_int(s3, src, REG_ITMP3);
1984                         M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
1985                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1986                         M_AST(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1987                         break;
1988
1989                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1990
1991                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1992                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1993                         if (iptr->op1 == 0) {
1994                                 gen_nullptr_check(s1);
1995                                 gen_bound_check;
1996                                 }
1997                         var_to_reg_int(s3, src, REG_ITMP3);
1998                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1999                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
2000                         M_IST(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
2001                         break;
2002
2003                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
2004
2005                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2006                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2007                         if (iptr->op1 == 0) {
2008                                 gen_nullptr_check(s1);
2009                                 gen_bound_check;
2010                                 }
2011                         var_to_reg_int(s3, src, REG_ITMP3);
2012                         M_ASLL_IMM(s2, 3, REG_ITMP2);
2013                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
2014                         M_LST(s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
2015                         break;
2016
2017                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
2018
2019                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2020                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2021                         if (iptr->op1 == 0) {
2022                                 gen_nullptr_check(s1);
2023                                 gen_bound_check;
2024                                 }
2025                         var_to_reg_flt(s3, src, REG_FTMP3);
2026                         M_ASLL_IMM(s2, 2, REG_ITMP2);
2027                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
2028                         M_FST(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2029                         break;
2030
2031                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
2032
2033                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2034                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2035                         if (iptr->op1 == 0) {
2036                                 gen_nullptr_check(s1);
2037                                 gen_bound_check;
2038                                 }
2039                         var_to_reg_flt(s3, src, REG_FTMP3);
2040                         M_ASLL_IMM(s2, 3, REG_ITMP2);
2041                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
2042                         M_DST(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2043                         break;
2044
2045                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
2046                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
2047
2048                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2049                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2050                         if (iptr->op1 == 0) {
2051                                 gen_nullptr_check(s1);
2052                                 gen_bound_check;
2053                                 }
2054                         var_to_reg_int(s3, src, REG_ITMP3);
2055                         M_AADD(s2, s1, REG_ITMP1);
2056                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
2057                         M_SST(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
2058                         break;
2059
2060                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
2061
2062                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2063                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2064                         if (iptr->op1 == 0) {
2065                                 gen_nullptr_check(s1);
2066                                 gen_bound_check;
2067                                 }
2068                         var_to_reg_int(s3, src, REG_ITMP3);
2069                         M_AADD(s2, s1, REG_ITMP1);
2070                         M_BST(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2071                         break;
2072
2073
2074                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2075                                       /* op1 = type, val.a = field address            */
2076
2077                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2078                         M_ALD(REG_ITMP1, REG_PV, a);
2079                         switch (iptr->op1) {
2080                                 case TYPE_INT:
2081                                         var_to_reg_int(s2, src, REG_ITMP2);
2082                                         M_IST(s2, REG_ITMP1, 0);
2083                                         break;
2084                                 case TYPE_LNG:
2085                                         var_to_reg_int(s2, src, REG_ITMP2);
2086                                         M_LST(s2, REG_ITMP1, 0);
2087                                         break;
2088                                 case TYPE_ADR:
2089                                         var_to_reg_int(s2, src, REG_ITMP2);
2090                                         M_AST(s2, REG_ITMP1, 0);
2091                                         break;
2092                                 case TYPE_FLT:
2093                                         var_to_reg_flt(s2, src, REG_FTMP2);
2094                                         M_FST(s2, REG_ITMP1, 0);
2095                                         break;
2096                                 case TYPE_DBL:
2097                                         var_to_reg_flt(s2, src, REG_FTMP2);
2098                                         M_DST(s2, REG_ITMP1, 0);
2099                                         break;
2100                                 default: panic ("internal error");
2101                                 }
2102                         break;
2103
2104                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2105                                       /* op1 = type, val.a = field address            */
2106
2107                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2108                         M_ALD(REG_ITMP1, REG_PV, a);
2109                         switch (iptr->op1) {
2110                                 case TYPE_INT:
2111                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2112                                         M_ILD(d, REG_ITMP1, 0);
2113                                         store_reg_to_var_int(iptr->dst, d);
2114                                         break;
2115                                 case TYPE_LNG:
2116                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2117                                         M_LLD(d, REG_ITMP1, 0);
2118                                         store_reg_to_var_int(iptr->dst, d);
2119                                         break;
2120                                 case TYPE_ADR:
2121                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2122                                         M_ALD(d, REG_ITMP1, 0);
2123                                         store_reg_to_var_int(iptr->dst, d);
2124                                         break;
2125                                 case TYPE_FLT:
2126                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2127                                         M_FLD(d, REG_ITMP1, 0);
2128                                         store_reg_to_var_flt(iptr->dst, d);
2129                                         break;
2130                                 case TYPE_DBL:
2131                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2132                                         M_DLD(d, REG_ITMP1, 0);
2133                                         store_reg_to_var_flt(iptr->dst, d);
2134                                         break;
2135                                 default: panic ("internal error");
2136                                 }
2137                         break;
2138
2139
2140                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2141                                       /* op1 = type, val.i = field offset             */
2142
2143                         a = ((fieldinfo *)(iptr->val.a))->offset;
2144                         switch (iptr->op1) {
2145                                 case TYPE_INT:
2146                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2147                                         var_to_reg_int(s2, src, REG_ITMP2);
2148                                         gen_nullptr_check(s1);
2149                                         M_IST(s2, s1, a);
2150                                         break;
2151                                 case TYPE_LNG:
2152                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2153                                         var_to_reg_int(s2, src, REG_ITMP2);
2154                                         gen_nullptr_check(s1);
2155                                         M_LST(s2, s1, a);
2156                                         break;
2157                                 case TYPE_ADR:
2158                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2159                                         var_to_reg_int(s2, src, REG_ITMP2);
2160                                         gen_nullptr_check(s1);
2161                                         M_AST(s2, s1, a);
2162                                         break;
2163                                 case TYPE_FLT:
2164                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2165                                         var_to_reg_flt(s2, src, REG_FTMP2);
2166                                         gen_nullptr_check(s1);
2167                                         M_FST(s2, s1, a);
2168                                         break;
2169                                 case TYPE_DBL:
2170                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2171                                         var_to_reg_flt(s2, src, REG_FTMP2);
2172                                         gen_nullptr_check(s1);
2173                                         M_DST(s2, s1, a);
2174                                         break;
2175                                 default: panic ("internal error");
2176                                 }
2177                         break;
2178
2179                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2180                                       /* op1 = type, val.i = field offset             */
2181
2182                         a = ((fieldinfo *)(iptr->val.a))->offset;
2183                         switch (iptr->op1) {
2184                                 case TYPE_INT:
2185                                         var_to_reg_int(s1, src, REG_ITMP1);
2186                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2187                                         gen_nullptr_check(s1);
2188                                         M_ILD(d, s1, a);
2189                                         store_reg_to_var_int(iptr->dst, d);
2190                                         break;
2191                                 case TYPE_LNG:
2192                                         var_to_reg_int(s1, src, REG_ITMP1);
2193                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2194                                         gen_nullptr_check(s1);
2195                                         M_LLD(d, s1, a);
2196                                         store_reg_to_var_int(iptr->dst, d);
2197                                         break;
2198                                 case TYPE_ADR:
2199                                         var_to_reg_int(s1, src, REG_ITMP1);
2200                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2201                                         gen_nullptr_check(s1);
2202                                         M_ALD(d, s1, a);
2203                                         store_reg_to_var_int(iptr->dst, d);
2204                                         break;
2205                                 case TYPE_FLT:
2206                                         var_to_reg_int(s1, src, REG_ITMP1);
2207                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2208                                         gen_nullptr_check(s1);
2209                                         M_FLD(d, s1, a);
2210                                         store_reg_to_var_flt(iptr->dst, d);
2211                                         break;
2212                                 case TYPE_DBL:
2213                                         var_to_reg_int(s1, src, REG_ITMP1);
2214                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2215                                         gen_nullptr_check(s1);
2216                                         M_DLD(d, s1, a);
2217                                         store_reg_to_var_flt(iptr->dst, d);
2218                                         break;
2219                                 default: panic ("internal error");
2220                                 }
2221                         break;
2222
2223
2224                 /* branch operations **************************************************/
2225
2226 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2227
2228                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2229
2230                         var_to_reg_int(s1, src, REG_ITMP1);
2231                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2232                         a = dseg_addaddress(asm_handle_exception);
2233                         M_ALD(REG_ITMP2, REG_PV, a);
2234                         M_JSR(REG_ITMP2_XPC, REG_ITMP2);
2235                         M_NOP;
2236                         ALIGNCODENOP;
2237                         break;
2238
2239                 case ICMD_GOTO:         /* ... ==> ...                                */
2240                                         /* op1 = target JavaVM pc                     */
2241                         M_BR(0);
2242                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2243                         M_NOP;
2244                         ALIGNCODENOP;
2245                         break;
2246
2247                 case ICMD_JSR:          /* ... ==> ...                                */
2248                                         /* op1 = target JavaVM pc                     */
2249
2250                         dseg_addtarget(BlockPtrOfPC(iptr->op1));
2251                         M_ALD(REG_ITMP1, REG_PV, -dseglen);
2252                         M_JSR(REG_ITMP1, REG_ITMP1);        /* REG_ITMP1 = return address */
2253                         M_NOP;
2254                         break;
2255
2256                 case ICMD_RET:          /* ... ==> ...                                */
2257                                         /* op1 = local variable                       */
2258                         var = &(locals[iptr->op1][TYPE_ADR]);
2259                         if (var->flags & INMEMORY) {
2260                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2261                                 M_RET(REG_ITMP1);
2262                                 }
2263                         else
2264                                 M_RET(var->regoff);
2265                         M_NOP;
2266                         ALIGNCODENOP;
2267                         break;
2268
2269                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2270                                         /* op1 = target JavaVM pc                     */
2271
2272                         var_to_reg_int(s1, src, REG_ITMP1);
2273                         M_BEQZ(s1, 0);
2274                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2275                         M_NOP;
2276                         break;
2277
2278                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2279                                         /* op1 = target JavaVM pc                     */
2280
2281                         var_to_reg_int(s1, src, REG_ITMP1);
2282                         M_BNEZ(s1, 0);
2283                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2284                         M_NOP;
2285                         break;
2286
2287                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2288                                         /* op1 = target JavaVM pc, val.i = constant   */
2289
2290                         var_to_reg_int(s1, src, REG_ITMP1);
2291                         if (iptr->val.i == 0) {
2292                                 M_BEQZ(s1, 0);
2293                                 }
2294                         else {
2295                                 ICONST(REG_ITMP2, iptr->val.i);
2296                                 M_BEQ(s1, REG_ITMP2, 0);
2297                                 }
2298                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2299                         M_NOP;
2300                         break;
2301
2302                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2303                                         /* op1 = target JavaVM pc, val.i = constant   */
2304
2305                         var_to_reg_int(s1, src, REG_ITMP1);
2306                         if (iptr->val.i == 0) {
2307                                 M_BLTZ(s1, 0);
2308                                 }
2309                         else {
2310                                 if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
2311                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2312                                         }
2313                                 else {
2314                                         ICONST(REG_ITMP2, iptr->val.i);
2315                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2316                                         }
2317                                 M_BNEZ(REG_ITMP1, 0);
2318                                 }
2319                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2320                         M_NOP;
2321                         break;
2322
2323                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2324                                         /* op1 = target JavaVM pc, val.i = constant   */
2325
2326                         var_to_reg_int(s1, src, REG_ITMP1);
2327                         if (iptr->val.i == 0) {
2328                                 M_BLEZ(s1, 0);
2329                                 }
2330                         else {
2331                                 if ((iptr->val.i >= -32769) && (iptr->val.i <= 32766)) {
2332                                         M_CMPLT_IMM(s1, iptr->val.i + 1, REG_ITMP1);
2333                                         M_BNEZ(REG_ITMP1, 0);
2334                                         }
2335                                 else {
2336                                         ICONST(REG_ITMP2, iptr->val.i);
2337                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2338                                         M_BEQZ(REG_ITMP1, 0);
2339                                         }
2340                                 }
2341                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2342                         M_NOP;
2343                         break;
2344
2345                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2346                                         /* op1 = target JavaVM pc, val.i = constant   */
2347
2348                         var_to_reg_int(s1, src, REG_ITMP1);
2349                         if (iptr->val.i == 0) {
2350                                 M_BNEZ(s1, 0);
2351                                 }
2352                         else {
2353                                 ICONST(REG_ITMP2, iptr->val.i);
2354                                 M_BNE(s1, REG_ITMP2, 0);
2355                                 }
2356                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2357                         M_NOP;
2358                         break;
2359
2360                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2361                                         /* op1 = target JavaVM pc, val.i = constant   */
2362
2363                         var_to_reg_int(s1, src, REG_ITMP1);
2364                         if (iptr->val.i == 0) {
2365                                 M_BGTZ(s1, 0);
2366                                 }
2367                         else {
2368                                 if ((iptr->val.i >= -32769) && (iptr->val.i <= 32766)) {
2369                                         M_CMPLT_IMM(s1, iptr->val.i + 1, REG_ITMP1);
2370                                         M_BEQZ(REG_ITMP1, 0);
2371                                         }
2372                                 else {
2373                                         ICONST(REG_ITMP2, iptr->val.i);
2374                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2375                                         M_BNEZ(REG_ITMP1, 0);
2376                                         }
2377                                 }
2378                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2379                         M_NOP;
2380                         break;
2381
2382                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2383                                         /* op1 = target JavaVM pc, val.i = constant   */
2384
2385                         var_to_reg_int(s1, src, REG_ITMP1);
2386                         if (iptr->val.i == 0) {
2387                                 M_BGEZ(s1, 0);
2388                                 }
2389                         else {
2390                                 if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
2391                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2392                                         }
2393                                 else {
2394                                         ICONST(REG_ITMP2, iptr->val.i);
2395                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2396                                         }
2397                                 M_BEQZ(REG_ITMP1, 0);
2398                                 }
2399                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2400                         M_NOP;
2401                         break;
2402
2403                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2404                                         /* op1 = target JavaVM pc, val.l = constant   */
2405
2406                         var_to_reg_int(s1, src, REG_ITMP1);
2407                         if (iptr->val.l == 0) {
2408                                 M_BEQZ(s1, 0);
2409                                 }
2410                         else {
2411                                 LCONST(REG_ITMP2, iptr->val.l);
2412                                 M_BEQ(s1, REG_ITMP2, 0);
2413                                 }
2414                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2415                         M_NOP;
2416                         break;
2417
2418                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2419                                         /* op1 = target JavaVM pc, val.l = constant   */
2420
2421                         var_to_reg_int(s1, src, REG_ITMP1);
2422                         if (iptr->val.l == 0) {
2423                                 M_BLTZ(s1, 0);
2424                                 }
2425                         else {
2426                                 if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
2427                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2428                                         }
2429                                 else {
2430                                         LCONST(REG_ITMP2, iptr->val.l);
2431                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2432                                         }
2433                                 M_BNEZ(REG_ITMP1, 0);
2434                                 }
2435                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2436                         M_NOP;
2437                         break;
2438
2439                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2440                                         /* op1 = target JavaVM pc, val.l = constant   */
2441
2442                         var_to_reg_int(s1, src, REG_ITMP1);
2443                         if (iptr->val.l == 0) {
2444                                 M_BLEZ(s1, 0);
2445                                 }
2446                         else {
2447                                 if ((iptr->val.l >= -32769) && (iptr->val.l <= 32766)) {
2448                                         M_CMPLT_IMM(s1, iptr->val.l + 1, REG_ITMP1);
2449                                         M_BNEZ(REG_ITMP1, 0);
2450                                         }
2451                                 else {
2452                                         LCONST(REG_ITMP2, iptr->val.l);
2453                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2454                                         M_BEQZ(REG_ITMP1, 0);
2455                                         }
2456                                 }
2457                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2458                         M_NOP;
2459                         break;
2460
2461                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2462                                         /* op1 = target JavaVM pc, val.l = constant   */
2463
2464                         var_to_reg_int(s1, src, REG_ITMP1);
2465                         if (iptr->val.l == 0) {
2466                                 M_BNEZ(s1, 0);
2467                                 }
2468                         else {
2469                                 LCONST(REG_ITMP2, iptr->val.l);
2470                                 M_BNE(s1, REG_ITMP2, 0);
2471                                 }
2472                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2473                         M_NOP;
2474                         break;
2475
2476                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2477                                         /* op1 = target JavaVM pc, val.l = constant   */
2478
2479                         var_to_reg_int(s1, src, REG_ITMP1);
2480                         if (iptr->val.l == 0) {
2481                                 M_BGTZ(s1, 0);
2482                                 }
2483                         else {
2484                                 if ((iptr->val.l >= -32769) && (iptr->val.l <= 32766)) {
2485                                         M_CMPLT_IMM(s1, iptr->val.l + 1, REG_ITMP1);
2486                                         M_BEQZ(REG_ITMP1, 0);
2487                                         }
2488                                 else {
2489                                         LCONST(REG_ITMP2, iptr->val.l);
2490                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2491                                         M_BNEZ(REG_ITMP1, 0);
2492                                         }
2493                                 }
2494                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2495                         M_NOP;
2496                         break;
2497
2498                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2499                                         /* op1 = target JavaVM pc, val.l = constant   */
2500
2501                         var_to_reg_int(s1, src, REG_ITMP1);
2502                         if (iptr->val.l == 0) {
2503                                 M_BGEZ(s1, 0);
2504                                 }
2505                         else {
2506                                 if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
2507                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2508                                         }
2509                                 else {
2510                                         LCONST(REG_ITMP2, iptr->val.l);
2511                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2512                                         }
2513                                 M_BEQZ(REG_ITMP1, 0);
2514                                 }
2515                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2516                         M_NOP;
2517                         break;
2518
2519                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2520                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2521                 case ICMD_IF_ACMPEQ:
2522
2523                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2524                         var_to_reg_int(s2, src, REG_ITMP2);
2525                         M_BEQ(s1, s2, 0);
2526                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2527                         M_NOP;
2528                         break;
2529
2530                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2531                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2532                 case ICMD_IF_ACMPNE:
2533
2534                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2535                         var_to_reg_int(s2, src, REG_ITMP2);
2536                         M_BNE(s1, s2, 0);
2537                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2538                         M_NOP;
2539                         break;
2540
2541                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2542                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2543
2544                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2545                         var_to_reg_int(s2, src, REG_ITMP2);
2546                         M_CMPLT(s1, s2, REG_ITMP1);
2547                         M_BNEZ(REG_ITMP1, 0);
2548                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2549                         M_NOP;
2550                         break;
2551
2552                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2553                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2554
2555                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2556                         var_to_reg_int(s2, src, REG_ITMP2);
2557                         M_CMPGT(s1, s2, REG_ITMP1);
2558                         M_BNEZ(REG_ITMP1, 0);
2559                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2560                         M_NOP;
2561                         break;
2562
2563                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2564                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2565
2566                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2567                         var_to_reg_int(s2, src, REG_ITMP2);
2568                         M_CMPGT(s1, s2, REG_ITMP1);
2569                         M_BEQZ(REG_ITMP1, 0);
2570                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2571                         M_NOP;
2572                         break;
2573
2574                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2575                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2576
2577                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2578                         var_to_reg_int(s2, src, REG_ITMP2);
2579                         M_CMPLT(s1, s2, REG_ITMP1);
2580                         M_BEQZ(REG_ITMP1, 0);
2581                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2582                         M_NOP;
2583                         break;
2584
2585 #ifdef CONDITIONAL_LOADCONST
2586                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2587
2588                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2589                         break;
2590
2591                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2592                                         /* val.i = constant                           */
2593
2594                         var_to_reg_int(s1, src, REG_ITMP1);
2595                         d = reg_of_var(iptr->dst, REG_ITMP3);
2596                         s3 = iptr->val.i;
2597                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2598                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2599                                         M_CMPEQ(s1, REG_ZERO, d);
2600                                         store_reg_to_var_int(iptr->dst, d);
2601                                         break;
2602                                         }
2603                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2604                                         M_CMPEQ(s1, REG_ZERO, d);
2605                                         M_XOR_IMM(d, 1, d);
2606                                         store_reg_to_var_int(iptr->dst, d);
2607                                         break;
2608                                         }
2609                                 if (s1 == d) {
2610                                         M_MOV(s1, REG_ITMP1);
2611                                         s1 = REG_ITMP1;
2612                                         }
2613                                 ICONST(d, iptr[1].val.i);
2614                                 }
2615                         if ((s3 >= 0) && (s3 <= 255)) {
2616                                 M_CMOVEQ_IMM(s1, s3, d);
2617                                 }
2618                         else {
2619                                 ICONST(REG_ITMP2, s3);
2620                                 M_CMOVEQ(s1, REG_ITMP2, d);
2621                                 }
2622                         store_reg_to_var_int(iptr->dst, d);
2623                         break;
2624
2625                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2626                                         /* val.i = constant                           */
2627
2628                         var_to_reg_int(s1, src, REG_ITMP1);
2629                         d = reg_of_var(iptr->dst, REG_ITMP3);
2630                         s3 = iptr->val.i;
2631                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2632                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2633                                         M_CMPEQ(s1, REG_ZERO, d);
2634                                         store_reg_to_var_int(iptr->dst, d);
2635                                         break;
2636                                         }
2637                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2638                                         M_CMPEQ(s1, REG_ZERO, d);
2639                                         M_XOR_IMM(d, 1, d);
2640                                         store_reg_to_var_int(iptr->dst, d);
2641                                         break;
2642                                         }
2643                                 if (s1 == d) {
2644                                         M_MOV(s1, REG_ITMP1);
2645                                         s1 = REG_ITMP1;
2646                                         }
2647                                 ICONST(d, iptr[1].val.i);
2648                                 }
2649                         if ((s3 >= 0) && (s3 <= 255)) {
2650                                 M_CMOVNE_IMM(s1, s3, d);
2651                                 }
2652                         else {
2653                                 ICONST(REG_ITMP2, s3);
2654                                 M_CMOVNE(s1, REG_ITMP2, d);
2655                                 }
2656                         store_reg_to_var_int(iptr->dst, d);
2657                         break;
2658
2659                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2660                                         /* val.i = constant                           */
2661
2662                         var_to_reg_int(s1, src, REG_ITMP1);
2663                         d = reg_of_var(iptr->dst, REG_ITMP3);
2664                         s3 = iptr->val.i;
2665                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2666                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2667                                         M_CMPLT(s1, REG_ZERO, d);
2668                                         store_reg_to_var_int(iptr->dst, d);
2669                                         break;
2670                                         }
2671                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2672                                         M_CMPLE(REG_ZERO, s1, d);
2673                                         store_reg_to_var_int(iptr->dst, d);
2674                                         break;
2675                                         }
2676                                 if (s1 == d) {
2677                                         M_MOV(s1, REG_ITMP1);
2678                                         s1 = REG_ITMP1;
2679                                         }
2680                                 ICONST(d, iptr[1].val.i);
2681                                 }
2682                         if ((s3 >= 0) && (s3 <= 255)) {
2683                                 M_CMOVLT_IMM(s1, s3, d);
2684                                 }
2685                         else {
2686                                 ICONST(REG_ITMP2, s3);
2687                                 M_CMOVLT(s1, REG_ITMP2, d);
2688                                 }
2689                         store_reg_to_var_int(iptr->dst, d);
2690                         break;
2691
2692                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2693                                         /* val.i = constant                           */
2694
2695                         var_to_reg_int(s1, src, REG_ITMP1);
2696                         d = reg_of_var(iptr->dst, REG_ITMP3);
2697                         s3 = iptr->val.i;
2698                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2699                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2700                                         M_CMPLE(REG_ZERO, s1, d);
2701                                         store_reg_to_var_int(iptr->dst, d);
2702                                         break;
2703                                         }
2704                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2705                                         M_CMPLT(s1, REG_ZERO, d);
2706                                         store_reg_to_var_int(iptr->dst, d);
2707                                         break;
2708                                         }
2709                                 if (s1 == d) {
2710                                         M_MOV(s1, REG_ITMP1);
2711                                         s1 = REG_ITMP1;
2712                                         }
2713                                 ICONST(d, iptr[1].val.i);
2714                                 }
2715                         if ((s3 >= 0) && (s3 <= 255)) {
2716                                 M_CMOVGE_IMM(s1, s3, d);
2717                                 }
2718                         else {
2719                                 ICONST(REG_ITMP2, s3);
2720                                 M_CMOVGE(s1, REG_ITMP2, d);
2721                                 }
2722                         store_reg_to_var_int(iptr->dst, d);
2723                         break;
2724
2725                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2726                                         /* val.i = constant                           */
2727
2728                         var_to_reg_int(s1, src, REG_ITMP1);
2729                         d = reg_of_var(iptr->dst, REG_ITMP3);
2730                         s3 = iptr->val.i;
2731                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2732                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2733                                         M_CMPLT(REG_ZERO, s1, d);
2734                                         store_reg_to_var_int(iptr->dst, d);
2735                                         break;
2736                                         }
2737                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2738                                         M_CMPLE(s1, REG_ZERO, d);
2739                                         store_reg_to_var_int(iptr->dst, d);
2740                                         break;
2741                                         }
2742                                 if (s1 == d) {
2743                                         M_MOV(s1, REG_ITMP1);
2744                                         s1 = REG_ITMP1;
2745                                         }
2746                                 ICONST(d, iptr[1].val.i);
2747                                 }
2748                         if ((s3 >= 0) && (s3 <= 255)) {
2749                                 M_CMOVGT_IMM(s1, s3, d);
2750                                 }
2751                         else {
2752                                 ICONST(REG_ITMP2, s3);
2753                                 M_CMOVGT(s1, REG_ITMP2, d);
2754                                 }
2755                         store_reg_to_var_int(iptr->dst, d);
2756                         break;
2757
2758                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2759                                         /* val.i = constant                           */
2760
2761                         var_to_reg_int(s1, src, REG_ITMP1);
2762                         d = reg_of_var(iptr->dst, REG_ITMP3);
2763                         s3 = iptr->val.i;
2764                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2765                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2766                                         M_CMPLE(s1, REG_ZERO, d);
2767                                         store_reg_to_var_int(iptr->dst, d);
2768                                         break;
2769                                         }
2770                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2771                                         M_CMPLT(REG_ZERO, s1, d);
2772                                         store_reg_to_var_int(iptr->dst, d);
2773                                         break;
2774                                         }
2775                                 if (s1 == d) {
2776                                         M_MOV(s1, REG_ITMP1);
2777                                         s1 = REG_ITMP1;
2778                                         }
2779                                 ICONST(d, iptr[1].val.i);
2780                                 }
2781                         if ((s3 >= 0) && (s3 <= 255)) {
2782                                 M_CMOVLE_IMM(s1, s3, d);
2783                                 }
2784                         else {
2785                                 ICONST(REG_ITMP2, s3);
2786                                 M_CMOVLE(s1, REG_ITMP2, d);
2787                                 }
2788                         store_reg_to_var_int(iptr->dst, d);
2789                         break;
2790 #endif
2791
2792
2793                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2794                 case ICMD_LRETURN:
2795                 case ICMD_ARETURN:
2796
2797 #ifdef USE_THREADS
2798                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2799                                 int disp;
2800                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2801                                 M_ALD(REG_ITMP3, REG_PV, a);
2802                                 M_JSR(REG_RA, REG_ITMP3);
2803                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);    /* delay slot */
2804                                 disp = -(int)((u1*) mcodeptr - mcodebase);
2805                                 M_LDA(REG_PV, REG_RA, disp);
2806                                 }
2807 #endif
2808                         var_to_reg_int(s1, src, REG_RESULT);
2809                         M_INTMOVE(s1, REG_RESULT);
2810                         goto nowperformreturn;
2811
2812                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2813                 case ICMD_DRETURN:
2814
2815 #ifdef USE_THREADS
2816                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2817                                 int disp;
2818                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2819                                 M_ALD(REG_ITMP3, REG_PV, a);
2820                                 M_JSR(REG_RA, REG_ITMP3);
2821                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);    /* delay slot */
2822                                 disp = -(int)((u1*) mcodeptr - mcodebase);
2823                                 M_LDA(REG_PV, REG_RA, disp);
2824                                 }
2825 #endif
2826                         var_to_reg_flt(s1, src, REG_FRESULT);
2827                         {
2828                                 int t = ((iptr->opc == ICMD_FRETURN) ? TYPE_FLT : TYPE_DBL);
2829                                 M_TFLTMOVE(t, s1, REG_FRESULT);
2830                         }
2831                         goto nowperformreturn;
2832
2833                 case ICMD_RETURN:      /* ...  ==> ...                                */
2834
2835 #ifdef USE_THREADS
2836                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2837                                 int disp;
2838                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2839                                 M_ALD(REG_ITMP3, REG_PV, a);
2840                                 M_JSR(REG_RA, REG_ITMP3);
2841                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);    /* delay slot */
2842                                 disp = -(int)((u1*) mcodeptr - mcodebase);
2843                                 M_LDA(REG_PV, REG_RA, disp);
2844                                 }
2845 #endif
2846
2847 nowperformreturn:
2848                         {
2849                         int r, p;
2850
2851                         p = parentargs_base;
2852
2853                         /* restore return address                                         */
2854
2855                         if (!isleafmethod)
2856                                 {p--;  M_LLD (REG_RA, REG_SP, 8 * p);}
2857
2858                         /* restore saved registers                                        */
2859
2860                         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
2861                                         {p--; M_LLD(savintregs[r], REG_SP, 8 * p);}
2862                         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
2863                                         {p--; M_DLD(savfltregs[r], REG_SP, 8 * p);}
2864
2865                         /* call trace function */
2866
2867                         if (runverbose) {
2868                                 M_LDA (REG_SP, REG_SP, -24);
2869                                 M_LST(REG_RA, REG_SP, 0);
2870                                 M_LST(REG_RESULT, REG_SP, 8);
2871                                 M_DST(REG_FRESULT, REG_SP,16);
2872                                 a = dseg_addaddress (method);
2873                                 M_ALD(argintregs[0], REG_PV, a);
2874                                 M_MOV(REG_RESULT, argintregs[1]);
2875                                 M_FLTMOVE(REG_FRESULT, argfltregs[2]);
2876                                 M_FMOV(REG_FRESULT, argfltregs[3]);
2877                                 a = dseg_addaddress ((void*) (builtin_displaymethodstop));
2878                                 M_ALD(REG_ITMP3, REG_PV, a);
2879                                 M_JSR (REG_RA, REG_ITMP3);
2880                                 M_NOP;
2881                                 M_DLD(REG_FRESULT, REG_SP,16);
2882                                 M_LLD(REG_RESULT, REG_SP, 8);
2883                                 M_LLD(REG_RA, REG_SP, 0);
2884                                 M_LDA (REG_SP, REG_SP, 24);
2885                                 }
2886
2887                         M_RET(REG_RA);
2888
2889                         /* deallocate stack                                               */
2890
2891                         if (parentargs_base)
2892                                 {M_LDA(REG_SP, REG_SP, parentargs_base*8);}
2893                         else
2894                                 {M_NOP;}
2895                         ALIGNCODENOP;
2896                         }
2897                         break;
2898
2899
2900                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2901                         {
2902                         s4 i, l, *s4ptr;
2903                         void **tptr;
2904
2905                         tptr = (void **) iptr->target;
2906
2907                         s4ptr = iptr->val.a;
2908                         l = s4ptr[1];                          /* low     */
2909                         i = s4ptr[2];                          /* high    */
2910
2911                         var_to_reg_int(s1, src, REG_ITMP1);
2912                         if (l == 0)
2913                                 {M_INTMOVE(s1, REG_ITMP1);}
2914                         else if (l <= 32768) {
2915                                 M_IADD_IMM(s1, -l, REG_ITMP1);
2916                                 }
2917                         else {
2918                                 ICONST(REG_ITMP2, l);
2919                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
2920                                 }
2921                         i = i - l + 1;
2922
2923                         /* range check */
2924
2925                         M_CMPULT_IMM(REG_ITMP1, i, REG_ITMP2);
2926                         M_BEQZ(REG_ITMP2, 0);
2927                         mcode_addreference((basicblock *) tptr[0], mcodeptr);
2928                         M_ASLL_IMM(REG_ITMP1, POINTERSHIFT, REG_ITMP1);      /* delay slot*/
2929
2930                         /* build jump table top down and use address of lowest entry */
2931
2932                         /* s4ptr += 3 + i; */
2933                         tptr += i;
2934
2935                         while (--i >= 0) {
2936                                 /* dseg_addtarget(BlockPtrOfPC(*--s4ptr)); */
2937                                 dseg_addtarget((basicblock *) tptr[0]);
2938                                 --tptr;
2939                                 }
2940                         }
2941
2942                         /* length of dataseg after last dseg_addtarget is used by load */
2943
2944                         M_AADD(REG_ITMP1, REG_PV, REG_ITMP2);
2945                         M_ALD(REG_ITMP2, REG_ITMP2, -dseglen);
2946                         M_JMP(REG_ITMP2);
2947                         M_NOP;
2948                         ALIGNCODENOP;
2949                         break;
2950
2951
2952                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2953                         {
2954                         s4 i, l, val, *s4ptr;
2955                         void **tptr;
2956
2957                         tptr = (void **) iptr->target;
2958
2959                         s4ptr = iptr->val.a;
2960                         l = s4ptr[0];                          /* default  */
2961                         i = s4ptr[1];                          /* count    */
2962
2963                         MCODECHECK((i<<2)+8);
2964                         var_to_reg_int(s1, src, REG_ITMP1);
2965                         while (--i >= 0) {
2966                                 s4ptr += 2;
2967                                 ++tptr;
2968
2969                                 val = s4ptr[0];
2970                                 ICONST(REG_ITMP2, val);
2971                                 M_BEQ(s1, REG_ITMP2, 0);
2972                                 mcode_addreference((basicblock *) tptr[0], mcodeptr);
2973                                 M_NOP;
2974                                 }
2975
2976                         M_BR(0);
2977                         tptr = (void **) iptr->target;
2978                         mcode_addreference((basicblock *) tptr[0], mcodeptr);
2979                         M_NOP;
2980                         ALIGNCODENOP;
2981                         break;
2982                         }
2983
2984
2985                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
2986                                         /* op1 = return type, val.a = function pointer*/
2987                         s3 = 3;
2988                         goto gen_method;
2989
2990                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
2991                                         /* op1 = return type, val.a = function pointer*/
2992                         s3 = 2;
2993                         goto gen_method;
2994
2995                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
2996                                         /* op1 = return type, val.a = function pointer*/
2997                         s3 = 1;
2998                         goto gen_method;
2999
3000                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3001                                         /* op1 = arg count, val.a = method pointer    */
3002
3003                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3004                                         /* op1 = arg count, val.a = method pointer    */
3005
3006                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3007                                         /* op1 = arg count, val.a = method pointer    */
3008
3009                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
3010                                         /* op1 = arg count, val.a = method pointer    */
3011
3012                         s3 = iptr->op1;
3013
3014 gen_method: {
3015                         methodinfo   *m;
3016                         classinfo    *ci;
3017
3018                         MCODECHECK((s3 << 1) + 64);
3019
3020                         /* copy arguments to registers or stack location                  */
3021
3022                         for (; --s3 >= 0; src = src->prev) {
3023                                 if (src->varkind == ARGVAR)
3024                                         continue;
3025                                 if (IS_INT_LNG_TYPE(src->type)) {
3026                                         if (s3 < INT_ARG_CNT) {
3027                                                 s1 = argintregs[s3];
3028                                                 var_to_reg_int(d, src, s1);
3029                                                 M_INTMOVE(d, s1);
3030                                                 }
3031                                         else  {
3032                                                 var_to_reg_int(d, src, REG_ITMP1);
3033                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
3034                                                 }
3035                                         }
3036                                 else
3037                                         if (s3 < FLT_ARG_CNT) {
3038                                                 s1 = argfltregs[s3];
3039                                                 var_to_reg_flt(d, src, s1);
3040                                                 M_TFLTMOVE(src->type,d, s1);
3041                                                 }
3042                                         else {
3043                                                 var_to_reg_flt(d, src, REG_FTMP1);
3044                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
3045                                                 }
3046                                 } /* end of for */
3047
3048                         m = iptr->val.a;
3049                         switch (iptr->opc) {
3050                                 case ICMD_BUILTIN3:
3051                                 case ICMD_BUILTIN2:
3052                                 case ICMD_BUILTIN1:
3053                                         a = dseg_addaddress ((void*) (m));
3054                                         M_ALD(REG_ITMP3, REG_PV, a); /* built-in-function pointer */
3055                                         M_JSR (REG_RA, REG_ITMP3);
3056                                         M_NOP;
3057                                         d = iptr->op1;                             /* return type */
3058                                         goto afteractualcall;
3059
3060                                 case ICMD_INVOKESTATIC:
3061                                 case ICMD_INVOKESPECIAL:
3062                                         a = dseg_addaddress (m->stubroutine);
3063
3064                                         M_ALD(REG_PV, REG_PV, a );        /* method pointer in pv */
3065
3066                                         d = m->returntype;
3067                                         goto makeactualcall;
3068
3069                                 case ICMD_INVOKEVIRTUAL:
3070
3071                                         gen_nullptr_check(argintregs[0]);
3072                                         M_ALD(REG_METHODPTR, argintregs[0],
3073                                                                  OFFSET(java_objectheader, vftbl));
3074                                         M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl, table[0]) +
3075                                                                 sizeof(methodptr) * m->vftblindex);
3076
3077                                         d = m->returntype;
3078                                         goto makeactualcall;
3079
3080                                 case ICMD_INVOKEINTERFACE:
3081                                         ci = m->class;
3082
3083                                         gen_nullptr_check(argintregs[0]);
3084                                         M_ALD(REG_METHODPTR, argintregs[0],
3085                                                                  OFFSET(java_objectheader, vftbl));
3086                                         M_ALD(REG_METHODPTR, REG_METHODPTR,
3087                                               OFFSET(vftbl, interfacetable[0]) -
3088                                               sizeof(methodptr*) * ci->index);
3089                                         M_ALD(REG_PV, REG_METHODPTR,
3090                                                             sizeof(methodptr) * (m - ci->methods));
3091
3092                                         d = m->returntype;
3093                                         goto makeactualcall;
3094
3095                                 default:
3096                                         d = 0;
3097                                         sprintf (logtext, "Unkown ICMD-Command: %d", iptr->opc);
3098                                         error ();
3099                                 }
3100
3101 makeactualcall:
3102
3103                         M_JSR (REG_RA, REG_PV);
3104                         M_NOP;
3105
3106                         /* recompute pv */
3107
3108 afteractualcall:
3109
3110                         s1 = (int)((u1*) mcodeptr - mcodebase);
3111                         if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
3112                         else {
3113                                         s4 ml=-s1, mh=0;
3114                                         while (ml<-32768) { ml+=65536; mh--; }
3115                                         M_LUI(REG_PV, mh);
3116                                         M_IADD_IMM(REG_PV, ml, REG_PV);
3117                                         M_LADD(REG_PV, REG_RA, REG_PV);
3118                                 }
3119
3120                         /* d contains return type */
3121
3122                         if (d != TYPE_VOID) {
3123                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3124                                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3125                                         M_INTMOVE(REG_RESULT, s1);
3126                                         store_reg_to_var_int(iptr->dst, s1);
3127                                         }
3128                                 else {
3129                                         s1 = reg_of_var(iptr->dst, REG_FRESULT);
3130                                         M_TFLTMOVE(iptr->dst->type, REG_FRESULT, s1);
3131                                         store_reg_to_var_flt(iptr->dst, s1);
3132                                         }
3133                                 }
3134                         }
3135                         break;
3136
3137
3138                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3139
3140                                       /* op1:   0 == array, 1 == class                */
3141                                       /* val.a: (classinfo*) superclass               */
3142
3143 /*          superclass is an interface:
3144  *
3145  *          return (sub != NULL) &&
3146  *                 (sub->vftbl->interfacetablelength > super->index) &&
3147  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
3148  *
3149  *          superclass is a class:
3150  *
3151  *          return ((sub != NULL) && (0
3152  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3153  *                  super->vftbl->diffvall));
3154  */
3155
3156                         {
3157                         classinfo *super = (classinfo*) iptr->val.a;
3158
3159                         var_to_reg_int(s1, src, REG_ITMP1);
3160                         d = reg_of_var(iptr->dst, REG_ITMP3);
3161                         if (s1 == d) {
3162                                 M_MOV(s1, REG_ITMP1);
3163                                 s1 = REG_ITMP1;
3164                                 }
3165                         M_CLR(d);
3166                         if (iptr->op1) {                               /* class/interface */
3167                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3168                                         M_BEQZ(s1, 8);
3169                                         M_NOP;
3170                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3171                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3172                                         M_IADD_IMM(REG_ITMP2, - super->index, REG_ITMP2);
3173                                         M_BLEZ(REG_ITMP2, 3);
3174                                         M_NOP;
3175                                         M_ALD(REG_ITMP1, REG_ITMP1,
3176                                               OFFSET(vftbl, interfacetable[0]) -
3177                                               super->index * sizeof(methodptr*));
3178                                         M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3179                                         }
3180                                 else {                                     /* class           */
3181                                         /*
3182                                         s2 = super->vftbl->diffval;
3183                                         M_BEQZ(s1, 5);
3184                                         M_NOP;
3185                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3186                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3187                                         M_IADD_IMM(REG_ITMP1, - super->vftbl->baseval, REG_ITMP1);
3188                                         M_CMPULT_IMM(REG_ITMP1, s2 + 1, d);
3189                                         */
3190
3191                                         M_BEQZ(s1, 9);
3192                                         M_NOP;
3193                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3194                     a = dseg_addaddress ((void*) super->vftbl);
3195                     M_ALD(REG_ITMP2, REG_PV, a);
3196                     M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3197                     M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3198                     M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3199                     M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3200                     M_CMPULT(REG_ITMP2, REG_ITMP1, d);
3201                                         M_XOR_IMM(d, 1, d);
3202
3203                                         }
3204                                 }
3205                         else
3206                                 panic ("internal error: no inlined array instanceof");
3207                         }
3208                         store_reg_to_var_int(iptr->dst, d);
3209                         break;
3210
3211                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3212
3213                                       /* op1:   0 == array, 1 == class                */
3214                                       /* val.a: (classinfo*) superclass               */
3215
3216 /*          superclass is an interface:
3217  *
3218  *          OK if ((sub == NULL) ||
3219  *                 (sub->vftbl->interfacetablelength > super->index) &&
3220  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3221  *
3222  *          superclass is a class:
3223  *
3224  *          OK if ((sub == NULL) || (0
3225  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3226  *                 super->vftbl->diffvall));
3227  */
3228
3229                         {
3230                         classinfo *super = (classinfo*) iptr->val.a;
3231
3232                         d = reg_of_var(iptr->dst, REG_ITMP3);
3233                         var_to_reg_int(s1, src, d);
3234                         if (iptr->op1) {                               /* class/interface */
3235                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3236                                         M_BEQZ(s1, 9);
3237                                         M_NOP;
3238                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3239                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3240                                         M_IADD_IMM(REG_ITMP2, - super->index, REG_ITMP2);
3241                                         M_BLEZ(REG_ITMP2, 0);
3242                                         mcode_addxcastrefs(mcodeptr);
3243                                         M_NOP;
3244                                         M_ALD(REG_ITMP2, REG_ITMP1,
3245                                               OFFSET(vftbl, interfacetable[0]) -
3246                                               super->index * sizeof(methodptr*));
3247                                         M_BEQZ(REG_ITMP2, 0);
3248                                         mcode_addxcastrefs(mcodeptr);
3249                                         M_NOP;
3250                                         }
3251                                 else {                                     /* class           */
3252
3253                                         /*
3254                                         s2 = super->vftbl->diffval;
3255                                         M_BEQZ(s1, 6 + (s2 != 0));
3256                                         M_NOP;
3257                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3258                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3259                                         M_IADD_IMM(REG_ITMP1, - super->vftbl->baseval, REG_ITMP1);
3260                                         if (s2 == 0) {
3261                                                 M_BNEZ(REG_ITMP1, 0);
3262                                                 }
3263                                         else{
3264                                                 M_CMPULT_IMM(REG_ITMP1, s2 + 1, REG_ITMP2);
3265                                                 M_BEQZ(REG_ITMP2, 0);
3266                                                 }
3267                                         */
3268
3269                                         M_BEQZ(s1, 10 + (d == REG_ITMP3));
3270                                         M_NOP;
3271                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3272                     a = dseg_addaddress ((void*) super->vftbl);
3273                     M_ALD(REG_ITMP2, REG_PV, a);
3274                     M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3275                                         if (d != REG_ITMP3) {
3276                                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3277                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3278                                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3279                                         } else {
3280                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, baseval));
3281                                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3282                                                 M_ALD(REG_ITMP2, REG_PV, a);
3283                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3284                                         }
3285                     M_CMPULT(REG_ITMP2, REG_ITMP1, REG_ITMP2);
3286                                         M_BNEZ(REG_ITMP2, 0);
3287
3288                                         mcode_addxcastrefs(mcodeptr);
3289                                         M_NOP;
3290                                         }
3291                                 }
3292                         else
3293                                 panic ("internal error: no inlined array checkcast");
3294                         }
3295                         M_INTMOVE(s1, d);
3296                         store_reg_to_var_int(iptr->dst, d);
3297                         break;
3298
3299                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3300
3301                         var_to_reg_int(s1, src, REG_ITMP1);
3302                         M_BLTZ(s1, 0);
3303                         mcode_addxcheckarefs(mcodeptr);
3304                         M_NOP;
3305                         break;
3306
3307                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3308                                       /* op1 = dimension, val.a = array descriptor    */
3309
3310                         /* check for negative sizes and copy sizes to stack if necessary  */
3311
3312                         MCODECHECK((iptr->op1 << 1) + 64);
3313
3314                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3315                                 var_to_reg_int(s2, src, REG_ITMP1);
3316                                 M_BLTZ(s2, 0);
3317                                 mcode_addxcheckarefs(mcodeptr);
3318                                 M_NOP;
3319
3320                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3321
3322                                 if (src->varkind != ARGVAR) {
3323                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3324                                         }
3325                                 }
3326
3327                         /* a0 = dimension count */
3328
3329                         ICONST(argintregs[0], iptr->op1);
3330
3331                         /* a1 = arraydescriptor */
3332
3333                         a = dseg_addaddress(iptr->val.a);
3334                         M_ALD(argintregs[1], REG_PV, a);
3335
3336                         /* a2 = pointer to dimensions = stack pointer */
3337
3338                         M_INTMOVE(REG_SP, argintregs[2]);
3339
3340                         a = dseg_addaddress((void*) (builtin_nmultianewarray));
3341                         M_ALD(REG_ITMP3, REG_PV, a);
3342                         M_JSR(REG_RA, REG_ITMP3);
3343                         M_NOP;
3344                         s1 = (int)((u1*) mcodeptr - mcodebase);
3345                         if (s1 <= 32768)
3346                                 M_LDA (REG_PV, REG_RA, -s1);
3347                         else {
3348                                 panic("To big");
3349                             }
3350                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3351                         M_INTMOVE(REG_RESULT, s1);
3352                         store_reg_to_var_int(iptr->dst, s1);
3353                         break;
3354
3355
3356                 default: sprintf (logtext, "Unknown pseudo command: %d", iptr->opc);
3357                          error();
3358
3359
3360
3361         } /* switch */
3362
3363         } /* for instruction */
3364
3365         /* copy values to interface registers */
3366
3367         src = bptr->outstack;
3368         len = bptr->outdepth;
3369         MCODECHECK(64+len);
3370         while (src) {
3371                 len--;
3372                 if ((src->varkind != STACKVAR)) {
3373                         s2 = src->type;
3374                         if (IS_FLT_DBL_TYPE(s2)) {
3375                                 var_to_reg_flt(s1, src, REG_FTMP1);
3376                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3377                                         M_TFLTMOVE(s2,s1,interfaces[len][s2].regoff);
3378                                         }
3379                                 else {
3380                                         M_DST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3381                                         }
3382                                 }
3383                         else {
3384                                 var_to_reg_int(s1, src, REG_ITMP1);
3385                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3386                                         M_INTMOVE(s1,interfaces[len][s2].regoff);
3387                                         }
3388                                 else {
3389                                         M_LST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3390                                         }
3391                                 }
3392                         }
3393                 src = src->prev;
3394                 }
3395         } /* if (bptr -> flags >= BBREACHED) */
3396         } /* for basic block */
3397
3398         /* bptr -> mpc = (int)((u1*) mcodeptr - mcodebase); */
3399
3400         {
3401         /* generate bound check stubs */
3402
3403         s4 *xcodeptr = NULL;
3404
3405         for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) {
3406                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3407                         gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3408                                 xboundrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3409                         continue;
3410                         }
3411
3412
3413                 gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3414                                   xboundrefs->branchpos, (u1*) mcodeptr - mcodebase);
3415
3416                 MCODECHECK(8);
3417
3418                 M_LDA(REG_ITMP2_XPC, REG_PV, xboundrefs->branchpos - 4);
3419
3420                 if (xcodeptr != NULL) {
3421                         int disp = xcodeptr-mcodeptr;
3422                         M_BR(disp-1);
3423                         M_NOP;
3424                         }
3425                 else {
3426                         xcodeptr = mcodeptr;
3427
3428                         a = dseg_addaddress(asm_handle_exception);
3429                         M_ALD(REG_ITMP3, REG_PV, a);
3430
3431                         M_JMP(REG_ITMP3);
3432                         a = dseg_addaddress(proto_java_lang_ArrayIndexOutOfBoundsException);
3433                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3434                         }
3435                 }
3436
3437         /* generate negative array size check stubs */
3438
3439         xcodeptr = NULL;
3440
3441         for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) {
3442                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3443                         gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3444                                 xcheckarefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3445                         continue;
3446                         }
3447
3448                 gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3449                                   xcheckarefs->branchpos, (u1*) mcodeptr - mcodebase);
3450
3451                 MCODECHECK(8);
3452
3453                 M_LDA(REG_ITMP2_XPC, REG_PV, xcheckarefs->branchpos - 4);
3454
3455                 if (xcodeptr != NULL) {
3456                         int disp = xcodeptr-mcodeptr;
3457                         M_BR(disp-1);
3458                         M_NOP;
3459                         }
3460                 else {
3461                         xcodeptr = mcodeptr;
3462
3463                         a = dseg_addaddress(asm_handle_exception);
3464                         M_ALD(REG_ITMP3, REG_PV, a);
3465
3466                         M_JMP(REG_ITMP3);
3467                         a = dseg_addaddress(proto_java_lang_NegativeArraySizeException);
3468                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3469                         }
3470                 }
3471
3472         /* generate cast check stubs */
3473
3474         xcodeptr = NULL;
3475
3476         for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) {
3477                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3478                         gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3479                                 xcastrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3480                         continue;
3481                         }
3482
3483                 gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3484                                   xcastrefs->branchpos, (u1*) mcodeptr - mcodebase);
3485
3486                 MCODECHECK(8);
3487
3488                 M_LDA(REG_ITMP2_XPC, REG_PV, xcastrefs->branchpos - 4);
3489
3490                 if (xcodeptr != NULL) {
3491                         int disp = xcodeptr-mcodeptr;
3492                         M_BR(disp-1);
3493                         M_NOP;
3494                         }
3495                 else {
3496                         xcodeptr = mcodeptr;
3497
3498                         a = dseg_addaddress(asm_handle_exception);
3499                         M_ALD(REG_ITMP3, REG_PV, a);
3500
3501                         M_JMP(REG_ITMP3);
3502                         a = dseg_addaddress(proto_java_lang_ClassCastException);
3503                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3504                         }
3505                 }
3506
3507
3508 #ifdef SOFTNULLPTRCHECK
3509
3510         /* generate null pointer check stubs */
3511
3512         xcodeptr = NULL;
3513
3514         for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) {
3515                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3516                         gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3517                                 xnullrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3518                         continue;
3519                         }
3520
3521                 gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3522                                   xnullrefs->branchpos, (u1*) mcodeptr - mcodebase);
3523
3524                 MCODECHECK(8);
3525
3526                 M_LDA(REG_ITMP2_XPC, REG_PV, xnullrefs->branchpos - 4);
3527
3528                 if (xcodeptr != NULL) {
3529                         int disp = xcodeptr-mcodeptr;
3530                         M_BR(disp-1);
3531                         M_NOP;
3532                         }
3533                 else {
3534                         xcodeptr = mcodeptr;
3535
3536                         a = dseg_addaddress(asm_handle_exception);
3537                         M_ALD(REG_ITMP3, REG_PV, a);
3538
3539                         M_JMP(REG_ITMP3);
3540                         a = dseg_addaddress(proto_java_lang_NullPointerException);
3541                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3542                         }
3543                 }
3544
3545 #endif
3546         }
3547
3548         mcode_finish((int)((u1*) mcodeptr - mcodebase));
3549
3550         docacheflush((void*) method->entrypoint,
3551                           ((u1*) mcodeptr - mcodebase), ICACHE);
3552 }
3553
3554
3555 /* redefinition of code generation macros (compiling into array) **************/
3556
3557 /*
3558 These macros are newly defined to allow code generation into an array.
3559 This is necessary, because the original M_.. macros generate code by
3560 calling 'mcode_adds4' that uses an additional data structure to
3561 receive the code.
3562
3563 For a faster (but less flexible) version to generate code, these
3564 macros directly use the (s4* p) - pointer to put the code directly
3565 in a locally defined array.
3566 This makes sense only for the stub-generation-routines below.
3567 */
3568
3569 #undef M_ITYPE
3570 #define M_ITYPE(op, rs, rt, imm)\
3571   *(p++) = (((op)<<26)|((rs)<<21)|((rt)<<16)|((imm)&0xffff))
3572
3573 #undef M_JTYPE
3574 #define M_JTYPE(op, imm)\
3575   *(p++) = (((op)<<26)|((off)&0x3ffffff))
3576
3577 #undef M_RTYPE
3578 #define M_RTYPE(op, rs, rt, rd, sa, fu)\
3579   *(p++) = (((op)<<26)|((rs)<<21)|((rt)<<16)|((rd)<<11)|((sa)<<6)|(fu))
3580
3581
3582 /* function createcompilerstub *************************************************
3583
3584         creates a stub routine which calls the compiler
3585
3586 *******************************************************************************/
3587
3588 #define COMPSTUBSIZE 4
3589
3590 u1 *createcompilerstub (methodinfo *m)
3591 {
3592         u8 *s = CNEW (u8, COMPSTUBSIZE);    /* memory to hold the stub            */
3593         s4 *p = (s4*) s;                    /* code generation pointer            */
3594
3595                                             /* code for the stub                  */
3596         M_ALD(REG_PV, REG_PV, 24);          /* load pointer to the compiler       */
3597         M_NOP;
3598         M_JSR(REG_ITMP1, REG_PV);           /* jump to the compiler, return address
3599                                                in itmp1 is used as method pointer */
3600         M_NOP;
3601
3602         s[2] = (u8) m;                      /* literals to be adressed            */
3603         s[3] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
3604
3605         (void) docacheflush((void*) s, (char*) p - (char*) s, ICACHE);
3606
3607 #ifdef STATISTICS
3608         count_cstub_len += COMPSTUBSIZE * 8;
3609 #endif
3610
3611         return (u1*) s;
3612 }
3613
3614
3615 /* function removecompilerstub *************************************************
3616
3617      deletes a compilerstub from memory  (simply by freeing it)
3618
3619 *******************************************************************************/
3620
3621 void removecompilerstub (u1 *stub)
3622 {
3623         CFREE (stub, COMPSTUBSIZE * 8);
3624 }
3625
3626 /* function: createnativestub **************************************************
3627
3628         creates a stub routine which calls a native method
3629
3630 *******************************************************************************/
3631
3632 #define NATIVESTUBSIZE 18
3633
3634 u1 *createnativestub (functionptr f, methodinfo *m)
3635 {
3636         u8 *s = CNEW (u8, NATIVESTUBSIZE);  /* memory to hold the stub            */
3637         s4 *p = (s4*) s;                    /* code generation pointer            */
3638
3639         reg_init();
3640
3641         M_MOV  (argintregs[4], argintregs[5]);
3642         M_DMOV (argfltregs[4], argfltregs[5]);
3643
3644         M_MOV  (argintregs[3], argintregs[4]);
3645         M_DMOV (argfltregs[3], argfltregs[4]);
3646
3647         M_MOV  (argintregs[2], argintregs[3]);
3648         M_DMOV (argfltregs[2], argfltregs[3]);
3649
3650         M_MOV  (argintregs[1], argintregs[2]);
3651         M_DMOV (argfltregs[1], argfltregs[2]);
3652
3653         M_MOV  (argintregs[0], argintregs[1]);
3654         M_DMOV (argfltregs[0], argfltregs[1]);
3655
3656         M_ALD  (argintregs[0], REG_PV, 17*8); /* load adress of jni_environement  */
3657
3658         M_ALD  (REG_ITMP3, REG_PV, 14*8);   /* load adress of native method       */
3659         M_LDA  (REG_SP, REG_SP, -8);        /* build up stackframe                */
3660
3661         M_LST  (REG_RA, REG_SP, 0);         /* store return address               */
3662         M_JSR  (REG_RA, REG_ITMP3);         /* call native method                 */
3663
3664         M_NOP;                              /* delay slot                         */
3665         M_ALD  (REG_ITMP3, REG_PV, 15*8);   /* get address of exceptionptr        */
3666
3667         M_LLD  (REG_RA, REG_SP, 0);         /* load return address                */
3668         M_ALD  (REG_ITMP1, REG_ITMP3, 0);   /* load exception into reg. itmp1     */
3669
3670         M_BNEZ (REG_ITMP1, 2);              /* if no exception then return        */
3671         M_LDA  (REG_SP, REG_SP, 8);         /* remove stackframe, delay slot      */
3672
3673         M_RET  (REG_RA);                    /* return to caller                   */
3674         M_NOP;                              /* delay slot                         */
3675
3676         M_AST  (REG_ZERO, REG_ITMP3, 0);    /* store NULL into exceptionptr       */
3677         M_ALD  (REG_ITMP3, REG_PV,16*8);    /* load asm exception handler address */
3678
3679         M_JMP  (REG_ITMP3);                 /* jump to asm exception handler      */
3680         M_LDA  (REG_ITMP2, REG_RA, -4);     /* move fault address into reg. itmp2 */
3681                                             /* delay slot                         */
3682
3683         s[14] = (u8) f;                     /* address of native method           */
3684         s[15] = (u8) (&exceptionptr);       /* address of exceptionptr            */
3685         s[16]= (u8) (asm_handle_nat_exception); /* addr of asm exception handler  */
3686         s[17] = (u8) (&env);                  /* addr of jni_environement         */
3687
3688         (void) docacheflush((void*) s, (char*) p - (char*) s, ICACHE);
3689
3690 #ifdef STATISTICS
3691         count_nstub_len += NATIVESTUBSIZE * 8;
3692 #endif
3693
3694         return (u1*) s;
3695 }
3696
3697 /* function: removenativestub **************************************************
3698
3699     removes a previously created native-stub from memory
3700
3701 *******************************************************************************/
3702
3703 void removenativestub (u1 *stub)
3704 {
3705         CFREE (stub, NATIVESTUBSIZE * 8);
3706 }
3707
3708
3709 /* function: createcalljava ****************************************************
3710
3711         creates the asm_calljavamethod (MIPS assembler does not like data in the
3712         text segment). Documentation can be found in asmpart.c.
3713
3714 *******************************************************************************/
3715
3716 #define REG_FSS0    20
3717 #define REG_FSS1    22
3718 #define REG_FSS2    25
3719 #define REG_FSS3    27
3720 #define REG_FSS4    29
3721 #define REG_FSS5    31
3722
3723 #define CALL_JAVA_MEM_SIZE 60
3724 #define CALL_JAVA_ENTRY    20
3725 #define CALL_JAVA_XHANDLER 55
3726
3727 static s4 calljavamem[CALL_JAVA_MEM_SIZE];
3728
3729 void createcalljava ()
3730 {
3731         s4 *p;
3732
3733         *((void**)(calljavamem + 0)) = (void*) asm_call_jit_compiler;
3734         *((void**)(calljavamem + 2)) = (void*) builtin_throw_exception;
3735 #if POINTERSIZE==8
3736         *((void**)(calljavamem + 4)) = NULL;
3737         *((void**)(calljavamem + 6)) = (void*) (calljavamem + CALL_JAVA_XHANDLER);
3738         *((void**)(calljavamem + 8)) = (void*) (calljavamem + CALL_JAVA_XHANDLER);
3739         *((void**)(calljavamem +10)) = (void*) (calljavamem + CALL_JAVA_ENTRY);
3740 #else
3741         *((void**)(calljavamem + 8)) = NULL;
3742         *((void**)(calljavamem + 9)) = (void*) (calljavamem + CALL_JAVA_XHANDLER);
3743         *((void**)(calljavamem +10)) = (void*) (calljavamem + CALL_JAVA_XHANDLER);
3744         *((void**)(calljavamem +11)) = (void*) (calljavamem + CALL_JAVA_ENTRY);
3745 #endif
3746
3747         calljavamem[12] = 1;                /* extable size                       */
3748         calljavamem[13] = 0;                /* fltsave                            */
3749         calljavamem[14] = 0;                /* intsave                            */
3750         calljavamem[15] = 0;                /* isleaf                             */
3751         calljavamem[16] = 0;                /* IsSync                             */
3752         calljavamem[17] = 80;               /* frame size                         */
3753         calljavamem[18] = 0;                /* method pointer (NULL)              */
3754         calljavamem[19] = 0;                /* method pointer (NULL)              */
3755
3756         p = calljavamem + CALL_JAVA_ENTRY;  /* code generation pointer            */
3757
3758 /*  20 */
3759         M_LDA (REG_SP, REG_SP, -10*8);      /* allocate stackframe                */
3760         M_LST (REG_RA, REG_SP, 0);          /* save return address                */
3761
3762         M_BRS(1);                           /* compute current program counter    */
3763         M_LST (REG_PV, REG_SP, 3*8);        /* save procedure vector              */
3764 /*  24 */
3765         M_LDA (REG_PV, REG_RA, -4*4);       /* compute procedure vector           */
3766         M_DST (REG_FSS0, REG_SP, 4*8);      /* save non JavaABI saved flt regs    */
3767
3768         M_DST (REG_FSS1, REG_SP, 5*8);
3769         M_DST (REG_FSS2, REG_SP, 6*8);
3770 /*  28 */
3771         M_DST (REG_FSS3, REG_SP, 7*8);
3772         M_DST (REG_FSS4, REG_SP, 8*8);
3773
3774         M_DST (REG_FSS5, REG_SP, 9*8);
3775         M_LST (REG_ARG_0, REG_SP, 2*8);     /* save method pointer for compiler   */
3776 /*  32 */
3777         M_LDA (REG_ITMP1, REG_SP, 2*8);     /* pass pointer to methodptr via itmp1*/
3778         M_MOV (REG_ARG_1, REG_ARG_0);       /* pass the remaining parameters      */
3779
3780         M_MOV (REG_ARG_2, REG_ARG_1);
3781         M_MOV (REG_ARG_3, REG_ARG_2);
3782 /*  36 */
3783         M_MOV (REG_ARG_4, REG_ARG_3);
3784         M_ALD (REG_METHODPTR, REG_PV, -80); /* address of asm_call_jit_compiler   */
3785
3786         M_AST (REG_METHODPTR, REG_SP, 8);   /* store function address             */
3787         M_MOV (REG_SP, REG_METHODPTR);      /* set method pointer                 */
3788 /*  40 */
3789         M_ALD (REG_PV, REG_METHODPTR, 8);   /* method call as in Java             */
3790         M_JSR (REG_RA, REG_PV);             /* call JIT compiler                  */
3791
3792         M_NOP;                              /* delay slot                         */
3793         M_LDA (REG_PV, REG_RA, -23*4);      /* recompute procedure vector         */
3794
3795 /*  44 */
3796 #if 0
3797         M_CLR (REG_RESULT);                 /* clear return value (exception ptr) */
3798 #else
3799         M_NOP;
3800 #endif
3801 /*  calljava_return: */
3802         M_LLD (REG_RA, REG_SP, 0);          /* restore return address             */
3803
3804         M_LLD (REG_PV, REG_SP, 3*8);        /* restore procedure vector           */
3805         M_DLD (REG_FSS0, REG_SP, 4*8);      /* restore non JavaABI saved flt regs */
3806 /*  48 */
3807         M_DLD (REG_FSS1, REG_SP, 5*8);
3808         M_DLD (REG_FSS2, REG_SP, 6*8);
3809
3810         M_DLD (REG_FSS3, REG_SP, 7*8);
3811         M_DLD (REG_FSS4, REG_SP, 8*8);
3812 /*  52 */
3813         M_DLD (REG_FSS5, REG_SP, 9*8);
3814         M_RET(REG_RA);                      /* return                             */
3815
3816         M_LDA (REG_SP, REG_SP, 10*8);       /* deallocate stackframe (delay slot) */
3817
3818 /*  55 */
3819 /*  calljava_xhandler: */
3820
3821         M_ALD (REG_ITMP3, REG_PV, -72);     /* address of builtin_throw_exception */
3822
3823         M_JSR (REG_RA, REG_ITMP3);          /* call builtin                       */
3824         M_MOV (REG_ITMP1, REG_ARG_0);       /* pass parameter (delay slot)        */
3825 /*  58 */
3826         M_BR(-14);                          /* branch calljava_return             */
3827         M_NOP;                              /* delay slot                         */
3828
3829         (void) cacheflush((void*)(calljavamem + CALL_JAVA_ENTRY),
3830                (CALL_JAVA_MEM_SIZE - CALL_JAVA_ENTRY) * (int) sizeof(s4), ICACHE);
3831 }
3832
3833
3834 typedef java_objectheader* (*asm_fptr)(methodinfo*, void*, void*, void*, void*);
3835
3836 java_objectheader *asm_calljavamethod (methodinfo *m, void *arg1, void *arg2,
3837                                                       void *arg3, void *arg4)
3838 {
3839         ((asm_fptr)(calljavamem + 20))(m, arg1, arg2, arg3, arg4);
3840         return NULL;
3841 }
3842
3843 java_objectheader *asm_calljavafunction (methodinfo *m, void *arg1, void *arg2,
3844                                                       void *arg3, void *arg4)
3845 {
3846         return ((asm_fptr)(calljavamem + 20))(m, arg1, arg2, arg3, arg4);
3847 }
3848
3849 void ngen_init()
3850 {
3851         createcalljava();
3852 }
3853
3854 void docacheflush(u1 *p, long bytelen, int dummy)
3855 {
3856         u1 *e = p + bytelen;
3857         long psize = sysconf(_SC_PAGESIZE);
3858         p -= (long) p & (psize-1);
3859         e += psize - ((((long) e - 1) & (psize-1)) + 1);
3860         bytelen = e-p;
3861         mprotect(p, bytelen, PROT_READ|PROT_WRITE|PROT_EXEC);
3862 }
3863
3864 /*
3865  * These are local overrides for various environment variables in Emacs.
3866  * Please do not remove this and leave it at the end of the file, where
3867  * Emacs will automagically detect them.
3868  * ---------------------------------------------------------------------
3869  * Local variables:
3870  * mode: c
3871  * indent-tabs-mode: t
3872  * c-basic-offset: 4
3873  * tab-width: 4
3874  * End:
3875  */