mips/ngen.c

   1 /* mips/ngen.c *****************************************************************
   2
   3         Copyright (c) 1997 A. Krall, R. Grafl, M. Gschwind, M. Probst
   4
   5         See file COPYRIGHT for information on usage and disclaimer of warranties
   6
   7         Contains the codegenerator for an MIPS (R4000 or higher) processor.
   8         This module generates MIPS machine code for a sequence of intermediate
   9         code commands (ICMDs).
  10
  11         Authors: Andreas  Krall      EMAIL: cacao@complang.tuwien.ac.at
  12
  13         Last Change: 1998/11/18
  14
  15 *******************************************************************************/
  16
  17
  18
  19 /* *****************************************************************************
  20
  21 Datatypes and Register Allocations:
  22 -----------------------------------
  23
  24 On 64-bit-machines (like the MIPS) all operands are stored in the
  25 registers in a 64-bit form, even when the correspondig JavaVM operands
  26 only need 32 bits. This is done by a canonical representation:
  27
  28 32-bit integers are allways stored as sign-extended 64-bit values (this
  29 approach is directly supported by the MIPS architecture and is very easy
  30 to implement).
  31
  32 32-bit-floats are stored in a 64-bit double precision register by simply
  33 expanding the exponent and mantissa with zeroes. (also supported by the
  34 architecture)
  35
  36
  37 Stackframes:
  38
  39 The calling conventions and the layout of the stack is  explained in detail
  40 in the documention file: calling.doc
  41
  42 *******************************************************************************/
  43
  44
  45 /* additional functions and macros to generate code ***************************/
  46
  47 #define BlockPtrOfPC(pc)        block+block_index[pc]
  48
  49 #ifdef STATISTICS
  50 #define COUNT_SPILLS count_spills++
  51 #else
  52 #define COUNT_SPILLS
  53 #endif
  54
  55
  56 /* gen_nullptr_check(objreg) */
  57
  58 #ifdef SOFTNULLPTRCHECK
  59 #define gen_nullptr_check(objreg) \
  60         if (checknull) {\
  61         M_BEQZ((objreg), 0);\
  62         mcode_addxnullrefs(mcodeptr);\
  63         M_NOP;\
  64         }
  65 #else
  66 #define gen_nullptr_check(objreg)
  67 #endif
  68
  69
  70 /* MCODECHECK(icnt) */
  71
  72 #define MCODECHECK(icnt) \
  73         if((mcodeptr+(icnt))>mcodeend)mcodeptr=mcode_increase((u1*)mcodeptr)
  74
  75 /* M_INTMOVE:
  76      generates an integer-move from register a to b.
  77      if a and b are the same int-register, no code will be generated.
  78 */
  79
  80 #define M_INTMOVE(a,b) if(a!=b){M_MOV(a,b);}
  81
  82
  83 /* M_FLTMOVE:
  84     generates a floating-point-move from register a to b.
  85     if a and b are the same float-register, no code will be generated
  86 */
  87
  88 #define M_FLTMOVE(a,b) if(a!=b){M_DMOV(a,b);}
  89
  90
  91 /* var_to_reg_xxx:
  92     this function generates code to fetch data from a pseudo-register
  93     into a real register.
  94     If the pseudo-register has actually been assigned to a real
  95     register, no code will be emitted, since following operations
  96     can use this register directly.
  97
  98     v: pseudoregister to be fetched from
  99     tempregnum: temporary register to be used if v is actually spilled to ram
 100
 101     return: the register number, where the operand can be found after
 102             fetching (this wil be either tempregnum or the register
 103             number allready given to v)
 104 */
 105
 106 #define var_to_reg_int(regnr,v,tempnr) { \
 107         if ((v)->flags & INMEMORY) \
 108                 {COUNT_SPILLS;M_LLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 109         else regnr=(v)->regoff; \
 110 }
 111
 112
 113 #define var_to_reg_flt(regnr,v,tempnr) { \
 114         if ((v)->flags & INMEMORY) \
 115                 {COUNT_SPILLS;M_DLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 116         else regnr=(v)->regoff; \
 117 }
 118
 119
 120 /* reg_of_var:
 121     This function determines a register, to which the result of an operation
 122     should go, when it is ultimatively intended to store the result in
 123     pseudoregister v.
 124     If v is assigned to an actual register, this register will be returned.
 125     Otherwise (when v is spilled) this function returns tempregnum.
 126     If not already done, regoff and flags are set in the stack location.
 127 */
 128
 129 static int reg_of_var(stackptr v, int tempregnum)
 130 {
 131         varinfo      *var;
 132
 133         switch (v->varkind) {
 134                 case TEMPVAR:
 135                         if (!(v->flags & INMEMORY))
 136                                 return(v->regoff);
 137                         break;
 138                 case STACKVAR:
 139                         var = &(interfaces[v->varnum][v->type]);
 140                         v->regoff = var->regoff;
 141                         if (!(var->flags & INMEMORY))
 142                                 return(var->regoff);
 143                         break;
 144                 case LOCALVAR:
 145                         var = &(locals[v->varnum][v->type]);
 146                         v->regoff = var->regoff;
 147                         if (!(var->flags & INMEMORY))
 148                                 return(var->regoff);
 149                         break;
 150                 case ARGVAR:
 151                         v->regoff = v->varnum;
 152                         if (IS_FLT_DBL_TYPE(v->type)) {
 153                                 if (v->varnum < fltreg_argnum) {
 154                                         v->regoff = argfltregs[v->varnum];
 155                                         return(argfltregs[v->varnum]);
 156                                         }
 157                                 }
 158                         else
 159                                 if (v->varnum < intreg_argnum) {
 160                                         v->regoff = argintregs[v->varnum];
 161                                         return(argintregs[v->varnum]);
 162                                         }
 163                         v->regoff -= intreg_argnum;
 164                         break;
 165                 }
 166         v->flags |= INMEMORY;
 167         return tempregnum;
 168 }
 169
 170
 171 /* store_reg_to_var_xxx:
 172     This function generates the code to store the result of an operation
 173     back into a spilled pseudo-variable.
 174     If the pseudo-variable has not been spilled in the first place, this
 175     function will generate nothing.
 176
 177     v ............ Pseudovariable
 178     tempregnum ... Number of the temporary registers as returned by
 179                    reg_of_var.
 180 */
 181
 182 #define store_reg_to_var_int(sptr, tempregnum) {       \
 183         if ((sptr)->flags & INMEMORY) {                    \
 184                 COUNT_SPILLS;                                  \
 185                 M_LST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 186                 }                                              \
 187         }
 188
 189 #define store_reg_to_var_flt(sptr, tempregnum) {       \
 190         if ((sptr)->flags & INMEMORY) {                    \
 191                 COUNT_SPILLS;                                  \
 192                 M_DST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 193                 }                                              \
 194         }
 195
 196
 197 /* NullPointerException handlers and exception handling initialisation        */
 198
 199 /* NullPointerException signal handler for hardware null pointer check */
 200
 201 void catch_NullPointerException(int sig, int code, struct sigcontext *sigctx)
 202 {
 203         sigset_t nsig;
 204         int      instr;
 205         long     faultaddr;
 206
 207         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 208
 209         instr = *((int*)(sigctx->sc_pc));
 210         faultaddr = sigctx->sc_regs[(instr >> 21) & 0x1f];
 211
 212         if (faultaddr == 0) {
 213                 signal(sig, (void*) catch_NullPointerException); /* reinstall handler */
 214                 sigemptyset(&nsig);
 215                 sigaddset(&nsig, sig);
 216                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 217                 sigctx->sc_regs[REG_ITMP1_XPTR] =
 218                                             (long) proto_java_lang_NullPointerException;
 219                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 220                 sigctx->sc_pc = (long) asm_handle_nat_exception;
 221                 }
 222         else {
 223                 faultaddr += (long) ((instr << 16) >> 16);
 224                 fprintf(stderr, "faulting address: 0x%16lx\n", faultaddr);
 225                 panic("Stack overflow");
 226                 }
 227 }
 228
 229 void createcalljava ();
 230
 231
 232 void init_exceptions(void)
 233 {
 234
 235         createcalljava();
 236
 237         /* install signal handlers we need to convert to exceptions */
 238
 239         if (!checknull) {
 240
 241 #if defined(SIGSEGV)
 242                 signal(SIGSEGV, (void*) catch_NullPointerException);
 243 #endif
 244
 245 #if defined(SIGBUS)
 246                 signal(SIGBUS, (void*) catch_NullPointerException);
 247 #endif
 248                 }
 249 }
 250
 251
 252 /* function gen_mcode **********************************************************
 253
 254         generates machine code
 255
 256 *******************************************************************************/
 257
 258 #define         MethodPointer   -8
 259 #define         FrameSize       -12
 260 #define     IsSync          -16
 261 #define     IsLeaf          -20
 262 #define     IntSave         -24
 263 #define     FltSave         -28
 264 #define     ExTableSize     -32
 265 #define     ExTableStart    -32
 266
 267 #if POINTERSIZE==8
 268 #define     ExEntrySize     -32
 269 #define     ExStartPC       -8
 270 #define     ExEndPC         -16
 271 #define     ExHandlerPC     -24
 272 #define     ExCatchType     -32
 273 #else
 274 #define     ExEntrySize     -16
 275 #define     ExStartPC       -4
 276 #define     ExEndPC         -8
 277 #define     ExHandlerPC     -12
 278 #define     ExCatchType     -16
 279 #endif
 280
 281 static void gen_mcode()
 282 {
 283         int  len, s1, s2, s3, d, bbs;
 284         s4   a;
 285         s4          *mcodeptr;
 286         stackptr    src;
 287         varinfo     *var;
 288         basicblock  *bptr;
 289         instruction *iptr;
 290
 291         {
 292         int p, pa, t, l, r;
 293
 294         savedregs_num = (isleafmethod) ? 0 : 1;           /* space to save the RA */
 295
 296         /* space to save used callee saved registers */
 297
 298         savedregs_num += (savintregcnt - maxsavintreguse);
 299         savedregs_num += (savfltregcnt - maxsavfltreguse);
 300
 301         parentargs_base = maxmemuse + savedregs_num;
 302
 303 #ifdef USE_THREADS                 /* space to save argument of monitor_enter */
 304
 305         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 306                 parentargs_base++;
 307
 308 #endif
 309
 310         /* adjust frame size for 16 byte alignment */
 311
 312         if (parentargs_base & 1)
 313                 parentargs_base++;
 314
 315         /* create method header */
 316
 317 #if POINTERSIZE==4
 318         (void) dseg_addaddress(method);                         /* Filler         */
 319 #endif
 320         (void) dseg_addaddress(method);                         /* MethodPointer  */
 321         (void) dseg_adds4(parentargs_base * 8);                 /* FrameSize      */
 322
 323 #ifdef USE_THREADS
 324
 325         /* IsSync contains the offset relative to the stack pointer for the
 326            argument of monitor_exit used in the exception handler. Since the
 327            offset could be zero and give a wrong meaning of the flag it is
 328            offset by one.
 329         */
 330
 331         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 332                 (void) dseg_adds4((maxmemuse + 1) * 8);             /* IsSync         */
 333         else
 334
 335 #endif
 336
 337         (void) dseg_adds4(0);                                   /* IsSync         */
 338
 339         (void) dseg_adds4(isleafmethod);                        /* IsLeaf         */
 340         (void) dseg_adds4(savintregcnt - maxsavintreguse);      /* IntSave        */
 341         (void) dseg_adds4(savfltregcnt - maxsavfltreguse);      /* FltSave        */
 342         (void) dseg_adds4(exceptiontablelength);                /* ExTableSize    */
 343
 344         /* create exception table */
 345
 346         for (len = 0; len < exceptiontablelength; len++) {
 347                 dseg_addtarget(BlockPtrOfPC(extable[len].startpc));
 348                 dseg_addtarget(BlockPtrOfPC(extable[len].endpc));
 349                 dseg_addtarget(BlockPtrOfPC(extable[len].handlerpc));
 350                 (void) dseg_addaddress(extable[len].catchtype);
 351                 }
 352
 353         /* initialize mcode variables */
 354
 355         mcodeptr = (s4*) mcodebase;
 356         mcodeend = (s4*) (mcodebase + mcodesize);
 357         MCODECHECK(128 + mparamcount);
 358
 359         /* create stack frame (if necessary) */
 360
 361         if (parentargs_base)
 362                 {M_LDA (REG_SP, REG_SP, -parentargs_base * 8);}
 363
 364         /* save return address and used callee saved registers */
 365
 366         p = parentargs_base;
 367         if (!isleafmethod)
 368                 {p--;  M_LST (REG_RA, REG_SP, 8*p);}
 369         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
 370                 {p--; M_LST (savintregs[r], REG_SP, 8 * p);}
 371         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
 372                 {p--; M_DST (savfltregs[r], REG_SP, 8 * p);}
 373
 374         /* save monitorenter argument */
 375
 376 #ifdef USE_THREADS
 377         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 378                 if (method->flags & ACC_STATIC) {
 379                         p = dseg_addaddress (class);
 380                         M_ALD(REG_ITMP1, REG_PV, p);
 381                         M_AST(REG_ITMP1, REG_SP, 8 * maxmemuse);
 382                         }
 383                 else {
 384                         M_AST (argintregs[0], REG_SP, 8 * maxmemuse);
 385                         }
 386                 }
 387 #endif
 388
 389         /* copy argument registers to stack and call trace function with pointer
 390            to arguments on stack. ToDo: save floating point registers !!!!!!!!!
 391         */
 392
 393         if (runverbose && isleafmethod) {
 394                 M_LDA (REG_SP, REG_SP, -(18*8));
 395
 396                 M_LST(REG_RA,        REG_SP,  1*8);
 397
 398                 M_LST(argintregs[0], REG_SP,  2*8);
 399                 M_LST(argintregs[1], REG_SP,  3*8);
 400                 M_LST(argintregs[2], REG_SP,  4*8);
 401                 M_LST(argintregs[3], REG_SP,  5*8);
 402                 M_LST(argintregs[4], REG_SP,  6*8);
 403                 M_LST(argintregs[5], REG_SP,  7*8);
 404                 M_LST(argintregs[6], REG_SP,  8*8);
 405                 M_LST(argintregs[7], REG_SP,  9*8);
 406
 407                 M_DST(argfltregs[0], REG_SP, 10*8);
 408                 M_DST(argfltregs[1], REG_SP, 11*8);
 409                 M_DST(argfltregs[2], REG_SP, 12*8);
 410                 M_DST(argfltregs[3], REG_SP, 13*8);
 411                 M_DST(argfltregs[4], REG_SP, 14*8);
 412                 M_DST(argfltregs[5], REG_SP, 15*8);
 413                 M_DST(argfltregs[6], REG_SP, 16*8);
 414                 M_DST(argfltregs[7], REG_SP, 17*8);
 415
 416                 p = dseg_addaddress (method);
 417                 M_ALD(REG_ITMP1, REG_PV, p);
 418                 M_LST(REG_ITMP1, REG_SP, 0);
 419                 p = dseg_addaddress ((void*) (builtin_trace_args));
 420                 M_ALD(REG_ITMP3, REG_PV, p);
 421                 M_JSR(REG_RA, REG_ITMP3);
 422                 M_NOP;
 423
 424                 M_LLD(REG_RA,        REG_SP,  1*8);
 425
 426                 M_LLD(argintregs[0], REG_SP,  2*8);
 427                 M_LLD(argintregs[1], REG_SP,  3*8);
 428                 M_LLD(argintregs[2], REG_SP,  4*8);
 429                 M_LLD(argintregs[3], REG_SP,  5*8);
 430                 M_LLD(argintregs[4], REG_SP,  6*8);
 431                 M_LLD(argintregs[5], REG_SP,  7*8);
 432                 M_LLD(argintregs[6], REG_SP,  8*8);
 433                 M_LLD(argintregs[7], REG_SP,  9*8);
 434
 435                 M_DLD(argfltregs[0], REG_SP, 10*8);
 436                 M_DLD(argfltregs[1], REG_SP, 11*8);
 437                 M_DLD(argfltregs[2], REG_SP, 12*8);
 438                 M_DLD(argfltregs[3], REG_SP, 13*8);
 439                 M_DLD(argfltregs[4], REG_SP, 14*8);
 440                 M_DLD(argfltregs[5], REG_SP, 15*8);
 441                 M_DLD(argfltregs[6], REG_SP, 16*8);
 442                 M_DLD(argfltregs[7], REG_SP, 17*8);
 443
 444                 M_LDA (REG_SP, REG_SP, 18*8);
 445                 }
 446
 447         /* take arguments out of register or stack frame */
 448
 449         for (p = 0, l = 0; p < mparamcount; p++) {
 450                 t = mparamtypes[p];
 451                 var = &(locals[l][t]);
 452                 l++;
 453                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 454                         l++;
 455                 if (var->type < 0)
 456                         continue;
 457                 r = var->regoff;
 458                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 459                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 460                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 461                                         {M_INTMOVE (argintregs[p], r);}
 462                                 else                                 /* reg arg -> spilled    */
 463                                         M_LST (argintregs[p], REG_SP, 8 * r);
 464                                 }
 465                         else {                                   /* stack arguments       */
 466                                 pa = p - INT_ARG_CNT;
 467                                 if (!(var->flags & INMEMORY))        /* stack arg -> register */
 468                                         M_LLD (r, REG_SP, 8 * (parentargs_base + pa));
 469                                 else {                               /* stack arg -> spilled  */
 470                                         M_LLD (REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 471                                         M_LST (REG_ITMP1, REG_SP, 8 * r);
 472                                         }
 473                                 }
 474                         }
 475                 else {                                       /* floating args         */
 476                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 477                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 478                                         {M_FLTMOVE (argfltregs[p], r);}
 479                                 else                                             /* reg arg -> spilled    */
 480                                         M_DST (argfltregs[p], REG_SP, 8 * r);
 481                                 }
 482                         else {                                   /* stack arguments       */
 483                                 pa = p - FLT_ARG_CNT;
 484                                 if (!(var->flags & INMEMORY))        /* stack-arg -> register */
 485                                         M_DLD (r, REG_SP, 8 * (parentargs_base + pa) );
 486                                 else {                               /* stack-arg -> spilled  */
 487                                         M_DLD (REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 488                                         M_DST (REG_FTMP1, REG_SP, 8 * r);
 489                                         }
 490                                 }
 491                         }
 492                 }  /* end for */
 493
 494         /* call trace function */
 495
 496         if (runverbose && !isleafmethod) {
 497                 M_LDA (REG_SP, REG_SP, -8);
 498                 p = dseg_addaddress (method);
 499                 M_ALD(REG_ITMP1, REG_PV, p);
 500                 M_AST(REG_ITMP1, REG_SP, 0);
 501                 p = dseg_addaddress ((void*) (builtin_trace_args));
 502                 M_ALD(REG_ITMP3, REG_PV, p);
 503                 M_JSR(REG_RA, REG_ITMP3);
 504                 M_NOP;
 505                 M_LDA(REG_SP, REG_SP, 8);
 506                 }
 507
 508         /* call monitorenter function */
 509
 510 #ifdef USE_THREADS
 511         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 512                 p = dseg_addaddress ((void*) (builtin_monitorenter));
 513                 M_ALD(REG_ITMP3, REG_PV, p);
 514                 M_JSR(REG_RA, REG_ITMP3);
 515                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
 516                 }
 517 #endif
 518         }
 519
 520         /* end of header generation */
 521
 522         /* walk through all basic blocks */
 523
 524         for (bbs = block_count, bptr = block; --bbs >= 0; bptr++) {
 525                 bptr -> mpc = (int)((u1*) mcodeptr - mcodebase);
 526
 527                 if (bptr->flags >= BBREACHED) {
 528
 529                 /* branch resolving */
 530
 531                 {
 532                 branchref *brefs;
 533                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 534                         gen_resolvebranch((u1*) mcodebase + brefs->branchpos,
 535                                           brefs->branchpos, bptr->mpc);
 536                         }
 537                 }
 538
 539                 /* copy interface registers to their destination */
 540
 541                 src = bptr->instack;
 542                 len = bptr->indepth;
 543                 MCODECHECK(64+len);
 544                 while (src != NULL) {
 545                         len--;
 546                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 547                                 d = reg_of_var(src, REG_ITMP1);
 548                                 M_INTMOVE(REG_ITMP1, d);
 549                                 store_reg_to_var_int(src, d);
 550                                 }
 551                         else {
 552                                 d = reg_of_var(src, REG_IFTMP);
 553                                 if ((src->varkind != STACKVAR)) {
 554                                         s2 = src->type;
 555                                         if (IS_FLT_DBL_TYPE(s2)) {
 556                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 557                                                         s1 = interfaces[len][s2].regoff;
 558                                                         M_FLTMOVE(s1,d);
 559                                                         }
 560                                                 else {
 561                                                         M_DLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 562                                                         }
 563                                                 store_reg_to_var_flt(src, d);
 564                                                 }
 565                                         else {
 566                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 567                                                         s1 = interfaces[len][s2].regoff;
 568                                                         M_INTMOVE(s1,d);
 569                                                         }
 570                                                 else {
 571                                                         M_LLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 572                                                         }
 573                                                 store_reg_to_var_int(src, d);
 574                                                 }
 575                                         }
 576                                 }
 577                         src = src->prev;
 578                         }
 579
 580                 /* walk through all instructions */
 581
 582                 src = bptr->instack;
 583                 len = bptr->icount;
 584                 for (iptr = bptr->iinstr;
 585                     len > 0;
 586                     src = iptr->dst, len--, iptr++) {
 587
 588         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 589         switch (iptr->opc) {
 590
 591                 case ICMD_NOP:        /* ...  ==> ...                                 */
 592                         break;
 593
 594                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 595
 596                         var_to_reg_int(s1, src, REG_ITMP1);
 597                         M_BEQZ(s1, 0);
 598                         mcode_addxnullrefs(mcodeptr);
 599                         M_NOP;
 600                         break;
 601
 602                 /* constant operations ************************************************/
 603
 604 #define ICONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_IADD_IMM(REG_ZERO,c,r);} \
 605                     else if(((c)>=0)&&((c)<=0xffff)){M_OR_IMM(REG_ZERO,c,r);} \
 606                     else{a=dseg_adds4(c);M_ILD(r,REG_PV,a);}
 607
 608 #define LCONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LADD_IMM(REG_ZERO,c,r);} \
 609                     else if(((c)>=0)&&((c)<=0xffff)){M_OR_IMM(REG_ZERO,c,r);} \
 610                     else{a=dseg_adds8(c);M_LLD(r,REG_PV,a);}
 611
 612                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 613                                       /* op1 = 0, val.i = constant                    */
 614
 615                         d = reg_of_var(iptr->dst, REG_ITMP1);
 616                         ICONST(d, iptr->val.i);
 617                         store_reg_to_var_int(iptr->dst, d);
 618                         break;
 619
 620                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 621                                       /* op1 = 0, val.l = constant                    */
 622
 623                         d = reg_of_var(iptr->dst, REG_ITMP1);
 624                         LCONST(d, iptr->val.l);
 625                         store_reg_to_var_int(iptr->dst, d);
 626                         break;
 627
 628                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 629                                       /* op1 = 0, val.f = constant                    */
 630
 631                         d = reg_of_var (iptr->dst, REG_FTMP1);
 632                         a = dseg_addfloat (iptr->val.f);
 633                         M_FLD(d, REG_PV, a);
 634                         store_reg_to_var_flt (iptr->dst, d);
 635                         break;
 636
 637                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 638                                       /* op1 = 0, val.d = constant                    */
 639
 640                         d = reg_of_var (iptr->dst, REG_FTMP1);
 641                         a = dseg_adddouble (iptr->val.d);
 642                         M_DLD(d, REG_PV, a);
 643                         store_reg_to_var_flt (iptr->dst, d);
 644                         break;
 645
 646                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 647                                       /* op1 = 0, val.a = constant                    */
 648
 649                         d = reg_of_var(iptr->dst, REG_ITMP1);
 650                         if (iptr->val.a) {
 651                                 a = dseg_addaddress (iptr->val.a);
 652                                 M_ALD(d, REG_PV, a);
 653                                 }
 654                         else {
 655                                 M_INTMOVE(REG_ZERO, d);
 656                                 }
 657                         store_reg_to_var_int(iptr->dst, d);
 658                         break;
 659
 660
 661                 /* load/store operations **********************************************/
 662
 663                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 664                 case ICMD_LLOAD:      /* op1 = local variable                         */
 665                 case ICMD_ALOAD:
 666
 667                         d = reg_of_var(iptr->dst, REG_ITMP1);
 668                         if ((iptr->dst->varkind == LOCALVAR) &&
 669                             (iptr->dst->varnum == iptr->op1))
 670                                 break;
 671                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 672                         if (var->flags & INMEMORY)
 673                                 M_LLD(d, REG_SP, 8 * var->regoff);
 674                         else
 675                                 {M_INTMOVE(var->regoff,d);}
 676                         store_reg_to_var_int(iptr->dst, d);
 677                         break;
 678
 679                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 680                 case ICMD_DLOAD:      /* op1 = local variable                         */
 681
 682                         d = reg_of_var(iptr->dst, REG_FTMP1);
 683                         if ((iptr->dst->varkind == LOCALVAR) &&
 684                             (iptr->dst->varnum == iptr->op1))
 685                                 break;
 686                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 687                         if (var->flags & INMEMORY)
 688                                 M_DLD(d, REG_SP, 8 * var->regoff);
 689                         else
 690                                 {M_FLTMOVE(var->regoff,d);}
 691                         store_reg_to_var_flt(iptr->dst, d);
 692                         break;
 693
 694
 695                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 696                 case ICMD_LSTORE:     /* op1 = local variable                         */
 697                 case ICMD_ASTORE:
 698
 699                         if ((src->varkind == LOCALVAR) &&
 700                             (src->varnum == iptr->op1))
 701                                 break;
 702                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 703                         if (var->flags & INMEMORY) {
 704                                 var_to_reg_int(s1, src, REG_ITMP1);
 705                                 M_LST(s1, REG_SP, 8 * var->regoff);
 706                                 }
 707                         else {
 708                                 var_to_reg_int(s1, src, var->regoff);
 709                                 M_INTMOVE(s1, var->regoff);
 710                                 }
 711                         break;
 712
 713                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 714                 case ICMD_DSTORE:     /* op1 = local variable                         */
 715
 716                         if ((src->varkind == LOCALVAR) &&
 717                             (src->varnum == iptr->op1))
 718                                 break;
 719                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 720                         if (var->flags & INMEMORY) {
 721                                 var_to_reg_flt(s1, src, REG_FTMP1);
 722                                 M_DST(s1, REG_SP, 8 * var->regoff);
 723                                 }
 724                         else {
 725                                 var_to_reg_flt(s1, src, var->regoff);
 726                                 M_FLTMOVE(s1, var->regoff);
 727                                 }
 728                         break;
 729
 730
 731                 /* pop/dup/swap operations ********************************************/
 732
 733                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 734
 735                 case ICMD_POP:        /* ..., value  ==> ...                          */
 736                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 737                         break;
 738
 739 #define M_COPY(from,to) \
 740                         d = reg_of_var(to, REG_IFTMP); \
 741                         if ((from->regoff != to->regoff) || \
 742                             ((from->flags ^ to->flags) & INMEMORY)) { \
 743                                 if (IS_FLT_DBL_TYPE(from->type)) { \
 744                                         var_to_reg_flt(s1, from, d); \
 745                                         M_FLTMOVE(s1,d); \
 746                                         store_reg_to_var_flt(to, d); \
 747                                         }\
 748                                 else { \
 749                                         var_to_reg_int(s1, from, d); \
 750                                         M_INTMOVE(s1,d); \
 751                                         store_reg_to_var_int(to, d); \
 752                                         }\
 753                                 }
 754
 755                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 756                         M_COPY(src, iptr->dst);
 757                         break;
 758
 759                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 760
 761                         M_COPY(src,       iptr->dst->prev->prev);
 762
 763                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 764
 765                         M_COPY(src,       iptr->dst);
 766                         M_COPY(src->prev, iptr->dst->prev);
 767                         break;
 768
 769                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 770
 771                         M_COPY(src->prev,       iptr->dst->prev->prev->prev);
 772
 773                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 774
 775                         M_COPY(src,             iptr->dst);
 776                         M_COPY(src->prev,       iptr->dst->prev);
 777                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 778                         M_COPY(src, iptr->dst->prev->prev->prev);
 779                         break;
 780
 781                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 782
 783                         M_COPY(src,                   iptr->dst);
 784                         M_COPY(src->prev,             iptr->dst->prev);
 785                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 786                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 787                         M_COPY(src,       iptr->dst->prev->prev->prev->prev);
 788                         M_COPY(src->prev, iptr->dst->prev->prev->prev->prev->prev);
 789                         break;
 790
 791                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 792
 793                         M_COPY(src, iptr->dst->prev);
 794                         M_COPY(src->prev, iptr->dst);
 795                         break;
 796
 797
 798                 /* integer operations *************************************************/
 799
 800                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 801
 802                         var_to_reg_int(s1, src, REG_ITMP1);
 803                         d = reg_of_var(iptr->dst, REG_ITMP3);
 804                         M_ISUB(REG_ZERO, s1, d);
 805                         store_reg_to_var_int(iptr->dst, d);
 806                         break;
 807
 808                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 809
 810                         var_to_reg_int(s1, src, REG_ITMP1);
 811                         d = reg_of_var(iptr->dst, REG_ITMP3);
 812                         M_LSUB(REG_ZERO, s1, d);
 813                         store_reg_to_var_int(iptr->dst, d);
 814                         break;
 815
 816                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 817
 818                         var_to_reg_int(s1, src, REG_ITMP1);
 819                         d = reg_of_var(iptr->dst, REG_ITMP3);
 820                         M_INTMOVE(s1, d);
 821                         store_reg_to_var_int(iptr->dst, d);
 822                         break;
 823
 824                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 825
 826                         var_to_reg_int(s1, src, REG_ITMP1);
 827                         d = reg_of_var(iptr->dst, REG_ITMP3);
 828                         M_IADD(s1, REG_ZERO, d );
 829                         store_reg_to_var_int(iptr->dst, d);
 830                         break;
 831
 832                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 833
 834                         var_to_reg_int(s1, src, REG_ITMP1);
 835                         d = reg_of_var(iptr->dst, REG_ITMP3);
 836                         M_LSLL_IMM(s1, 56, d);
 837                         M_LSRA_IMM( d, 56, d);
 838                         store_reg_to_var_int(iptr->dst, d);
 839                         break;
 840
 841                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 842
 843                         var_to_reg_int(s1, src, REG_ITMP1);
 844                         d = reg_of_var(iptr->dst, REG_ITMP3);
 845             M_CZEXT(s1, d);
 846                         store_reg_to_var_int(iptr->dst, d);
 847                         break;
 848
 849                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 850
 851                         var_to_reg_int(s1, src, REG_ITMP1);
 852                         d = reg_of_var(iptr->dst, REG_ITMP3);
 853                         M_LSLL_IMM(s1, 48, d);
 854                         M_LSRA_IMM( d, 48, d);
 855                         store_reg_to_var_int(iptr->dst, d);
 856                         break;
 857
 858
 859                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 860
 861                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 862                         var_to_reg_int(s2, src, REG_ITMP2);
 863                         d = reg_of_var(iptr->dst, REG_ITMP3);
 864                         M_IADD(s1, s2, d);
 865                         store_reg_to_var_int(iptr->dst, d);
 866                         break;
 867
 868                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 869                                       /* val.i = constant                             */
 870
 871                         var_to_reg_int(s1, src, REG_ITMP1);
 872                         d = reg_of_var(iptr->dst, REG_ITMP3);
 873                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
 874                                 M_IADD_IMM(s1, iptr->val.i, d);
 875                                 }
 876                         else {
 877                                 ICONST(REG_ITMP2, iptr->val.i);
 878                                 M_IADD(s1, REG_ITMP2, d);
 879                                 }
 880                         store_reg_to_var_int(iptr->dst, d);
 881                         break;
 882
 883                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 884
 885                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 886                         var_to_reg_int(s2, src, REG_ITMP2);
 887                         d = reg_of_var(iptr->dst, REG_ITMP3);
 888                         M_LADD(s1, s2, d);
 889                         store_reg_to_var_int(iptr->dst, d);
 890                         break;
 891
 892                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 893                                       /* val.l = constant                             */
 894
 895                         var_to_reg_int(s1, src, REG_ITMP1);
 896                         d = reg_of_var(iptr->dst, REG_ITMP3);
 897                         if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
 898                                 M_LADD_IMM(s1, iptr->val.l, d);
 899                                 }
 900                         else {
 901                                 LCONST(REG_ITMP2, iptr->val.l);
 902                                 M_LADD(s1, REG_ITMP2, d);
 903                                 }
 904                         store_reg_to_var_int(iptr->dst, d);
 905                         break;
 906
 907                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 908
 909                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 910                         var_to_reg_int(s2, src, REG_ITMP2);
 911                         d = reg_of_var(iptr->dst, REG_ITMP3);
 912                         M_ISUB(s1, s2, d);
 913                         store_reg_to_var_int(iptr->dst, d);
 914                         break;
 915
 916                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 917                                       /* val.i = constant                             */
 918
 919                         var_to_reg_int(s1, src, REG_ITMP1);
 920                         d = reg_of_var(iptr->dst, REG_ITMP3);
 921                         if ((iptr->val.i >= -32767) && (iptr->val.i <= 32768)) {
 922                                 M_IADD_IMM(s1, -iptr->val.i, d);
 923                                 }
 924                         else {
 925                                 ICONST(REG_ITMP2, iptr->val.i);
 926                                 M_ISUB(s1, REG_ITMP2, d);
 927                                 }
 928                         store_reg_to_var_int(iptr->dst, d);
 929                         break;
 930
 931                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 932
 933                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 934                         var_to_reg_int(s2, src, REG_ITMP2);
 935                         d = reg_of_var(iptr->dst, REG_ITMP3);
 936                         M_LSUB(s1, s2, d);
 937                         store_reg_to_var_int(iptr->dst, d);
 938                         break;
 939
 940                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 941                                       /* val.l = constant                             */
 942
 943                         var_to_reg_int(s1, src, REG_ITMP1);
 944                         d = reg_of_var(iptr->dst, REG_ITMP3);
 945                         if ((iptr->val.l >= -32767) && (iptr->val.l <= 32768)) {
 946                                 M_LADD_IMM(s1, -iptr->val.l, d);
 947                                 }
 948                         else {
 949                                 LCONST(REG_ITMP2, iptr->val.l);
 950                                 M_LSUB(s1, REG_ITMP2, d);
 951                                 }
 952                         store_reg_to_var_int(iptr->dst, d);
 953                         break;
 954
 955                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 956
 957                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 958                         var_to_reg_int(s2, src, REG_ITMP2);
 959                         d = reg_of_var(iptr->dst, REG_ITMP3);
 960                         M_IMUL(s1, s2);
 961                         M_MFLO(d);
 962                         M_NOP;
 963                         M_NOP;
 964                         store_reg_to_var_int(iptr->dst, d);
 965                         break;
 966
 967                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 968                                       /* val.i = constant                             */
 969
 970                         var_to_reg_int(s1, src, REG_ITMP1);
 971                         d = reg_of_var(iptr->dst, REG_ITMP3);
 972                         ICONST(REG_ITMP2, iptr->val.i);
 973                         M_IMUL(s1, REG_ITMP2);
 974                         M_MFLO(d);
 975                         M_NOP;
 976                         M_NOP;
 977                         store_reg_to_var_int(iptr->dst, d);
 978                         break;
 979
 980                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 981
 982                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 983                         var_to_reg_int(s2, src, REG_ITMP2);
 984                         d = reg_of_var(iptr->dst, REG_ITMP3);
 985                         M_LMUL(s1, s2);
 986                         M_MFLO(d);
 987                         M_NOP;
 988                         M_NOP;
 989                         store_reg_to_var_int(iptr->dst, d);
 990                         break;
 991
 992                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
 993                                       /* val.l = constant                             */
 994
 995                         var_to_reg_int(s1, src, REG_ITMP1);
 996                         d = reg_of_var(iptr->dst, REG_ITMP3);
 997                         LCONST(REG_ITMP2, iptr->val.l);
 998                         M_LMUL(s1, REG_ITMP2);
 999                         M_MFLO(d);
1000                         M_NOP;
1001                         M_NOP;
1002                         store_reg_to_var_int(iptr->dst, d);
1003                         break;
1004
1005                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1006
1007                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1008                         var_to_reg_int(s2, src, REG_ITMP2);
1009                         d = reg_of_var(iptr->dst, REG_ITMP3);
1010                         M_IDIV(s1, s2);
1011                         M_MFLO(d);
1012                         M_NOP;
1013                         M_NOP;
1014                         store_reg_to_var_int(iptr->dst, d);
1015                         break;
1016 #if 0
1017                 case ICMD_IDIVCONST:  /* ..., value  ==> ..., value / constant        */
1018                                       /* val.i = constant                             */
1019
1020                         var_to_reg_int(s1, src, REG_ITMP1);
1021                         d = reg_of_var(iptr->dst, REG_ITMP3);
1022                         ICONST(REG_ITMP2, iptr->val.i);
1023                         M_IDIV(s1, REG_ITMP2);
1024                         M_MFLO(d);
1025                         M_NOP;
1026                         M_NOP;
1027                         store_reg_to_var_int(iptr->dst, d);
1028                         break;
1029 #endif
1030                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1031
1032                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1033                         var_to_reg_int(s2, src, REG_ITMP2);
1034                         d = reg_of_var(iptr->dst, REG_ITMP3);
1035                         M_LDIV(s1, s2);
1036                         M_MFLO(d);
1037                         M_NOP;
1038                         M_NOP;
1039                         store_reg_to_var_int(iptr->dst, d);
1040                         break;
1041 #if 0
1042                 case ICMD_LDIVCONST:  /* ..., value  ==> ..., value / constant        */
1043                                       /* val.l = constant                             */
1044
1045                         var_to_reg_int(s1, src, REG_ITMP1);
1046                         d = reg_of_var(iptr->dst, REG_ITMP3);
1047                         LCONST(REG_ITMP2, iptr->val.l);
1048                         M_LDIV(s1, REG_ITMP2);
1049                         M_MFLO(d);
1050                         M_NOP;
1051                         M_NOP;
1052                         store_reg_to_var_int(iptr->dst, d);
1053                         break;
1054 #endif
1055                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1056
1057                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1058                         var_to_reg_int(s2, src, REG_ITMP2);
1059                         d = reg_of_var(iptr->dst, REG_ITMP3);
1060                         M_IDIV(s1, s2);
1061                         M_MFHI(d);
1062                         M_NOP;
1063                         M_NOP;
1064                         store_reg_to_var_int(iptr->dst, d);
1065                         break;
1066 #if 0
1067                 case ICMD_IREMCONST:  /* ..., value  ==> ..., value % constant        */
1068                                       /* val.i = constant                             */
1069
1070                         var_to_reg_int(s1, src, REG_ITMP1);
1071                         d = reg_of_var(iptr->dst, REG_ITMP3);
1072                         ICONST(REG_ITMP2, iptr->val.i);
1073                         M_IDIV(s1, REG_ITMP2);
1074                         M_MFHI(d);
1075                         M_NOP;
1076                         M_NOP;
1077                         store_reg_to_var_int(iptr->dst, d);
1078                         break;
1079 #endif
1080                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1081
1082                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1083                         var_to_reg_int(s2, src, REG_ITMP2);
1084                         d = reg_of_var(iptr->dst, REG_ITMP3);
1085                         M_LDIV(s1, s2);
1086                         M_MFHI(d);
1087                         M_NOP;
1088                         M_NOP;
1089                         store_reg_to_var_int(iptr->dst, d);
1090                         break;
1091 #if 0
1092                 case ICMD_LREMCONST:  /* ..., value  ==> ..., value % constant        */
1093                                       /* val.l = constant                             */
1094
1095                         var_to_reg_int(s1, src, REG_ITMP1);
1096                         d = reg_of_var(iptr->dst, REG_ITMP3);
1097                         LCONST(REG_ITMP2, iptr->val.l);
1098                         M_LDIV(s1, REG_ITMP2);
1099                         M_MFHI(d);
1100                         M_NOP;
1101                         M_NOP;
1102                         store_reg_to_var_int(iptr->dst, d);
1103                         break;
1104 #endif
1105                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
1106                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
1107
1108                         var_to_reg_int(s1, src, REG_ITMP1);
1109                         d = reg_of_var(iptr->dst, REG_ITMP3);
1110                         M_LSRA_IMM(s1, 63, REG_ITMP2);
1111                         M_LSRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
1112                         M_LADD(s1, REG_ITMP2, REG_ITMP2);
1113                         M_LSRA_IMM(REG_ITMP2, iptr->val.i, d);
1114                         store_reg_to_var_int(iptr->dst, d);
1115                         break;
1116
1117                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1118
1119                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1120                         var_to_reg_int(s2, src, REG_ITMP2);
1121                         d = reg_of_var(iptr->dst, REG_ITMP3);
1122                         M_ISLL(s1, s2, d);
1123                         store_reg_to_var_int(iptr->dst, d);
1124                         break;
1125
1126                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1127                                       /* val.i = constant                             */
1128
1129                         var_to_reg_int(s1, src, REG_ITMP1);
1130                         d = reg_of_var(iptr->dst, REG_ITMP3);
1131                         M_ISLL_IMM(s1, iptr->val.i, d);
1132                         store_reg_to_var_int(iptr->dst, d);
1133                         break;
1134
1135                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1136
1137                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1138                         var_to_reg_int(s2, src, REG_ITMP2);
1139                         d = reg_of_var(iptr->dst, REG_ITMP3);
1140                         M_ISRA(s1, s2, d);
1141                         store_reg_to_var_int(iptr->dst, d);
1142                         break;
1143
1144                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1145                                       /* val.i = constant                             */
1146
1147                         var_to_reg_int(s1, src, REG_ITMP1);
1148                         d = reg_of_var(iptr->dst, REG_ITMP3);
1149                         M_ISRA_IMM(s1, iptr->val.i, d);
1150                         store_reg_to_var_int(iptr->dst, d);
1151                         break;
1152
1153                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1154
1155                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1156                         var_to_reg_int(s2, src, REG_ITMP2);
1157                         d = reg_of_var(iptr->dst, REG_ITMP3);
1158                         M_ISRL(s1, s2, d);
1159                         store_reg_to_var_int(iptr->dst, d);
1160                         break;
1161
1162                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1163                                       /* val.i = constant                             */
1164
1165                         var_to_reg_int(s1, src, REG_ITMP1);
1166                         d = reg_of_var(iptr->dst, REG_ITMP3);
1167                         M_ISRL_IMM(s1, iptr->val.i, d);
1168                         store_reg_to_var_int(iptr->dst, d);
1169                         break;
1170
1171                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1172
1173                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1174                         var_to_reg_int(s2, src, REG_ITMP2);
1175                         d = reg_of_var(iptr->dst, REG_ITMP3);
1176                         M_LSLL(s1, s2, d);
1177                         store_reg_to_var_int(iptr->dst, d);
1178                         break;
1179
1180                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1181                                       /* val.l = constant                             */
1182
1183                         var_to_reg_int(s1, src, REG_ITMP1);
1184                         d = reg_of_var(iptr->dst, REG_ITMP3);
1185                         M_LSLL_IMM(s1, iptr->val.l, d);
1186                         store_reg_to_var_int(iptr->dst, d);
1187                         break;
1188
1189                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1190
1191                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1192                         var_to_reg_int(s2, src, REG_ITMP2);
1193                         d = reg_of_var(iptr->dst, REG_ITMP3);
1194                         M_LSRA(s1, s2, d);
1195                         store_reg_to_var_int(iptr->dst, d);
1196                         break;
1197
1198                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1199                                       /* val.l = constant                             */
1200
1201                         var_to_reg_int(s1, src, REG_ITMP1);
1202                         d = reg_of_var(iptr->dst, REG_ITMP3);
1203                         M_LSRA_IMM(s1, iptr->val.l, d);
1204                         store_reg_to_var_int(iptr->dst, d);
1205                         break;
1206
1207                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1208
1209                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1210                         var_to_reg_int(s2, src, REG_ITMP2);
1211                         d = reg_of_var(iptr->dst, REG_ITMP3);
1212                         M_LSRL(s1, s2, d);
1213                         store_reg_to_var_int(iptr->dst, d);
1214                         break;
1215
1216                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1217                                       /* val.l = constant                             */
1218
1219                         var_to_reg_int(s1, src, REG_ITMP1);
1220                         d = reg_of_var(iptr->dst, REG_ITMP3);
1221                         M_LSRL_IMM(s1, iptr->val.l, d);
1222                         store_reg_to_var_int(iptr->dst, d);
1223                         break;
1224
1225                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1226                 case ICMD_LAND:
1227
1228                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1229                         var_to_reg_int(s2, src, REG_ITMP2);
1230                         d = reg_of_var(iptr->dst, REG_ITMP3);
1231                         M_AND(s1, s2, d);
1232                         store_reg_to_var_int(iptr->dst, d);
1233                         break;
1234
1235                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1236                                       /* val.i = constant                             */
1237
1238                         var_to_reg_int(s1, src, REG_ITMP1);
1239                         d = reg_of_var(iptr->dst, REG_ITMP3);
1240                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1241                                 M_AND_IMM(s1, iptr->val.i, d);
1242                                 }
1243                         else {
1244                                 ICONST(REG_ITMP2, iptr->val.i);
1245                                 M_AND(s1, REG_ITMP2, d);
1246                                 }
1247                         store_reg_to_var_int(iptr->dst, d);
1248                         break;
1249
1250                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1251                                       /* val.i = constant                             */
1252
1253                         var_to_reg_int(s1, src, REG_ITMP1);
1254                         d = reg_of_var(iptr->dst, REG_ITMP3);
1255                         if (s1 == d) {
1256                                 M_MOV(s1, REG_ITMP1);
1257                                 s1 = REG_ITMP1;
1258                                 }
1259                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1260                                 M_AND_IMM(s1, iptr->val.i, d);
1261                                 M_BGEZ(s1, 4);
1262                                 M_NOP;
1263                                 M_ISUB(REG_ZERO, s1, d);
1264                                 M_AND_IMM(d, iptr->val.i, d);
1265                                 }
1266                         else {
1267                                 ICONST(REG_ITMP2, iptr->val.i);
1268                                 M_AND(s1, REG_ITMP2, d);
1269                                 M_BGEZ(s1, 4);
1270                                 M_NOP;
1271                                 M_ISUB(REG_ZERO, s1, d);
1272                                 M_AND(d, REG_ITMP2, d);
1273                                 }
1274                         M_ISUB(REG_ZERO, d, d);
1275                         store_reg_to_var_int(iptr->dst, d);
1276                         break;
1277
1278                 case ICMD_IREM0X10001:  /* ..., value  ==> ..., value % 0x100001      */
1279
1280 /*          b = value & 0xffff;
1281                         a = value >> 16;
1282                         a = ((b - a) & 0xffff) + (b < a);
1283 */
1284                         var_to_reg_int(s1, src, REG_ITMP1);
1285                         d = reg_of_var(iptr->dst, REG_ITMP3);
1286                         if (s1 == d) {
1287                                 M_MOV(s1, REG_ITMP3);
1288                                 s1 = REG_ITMP3;
1289                                 }
1290                         M_BLTZ(s1, 7);
1291             M_CZEXT(s1, REG_ITMP2);                             /* delay slot */
1292                         M_ISRA_IMM(s1, 16, d);
1293                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1294                         M_ISUB(REG_ITMP2, d, d);
1295             M_CZEXT(d, d);
1296                         M_BR(7);
1297                         M_IADD(d, REG_ITMP1, d);                            /* delay slot */
1298
1299                         M_LUI(REG_ITMP2, 1);
1300                         M_IADD_IMM(REG_ITMP2, 1, REG_ITMP2);
1301                         M_IDIV(s1, REG_ITMP2);
1302                         M_MFHI(d);
1303                         M_NOP;
1304                         M_NOP;
1305                         store_reg_to_var_int(iptr->dst, d);
1306                         break;
1307
1308                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1309                                       /* val.l = constant                             */
1310
1311                         var_to_reg_int(s1, src, REG_ITMP1);
1312                         d = reg_of_var(iptr->dst, REG_ITMP3);
1313                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1314                                 M_AND_IMM(s1, iptr->val.l, d);
1315                                 }
1316                         else {
1317                                 LCONST(REG_ITMP2, iptr->val.l);
1318                                 M_AND(s1, REG_ITMP2, d);
1319                                 }
1320                         store_reg_to_var_int(iptr->dst, d);
1321                         break;
1322
1323                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1324                                       /* val.l = constant                             */
1325
1326                         var_to_reg_int(s1, src, REG_ITMP1);
1327                         d = reg_of_var(iptr->dst, REG_ITMP3);
1328                         if (s1 == d) {
1329                                 M_MOV(s1, REG_ITMP1);
1330                                 s1 = REG_ITMP1;
1331                                 }
1332                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1333                                 M_AND_IMM(s1, iptr->val.l, d);
1334                                 M_BGEZ(s1, 4);
1335                                 M_NOP;
1336                                 M_LSUB(REG_ZERO, s1, d);
1337                                 M_AND_IMM(d, iptr->val.l, d);
1338                                 }
1339                         else {
1340                                 LCONST(REG_ITMP2, iptr->val.l);
1341                                 M_AND(s1, REG_ITMP2, d);
1342                                 M_BGEZ(s1, 4);
1343                                 M_NOP;
1344                                 M_LSUB(REG_ZERO, s1, d);
1345                                 M_AND(d, REG_ITMP2, d);
1346                                 }
1347                         M_LSUB(REG_ZERO, d, d);
1348                         store_reg_to_var_int(iptr->dst, d);
1349                         break;
1350
1351                 case ICMD_LREM0X10001:/* ..., value  ==> ..., value % 0x10001         */
1352
1353                         var_to_reg_int(s1, src, REG_ITMP1);
1354                         d = reg_of_var(iptr->dst, REG_ITMP3);
1355                         M_LUI(REG_ITMP2, 1);
1356                         M_LADD_IMM(REG_ITMP2, 1, REG_ITMP2);
1357                         M_LDIV(s1, REG_ITMP2);
1358                         M_MFHI(d);
1359                         M_NOP;
1360                         M_NOP;
1361                         store_reg_to_var_int(iptr->dst, d);
1362                         break;
1363
1364                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1365                 case ICMD_LOR:
1366
1367                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1368                         var_to_reg_int(s2, src, REG_ITMP2);
1369                         d = reg_of_var(iptr->dst, REG_ITMP3);
1370                         M_OR( s1,s2, d);
1371                         store_reg_to_var_int(iptr->dst, d);
1372                         break;
1373
1374                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1375                                       /* val.i = constant                             */
1376
1377                         var_to_reg_int(s1, src, REG_ITMP1);
1378                         d = reg_of_var(iptr->dst, REG_ITMP3);
1379                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1380                                 M_OR_IMM(s1, iptr->val.i, d);
1381                                 }
1382                         else {
1383                                 ICONST(REG_ITMP2, iptr->val.i);
1384                                 M_OR(s1, REG_ITMP2, d);
1385                                 }
1386                         store_reg_to_var_int(iptr->dst, d);
1387                         break;
1388
1389                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1390                                       /* val.l = constant                             */
1391
1392                         var_to_reg_int(s1, src, REG_ITMP1);
1393                         d = reg_of_var(iptr->dst, REG_ITMP3);
1394                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1395                                 M_OR_IMM(s1, iptr->val.l, d);
1396                                 }
1397                         else {
1398                                 LCONST(REG_ITMP2, iptr->val.l);
1399                                 M_OR(s1, REG_ITMP2, d);
1400                                 }
1401                         store_reg_to_var_int(iptr->dst, d);
1402                         break;
1403
1404                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1405                 case ICMD_LXOR:
1406
1407                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1408                         var_to_reg_int(s2, src, REG_ITMP2);
1409                         d = reg_of_var(iptr->dst, REG_ITMP3);
1410                         M_XOR(s1, s2, d);
1411                         store_reg_to_var_int(iptr->dst, d);
1412                         break;
1413
1414                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1415                                       /* val.i = constant                             */
1416
1417                         var_to_reg_int(s1, src, REG_ITMP1);
1418                         d = reg_of_var(iptr->dst, REG_ITMP3);
1419                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1420                                 M_XOR_IMM(s1, iptr->val.i, d);
1421                                 }
1422                         else {
1423                                 ICONST(REG_ITMP2, iptr->val.i);
1424                                 M_XOR(s1, REG_ITMP2, d);
1425                                 }
1426                         store_reg_to_var_int(iptr->dst, d);
1427                         break;
1428
1429                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1430                                       /* val.l = constant                             */
1431
1432                         var_to_reg_int(s1, src, REG_ITMP1);
1433                         d = reg_of_var(iptr->dst, REG_ITMP3);
1434                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1435                                 M_XOR_IMM(s1, iptr->val.l, d);
1436                                 }
1437                         else {
1438                                 LCONST(REG_ITMP2, iptr->val.l);
1439                                 M_XOR(s1, REG_ITMP2, d);
1440                                 }
1441                         store_reg_to_var_int(iptr->dst, d);
1442                         break;
1443
1444
1445                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1446
1447                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1448                         var_to_reg_int(s2, src, REG_ITMP2);
1449                         d = reg_of_var(iptr->dst, REG_ITMP3);
1450                         M_CMPLT(s1, s2, REG_ITMP3);
1451                         M_CMPLT(s2, s1, REG_ITMP1);
1452                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1453                         store_reg_to_var_int(iptr->dst, d);
1454                         break;
1455
1456
1457                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1458                                       /* op1 = variable, val.i = constant             */
1459
1460                         var = &(locals[iptr->op1][TYPE_INT]);
1461                         if (var->flags & INMEMORY) {
1462                                 s1 = REG_ITMP1;
1463                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1464                                 }
1465                         else
1466                                 s1 = var->regoff;
1467                         M_IADD_IMM(s1, iptr->val.i, s1);
1468                         if (var->flags & INMEMORY)
1469                                 M_LST(s1, REG_SP, 8 * var->regoff);
1470                         break;
1471
1472
1473                 /* floating operations ************************************************/
1474
1475                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1476
1477                         var_to_reg_flt(s1, src, REG_FTMP1);
1478                         d = reg_of_var(iptr->dst, REG_FTMP3);
1479                         M_FNEG(s1, d);
1480                         store_reg_to_var_flt(iptr->dst, d);
1481                         break;
1482
1483                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1484
1485                         var_to_reg_flt(s1, src, REG_FTMP1);
1486                         d = reg_of_var(iptr->dst, REG_FTMP3);
1487                         M_DNEG(s1, d);
1488                         store_reg_to_var_flt(iptr->dst, d);
1489                         break;
1490
1491                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1492
1493                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1494                         var_to_reg_flt(s2, src, REG_FTMP2);
1495                         d = reg_of_var(iptr->dst, REG_FTMP3);
1496                         M_FADD(s1, s2, d);
1497                         store_reg_to_var_flt(iptr->dst, d);
1498                         break;
1499
1500                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1501
1502                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1503                         var_to_reg_flt(s2, src, REG_FTMP2);
1504                         d = reg_of_var(iptr->dst, REG_FTMP3);
1505                         M_DADD(s1, s2, d);
1506                         store_reg_to_var_flt(iptr->dst, d);
1507                         break;
1508
1509                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1510
1511                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1512                         var_to_reg_flt(s2, src, REG_FTMP2);
1513                         d = reg_of_var(iptr->dst, REG_FTMP3);
1514                         M_FSUB(s1, s2, d);
1515                         store_reg_to_var_flt(iptr->dst, d);
1516                         break;
1517
1518                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1519
1520                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1521                         var_to_reg_flt(s2, src, REG_FTMP2);
1522                         d = reg_of_var(iptr->dst, REG_FTMP3);
1523                         M_DSUB(s1, s2, d);
1524                         store_reg_to_var_flt(iptr->dst, d);
1525                         break;
1526
1527                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1528
1529                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1530                         var_to_reg_flt(s2, src, REG_FTMP2);
1531                         d = reg_of_var(iptr->dst, REG_FTMP3);
1532                         M_FMUL(s1, s2, d);
1533                         store_reg_to_var_flt(iptr->dst, d);
1534                         break;
1535
1536                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1537
1538                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1539                         var_to_reg_flt(s2, src, REG_FTMP2);
1540                         d = reg_of_var(iptr->dst, REG_FTMP3);
1541                         M_DMUL(s1, s2, d);
1542                         store_reg_to_var_flt(iptr->dst, d);
1543                         break;
1544
1545                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1546
1547                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1548                         var_to_reg_flt(s2, src, REG_FTMP2);
1549                         d = reg_of_var(iptr->dst, REG_FTMP3);
1550                         M_FDIV(s1, s2, d);
1551                         store_reg_to_var_flt(iptr->dst, d);
1552                         break;
1553
1554                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1555
1556                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1557                         var_to_reg_flt(s2, src, REG_FTMP2);
1558                         d = reg_of_var(iptr->dst, REG_FTMP3);
1559                         M_DDIV(s1, s2, d);
1560                         store_reg_to_var_flt(iptr->dst, d);
1561                         break;
1562
1563                 case ICMD_FREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1564
1565                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1566                         var_to_reg_flt(s2, src, REG_FTMP2);
1567                         d = reg_of_var(iptr->dst, REG_FTMP3);
1568                         M_FDIV(s1,s2, REG_FTMP3);
1569                         M_FLOORFL(REG_FTMP3, REG_FTMP3);
1570                         M_CVTLF(REG_FTMP3, REG_FTMP3);
1571                         M_FMUL(REG_FTMP3, s2, REG_FTMP3);
1572                         M_FSUB(s1, REG_FTMP3, d);
1573                         store_reg_to_var_flt(iptr->dst, d);
1574                     break;
1575
1576                 case ICMD_DREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1577
1578                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1579                         var_to_reg_flt(s2, src, REG_FTMP2);
1580                         d = reg_of_var(iptr->dst, REG_FTMP3);
1581                         M_DDIV(s1,s2, REG_FTMP3);
1582                         M_FLOORDL(REG_FTMP3, REG_FTMP3);
1583                         M_CVTLD(REG_FTMP3, REG_FTMP3);
1584                         M_DMUL(REG_FTMP3, s2, REG_FTMP3);
1585                         M_DSUB(s1, REG_FTMP3, d);
1586                         store_reg_to_var_flt(iptr->dst, d);
1587                     break;
1588
1589                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1590                 case ICMD_L2F:
1591                         var_to_reg_int(s1, src, REG_ITMP1);
1592                         d = reg_of_var(iptr->dst, REG_FTMP3);
1593                         M_MOVLD(s1, d);
1594                         M_CVTLF(d, d);
1595                         store_reg_to_var_flt(iptr->dst, d);
1596                         break;
1597
1598                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1599                 case ICMD_L2D:
1600                         var_to_reg_int(s1, src, REG_ITMP1);
1601                         d = reg_of_var(iptr->dst, REG_FTMP3);
1602                         M_MOVLD(s1, d);
1603                         M_CVTLD(d, d);
1604                         store_reg_to_var_flt(iptr->dst, d);
1605                         break;
1606
1607                 case ICMD_F2I:       /* ..., (float) value  ==> ..., (int) value      */
1608
1609                         var_to_reg_flt(s1, src, REG_FTMP1);
1610                         d = reg_of_var(iptr->dst, REG_ITMP3);
1611                         M_CVTFI(s1, REG_FTMP1);
1612                         M_MOVDI(REG_FTMP1, d);
1613                         store_reg_to_var_int(iptr->dst, d);
1614                         break;
1615
1616                 case ICMD_D2I:       /* ..., (double) value  ==> ..., (int) value     */
1617
1618                         var_to_reg_flt(s1, src, REG_FTMP1);
1619                         d = reg_of_var(iptr->dst, REG_ITMP3);
1620                         M_CVTDI(s1, REG_FTMP1);
1621                         M_MOVDI(REG_FTMP1, d);
1622                         store_reg_to_var_int(iptr->dst, d);
1623                         break;
1624
1625                 case ICMD_F2L:       /* ..., (float) value  ==> ..., (long) value     */
1626
1627                         var_to_reg_flt(s1, src, REG_FTMP1);
1628                         d = reg_of_var(iptr->dst, REG_ITMP3);
1629                         M_CVTFL(s1, REG_FTMP1);
1630                         M_MOVDL(REG_FTMP1, d);
1631                         store_reg_to_var_int(iptr->dst, d);
1632                         break;
1633
1634                 case ICMD_D2L:       /* ..., (double) value  ==> ..., (long) value    */
1635
1636                         var_to_reg_flt(s1, src, REG_FTMP1);
1637                         d = reg_of_var(iptr->dst, REG_ITMP3);
1638                         M_CVTDL(s1, REG_FTMP1);
1639                         M_MOVDL(REG_FTMP1, d);
1640                         store_reg_to_var_int(iptr->dst, d);
1641                         break;
1642
1643                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1644
1645                         var_to_reg_flt(s1, src, REG_FTMP1);
1646                         d = reg_of_var(iptr->dst, REG_FTMP3);
1647                         M_CVTFD(s1, d);
1648                         store_reg_to_var_flt(iptr->dst, d);
1649                         break;
1650
1651                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1652
1653                         var_to_reg_flt(s1, src, REG_FTMP1);
1654                         d = reg_of_var(iptr->dst, REG_FTMP3);
1655                         M_CVTDF(s1, d);
1656                         store_reg_to_var_flt(iptr->dst, d);
1657                         break;
1658
1659                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1660
1661                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1662                         var_to_reg_flt(s2, src, REG_FTMP2);
1663                         d = reg_of_var(iptr->dst, REG_ITMP3);
1664                         M_FCMPUEQF(s1, s2);
1665                         M_NOP;                             /* compare delay               */
1666                         M_FBF(2);                          /* jump over next instructions */
1667                         M_LSUB_IMM(REG_ZERO, 1, d);        /* delay slot                  */
1668                         M_CLR(d);
1669                         M_FCMPULTF(s2, s1);
1670                         M_NOP;                             /* compare delay               */
1671                         M_FBF(2);                          /* jump over next instruction  */
1672                         M_NOP;
1673                         M_LADD_IMM(REG_ZERO, 1, d);
1674                         store_reg_to_var_int(iptr->dst, d);
1675                         break;
1676
1677                 case ICMD_DCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1678
1679                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1680                         var_to_reg_flt(s2, src, REG_FTMP2);
1681                         d = reg_of_var(iptr->dst, REG_ITMP3);
1682                         M_FCMPUEQD(s1, s2);
1683                         M_NOP;                             /* compare delay               */
1684                         M_FBF(2);                          /* jump over next instructions */
1685                         M_LSUB_IMM(REG_ZERO, 1, d);        /* delay slot                  */
1686                         M_CLR(d);
1687                         M_FCMPULTD(s2, s1);
1688                         M_NOP;                             /* compare delay               */
1689                         M_FBF(2);                          /* jump over next instruction  */
1690                         M_NOP;
1691                         M_LADD_IMM(REG_ZERO, 1, d);
1692                         store_reg_to_var_int(iptr->dst, d);
1693                         break;
1694
1695                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1696
1697                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1698                         var_to_reg_flt(s2, src, REG_FTMP2);
1699                         d = reg_of_var(iptr->dst, REG_ITMP3);
1700                         M_FCMPUEQF(s1, s2);
1701                         M_NOP;                             /* compare delay               */
1702                         M_FBF(2);                          /* jump over next instruction  */
1703                         M_LADD_IMM(REG_ZERO, 1, d);        /* delay slot                  */
1704                         M_CLR(d);
1705                         M_FCMPULTF(s1, s2);
1706                         M_NOP;                             /* compare delay               */
1707                         M_FBF(2);                          /* jump over next instruction  */
1708                         M_NOP;
1709                         M_LSUB_IMM(REG_ZERO, 1, d);
1710                         store_reg_to_var_int(iptr->dst, d);
1711                         break;
1712
1713                 case ICMD_DCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1714
1715                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1716                         var_to_reg_flt(s2, src, REG_FTMP2);
1717                         d = reg_of_var(iptr->dst, REG_ITMP3);
1718                         M_FCMPUEQD(s1, s2);
1719                         M_NOP;                             /* compare delay               */
1720                         M_FBF(2);                          /* jump over next instruction  */
1721                         M_LADD_IMM(REG_ZERO, 1, d);        /* delay slot                  */
1722                         M_CLR(d);
1723                         M_FCMPULTD(s1, s2);
1724                         M_NOP;                             /* compare delay               */
1725                         M_FBF(2);                          /* jump over next instruction  */
1726                         M_NOP;
1727                         M_LSUB_IMM(REG_ZERO, 1, d);
1728                         store_reg_to_var_int(iptr->dst, d);
1729                         break;
1730
1731
1732                 /* memory operations **************************************************/
1733
1734 #define gen_bound_check \
1735                         if (checkbounds) {\
1736                                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1737                                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
1738                                 M_BEQZ(REG_ITMP3, 0);\
1739                                 mcode_addxboundrefs(mcodeptr);\
1740                                 M_NOP;\
1741                                 }
1742
1743                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1744
1745                         var_to_reg_int(s1, src, REG_ITMP1);
1746                         d = reg_of_var(iptr->dst, REG_ITMP3);
1747                         gen_nullptr_check(s1);
1748                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1749                         store_reg_to_var_int(iptr->dst, d);
1750                         break;
1751
1752                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1753
1754                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1755                         var_to_reg_int(s2, src, REG_ITMP2);
1756                         d = reg_of_var(iptr->dst, REG_ITMP3);
1757                         if (iptr->op1 == 0) {
1758                                 gen_nullptr_check(s1);
1759                                 gen_bound_check;
1760                                 }
1761                         M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
1762                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1763                         M_ALD(d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1764                         store_reg_to_var_int(iptr->dst, d);
1765                         break;
1766
1767                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1768
1769                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1770                         var_to_reg_int(s2, src, REG_ITMP2);
1771                         d = reg_of_var(iptr->dst, REG_ITMP3);
1772                         if (iptr->op1 == 0) {
1773                                 gen_nullptr_check(s1);
1774                                 gen_bound_check;
1775                                 }
1776                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1777                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1778                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1779                         store_reg_to_var_int(iptr->dst, d);
1780                         break;
1781
1782                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1783
1784                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1785                         var_to_reg_int(s2, src, REG_ITMP2);
1786                         d = reg_of_var(iptr->dst, REG_ITMP3);
1787                         if (iptr->op1 == 0) {
1788                                 gen_nullptr_check(s1);
1789                                 gen_bound_check;
1790                                 }
1791                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1792                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1793                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1794                         store_reg_to_var_int(iptr->dst, d);
1795                         break;
1796
1797                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1798
1799                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1800                         var_to_reg_int(s2, src, REG_ITMP2);
1801                         d = reg_of_var(iptr->dst, REG_FTMP3);
1802                         if (iptr->op1 == 0) {
1803                                 gen_nullptr_check(s1);
1804                                 gen_bound_check;
1805                                 }
1806                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1807                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1808                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1809                         store_reg_to_var_flt(iptr->dst, d);
1810                         break;
1811
1812                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1813
1814                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1815                         var_to_reg_int(s2, src, REG_ITMP2);
1816                         d = reg_of_var(iptr->dst, REG_FTMP3);
1817                         if (iptr->op1 == 0) {
1818                                 gen_nullptr_check(s1);
1819                                 gen_bound_check;
1820                                 }
1821                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1822                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1823                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1824                         store_reg_to_var_flt(iptr->dst, d);
1825                         break;
1826
1827                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1828
1829                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1830                         var_to_reg_int(s2, src, REG_ITMP2);
1831                         d = reg_of_var(iptr->dst, REG_ITMP3);
1832                         if (iptr->op1 == 0) {
1833                                 gen_nullptr_check(s1);
1834                                 gen_bound_check;
1835                                 }
1836                         M_AADD(s2, s1, REG_ITMP1);
1837                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
1838                         M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1839                         store_reg_to_var_int(iptr->dst, d);
1840                         break;
1841
1842                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1843
1844                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1845                         var_to_reg_int(s2, src, REG_ITMP2);
1846                         d = reg_of_var(iptr->dst, REG_ITMP3);
1847                         if (iptr->op1 == 0) {
1848                                 gen_nullptr_check(s1);
1849                                 gen_bound_check;
1850                                 }
1851                         M_AADD(s2, s1, REG_ITMP1);
1852                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
1853                         M_SLDS(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1854                         store_reg_to_var_int(iptr->dst, d);
1855                         break;
1856
1857                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1858
1859                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1860                         var_to_reg_int(s2, src, REG_ITMP2);
1861                         d = reg_of_var(iptr->dst, REG_ITMP3);
1862                         if (iptr->op1 == 0) {
1863                                 gen_nullptr_check(s1);
1864                                 gen_bound_check;
1865                                 }
1866                         M_AADD(s2, s1, REG_ITMP1);
1867                         M_BLDS(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1868                         store_reg_to_var_int(iptr->dst, d);
1869                         break;
1870
1871
1872                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1873
1874                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1875                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1876                         if (iptr->op1 == 0) {
1877                                 gen_nullptr_check(s1);
1878                                 gen_bound_check;
1879                                 }
1880                         var_to_reg_int(s3, src, REG_ITMP3);
1881                         M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
1882                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1883                         M_AST(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1884                         break;
1885
1886                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1887
1888                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1889                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1890                         if (iptr->op1 == 0) {
1891                                 gen_nullptr_check(s1);
1892                                 gen_bound_check;
1893                                 }
1894                         var_to_reg_int(s3, src, REG_ITMP3);
1895                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1896                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1897                         M_IST(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1898                         break;
1899
1900                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1901
1902                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1903                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1904                         if (iptr->op1 == 0) {
1905                                 gen_nullptr_check(s1);
1906                                 gen_bound_check;
1907                                 }
1908                         var_to_reg_int(s3, src, REG_ITMP3);
1909                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1910                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1911                         M_LST(s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1912                         break;
1913
1914                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1915
1916                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1917                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1918                         if (iptr->op1 == 0) {
1919                                 gen_nullptr_check(s1);
1920                                 gen_bound_check;
1921                                 }
1922                         var_to_reg_flt(s3, src, REG_FTMP3);
1923                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1924                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1925                         M_FST(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1926                         break;
1927
1928                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1929
1930                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1931                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1932                         if (iptr->op1 == 0) {
1933                                 gen_nullptr_check(s1);
1934                                 gen_bound_check;
1935                                 }
1936                         var_to_reg_flt(s3, src, REG_FTMP3);
1937                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1938                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1939                         M_DST(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1940                         break;
1941
1942                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1943                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1944
1945                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1946                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1947                         if (iptr->op1 == 0) {
1948                                 gen_nullptr_check(s1);
1949                                 gen_bound_check;
1950                                 }
1951                         var_to_reg_int(s3, src, REG_ITMP3);
1952                         M_AADD(s2, s1, REG_ITMP1);
1953                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
1954                         M_SST(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1955                         break;
1956
1957                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1958
1959                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1960                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1961                         if (iptr->op1 == 0) {
1962                                 gen_nullptr_check(s1);
1963                                 gen_bound_check;
1964                                 }
1965                         var_to_reg_int(s3, src, REG_ITMP3);
1966                         M_AADD(s2, s1, REG_ITMP1);
1967                         M_BST(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1968                         break;
1969
1970
1971                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
1972                                       /* op1 = type, val.a = field address            */
1973
1974                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
1975                         M_ALD(REG_ITMP1, REG_PV, a);
1976                         switch (iptr->op1) {
1977                                 case TYPE_INT:
1978                                         var_to_reg_int(s2, src, REG_ITMP2);
1979                                         M_IST(s2, REG_ITMP1, 0);
1980                                         break;
1981                                 case TYPE_LNG:
1982                                         var_to_reg_int(s2, src, REG_ITMP2);
1983                                         M_LST(s2, REG_ITMP1, 0);
1984                                         break;
1985                                 case TYPE_ADR:
1986                                         var_to_reg_int(s2, src, REG_ITMP2);
1987                                         M_AST(s2, REG_ITMP1, 0);
1988                                         break;
1989                                 case TYPE_FLT:
1990                                         var_to_reg_flt(s2, src, REG_FTMP2);
1991                                         M_FST(s2, REG_ITMP1, 0);
1992                                         break;
1993                                 case TYPE_DBL:
1994                                         var_to_reg_flt(s2, src, REG_FTMP2);
1995                                         M_DST(s2, REG_ITMP1, 0);
1996                                         break;
1997                                 default: panic ("internal error");
1998                                 }
1999                         break;
2000
2001                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2002                                       /* op1 = type, val.a = field address            */
2003
2004                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2005                         M_ALD(REG_ITMP1, REG_PV, a);
2006                         switch (iptr->op1) {
2007                                 case TYPE_INT:
2008                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2009                                         M_ILD(d, REG_ITMP1, 0);
2010                                         store_reg_to_var_int(iptr->dst, d);
2011                                         break;
2012                                 case TYPE_LNG:
2013                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2014                                         M_LLD(d, REG_ITMP1, 0);
2015                                         store_reg_to_var_int(iptr->dst, d);
2016                                         break;
2017                                 case TYPE_ADR:
2018                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2019                                         M_ALD(d, REG_ITMP1, 0);
2020                                         store_reg_to_var_int(iptr->dst, d);
2021                                         break;
2022                                 case TYPE_FLT:
2023                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2024                                         M_FLD(d, REG_ITMP1, 0);
2025                                         store_reg_to_var_flt(iptr->dst, d);
2026                                         break;
2027                                 case TYPE_DBL:
2028                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2029                                         M_DLD(d, REG_ITMP1, 0);
2030                                         store_reg_to_var_flt(iptr->dst, d);
2031                                         break;
2032                                 default: panic ("internal error");
2033                                 }
2034                         break;
2035
2036
2037                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2038                                       /* op1 = type, val.i = field offset             */
2039
2040                         a = ((fieldinfo *)(iptr->val.a))->offset;
2041                         switch (iptr->op1) {
2042                                 case TYPE_INT:
2043                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2044                                         var_to_reg_int(s2, src, REG_ITMP2);
2045                                         gen_nullptr_check(s1);
2046                                         M_IST(s2, s1, a);
2047                                         break;
2048                                 case TYPE_LNG:
2049                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2050                                         var_to_reg_int(s2, src, REG_ITMP2);
2051                                         gen_nullptr_check(s1);
2052                                         M_LST(s2, s1, a);
2053                                         break;
2054                                 case TYPE_ADR:
2055                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2056                                         var_to_reg_int(s2, src, REG_ITMP2);
2057                                         gen_nullptr_check(s1);
2058                                         M_AST(s2, s1, a);
2059                                         break;
2060                                 case TYPE_FLT:
2061                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2062                                         var_to_reg_flt(s2, src, REG_FTMP2);
2063                                         gen_nullptr_check(s1);
2064                                         M_FST(s2, s1, a);
2065                                         break;
2066                                 case TYPE_DBL:
2067                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2068                                         var_to_reg_flt(s2, src, REG_FTMP2);
2069                                         gen_nullptr_check(s1);
2070                                         M_DST(s2, s1, a);
2071                                         break;
2072                                 default: panic ("internal error");
2073                                 }
2074                         break;
2075
2076                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2077                                       /* op1 = type, val.i = field offset             */
2078
2079                         a = ((fieldinfo *)(iptr->val.a))->offset;
2080                         switch (iptr->op1) {
2081                                 case TYPE_INT:
2082                                         var_to_reg_int(s1, src, REG_ITMP1);
2083                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2084                                         gen_nullptr_check(s1);
2085                                         M_ILD(d, s1, a);
2086                                         store_reg_to_var_int(iptr->dst, d);
2087                                         break;
2088                                 case TYPE_LNG:
2089                                         var_to_reg_int(s1, src, REG_ITMP1);
2090                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2091                                         gen_nullptr_check(s1);
2092                                         M_LLD(d, s1, a);
2093                                         store_reg_to_var_int(iptr->dst, d);
2094                                         break;
2095                                 case TYPE_ADR:
2096                                         var_to_reg_int(s1, src, REG_ITMP1);
2097                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2098                                         gen_nullptr_check(s1);
2099                                         M_ALD(d, s1, a);
2100                                         store_reg_to_var_int(iptr->dst, d);
2101                                         break;
2102                                 case TYPE_FLT:
2103                                         var_to_reg_int(s1, src, REG_ITMP1);
2104                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2105                                         gen_nullptr_check(s1);
2106                                         M_FLD(d, s1, a);
2107                                         store_reg_to_var_flt(iptr->dst, d);
2108                                         break;
2109                                 case TYPE_DBL:
2110                                         var_to_reg_int(s1, src, REG_ITMP1);
2111                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2112                                         gen_nullptr_check(s1);
2113                                         M_DLD(d, s1, a);
2114                                         store_reg_to_var_flt(iptr->dst, d);
2115                                         break;
2116                                 default: panic ("internal error");
2117                                 }
2118                         break;
2119
2120
2121                 /* branch operations **************************************************/
2122
2123 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2124
2125                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2126
2127                         var_to_reg_int(s1, src, REG_ITMP1);
2128                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2129                         a = dseg_addaddress(asm_handle_exception);
2130                         M_ALD(REG_ITMP2, REG_PV, a);
2131                         M_JSR(REG_ITMP2_XPC, REG_ITMP2);
2132                         M_NOP;
2133                         ALIGNCODENOP;
2134                         break;
2135
2136                 case ICMD_GOTO:         /* ... ==> ...                                */
2137                                         /* op1 = target JavaVM pc                     */
2138                         M_BR(0);
2139                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2140                         M_NOP;
2141                         ALIGNCODENOP;
2142                         break;
2143
2144                 case ICMD_JSR:          /* ... ==> ...                                */
2145                                         /* op1 = target JavaVM pc                     */
2146
2147                         dseg_addtarget(BlockPtrOfPC(iptr->op1));
2148                         M_ALD(REG_ITMP1, REG_PV, -dseglen);
2149                         M_JSR(REG_ITMP1, REG_ITMP1);        /* REG_ITMP1 = return address */
2150                         M_NOP;
2151                         break;
2152
2153                 case ICMD_RET:          /* ... ==> ...                                */
2154                                         /* op1 = local variable                       */
2155
2156                         var = &(locals[iptr->op1][TYPE_ADR]);
2157                         if (var->flags & INMEMORY) {
2158                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2159                                 M_RET(REG_ITMP1);
2160                                 }
2161                         else
2162                                 M_RET(var->regoff);
2163                         M_NOP;
2164                         ALIGNCODENOP;
2165                         break;
2166
2167                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2168                                         /* op1 = target JavaVM pc                     */
2169
2170                         var_to_reg_int(s1, src, REG_ITMP1);
2171                         M_BEQZ(s1, 0);
2172                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2173                         M_NOP;
2174                         break;
2175
2176                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2177                                         /* op1 = target JavaVM pc                     */
2178
2179                         var_to_reg_int(s1, src, REG_ITMP1);
2180                         M_BNEZ(s1, 0);
2181                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2182                         M_NOP;
2183                         break;
2184
2185                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2186                                         /* op1 = target JavaVM pc, val.i = constant   */
2187
2188                         var_to_reg_int(s1, src, REG_ITMP1);
2189                         if (iptr->val.i == 0) {
2190                                 M_BEQZ(s1, 0);
2191                                 }
2192                         else {
2193                                 ICONST(REG_ITMP2, iptr->val.i);
2194                                 M_BEQ(s1, REG_ITMP2, 0);
2195                                 }
2196                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2197                         M_NOP;
2198                         break;
2199
2200                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2201                                         /* op1 = target JavaVM pc, val.i = constant   */
2202
2203                         var_to_reg_int(s1, src, REG_ITMP1);
2204                         if (iptr->val.i == 0) {
2205                                 M_BLTZ(s1, 0);
2206                                 }
2207                         else {
2208                                 if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
2209                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2210                                         }
2211                                 else {
2212                                         ICONST(REG_ITMP2, iptr->val.i);
2213                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2214                                         }
2215                                 M_BNEZ(REG_ITMP1, 0);
2216                                 }
2217                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2218                         M_NOP;
2219                         break;
2220
2221                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2222                                         /* op1 = target JavaVM pc, val.i = constant   */
2223
2224                         var_to_reg_int(s1, src, REG_ITMP1);
2225                         if (iptr->val.i == 0) {
2226                                 M_BLEZ(s1, 0);
2227                                 }
2228                         else {
2229                                 if ((iptr->val.i >= -32769) && (iptr->val.i <= 32766)) {
2230                                         M_CMPLT_IMM(s1, iptr->val.i + 1, REG_ITMP1);
2231                                         M_BNEZ(REG_ITMP1, 0);
2232                                         }
2233                                 else {
2234                                         ICONST(REG_ITMP2, iptr->val.i);
2235                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2236                                         M_BEQZ(REG_ITMP1, 0);
2237                                         }
2238                                 }
2239                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2240                         M_NOP;
2241                         break;
2242
2243                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2244                                         /* op1 = target JavaVM pc, val.i = constant   */
2245
2246                         var_to_reg_int(s1, src, REG_ITMP1);
2247                         if (iptr->val.i == 0) {
2248                                 M_BNEZ(s1, 0);
2249                                 }
2250                         else {
2251                                 ICONST(REG_ITMP2, iptr->val.i);
2252                                 M_BNE(s1, REG_ITMP2, 0);
2253                                 }
2254                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2255                         M_NOP;
2256                         break;
2257
2258                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2259                                         /* op1 = target JavaVM pc, val.i = constant   */
2260
2261                         var_to_reg_int(s1, src, REG_ITMP1);
2262                         if (iptr->val.i == 0) {
2263                                 M_BGTZ(s1, 0);
2264                                 }
2265                         else {
2266                                 if ((iptr->val.i >= -32769) && (iptr->val.i <= 32766)) {
2267                                         M_CMPLT_IMM(s1, iptr->val.i + 1, REG_ITMP1);
2268                                         M_BEQZ(REG_ITMP1, 0);
2269                                         }
2270                                 else {
2271                                         ICONST(REG_ITMP2, iptr->val.i);
2272                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2273                                         M_BNEZ(REG_ITMP1, 0);
2274                                         }
2275                                 }
2276                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2277                         M_NOP;
2278                         break;
2279
2280                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2281                                         /* op1 = target JavaVM pc, val.i = constant   */
2282
2283                         var_to_reg_int(s1, src, REG_ITMP1);
2284                         if (iptr->val.i == 0) {
2285                                 M_BGEZ(s1, 0);
2286                                 }
2287                         else {
2288                                 if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
2289                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2290                                         }
2291                                 else {
2292                                         ICONST(REG_ITMP2, iptr->val.i);
2293                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2294                                         }
2295                                 M_BEQZ(REG_ITMP1, 0);
2296                                 }
2297                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2298                         M_NOP;
2299                         break;
2300
2301                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2302                                         /* op1 = target JavaVM pc, val.l = constant   */
2303
2304                         var_to_reg_int(s1, src, REG_ITMP1);
2305                         if (iptr->val.l == 0) {
2306                                 M_BEQZ(s1, 0);
2307                                 }
2308                         else {
2309                                 LCONST(REG_ITMP2, iptr->val.l);
2310                                 M_BEQ(s1, REG_ITMP2, 0);
2311                                 }
2312                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2313                         M_NOP;
2314                         break;
2315
2316                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2317                                         /* op1 = target JavaVM pc, val.l = constant   */
2318
2319                         var_to_reg_int(s1, src, REG_ITMP1);
2320                         if (iptr->val.l == 0) {
2321                                 M_BLTZ(s1, 0);
2322                                 }
2323                         else {
2324                                 if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
2325                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2326                                         }
2327                                 else {
2328                                         LCONST(REG_ITMP2, iptr->val.l);
2329                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2330                                         }
2331                                 M_BNEZ(REG_ITMP1, 0);
2332                                 }
2333                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2334                         M_NOP;
2335                         break;
2336
2337                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2338                                         /* op1 = target JavaVM pc, val.l = constant   */
2339
2340                         var_to_reg_int(s1, src, REG_ITMP1);
2341                         if (iptr->val.l == 0) {
2342                                 M_BLEZ(s1, 0);
2343                                 }
2344                         else {
2345                                 if ((iptr->val.l >= -32769) && (iptr->val.l <= 32766)) {
2346                                         M_CMPLT_IMM(s1, iptr->val.l + 1, REG_ITMP1);
2347                                         M_BNEZ(REG_ITMP1, 0);
2348                                         }
2349                                 else {
2350                                         LCONST(REG_ITMP2, iptr->val.l);
2351                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2352                                         M_BEQZ(REG_ITMP1, 0);
2353                                         }
2354                                 }
2355                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2356                         M_NOP;
2357                         break;
2358
2359                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2360                                         /* op1 = target JavaVM pc, val.l = constant   */
2361
2362                         var_to_reg_int(s1, src, REG_ITMP1);
2363                         if (iptr->val.l == 0) {
2364                                 M_BNEZ(s1, 0);
2365                                 }
2366                         else {
2367                                 LCONST(REG_ITMP2, iptr->val.l);
2368                                 M_BNE(s1, REG_ITMP2, 0);
2369                                 }
2370                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2371                         M_NOP;
2372                         break;
2373
2374                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2375                                         /* op1 = target JavaVM pc, val.l = constant   */
2376
2377                         var_to_reg_int(s1, src, REG_ITMP1);
2378                         if (iptr->val.l == 0) {
2379                                 M_BGTZ(s1, 0);
2380                                 }
2381                         else {
2382                                 if ((iptr->val.l >= -32769) && (iptr->val.l <= 32766)) {
2383                                         M_CMPLT_IMM(s1, iptr->val.l + 1, REG_ITMP1);
2384                                         M_BEQZ(REG_ITMP1, 0);
2385                                         }
2386                                 else {
2387                                         LCONST(REG_ITMP2, iptr->val.l);
2388                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2389                                         M_BNEZ(REG_ITMP1, 0);
2390                                         }
2391                                 }
2392                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2393                         M_NOP;
2394                         break;
2395
2396                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2397                                         /* op1 = target JavaVM pc, val.l = constant   */
2398
2399                         var_to_reg_int(s1, src, REG_ITMP1);
2400                         if (iptr->val.l == 0) {
2401                                 M_BGEZ(s1, 0);
2402                                 }
2403                         else {
2404                                 if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
2405                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2406                                         }
2407                                 else {
2408                                         LCONST(REG_ITMP2, iptr->val.l);
2409                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2410                                         }
2411                                 M_BEQZ(REG_ITMP1, 0);
2412                                 }
2413                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2414                         M_NOP;
2415                         break;
2416
2417                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2418                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2419                 case ICMD_IF_ACMPEQ:
2420
2421                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2422                         var_to_reg_int(s2, src, REG_ITMP2);
2423                         M_BEQ(s1, s2, 0);
2424                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2425                         M_NOP;
2426                         break;
2427
2428                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2429                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2430                 case ICMD_IF_ACMPNE:
2431
2432                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2433                         var_to_reg_int(s2, src, REG_ITMP2);
2434                         M_BNE(s1, s2, 0);
2435                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2436                         M_NOP;
2437                         break;
2438
2439                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2440                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2441
2442                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2443                         var_to_reg_int(s2, src, REG_ITMP2);
2444                         M_CMPLT(s1, s2, REG_ITMP1);
2445                         M_BNEZ(REG_ITMP1, 0);
2446                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2447                         M_NOP;
2448                         break;
2449
2450                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2451                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2452
2453                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2454                         var_to_reg_int(s2, src, REG_ITMP2);
2455                         M_CMPGT(s1, s2, REG_ITMP1);
2456                         M_BNEZ(REG_ITMP1, 0);
2457                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2458                         M_NOP;
2459                         break;
2460
2461                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2462                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2463
2464                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2465                         var_to_reg_int(s2, src, REG_ITMP2);
2466                         M_CMPGT(s1, s2, REG_ITMP1);
2467                         M_BEQZ(REG_ITMP1, 0);
2468                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2469                         M_NOP;
2470                         break;
2471
2472                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2473                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2474
2475                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2476                         var_to_reg_int(s2, src, REG_ITMP2);
2477                         M_CMPLT(s1, s2, REG_ITMP1);
2478                         M_BEQZ(REG_ITMP1, 0);
2479                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2480                         M_NOP;
2481                         break;
2482
2483 #ifdef CONDITIONAL_LOADCONST
2484                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2485
2486                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2487                         break;
2488
2489                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2490                                         /* val.i = constant                           */
2491
2492                         var_to_reg_int(s1, src, REG_ITMP1);
2493                         d = reg_of_var(iptr->dst, REG_ITMP3);
2494                         a = iptr->val.i;
2495                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2496                                 if ((a == 1) && (iptr[1].val.i == 0)) {
2497                                         M_CMPEQ(s1, REG_ZERO, d);
2498                                         store_reg_to_var_int(iptr->dst, d);
2499                                         break;
2500                                         }
2501                                 if ((a == 0) && (iptr[1].val.i == 1)) {
2502                                         M_CMPEQ(s1, REG_ZERO, d);
2503                                         M_XOR_IMM(d, 1, d);
2504                                         store_reg_to_var_int(iptr->dst, d);
2505                                         break;
2506                                         }
2507                                 if (s1 == d) {
2508                                         M_MOV(s1, REG_ITMP1);
2509                                         s1 = REG_ITMP1;
2510                                         }
2511                                 ICONST(d, iptr[1].val.i);
2512                                 }
2513                         if ((a >= 0) && (a <= 255)) {
2514                                 M_CMOVEQ_IMM(s1, a, d);
2515                                 }
2516                         else {
2517                                 ICONST(REG_ITMP2, a);
2518                                 M_CMOVEQ(s1, REG_ITMP2, d);
2519                                 }
2520                         store_reg_to_var_int(iptr->dst, d);
2521                         break;
2522
2523                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2524                                         /* val.i = constant                           */
2525
2526                         var_to_reg_int(s1, src, REG_ITMP1);
2527                         d = reg_of_var(iptr->dst, REG_ITMP3);
2528                         a = iptr->val.i;
2529                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2530                                 if ((a == 0) && (iptr[1].val.i == 1)) {
2531                                         M_CMPEQ(s1, REG_ZERO, d);
2532                                         store_reg_to_var_int(iptr->dst, d);
2533                                         break;
2534                                         }
2535                                 if ((a == 1) && (iptr[1].val.i == 0)) {
2536                                         M_CMPEQ(s1, REG_ZERO, d);
2537                                         M_XOR_IMM(d, 1, d);
2538                                         store_reg_to_var_int(iptr->dst, d);
2539                                         break;
2540                                         }
2541                                 if (s1 == d) {
2542                                         M_MOV(s1, REG_ITMP1);
2543                                         s1 = REG_ITMP1;
2544                                         }
2545                                 ICONST(d, iptr[1].val.i);
2546                                 }
2547                         if ((a >= 0) && (a <= 255)) {
2548                                 M_CMOVNE_IMM(s1, a, d);
2549                                 }
2550                         else {
2551                                 ICONST(REG_ITMP2, a);
2552                                 M_CMOVNE(s1, REG_ITMP2, d);
2553                                 }
2554                         store_reg_to_var_int(iptr->dst, d);
2555                         break;
2556
2557                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2558                                         /* val.i = constant                           */
2559
2560                         var_to_reg_int(s1, src, REG_ITMP1);
2561                         d = reg_of_var(iptr->dst, REG_ITMP3);
2562                         a = iptr->val.i;
2563                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2564                                 if ((a == 1) && (iptr[1].val.i == 0)) {
2565                                         M_CMPLT(s1, REG_ZERO, d);
2566                                         store_reg_to_var_int(iptr->dst, d);
2567                                         break;
2568                                         }
2569                                 if ((a == 0) && (iptr[1].val.i == 1)) {
2570                                         M_CMPLE(REG_ZERO, s1, d);
2571                                         store_reg_to_var_int(iptr->dst, d);
2572                                         break;
2573                                         }
2574                                 if (s1 == d) {
2575                                         M_MOV(s1, REG_ITMP1);
2576                                         s1 = REG_ITMP1;
2577                                         }
2578                                 ICONST(d, iptr[1].val.i);
2579                                 }
2580                         if ((a >= 0) && (a <= 255)) {
2581                                 M_CMOVLT_IMM(s1, a, d);
2582                                 }
2583                         else {
2584                                 ICONST(REG_ITMP2, a);
2585                                 M_CMOVLT(s1, REG_ITMP2, d);
2586                                 }
2587                         store_reg_to_var_int(iptr->dst, d);
2588                         break;
2589
2590                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2591                                         /* val.i = constant                           */
2592
2593                         var_to_reg_int(s1, src, REG_ITMP1);
2594                         d = reg_of_var(iptr->dst, REG_ITMP3);
2595                         a = iptr->val.i;
2596                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2597                                 if ((a == 1) && (iptr[1].val.i == 0)) {
2598                                         M_CMPLE(REG_ZERO, s1, d);
2599                                         store_reg_to_var_int(iptr->dst, d);
2600                                         break;
2601                                         }
2602                                 if ((a == 0) && (iptr[1].val.i == 1)) {
2603                                         M_CMPLT(s1, REG_ZERO, d);
2604                                         store_reg_to_var_int(iptr->dst, d);
2605                                         break;
2606                                         }
2607                                 if (s1 == d) {
2608                                         M_MOV(s1, REG_ITMP1);
2609                                         s1 = REG_ITMP1;
2610                                         }
2611                                 ICONST(d, iptr[1].val.i);
2612                                 }
2613                         if ((a >= 0) && (a <= 255)) {
2614                                 M_CMOVGE_IMM(s1, a, d);
2615                                 }
2616                         else {
2617                                 ICONST(REG_ITMP2, a);
2618                                 M_CMOVGE(s1, REG_ITMP2, d);
2619                                 }
2620                         store_reg_to_var_int(iptr->dst, d);
2621                         break;
2622
2623                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2624                                         /* val.i = constant                           */
2625
2626                         var_to_reg_int(s1, src, REG_ITMP1);
2627                         d = reg_of_var(iptr->dst, REG_ITMP3);
2628                         a = iptr->val.i;
2629                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2630                                 if ((a == 1) && (iptr[1].val.i == 0)) {
2631                                         M_CMPLT(REG_ZERO, s1, d);
2632                                         store_reg_to_var_int(iptr->dst, d);
2633                                         break;
2634                                         }
2635                                 if ((a == 0) && (iptr[1].val.i == 1)) {
2636                                         M_CMPLE(s1, REG_ZERO, d);
2637                                         store_reg_to_var_int(iptr->dst, d);
2638                                         break;
2639                                         }
2640                                 if (s1 == d) {
2641                                         M_MOV(s1, REG_ITMP1);
2642                                         s1 = REG_ITMP1;
2643                                         }
2644                                 ICONST(d, iptr[1].val.i);
2645                                 }
2646                         if ((a >= 0) && (a <= 255)) {
2647                                 M_CMOVGT_IMM(s1, a, d);
2648                                 }
2649                         else {
2650                                 ICONST(REG_ITMP2, a);
2651                                 M_CMOVGT(s1, REG_ITMP2, d);
2652                                 }
2653                         store_reg_to_var_int(iptr->dst, d);
2654                         break;
2655
2656                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2657                                         /* val.i = constant                           */
2658
2659                         var_to_reg_int(s1, src, REG_ITMP1);
2660                         d = reg_of_var(iptr->dst, REG_ITMP3);
2661                         a = iptr->val.i;
2662                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2663                                 if ((a == 1) && (iptr[1].val.i == 0)) {
2664                                         M_CMPLE(s1, REG_ZERO, d);
2665                                         store_reg_to_var_int(iptr->dst, d);
2666                                         break;
2667                                         }
2668                                 if ((a == 0) && (iptr[1].val.i == 1)) {
2669                                         M_CMPLT(REG_ZERO, s1, d);
2670                                         store_reg_to_var_int(iptr->dst, d);
2671                                         break;
2672                                         }
2673                                 if (s1 == d) {
2674                                         M_MOV(s1, REG_ITMP1);
2675                                         s1 = REG_ITMP1;
2676                                         }
2677                                 ICONST(d, iptr[1].val.i);
2678                                 }
2679                         if ((a >= 0) && (a <= 255)) {
2680                                 M_CMOVLE_IMM(s1, a, d);
2681                                 }
2682                         else {
2683                                 ICONST(REG_ITMP2, a);
2684                                 M_CMOVLE(s1, REG_ITMP2, d);
2685                                 }
2686                         store_reg_to_var_int(iptr->dst, d);
2687                         break;
2688 #endif
2689
2690
2691                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2692                 case ICMD_LRETURN:
2693                 case ICMD_ARETURN:
2694
2695 #ifdef USE_THREADS
2696                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2697                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2698                                 M_ALD(REG_ITMP3, REG_PV, a);
2699                                 M_JSR(REG_RA, REG_ITMP3);
2700                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);    /* delay slot */
2701                                 }
2702 #endif
2703                         var_to_reg_int(s1, src, REG_RESULT);
2704                         M_INTMOVE(s1, REG_RESULT);
2705                         goto nowperformreturn;
2706
2707                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2708                 case ICMD_DRETURN:
2709
2710 #ifdef USE_THREADS
2711                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2712                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2713                                 M_ALD(REG_ITMP3, REG_PV, a);
2714                                 M_JSR(REG_RA, REG_ITMP3);
2715                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);    /* delay slot */
2716                                 }
2717 #endif
2718                         var_to_reg_flt(s1, src, REG_FRESULT);
2719                         M_FLTMOVE(s1, REG_FRESULT);
2720                         goto nowperformreturn;
2721
2722                 case ICMD_RETURN:      /* ...  ==> ...                                */
2723
2724 #ifdef USE_THREADS
2725                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2726                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2727                                 M_ALD(REG_ITMP3, REG_PV, a);
2728                                 M_JSR(REG_RA, REG_ITMP3);
2729                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);    /* delay slot */
2730                                 }
2731 #endif
2732
2733 nowperformreturn:
2734                         {
2735                         int r, p;
2736
2737                         p = parentargs_base;
2738
2739                         /* restore return address                                         */
2740
2741                         if (!isleafmethod)
2742                                 {p--;  M_LLD (REG_RA, REG_SP, 8 * p);}
2743
2744                         /* restore saved registers                                        */
2745
2746                         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
2747                                         {p--; M_LLD(savintregs[r], REG_SP, 8 * p);}
2748                         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
2749                                         {p--; M_DLD(savfltregs[r], REG_SP, 8 * p);}
2750
2751                         /* call trace function */
2752
2753                         if (runverbose) {
2754                                 M_LDA (REG_SP, REG_SP, -24);
2755                                 M_LST(REG_RA, REG_SP, 0);
2756                                 M_LST(REG_RESULT, REG_SP, 8);
2757                                 M_DST(REG_FRESULT, REG_SP,16);
2758                                 a = dseg_addaddress (method);
2759                                 M_ALD(argintregs[0], REG_PV, a);
2760                                 M_MOV(REG_RESULT, argintregs[1]);
2761                                 a = dseg_addaddress ((void*) (builtin_displaymethodstop));
2762                                 M_ALD(REG_ITMP3, REG_PV, a);
2763                                 M_JSR (REG_RA, REG_ITMP3);
2764                                 M_FLTMOVE(REG_FRESULT, argfltregs[2]);          /* delay slot */
2765
2766                                 M_LLD(REG_RA, REG_SP, 0);
2767                                 M_LLD(REG_RESULT, REG_SP, 8);
2768                                 M_DLD(REG_FRESULT, REG_SP,16);
2769                                 M_LDA (REG_SP, REG_SP, 24);
2770                                 }
2771
2772                         M_RET(REG_RA);
2773
2774                         /* deallocate stack                                               */
2775
2776                         if (parentargs_base)
2777                                 {M_LDA(REG_SP, REG_SP, parentargs_base*8);}
2778                         else
2779                                 {M_NOP;}
2780                         ALIGNCODENOP;
2781                         }
2782                         break;
2783
2784
2785                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2786                         {
2787                         s4 i, l, *s4ptr;
2788
2789                         s4ptr = iptr->val.a;
2790                         l = s4ptr[1];                          /* low     */
2791                         i = s4ptr[2];                          /* high    */
2792
2793                         var_to_reg_int(s1, src, REG_ITMP1);
2794                         if (l == 0)
2795                                 {M_INTMOVE(s1, REG_ITMP1);}
2796                         else if (l <= 32768) {
2797                                 M_IADD_IMM(s1, -l, REG_ITMP1);
2798                                 }
2799                         else {
2800                                 ICONST(REG_ITMP2, l);
2801                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
2802                                 }
2803                         i = i - l + 1;
2804
2805                         /* range check */
2806
2807                         M_CMPULT_IMM(REG_ITMP1, i, REG_ITMP2);
2808                         M_BEQZ(REG_ITMP2, 0);
2809                         mcode_addreference(BlockPtrOfPC(s4ptr[0]), mcodeptr);
2810                         M_ASLL_IMM(REG_ITMP1, POINTERSHIFT, REG_ITMP1);      /* delay slot*/
2811
2812                         /* build jump table top down and use address of lowest entry */
2813
2814                         s4ptr += 3 + i;
2815                         while (--i >= 0) {
2816                                 dseg_addtarget(BlockPtrOfPC(*--s4ptr));
2817                                 }
2818                         }
2819
2820                         /* length of dataseg after last dseg_addtarget is used by load */
2821
2822                         M_AADD(REG_ITMP1, REG_PV, REG_ITMP2);
2823                         M_ALD(REG_ITMP2, REG_ITMP2, -dseglen);
2824                         M_JMP(REG_ITMP2);
2825                         M_NOP;
2826                         ALIGNCODENOP;
2827                         break;
2828
2829
2830                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2831                         {
2832                         s4 i, l, val, *s4ptr;
2833
2834                         s4ptr = iptr->val.a;
2835                         l = s4ptr[0];                          /* default  */
2836                         i = s4ptr[1];                          /* count    */
2837
2838                         MCODECHECK((i<<2)+8);
2839                         var_to_reg_int(s1, src, REG_ITMP1);
2840                         if (i > 0) {
2841                                 s4ptr += 2;
2842                                 val = s4ptr[0];
2843                                 ICONST(REG_ITMP2, val);
2844                                 while (--i > 0) {
2845                                         M_BEQ(s1, REG_ITMP2, 0);
2846                                         mcode_addreference(BlockPtrOfPC(s4ptr[1]), mcodeptr);
2847                                         s4ptr += 2;
2848                                         val = s4ptr[0];
2849                                         ICONST(REG_ITMP2, val);
2850                                         }
2851                                 M_BEQ(s1, REG_ITMP2, 0);
2852                                 mcode_addreference(BlockPtrOfPC(s4ptr[1]), mcodeptr);
2853                                 M_NOP;
2854                                 }
2855
2856                         M_BR(0);
2857                         mcode_addreference(BlockPtrOfPC(l), mcodeptr);
2858                         M_NOP;
2859                         ALIGNCODENOP;
2860                         break;
2861                         }
2862
2863
2864                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
2865                                         /* op1 = return type, val.a = function pointer*/
2866                         s3 = 3;
2867                         goto gen_method;
2868
2869                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
2870                                         /* op1 = return type, val.a = function pointer*/
2871                         s3 = 2;
2872                         goto gen_method;
2873
2874                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
2875                                         /* op1 = return type, val.a = function pointer*/
2876                         s3 = 1;
2877                         goto gen_method;
2878
2879                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
2880                                         /* op1 = arg count, val.a = method pointer    */
2881
2882                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2883                                         /* op1 = arg count, val.a = method pointer    */
2884
2885                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2886                                         /* op1 = arg count, val.a = method pointer    */
2887
2888                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
2889                                         /* op1 = arg count, val.a = method pointer    */
2890
2891                         s3 = iptr->op1;
2892
2893 gen_method: {
2894                         methodinfo   *m;
2895                         classinfo    *ci;
2896
2897                         MCODECHECK((s3 << 1) + 64);
2898
2899                         /* copy arguments to registers or stack location                  */
2900
2901                         for (; --s3 >= 0; src = src->prev) {
2902                                 if (src->varkind == ARGVAR)
2903                                         continue;
2904                                 if (IS_INT_LNG_TYPE(src->type)) {
2905                                         if (s3 < INT_ARG_CNT) {
2906                                                 s1 = argintregs[s3];
2907                                                 var_to_reg_int(d, src, s1);
2908                                                 M_INTMOVE(d, s1);
2909                                                 }
2910                                         else  {
2911                                                 var_to_reg_int(d, src, REG_ITMP1);
2912                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
2913                                                 }
2914                                         }
2915                                 else
2916                                         if (s3 < FLT_ARG_CNT) {
2917                                                 s1 = argfltregs[s3];
2918                                                 var_to_reg_flt(d, src, s1);
2919                                                 M_FLTMOVE(d, s1);
2920                                                 }
2921                                         else {
2922                                                 var_to_reg_flt(d, src, REG_FTMP1);
2923                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
2924                                                 }
2925                                 } /* end of for */
2926
2927                         m = iptr->val.a;
2928                         switch (iptr->opc) {
2929                                 case ICMD_BUILTIN3:
2930                                 case ICMD_BUILTIN2:
2931                                 case ICMD_BUILTIN1:
2932                                         a = dseg_addaddress ((void*) (m));
2933                                         M_ALD(REG_ITMP3, REG_PV, a); /* built-in-function pointer */
2934                                         M_JSR (REG_RA, REG_ITMP3);
2935                                         M_NOP;
2936                                         d = iptr->op1;                             /* return type */
2937                                         goto afteractualcall;
2938
2939                                 case ICMD_INVOKESTATIC:
2940                                 case ICMD_INVOKESPECIAL:
2941                                         a = dseg_addaddress (m->stubroutine);
2942
2943                                         M_ALD(REG_PV, REG_PV, a );        /* method pointer in pv */
2944
2945                                         d = m->returntype;
2946                                         goto makeactualcall;
2947
2948                                 case ICMD_INVOKEVIRTUAL:
2949
2950                                         gen_nullptr_check(argintregs[0]);
2951                                         M_ALD(REG_METHODPTR, argintregs[0],
2952                                                                  OFFSET(java_objectheader, vftbl));
2953                                         M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl, table[0]) +
2954                                                                 sizeof(methodptr) * m->vftblindex);
2955
2956                                         d = m->returntype;
2957                                         goto makeactualcall;
2958
2959                                 case ICMD_INVOKEINTERFACE:
2960                                         ci = m->class;
2961
2962                                         gen_nullptr_check(argintregs[0]);
2963                                         M_ALD(REG_METHODPTR, argintregs[0],
2964                                                                  OFFSET(java_objectheader, vftbl));
2965                                         M_ALD(REG_METHODPTR, REG_METHODPTR,
2966                                               OFFSET(vftbl, interfacetable[0]) -
2967                                               sizeof(methodptr*) * ci->index);
2968                                         M_ALD(REG_PV, REG_METHODPTR,
2969                                                             sizeof(methodptr) * (m - ci->methods));
2970
2971                                         d = m->returntype;
2972                                         goto makeactualcall;
2973
2974                                 default:
2975                                         d = 0;
2976                                         sprintf (logtext, "Unkown ICMD-Command: %d", iptr->opc);
2977                                         error ();
2978                                 }
2979
2980 makeactualcall:
2981
2982                         M_JSR (REG_RA, REG_PV);
2983                         M_NOP;
2984
2985                         /* recompute pv */
2986
2987 afteractualcall:
2988
2989                         s1 = (int)((u1*) mcodeptr - mcodebase);
2990                         if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
2991                         else {
2992                                 panic("method to big");
2993                                 }
2994
2995                         /* d contains return type */
2996
2997                         if (d != TYPE_VOID) {
2998                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
2999                                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3000                                         M_INTMOVE(REG_RESULT, s1);
3001                                         store_reg_to_var_int(iptr->dst, s1);
3002                                         }
3003                                 else {
3004                                         s1 = reg_of_var(iptr->dst, REG_FRESULT);
3005                                         M_FLTMOVE(REG_FRESULT, s1);
3006                                         store_reg_to_var_flt(iptr->dst, s1);
3007                                         }
3008                                 }
3009                         }
3010                         break;
3011
3012
3013                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3014
3015                                       /* op1:   0 == array, 1 == class                */
3016                                       /* val.a: (classinfo*) superclass               */
3017
3018 /*          superclass is an interface:
3019  *
3020  *          return (sub != NULL) &&
3021  *                 (sub->vftbl->interfacetablelength > super->index) &&
3022  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
3023  *
3024  *          superclass is a class:
3025  *
3026  *          return ((sub != NULL) && (0
3027  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3028  *                  super->vftbl->diffvall));
3029  */
3030
3031                         {
3032                         classinfo *super = (classinfo*) iptr->val.a;
3033
3034                         var_to_reg_int(s1, src, REG_ITMP1);
3035                         d = reg_of_var(iptr->dst, REG_ITMP3);
3036                         if (s1 == d) {
3037                                 M_MOV(s1, REG_ITMP1);
3038                                 s1 = REG_ITMP1;
3039                                 }
3040                         M_CLR(d);
3041                         if (iptr->op1) {                               /* class/interface */
3042                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3043                                         M_BEQZ(s1, 8);
3044                                         M_NOP;
3045                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3046                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3047                                         M_IADD_IMM(REG_ITMP2, - super->index, REG_ITMP2);
3048                                         M_BLEZ(REG_ITMP2, 3);
3049                                         M_NOP;
3050                                         M_ALD(REG_ITMP1, REG_ITMP1,
3051                                               OFFSET(vftbl, interfacetable[0]) -
3052                                               super->index * sizeof(methodptr*));
3053                                         M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3054                                         }
3055                                 else {                                     /* class           */
3056                                         s2 = super->vftbl->diffval;
3057                                         M_BEQZ(s1, 5);
3058                                         M_NOP;
3059                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3060                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3061                                         M_IADD_IMM(REG_ITMP1, - super->vftbl->baseval, REG_ITMP1);
3062                                         M_CMPULT_IMM(REG_ITMP1, s2 + 1, d);
3063                                         }
3064                                 }
3065                         else
3066                                 panic ("internal error: no inlined array instanceof");
3067                         }
3068                         store_reg_to_var_int(iptr->dst, d);
3069                         break;
3070
3071                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3072
3073                                       /* op1:   0 == array, 1 == class                */
3074                                       /* val.a: (classinfo*) superclass               */
3075
3076 /*          superclass is an interface:
3077  *
3078  *          OK if ((sub == NULL) ||
3079  *                 (sub->vftbl->interfacetablelength > super->index) &&
3080  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3081  *
3082  *          superclass is a class:
3083  *
3084  *          OK if ((sub == NULL) || (0
3085  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3086  *                 super->vftbl->diffvall));
3087  */
3088
3089                         {
3090                         classinfo *super = (classinfo*) iptr->val.a;
3091
3092                         d = reg_of_var(iptr->dst, REG_ITMP3);
3093                         var_to_reg_int(s1, src, d);
3094                         if (iptr->op1) {                               /* class/interface */
3095                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3096                                         M_BEQZ(s1, 9);
3097                                         M_NOP;
3098                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3099                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3100                                         M_IADD_IMM(REG_ITMP2, - super->index, REG_ITMP2);
3101                                         M_BLEZ(REG_ITMP2, 0);
3102                                         mcode_addxcastrefs(mcodeptr);
3103                                         M_NOP;
3104                                         M_ALD(REG_ITMP2, REG_ITMP1,
3105                                               OFFSET(vftbl, interfacetable[0]) -
3106                                               super->index * sizeof(methodptr*));
3107                                         M_BEQZ(REG_ITMP2, 0);
3108                                         mcode_addxcastrefs(mcodeptr);
3109                                         M_NOP;
3110                                         }
3111                                 else {                                     /* class           */
3112                                         s2 = super->vftbl->diffval;
3113                                         M_BEQZ(s1, 6 + (s2 != 0));
3114                                         M_NOP;
3115                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3116                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3117                                         M_IADD_IMM(REG_ITMP1, - super->vftbl->baseval, REG_ITMP1);
3118                                         if (s2 == 0) {
3119                                                 M_BNEZ(REG_ITMP1, 0);
3120                                                 }
3121                                         else{
3122                                                 M_CMPULT_IMM(REG_ITMP1, s2 + 1, REG_ITMP2);
3123                                                 M_BEQZ(REG_ITMP2, 0);
3124                                                 }
3125                                         mcode_addxcastrefs(mcodeptr);
3126                                         M_NOP;
3127                                         }
3128                                 }
3129                         else
3130                                 panic ("internal error: no inlined array checkcast");
3131                         }
3132                         M_INTMOVE(s1, d);
3133                         store_reg_to_var_int(iptr->dst, d);
3134                         break;
3135
3136                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3137
3138                         var_to_reg_int(s1, src, REG_ITMP1);
3139                         M_BLTZ(s1, 0);
3140                         mcode_addxcheckarefs(mcodeptr);
3141                         M_NOP;
3142                         break;
3143
3144                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3145                                       /* op1 = dimension, val.a = array descriptor    */
3146
3147                         /* check for negative sizes and copy sizes to stack if necessary  */
3148
3149                         MCODECHECK((iptr->op1 << 1) + 64);
3150
3151                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3152                                 var_to_reg_int(s2, src, REG_ITMP1);
3153                                 M_BLTZ(s2, 0);
3154                                 mcode_addxcheckarefs(mcodeptr);
3155                                 M_NOP;
3156
3157                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3158
3159                                 if (src->varkind != ARGVAR) {
3160                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3161                                         }
3162                                 }
3163
3164                         /* a0 = dimension count */
3165
3166                         ICONST(argintregs[0], iptr->op1);
3167
3168                         /* a1 = arraydescriptor */
3169
3170                         a = dseg_addaddress(iptr->val.a);
3171                         M_ALD(argintregs[1], REG_PV, a);
3172
3173                         /* a2 = pointer to dimensions = stack pointer */
3174
3175                         M_INTMOVE(REG_SP, argintregs[2]);
3176
3177                         a = dseg_addaddress((void*) (builtin_nmultianewarray));
3178                         M_ALD(REG_ITMP3, REG_PV, a);
3179                         M_JSR(REG_RA, REG_ITMP3);
3180                         M_NOP;
3181                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3182                         M_INTMOVE(REG_RESULT, s1);
3183                         store_reg_to_var_int(iptr->dst, s1);
3184                         break;
3185
3186
3187                 default: sprintf (logtext, "Unknown pseudo command: %d", iptr->opc);
3188                          error();
3189         } /* switch */
3190         } /* for instruction */
3191
3192         /* copy values to interface registers */
3193
3194         src = bptr->outstack;
3195         len = bptr->outdepth;
3196         MCODECHECK(64+len);
3197         while (src) {
3198                 len--;
3199                 if ((src->varkind != STACKVAR)) {
3200                         s2 = src->type;
3201                         if (IS_FLT_DBL_TYPE(s2)) {
3202                                 var_to_reg_flt(s1, src, REG_FTMP1);
3203                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3204                                         M_FLTMOVE(s1,interfaces[len][s2].regoff);
3205                                         }
3206                                 else {
3207                                         M_DST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3208                                         }
3209                                 }
3210                         else {
3211                                 var_to_reg_int(s1, src, REG_ITMP1);
3212                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3213                                         M_INTMOVE(s1,interfaces[len][s2].regoff);
3214                                         }
3215                                 else {
3216                                         M_LST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3217                                         }
3218                                 }
3219                         }
3220                 src = src->prev;
3221                 }
3222         } /* if (bptr -> flags >= BBREACHED) */
3223         } /* for basic block */
3224
3225         bptr -> mpc = (int)((u1*) mcodeptr - mcodebase);
3226
3227         {
3228         /* generate bound check stubs */
3229
3230         s4 *xcodeptr = NULL;
3231
3232         for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) {
3233                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3234                         gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3235                                 xboundrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3236                         continue;
3237                         }
3238
3239                 gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3240                                   xboundrefs->branchpos, (u1*) mcodeptr - mcodebase);
3241
3242                 MCODECHECK(8);
3243
3244                 M_LDA(REG_ITMP2_XPC, REG_PV, xboundrefs->branchpos - 4);
3245
3246                 if (xcodeptr != NULL) {
3247                         M_BR((xcodeptr-mcodeptr));
3248                         M_NOP;
3249                         }
3250                 else {
3251                         xcodeptr = mcodeptr;
3252
3253                         a = dseg_addaddress(asm_handle_exception);
3254                         M_ALD(REG_ITMP3, REG_PV, a);
3255
3256                         M_JMP(REG_ITMP3);
3257                         a = dseg_addaddress(proto_java_lang_ArrayIndexOutOfBoundsException);
3258                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3259                         }
3260                 }
3261
3262         /* generate negative array size check stubs */
3263
3264         xcodeptr = NULL;
3265
3266         for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) {
3267                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3268                         gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3269                                 xcheckarefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3270                         continue;
3271                         }
3272
3273                 gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3274                                   xcheckarefs->branchpos, (u1*) mcodeptr - mcodebase);
3275
3276                 MCODECHECK(8);
3277
3278                 M_LDA(REG_ITMP2_XPC, REG_PV, xcheckarefs->branchpos - 4);
3279
3280                 if (xcodeptr != NULL) {
3281                         M_BR((xcodeptr-mcodeptr));
3282                         M_NOP;
3283                         }
3284                 else {
3285                         xcodeptr = mcodeptr;
3286
3287                         a = dseg_addaddress(asm_handle_exception);
3288                         M_ALD(REG_ITMP3, REG_PV, a);
3289
3290                         M_JMP(REG_ITMP3);
3291                         a = dseg_addaddress(proto_java_lang_NegativeArraySizeException);
3292                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3293                         }
3294                 }
3295
3296         /* generate cast check stubs */
3297
3298         xcodeptr = NULL;
3299
3300         for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) {
3301                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3302                         gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3303                                 xcastrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3304                         continue;
3305                         }
3306
3307                 gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3308                                   xcastrefs->branchpos, (u1*) mcodeptr - mcodebase);
3309
3310                 MCODECHECK(8);
3311
3312                 M_LDA(REG_ITMP2_XPC, REG_PV, xcastrefs->branchpos - 4);
3313
3314                 if (xcodeptr != NULL) {
3315                         M_BR((xcodeptr-mcodeptr));
3316                         M_NOP;
3317                         }
3318                 else {
3319                         xcodeptr = mcodeptr;
3320
3321                         a = dseg_addaddress(asm_handle_exception);
3322                         M_ALD(REG_ITMP3, REG_PV, a);
3323
3324                         M_JMP(REG_ITMP3);
3325                         a = dseg_addaddress(proto_java_lang_ClassCastException);
3326                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3327                         }
3328                 }
3329
3330
3331 #ifdef SOFTNULLPTRCHECK
3332
3333         /* generate null pointer check stubs */
3334
3335         xcodeptr = NULL;
3336
3337         for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) {
3338                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3339                         gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3340                                 xnullrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3341                         continue;
3342                         }
3343
3344                 gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3345                                   xnullrefs->branchpos, (u1*) mcodeptr - mcodebase);
3346
3347                 MCODECHECK(8);
3348
3349                 M_LDA(REG_ITMP2_XPC, REG_PV, xnullrefs->branchpos - 4);
3350
3351                 if (xcodeptr != NULL) {
3352                         M_BR((xcodeptr-mcodeptr));
3353                         M_NOP;
3354                         }
3355                 else {
3356                         xcodeptr = mcodeptr;
3357
3358                         a = dseg_addaddress(asm_handle_exception);
3359                         M_ALD(REG_ITMP3, REG_PV, a);
3360
3361                         M_JMP(REG_ITMP3);
3362                         a = dseg_addaddress(proto_java_lang_NullPointerException);
3363                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3364                         }
3365                 }
3366
3367 #endif
3368         }
3369
3370         mcode_finish((int)((u1*) mcodeptr - mcodebase));
3371
3372         (void) cacheflush((void*) method->entrypoint,
3373                           (int)((u1*) mcodeptr - mcodebase), ICACHE);
3374 }
3375
3376
3377 /* redefinition of code generation macros (compiling into array) **************/
3378
3379 /*
3380 These macros are newly defined to allow code generation into an array.
3381 This is necessary, because the original M_.. macros generate code by
3382 calling 'mcode_adds4' that uses an additional data structure to
3383 receive the code.
3384
3385 For a faster (but less flexible) version to generate code, these
3386 macros directly use the (s4* p) - pointer to put the code directly
3387 in a locally defined array.
3388 This makes sense only for the stub-generation-routines below.
3389 */
3390
3391 #undef M_ITYPE
3392 #define M_ITYPE(op, rs, rt, imm)\
3393   *(p++) = (((op)<<26)|((rs)<<21)|((rt)<<16)|((imm)&0xffff))
3394
3395 #undef M_JTYPE
3396 #define M_JTYPE(op, imm)\
3397   *(p++) = (((op)<<26)|((off)&0x3ffffff))
3398
3399 #undef M_RTYPE
3400 #define M_RTYPE(op, rs, rt, rd, sa, fu)\
3401   *(p++) = (((op)<<26)|((rs)<<21)|((rt)<<16)|((rd)<<11)|((sa)<<6)|(fu))
3402
3403
3404 /* function createcompilerstub *************************************************
3405
3406         creates a stub routine which calls the compiler
3407
3408 *******************************************************************************/
3409
3410 #define COMPSTUBSIZE 4
3411
3412 u1 *createcompilerstub (methodinfo *m)
3413 {
3414         u8 *s = CNEW (u8, COMPSTUBSIZE);    /* memory to hold the stub            */
3415         s4 *p = (s4*) s;                    /* code generation pointer            */
3416
3417                                             /* code for the stub                  */
3418         M_ALD(REG_PV, REG_PV, 24);          /* load pointer to the compiler       */
3419         M_NOP;
3420         M_JSR(REG_ITMP1, REG_PV);           /* jump to the compiler, return address
3421                                                in itmp1 is used as method pointer */
3422         M_NOP;
3423
3424         (void) cacheflush((void*) s, (char*) p - (char*) s, ICACHE);
3425
3426         s[2] = (u8) m;                      /* literals to be adressed            */
3427         s[3] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
3428
3429 #ifdef STATISTICS
3430         count_cstub_len += COMPSTUBSIZE * 8;
3431 #endif
3432
3433         return (u1*) s;
3434 }
3435
3436
3437 /* function removecompilerstub *************************************************
3438
3439      deletes a compilerstub from memory  (simply by freeing it)
3440
3441 *******************************************************************************/
3442
3443 void removecompilerstub (u1 *stub)
3444 {
3445         CFREE (stub, COMPSTUBSIZE * 8);
3446 }
3447
3448
3449 /* function: createnativestub **************************************************
3450
3451         creates a stub routine which calls a native method
3452
3453 *******************************************************************************/
3454
3455 #define NATIVESTUBSIZE 11
3456
3457 u1 *createnativestub (functionptr f, methodinfo *m)
3458 {
3459         u8 *s = CNEW (u8, NATIVESTUBSIZE);  /* memory to hold the stub            */
3460         s4 *p = (s4*) s;                    /* code generation pointer            */
3461
3462         M_ALD  (REG_ITMP3, REG_PV, 8*8);    /* load adress of native method       */
3463         M_LDA  (REG_SP, REG_SP, -8);        /* build up stackframe                */
3464
3465         M_LST  (REG_RA, REG_SP, 0);         /* store return address               */
3466         M_JSR  (REG_RA, REG_ITMP3);         /* call native method                 */
3467
3468         M_NOP;                              /* delay slot                         */
3469         M_ALD  (REG_ITMP3, REG_PV, 9*8);    /* get address of exceptionptr        */
3470
3471         M_LLD  (REG_RA, REG_SP, 0);         /* load return address                */
3472         M_ALD  (REG_ITMP1, REG_ITMP3, 0);   /* load exception into reg. itmp1     */
3473
3474         M_BNEZ (REG_ITMP1, 2);              /* if no exception then return        */
3475         M_LDA  (REG_SP, REG_SP, 8);         /* remove stackframe, delay slot      */
3476
3477         M_RET  (REG_RA);                    /* return to caller                   */
3478         M_NOP;                              /* delay slot                         */
3479
3480         M_AST  (REG_ZERO, REG_ITMP3, 0);    /* store NULL into exceptionptr       */
3481         M_ALD  (REG_ITMP3, REG_PV,10*8);    /* load asm exception handler address */
3482
3483         M_JMP  (REG_ITMP3);                 /* jump to asm exception handler      */
3484         M_LDA  (REG_ITMP2, REG_RA, -4);     /* move fault address into reg. itmp2 */
3485                                             /* delay slot                         */
3486
3487         (void) cacheflush((void*) s, (char*) p - (char*) s, ICACHE);
3488
3489         s[8] = (u8) f;                      /* address of native method           */
3490         s[9] = (u8) (&exceptionptr);        /* address of exceptionptr            */
3491         s[10]= (u8) (asm_handle_nat_exception); /* addr of asm exception handler  */
3492
3493 #ifdef STATISTICS
3494         count_nstub_len += NATIVESTUBSIZE * 8;
3495 #endif
3496
3497         return (u1*) s;
3498 }
3499
3500
3501 /* function: removenativestub **************************************************
3502
3503     removes a previously created native-stub from memory
3504
3505 *******************************************************************************/
3506
3507 void removenativestub (u1 *stub)
3508 {
3509         CFREE (stub, NATIVESTUBSIZE * 8);
3510 }
3511
3512
3513 /* function: createcalljava ****************************************************
3514
3515         creates the asm_calljavamethod (MIPS assembler does not like data in the
3516         text segment). Documentation can be found in asmpart.c.
3517
3518 *******************************************************************************/
3519
3520 #define REG_FSS0    20
3521 #define REG_FSS1    22
3522 #define REG_FSS2    25
3523 #define REG_FSS3    27
3524 #define REG_FSS4    29
3525 #define REG_FSS5    31
3526
3527 #define CALL_JAVA_MEM_SIZE 60
3528 #define CALL_JAVA_ENTRY    20
3529 #define CALL_JAVA_XHANDLER 55
3530
3531 static s4 calljavamem[CALL_JAVA_MEM_SIZE];
3532
3533 void createcalljava ()
3534 {
3535         s4 *p;
3536
3537         *((void**)(calljavamem + 0)) = (void*) asm_call_jit_compiler;
3538         *((void**)(calljavamem + 2)) = (void*) builtin_throw_exception;
3539 #if POINTERSIZE==8
3540         *((void**)(calljavamem + 4)) = NULL;
3541         *((void**)(calljavamem + 6)) = (void*) (calljavamem + CALL_JAVA_XHANDLER);
3542         *((void**)(calljavamem + 8)) = (void*) (calljavamem + CALL_JAVA_XHANDLER);
3543         *((void**)(calljavamem +10)) = (void*) (calljavamem + CALL_JAVA_ENTRY);
3544 #else
3545         *((void**)(calljavamem + 8)) = NULL;
3546         *((void**)(calljavamem + 9)) = (void*) (calljavamem + CALL_JAVA_XHANDLER);
3547         *((void**)(calljavamem +10)) = (void*) (calljavamem + CALL_JAVA_XHANDLER);
3548         *((void**)(calljavamem +11)) = (void*) (calljavamem + CALL_JAVA_ENTRY);
3549 #endif
3550
3551         calljavamem[12] = 1;                /* extable size                       */
3552         calljavamem[13] = 0;                /* fltsave                            */
3553         calljavamem[14] = 0;                /* intsave                            */
3554         calljavamem[15] = 0;                /* isleaf                             */
3555         calljavamem[16] = 0;                /* IsSync                             */
3556         calljavamem[17] = 80;               /* frame size                         */
3557         calljavamem[18] = 0;                /* method pointer (NULL)              */
3558         calljavamem[19] = 0;                /* method pointer (NULL)              */
3559
3560         p = calljavamem + CALL_JAVA_ENTRY;  /* code generation pointer            */
3561
3562 /*  20 */
3563         M_LDA (REG_SP, REG_SP, -10*8);      /* allocate stackframe                */
3564         M_LST (REG_RA, REG_SP, 0);          /* save return address                */
3565
3566         M_BRS(1);                           /* compute current program counter    */
3567         M_LST (REG_PV, REG_SP, 3*8);        /* save procedure vector              */
3568 /*  24 */
3569         M_LDA (REG_PV, REG_RA, -4*4);       /* compute procedure vector           */
3570         M_DST (REG_FSS0, REG_SP, 4*8);      /* save non JavaABI saved flt regs    */
3571
3572         M_DST (REG_FSS1, REG_SP, 5*8);
3573         M_DST (REG_FSS2, REG_SP, 6*8);
3574 /*  28 */
3575         M_DST (REG_FSS3, REG_SP, 7*8);
3576         M_DST (REG_FSS4, REG_SP, 8*8);
3577
3578         M_DST (REG_FSS5, REG_SP, 9*8);
3579         M_LST (REG_ARG_0, REG_SP, 2*8);     /* save method pointer for compiler   */
3580 /*  32 */
3581         M_LDA (REG_ITMP1, REG_SP, 2*8);     /* pass pointer to methodptr via itmp1*/
3582         M_MOV (REG_ARG_1, REG_ARG_0);       /* pass the remaining parameters      */
3583
3584         M_MOV (REG_ARG_2, REG_ARG_1);
3585         M_MOV (REG_ARG_3, REG_ARG_2);
3586 /*  36 */
3587         M_MOV (REG_ARG_4, REG_ARG_3);
3588         M_ALD (REG_METHODPTR, REG_PV, -80); /* address of asm_call_jit_compiler   */
3589
3590         M_AST (REG_METHODPTR, REG_SP, 8);   /* store function address             */
3591         M_MOV (REG_SP, REG_METHODPTR);      /* set method pointer                 */
3592 /*  40 */
3593         M_ALD (REG_PV, REG_METHODPTR, 8);   /* method call as in Java             */
3594         M_JSR (REG_RA, REG_PV);             /* call JIT compiler                  */
3595
3596         M_NOP;                              /* delay slot                         */
3597         M_LDA (REG_PV, REG_RA, -23*4);      /* recompute procedure vector         */
3598
3599 /*  44 */
3600         M_CLR (REG_RESULT);                 /* clear return value (exception ptr) */
3601 /*  calljava_return: */
3602         M_LLD (REG_RA, REG_SP, 0);          /* restore return address             */
3603
3604         M_LLD (REG_PV, REG_SP, 3*8);        /* restore procedure vector           */
3605         M_DLD (REG_FSS0, REG_SP, 4*8);      /* restore non JavaABI saved flt regs */
3606 /*  48 */
3607         M_DLD (REG_FSS1, REG_SP, 5*8);
3608         M_DLD (REG_FSS2, REG_SP, 6*8);
3609
3610         M_DLD (REG_FSS3, REG_SP, 7*8);
3611         M_DLD (REG_FSS4, REG_SP, 8*8);
3612 /*  52 */
3613         M_DLD (REG_FSS5, REG_SP, 9*8);
3614         M_RET(REG_RA);                      /* return                             */
3615
3616         M_LDA (REG_SP, REG_SP, 10*8);       /* deallocate stackframe (delay slot) */
3617
3618 /*  55 */
3619 /*  calljava_xhandler: */
3620
3621         M_ALD (REG_ITMP3, REG_PV, -72);     /* address of builtin_throw_exception */
3622
3623         M_JSR (REG_RA, REG_ITMP3);          /* call builtin                       */
3624         M_MOV (REG_ITMP1, REG_ARG_0);       /* pass parameter (delay slot)        */
3625 /*  58 */
3626         M_BR(-14);                          /* branch calljava_return             */
3627         M_NOP;                              /* delay slot                         */
3628
3629         (void) cacheflush((void*)(calljavamem + CALL_JAVA_ENTRY),
3630                (CALL_JAVA_MEM_SIZE - CALL_JAVA_ENTRY) * (int) sizeof(s4), ICACHE);
3631 }
3632
3633
3634 typedef java_objectheader* (*asm_fptr)(methodinfo*, void*, void*, void*, void*);
3635
3636 java_objectheader *asm_calljavamethod (methodinfo *m, void *arg1, void *arg2,
3637                                                       void *arg3, void *arg4)
3638 {
3639 return ((asm_fptr)(calljavamem + 20))(m, arg1, arg2, arg3, arg4);
3640 }
3641
3642
3643 /*
3644  * These are local overrides for various environment variables in Emacs.
3645  * Please do not remove this and leave it at the end of the file, where
3646  * Emacs will automagically detect them.
3647  * ---------------------------------------------------------------------
3648  * Local variables:
3649  * mode: c
3650  * indent-tabs-mode: t
3651  * c-basic-offset: 4
3652  * tab-width: 4
3653  * End:
3654  */