mips/ngen.c

   1 /* mips/ngen.c *****************************************************************
   2
   3         Copyright (c) 1997 A. Krall, R. Grafl, M. Gschwind, M. Probst
   4
   5         See file COPYRIGHT for information on usage and disclaimer of warranties
   6
   7         Contains the codegenerator for an MIPS (R4000 or higher) processor.
   8         This module generates MIPS machine code for a sequence of intermediate
   9         code commands (ICMDs).
  10
  11         Authors: Andreas  Krall      EMAIL: cacao@complang.tuwien.ac.at
  12
  13         Last Change: 1998/11/118
  14
  15 *******************************************************************************/
  16
  17
  18
  19 /* *****************************************************************************
  20
  21 Datatypes and Register Allocations:
  22 -----------------------------------
  23
  24 On 64-bit-machines (like the MIPS) all operands are stored in the
  25 registers in a 64-bit form, even when the correspondig JavaVM  operands
  26 only need 32 bits. This is done by a canonical representation:
  27
  28 32-bit integers are allways stored as sign-extended 64-bit values (this
  29 approach is directly supported by the MIPS architecture and is very easy
  30 to implement).
  31
  32 32-bit-floats are stored in a 64-bit double precision register by simply
  33 expanding the exponent and mantissa with zeroes. (also supported by the
  34 architecture)
  35
  36
  37 Stackframes:
  38
  39 The calling conventions and the layout of the stack is  explained in detail
  40 in the documention file: calling.doc
  41
  42 *******************************************************************************/
  43
  44
  45 /* additional functions and macros to generate code ***************************/
  46
  47 #define BlockPtrOfPC(pc)        block+block_index[pc]
  48
  49 #ifdef STATISTICS
  50 #define COUNT_SPILLS count_spills++
  51 #else
  52 #define COUNT_SPILLS
  53 #endif
  54
  55
  56 /* gen_nullptr_check(objreg) */
  57
  58 #ifdef SOFTNULLPTRCHECK
  59 #define gen_nullptr_check(objreg) \
  60         if (checknull) {\
  61         M_BEQZ((objreg), 0);\
  62         mcode_addxnullrefs(mcodeptr);\
  63         M_NOP;\
  64         }
  65 #else
  66 #define gen_nullptr_check(objreg)
  67 #endif
  68
  69
  70 /* MCODECHECK(icnt) */
  71
  72 #define MCODECHECK(icnt) \
  73         if((mcodeptr+(icnt))>mcodeend)mcodeptr=mcode_increase((u1*)mcodeptr)
  74
  75 /* M_INTMOVE:
  76      generates an integer-move from register a to b.
  77      if a and b are the same int-register, no code will be generated.
  78 */
  79
  80 #define M_INTMOVE(a,b) if(a!=b){M_MOV(a,b);}
  81
  82
  83 /* M_FLTMOVE:
  84     generates a floating-point-move from register a to b.
  85     if a and b are the same float-register, no code will be generated
  86 */
  87
  88 #define M_FLTMOVE(a,b) if(a!=b){M_DMOV(a,b);}
  89
  90
  91 /* var_to_reg_xxx:
  92     this function generates code to fetch data from a pseudo-register
  93     into a real register.
  94     If the pseudo-register has actually been assigned to a real
  95     register, no code will be emitted, since following operations
  96     can use this register directly.
  97
  98     v: pseudoregister to be fetched from
  99     tempregnum: temporary register to be used if v is actually spilled to ram
 100
 101     return: the register number, where the operand can be found after
 102             fetching (this wil be either tempregnum or the register
 103             number allready given to v)
 104 */
 105
 106 #define var_to_reg_int(regnr,v,tempnr) { \
 107         if ((v)->flags & INMEMORY) \
 108                 {COUNT_SPILLS;M_LLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 109         else regnr=(v)->regoff; \
 110 }
 111
 112
 113 #define var_to_reg_flt(regnr,v,tempnr) { \
 114         if ((v)->flags & INMEMORY) \
 115                 {COUNT_SPILLS;M_DLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 116         else regnr=(v)->regoff; \
 117 }
 118
 119
 120 /* reg_of_var:
 121     This function determines a register, to which the result of an operation
 122     should go, when it is ultimatively intended to store the result in
 123     pseudoregister v.
 124     If v is assigned to an actual register, this register will be returned.
 125     Otherwise (when v is spilled) this function returns tempregnum.
 126     If not already done, regoff and flags are set in the stack location.
 127 */
 128
 129 static int reg_of_var(stackptr v, int tempregnum)
 130 {
 131         varinfo      *var;
 132
 133         switch (v->varkind) {
 134                 case TEMPVAR:
 135                         if (!(v->flags & INMEMORY))
 136                                 return(v->regoff);
 137                         break;
 138                 case STACKVAR:
 139                         var = &(interfaces[v->varnum][v->type]);
 140                         v->regoff = var->regoff;
 141                         if (!(var->flags & INMEMORY))
 142                                 return(var->regoff);
 143                         break;
 144                 case LOCALVAR:
 145                         var = &(locals[v->varnum][v->type]);
 146                         v->regoff = var->regoff;
 147                         if (!(var->flags & INMEMORY))
 148                                 return(var->regoff);
 149                         break;
 150                 case ARGVAR:
 151                         v->regoff = v->varnum;
 152                         if (IS_FLT_DBL_TYPE(v->type)) {
 153                                 if (v->varnum < fltreg_argnum) {
 154                                         v->regoff = argfltregs[v->varnum];
 155                                         return(argfltregs[v->varnum]);
 156                                         }
 157                                 }
 158                         else
 159                                 if (v->varnum < intreg_argnum) {
 160                                         v->regoff = argintregs[v->varnum];
 161                                         return(argintregs[v->varnum]);
 162                                         }
 163                         v->regoff -= intreg_argnum;
 164                         break;
 165                 }
 166         v->flags |= INMEMORY;
 167         return tempregnum;
 168 }
 169
 170
 171 /* store_reg_to_var_xxx:
 172     This function generates the code to store the result of an operation
 173     back into a spilled pseudo-variable.
 174     If the pseudo-variable has not been spilled in the first place, this
 175     function will generate nothing.
 176
 177     v ............ Pseudovariable
 178     tempregnum ... Number of the temporary registers as returned by
 179                    reg_of_var.
 180 */
 181
 182 #define store_reg_to_var_int(sptr, tempregnum) {       \
 183         if ((sptr)->flags & INMEMORY) {                    \
 184                 COUNT_SPILLS;                                  \
 185                 M_LST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 186                 }                                              \
 187         }
 188
 189 #define store_reg_to_var_flt(sptr, tempregnum) {       \
 190         if ((sptr)->flags & INMEMORY) {                    \
 191                 COUNT_SPILLS;                                  \
 192                 M_DST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 193                 }                                              \
 194         }
 195
 196
 197 /* NullPointerException handlers and exception handling initialisation        */
 198
 199 /* NullPointerException signal handler for hardware null pointer check */
 200
 201 void catch_NullPointerException(int sig, int code, struct sigcontext *sigctx)
 202 {
 203         sigset_t nsig;
 204         int      instr;
 205         long     faultaddr;
 206
 207         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 208
 209         instr = *((int*)(sigctx->sc_pc));
 210         faultaddr = sigctx->sc_regs[(instr >> 21) & 0x1f];
 211
 212         if (faultaddr == 0) {
 213                 signal(sig, (void*) catch_NullPointerException); /* reinstall handler */
 214                 sigemptyset(&nsig);
 215                 sigaddset(&nsig, sig);
 216                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 217                 sigctx->sc_regs[REG_ITMP1_XPTR] =
 218                                             (long) proto_java_lang_NullPointerException;
 219                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 220                 sigctx->sc_pc = (long) asm_handle_nat_exception;
 221                 }
 222         else {
 223                 faultaddr += (long) ((instr << 16) >> 16);
 224                 fprintf(stderr, "faulting address: 0x%16lx\n", faultaddr);
 225                 panic("Stack overflow");
 226                 }
 227 }
 228
 229
 230 void init_exceptions(void)
 231 {
 232         /* install signal handlers we need to convert to exceptions */
 233
 234         if (!checknull) {
 235
 236 #if defined(SIGSEGV)
 237                 signal(SIGSEGV, (void*) catch_NullPointerException);
 238 #endif
 239
 240 #if defined(SIGBUS)
 241                 signal(SIGBUS, (void*) catch_NullPointerException);
 242 #endif
 243                 }
 244 }
 245
 246
 247 /* function gen_mcode **********************************************************
 248
 249         generates machine code
 250
 251 *******************************************************************************/
 252
 253 #define         MethodPointer   -8
 254 #define         FrameSize       -12
 255 #define     IsSync          -16
 256 #define     IsLeaf          -20
 257 #define     IntSave         -24
 258 #define     FltSave         -28
 259 #define     ExTableSize     -32
 260 #define     ExTableStart    -32
 261
 262 #define     ExEntrySize     -32
 263 #define     ExStartPC       -8
 264 #define     ExEndPC         -16
 265 #define     ExHandlerPC     -24
 266 #define     ExCatchType     -32
 267
 268 static void gen_mcode()
 269 {
 270         int  len, s1, s2, s3, d, bbs;
 271         s4   a;
 272         s4          *mcodeptr;
 273         stackptr    src;
 274         varinfo     *var;
 275         basicblock  *bptr;
 276         instruction *iptr;
 277
 278         {
 279         int p, pa, t, l, r;
 280
 281         savedregs_num = (isleafmethod) ? 0 : 1;           /* space to save the RA */
 282
 283         /* space to save used callee saved registers */
 284
 285         savedregs_num += (savintregcnt - maxsavintreguse);
 286         savedregs_num += (savfltregcnt - maxsavfltreguse);
 287
 288         parentargs_base = maxmemuse + savedregs_num;
 289
 290 #ifdef USE_THREADS                 /* space to save argument of monitor_enter */
 291
 292         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 293                 parentargs_base++;
 294
 295 #endif
 296
 297         /* create method header */
 298
 299         (void) dseg_addaddress(method);                         /* MethodPointer  */
 300         (void) dseg_adds4(parentargs_base * 8);                 /* FrameSize      */
 301
 302 #ifdef USE_THREADS
 303
 304         /* IsSync contains the offset relative to the stack pointer for the
 305            argument of monitor_exit used in the exception handler. Since the
 306            offset could be zero and give a wrong meaning of the flag it is
 307            offset by one.
 308         */
 309
 310         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 311                 (void) dseg_adds4((maxmemuse + 1) * 8);             /* IsSync         */
 312         else
 313
 314 #endif
 315
 316         (void) dseg_adds4(0);                                   /* IsSync         */
 317
 318         (void) dseg_adds4(isleafmethod);                        /* IsLeaf         */
 319         (void) dseg_adds4(savintregcnt - maxsavintreguse);      /* IntSave        */
 320         (void) dseg_adds4(savfltregcnt - maxsavfltreguse);      /* FltSave        */
 321         (void) dseg_adds4(exceptiontablelength);                /* ExTableSize    */
 322
 323         /* create exception table */
 324
 325         for (len = 0; len < exceptiontablelength; len++) {
 326                 dseg_addtarget(BlockPtrOfPC(extable[len].startpc));
 327                 dseg_addtarget(BlockPtrOfPC(extable[len].endpc));
 328                 dseg_addtarget(BlockPtrOfPC(extable[len].handlerpc));
 329                 (void) dseg_addaddress(extable[len].catchtype);
 330                 }
 331
 332         /* initialize mcode variables */
 333
 334         mcodeptr = (s4*) mcodebase;
 335         mcodeend = (s4*) (mcodebase + mcodesize);
 336         MCODECHECK(128 + mparamcount);
 337
 338         /* create stack frame (if necessary) */
 339
 340         if (parentargs_base)
 341                 {M_LDA (REG_SP, REG_SP, -parentargs_base * 8);}
 342
 343         /* save return address and used callee saved registers */
 344
 345         p = parentargs_base;
 346         if (!isleafmethod)
 347                 {p--;  M_AST (REG_RA, REG_SP, 8*p);}
 348         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
 349                 {p--; M_LST (savintregs[r], REG_SP, 8 * p);}
 350         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
 351                 {p--; M_DST (savfltregs[r], REG_SP, 8 * p);}
 352
 353         /* save monitorenter argument */
 354
 355 #ifdef USE_THREADS
 356         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 357                 if (method->flags & ACC_STATIC) {
 358                         p = dseg_addaddress (class);
 359                         M_ALD(REG_ITMP1, REG_PV, p);
 360                         M_AST(REG_ITMP1, REG_SP, 8 * maxmemuse);
 361                         }
 362                 else {
 363                         M_AST (argintregs[0], REG_SP, 8 * maxmemuse);
 364                         }
 365                 }
 366 #endif
 367
 368         /* copy argument registers to stack and call trace function with pointer
 369            to arguments on stack. ToDo: save floating point registers !!!!!!!!!
 370         */
 371
 372         if (runverbose && isleafmethod) {
 373                 M_LDA (REG_SP, REG_SP, -(18*8));
 374
 375                 M_AST(REG_RA,        REG_SP,  1*8);
 376
 377                 M_LST(argintregs[0], REG_SP,  2*8);
 378                 M_LST(argintregs[1], REG_SP,  3*8);
 379                 M_LST(argintregs[2], REG_SP,  4*8);
 380                 M_LST(argintregs[3], REG_SP,  5*8);
 381                 M_LST(argintregs[4], REG_SP,  6*8);
 382                 M_LST(argintregs[5], REG_SP,  7*8);
 383                 M_LST(argintregs[6], REG_SP,  8*8);
 384                 M_LST(argintregs[7], REG_SP,  9*8);
 385
 386                 M_DST(argfltregs[0], REG_SP, 10*8);
 387                 M_DST(argfltregs[1], REG_SP, 11*8);
 388                 M_DST(argfltregs[2], REG_SP, 12*8);
 389                 M_DST(argfltregs[3], REG_SP, 13*8);
 390                 M_DST(argfltregs[4], REG_SP, 14*8);
 391                 M_DST(argfltregs[5], REG_SP, 15*8);
 392                 M_DST(argfltregs[6], REG_SP, 16*8);
 393                 M_DST(argfltregs[7], REG_SP, 17*8);
 394
 395                 p = dseg_addaddress (method);
 396                 M_ALD(REG_ITMP1, REG_PV, p);
 397                 M_LST(REG_ITMP1, REG_SP, 0);
 398                 p = dseg_addaddress ((void*) (builtin_trace_args));
 399                 M_ALD(REG_ITMP1, REG_PV, p);
 400                 M_JSR(REG_RA, REG_ITMP1);
 401                 M_NOP;
 402
 403                 M_ALD(REG_RA,        REG_SP,  1*8);
 404
 405                 M_LLD(argintregs[0], REG_SP,  2*8);
 406                 M_LLD(argintregs[1], REG_SP,  3*8);
 407                 M_LLD(argintregs[2], REG_SP,  4*8);
 408                 M_LLD(argintregs[3], REG_SP,  5*8);
 409                 M_LLD(argintregs[4], REG_SP,  6*8);
 410                 M_LLD(argintregs[5], REG_SP,  7*8);
 411                 M_LLD(argintregs[6], REG_SP,  8*8);
 412                 M_LLD(argintregs[7], REG_SP,  9*8);
 413
 414                 M_DLD(argfltregs[0], REG_SP, 10*8);
 415                 M_DLD(argfltregs[1], REG_SP, 11*8);
 416                 M_DLD(argfltregs[2], REG_SP, 12*8);
 417                 M_DLD(argfltregs[3], REG_SP, 13*8);
 418                 M_DLD(argfltregs[4], REG_SP, 14*8);
 419                 M_DLD(argfltregs[5], REG_SP, 15*8);
 420                 M_DLD(argfltregs[6], REG_SP, 16*8);
 421                 M_DLD(argfltregs[7], REG_SP, 17*8);
 422
 423                 M_LDA (REG_SP, REG_SP, 18*8);
 424                 }
 425
 426         /* take arguments out of register or stack frame */
 427
 428         for (p = 0, l = 0; p < mparamcount; p++) {
 429                 t = mparamtypes[p];
 430                 var = &(locals[l][t]);
 431                 l++;
 432                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 433                         l++;
 434                 if (var->type < 0)
 435                         continue;
 436                 r = var->regoff;
 437                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 438                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 439                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 440                                         {M_INTMOVE (argintregs[p], r);}
 441                                 else                                 /* reg arg -> spilled    */
 442                                         M_LST (argintregs[p], REG_SP, 8 * r);
 443                                 }
 444                         else {                                   /* stack arguments       */
 445                                 pa = p - INT_ARG_CNT;
 446                                 if (!(var->flags & INMEMORY))        /* stack arg -> register */
 447                                         M_LLD (r, REG_SP, 8 * (parentargs_base + pa));
 448                                 else {                               /* stack arg -> spilled  */
 449                                         M_LLD (REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 450                                         M_LST (REG_ITMP1, REG_SP, 8 * r);
 451                                         }
 452                                 }
 453                         }
 454                 else {                                       /* floating args         */
 455                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 456                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 457                                         {M_FLTMOVE (argfltregs[p], r);}
 458                                 else                                             /* reg arg -> spilled    */
 459                                         M_DST (argfltregs[p], REG_SP, 8 * r);
 460                                 }
 461                         else {                                   /* stack arguments       */
 462                                 pa = p - FLT_ARG_CNT;
 463                                 if (!(var->flags & INMEMORY))        /* stack-arg -> register */
 464                                         M_DLD (r, REG_SP, 8 * (parentargs_base + pa) );
 465                                 else {                               /* stack-arg -> spilled  */
 466                                         M_DLD (REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 467                                         M_DST (REG_FTMP1, REG_SP, 8 * r);
 468                                         }
 469                                 }
 470                         }
 471                 }  /* end for */
 472
 473         /* call trace function */
 474
 475         if (runverbose && !isleafmethod) {
 476                 M_LDA (REG_SP, REG_SP, -8);
 477                 p = dseg_addaddress (method);
 478                 M_ALD(REG_ITMP1, REG_PV, p);
 479                 M_AST(REG_ITMP1, REG_SP, 0);
 480                 p = dseg_addaddress ((void*) (builtin_trace_args));
 481                 M_ALD(REG_ITMP1, REG_PV, p);
 482                 M_JSR(REG_RA, REG_ITMP1);
 483                 M_NOP;
 484                 M_LDA(REG_SP, REG_SP, 8);
 485                 }
 486
 487         /* call monitorenter function */
 488
 489 #ifdef USE_THREADS
 490         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 491                 p = dseg_addaddress ((void*) (builtin_monitorenter));
 492                 M_ALD(REG_ITMP1, REG_PV, p);
 493                 M_JSR(REG_RA, REG_ITMP1);
 494                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
 495                 }
 496 #endif
 497         }
 498
 499         /* end of header generation */
 500
 501         /* walk through all basic blocks */
 502
 503         for (bbs = block_count, bptr = block; --bbs >= 0; bptr++) {
 504                 bptr -> mpc = (int)((u1*) mcodeptr - mcodebase);
 505
 506                 if (bptr->flags >= BBREACHED) {
 507
 508                 /* branch resolving */
 509
 510                 {
 511                 branchref *brefs;
 512                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 513                         gen_resolvebranch((u1*) mcodebase + brefs->branchpos,
 514                                           brefs->branchpos, bptr->mpc);
 515                         }
 516                 }
 517
 518                 /* copy interface registers to their destination */
 519
 520                 src = bptr->instack;
 521                 len = bptr->indepth;
 522                 MCODECHECK(64+len);
 523                 while (src != NULL) {
 524                         len--;
 525                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 526                                 d = reg_of_var(src, REG_ITMP1);
 527                                 M_INTMOVE(REG_ITMP1, d);
 528                                 store_reg_to_var_int(src, d);
 529                                 }
 530                         else {
 531                                 d = reg_of_var(src, REG_IFTMP);
 532                                 if ((src->varkind != STACKVAR)) {
 533                                         s2 = src->type;
 534                                         if (IS_FLT_DBL_TYPE(s2)) {
 535                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 536                                                         s1 = interfaces[len][s2].regoff;
 537                                                         M_FLTMOVE(s1,d);
 538                                                         }
 539                                                 else {
 540                                                         M_DLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 541                                                         }
 542                                                 store_reg_to_var_flt(src, d);
 543                                                 }
 544                                         else {
 545                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 546                                                         s1 = interfaces[len][s2].regoff;
 547                                                         M_INTMOVE(s1,d);
 548                                                         }
 549                                                 else {
 550                                                         M_LLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 551                                                         }
 552                                                 store_reg_to_var_int(src, d);
 553                                                 }
 554                                         }
 555                                 }
 556                         src = src->prev;
 557                         }
 558
 559                 /* walk through all instructions */
 560
 561                 src = bptr->instack;
 562                 len = bptr->icount;
 563                 for (iptr = bptr->iinstr;
 564                     len > 0;
 565                     src = iptr->dst, len--, iptr++) {
 566
 567         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 568         switch (iptr->opc) {
 569
 570                 case ICMD_NOP:        /* ...  ==> ...                                 */
 571                         break;
 572
 573                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 574
 575                         var_to_reg_int(s1, src, REG_ITMP1);
 576                         M_BEQZ(s1, 0);
 577                         mcode_addxnullrefs(mcodeptr);
 578                         M_NOP;
 579                         break;
 580
 581                 /* constant operations ************************************************/
 582
 583 #define ICONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_IADD_IMM(REG_ZERO,c,r);} \
 584                     else if(((c)>=0)&&((c)<=0xffff)){M_OR_IMM(REG_ZERO,c,r);} \
 585                     else{a=dseg_adds4(c);M_ILD(r,REG_PV,a);}
 586
 587 #define LCONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LADD_IMM(REG_ZERO,c,r);} \
 588                     else if(((c)>=0)&&((c)<=0xffff)){M_OR_IMM(REG_ZERO,c,r);} \
 589                     else{a=dseg_adds8(c);M_LLD(r,REG_PV,a);}
 590
 591                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 592                                       /* op1 = 0, val.i = constant                    */
 593
 594                         d = reg_of_var(iptr->dst, REG_ITMP1);
 595                         ICONST(d, iptr->val.i);
 596                         store_reg_to_var_int(iptr->dst, d);
 597                         break;
 598
 599                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 600                                       /* op1 = 0, val.l = constant                    */
 601
 602                         d = reg_of_var(iptr->dst, REG_ITMP1);
 603                         LCONST(d, iptr->val.l);
 604                         store_reg_to_var_int(iptr->dst, d);
 605                         break;
 606
 607                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 608                                       /* op1 = 0, val.f = constant                    */
 609
 610                         d = reg_of_var (iptr->dst, REG_FTMP1);
 611                         a = dseg_addfloat (iptr->val.f);
 612                         M_FLD(d, REG_PV, a);
 613                         store_reg_to_var_flt (iptr->dst, d);
 614                         break;
 615
 616                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 617                                       /* op1 = 0, val.d = constant                    */
 618
 619                         d = reg_of_var (iptr->dst, REG_FTMP1);
 620                         a = dseg_adddouble (iptr->val.d);
 621                         M_DLD(d, REG_PV, a);
 622                         store_reg_to_var_flt (iptr->dst, d);
 623                         break;
 624
 625                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 626                                       /* op1 = 0, val.a = constant                    */
 627
 628                         d = reg_of_var(iptr->dst, REG_ITMP1);
 629                         if (iptr->val.a) {
 630                                 a = dseg_addaddress (iptr->val.a);
 631                                 M_ALD(d, REG_PV, a);
 632                                 }
 633                         else {
 634                                 M_INTMOVE(REG_ZERO, d);
 635                                 }
 636                         store_reg_to_var_int(iptr->dst, d);
 637                         break;
 638
 639
 640                 /* load/store operations **********************************************/
 641
 642                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 643                 case ICMD_LLOAD:      /* op1 = local variable                         */
 644                 case ICMD_ALOAD:
 645
 646                         d = reg_of_var(iptr->dst, REG_ITMP1);
 647                         if ((iptr->dst->varkind == LOCALVAR) &&
 648                             (iptr->dst->varnum == iptr->op1))
 649                                 break;
 650                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 651                         if (var->flags & INMEMORY)
 652                                 M_LLD(d, REG_SP, 8 * var->regoff);
 653                         else
 654                                 {M_INTMOVE(var->regoff,d);}
 655                         store_reg_to_var_int(iptr->dst, d);
 656                         break;
 657
 658                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 659                 case ICMD_DLOAD:      /* op1 = local variable                         */
 660
 661                         d = reg_of_var(iptr->dst, REG_FTMP1);
 662                         if ((iptr->dst->varkind == LOCALVAR) &&
 663                             (iptr->dst->varnum == iptr->op1))
 664                                 break;
 665                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 666                         if (var->flags & INMEMORY)
 667                                 M_DLD(d, REG_SP, 8 * var->regoff);
 668                         else
 669                                 {M_FLTMOVE(var->regoff,d);}
 670                         store_reg_to_var_flt(iptr->dst, d);
 671                         break;
 672
 673
 674                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 675                 case ICMD_LSTORE:     /* op1 = local variable                         */
 676                 case ICMD_ASTORE:
 677
 678                         if ((src->varkind == LOCALVAR) &&
 679                             (src->varnum == iptr->op1))
 680                                 break;
 681                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 682                         if (var->flags & INMEMORY) {
 683                                 var_to_reg_int(s1, src, REG_ITMP1);
 684                                 M_LST(s1, REG_SP, 8 * var->regoff);
 685                                 }
 686                         else {
 687                                 var_to_reg_int(s1, src, var->regoff);
 688                                 M_INTMOVE(s1, var->regoff);
 689                                 }
 690                         break;
 691
 692                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 693                 case ICMD_DSTORE:     /* op1 = local variable                         */
 694
 695                         if ((src->varkind == LOCALVAR) &&
 696                             (src->varnum == iptr->op1))
 697                                 break;
 698                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 699                         if (var->flags & INMEMORY) {
 700                                 var_to_reg_flt(s1, src, REG_FTMP1);
 701                                 M_DST(s1, REG_SP, 8 * var->regoff);
 702                                 }
 703                         else {
 704                                 var_to_reg_flt(s1, src, var->regoff);
 705                                 M_FLTMOVE(s1, var->regoff);
 706                                 }
 707                         break;
 708
 709
 710                 /* pop/dup/swap operations ********************************************/
 711
 712                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 713
 714                 case ICMD_POP:        /* ..., value  ==> ...                          */
 715                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 716                         break;
 717
 718 #define M_COPY(from,to) \
 719                         d = reg_of_var(to, REG_IFTMP); \
 720                         if ((from->regoff != to->regoff) || \
 721                             ((from->flags ^ to->flags) & INMEMORY)) { \
 722                                 if (IS_FLT_DBL_TYPE(from->type)) { \
 723                                         var_to_reg_flt(s1, from, d); \
 724                                         M_FLTMOVE(s1,d); \
 725                                         store_reg_to_var_flt(to, d); \
 726                                         }\
 727                                 else { \
 728                                         var_to_reg_int(s1, from, d); \
 729                                         M_INTMOVE(s1,d); \
 730                                         store_reg_to_var_int(to, d); \
 731                                         }\
 732                                 }
 733
 734                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 735                         M_COPY(src, iptr->dst);
 736                         break;
 737
 738                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 739
 740                         M_COPY(src,       iptr->dst->prev->prev);
 741
 742                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 743
 744                         M_COPY(src,       iptr->dst);
 745                         M_COPY(src->prev, iptr->dst->prev);
 746                         break;
 747
 748                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 749
 750                         M_COPY(src->prev,       iptr->dst->prev->prev->prev);
 751
 752                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 753
 754                         M_COPY(src,             iptr->dst);
 755                         M_COPY(src->prev,       iptr->dst->prev);
 756                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 757                         M_COPY(src, iptr->dst->prev->prev->prev);
 758                         break;
 759
 760                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 761
 762                         M_COPY(src,                   iptr->dst);
 763                         M_COPY(src->prev,             iptr->dst->prev);
 764                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 765                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 766                         M_COPY(src,       iptr->dst->prev->prev->prev->prev);
 767                         M_COPY(src->prev, iptr->dst->prev->prev->prev->prev->prev);
 768                         break;
 769
 770                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 771
 772                         M_COPY(src, iptr->dst->prev);
 773                         M_COPY(src->prev, iptr->dst);
 774                         break;
 775
 776
 777                 /* integer operations *************************************************/
 778
 779                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 780
 781                         var_to_reg_int(s1, src, REG_ITMP1);
 782                         d = reg_of_var(iptr->dst, REG_ITMP3);
 783                         M_ISUB(REG_ZERO, s1, d);
 784                         store_reg_to_var_int(iptr->dst, d);
 785                         break;
 786
 787                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 788
 789                         var_to_reg_int(s1, src, REG_ITMP1);
 790                         d = reg_of_var(iptr->dst, REG_ITMP3);
 791                         M_LSUB(REG_ZERO, s1, d);
 792                         store_reg_to_var_int(iptr->dst, d);
 793                         break;
 794
 795                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 796
 797                         var_to_reg_int(s1, src, REG_ITMP1);
 798                         d = reg_of_var(iptr->dst, REG_ITMP3);
 799                         M_INTMOVE(s1, d);
 800                         store_reg_to_var_int(iptr->dst, d);
 801                         break;
 802
 803                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 804
 805                         var_to_reg_int(s1, src, REG_ITMP1);
 806                         d = reg_of_var(iptr->dst, REG_ITMP3);
 807                         M_IADD(s1, REG_ZERO, d );
 808                         store_reg_to_var_int(iptr->dst, d);
 809                         break;
 810
 811                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 812
 813                         var_to_reg_int(s1, src, REG_ITMP1);
 814                         d = reg_of_var(iptr->dst, REG_ITMP3);
 815                         M_LSLL_IMM(s1, 56, d);
 816                         M_LSRA_IMM( d, 56, d);
 817                         store_reg_to_var_int(iptr->dst, d);
 818                         break;
 819
 820                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 821
 822                         var_to_reg_int(s1, src, REG_ITMP1);
 823                         d = reg_of_var(iptr->dst, REG_ITMP3);
 824             M_CZEXT(s1, d);
 825                         store_reg_to_var_int(iptr->dst, d);
 826                         break;
 827
 828                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 829
 830                         var_to_reg_int(s1, src, REG_ITMP1);
 831                         d = reg_of_var(iptr->dst, REG_ITMP3);
 832                         M_LSLL_IMM(s1, 48, d);
 833                         M_LSRA_IMM( d, 48, d);
 834                         store_reg_to_var_int(iptr->dst, d);
 835                         break;
 836
 837
 838                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 839
 840                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 841                         var_to_reg_int(s2, src, REG_ITMP2);
 842                         d = reg_of_var(iptr->dst, REG_ITMP3);
 843                         M_IADD(s1, s2, d);
 844                         store_reg_to_var_int(iptr->dst, d);
 845                         break;
 846
 847                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 848                                       /* val.i = constant                             */
 849
 850                         var_to_reg_int(s1, src, REG_ITMP1);
 851                         d = reg_of_var(iptr->dst, REG_ITMP3);
 852                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
 853                                 M_IADD_IMM(s1, iptr->val.i, d);
 854                                 }
 855                         else {
 856                                 ICONST(REG_ITMP2, iptr->val.i);
 857                                 M_IADD(s1, REG_ITMP2, d);
 858                                 }
 859                         store_reg_to_var_int(iptr->dst, d);
 860                         break;
 861
 862                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 863
 864                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 865                         var_to_reg_int(s2, src, REG_ITMP2);
 866                         d = reg_of_var(iptr->dst, REG_ITMP3);
 867                         M_LADD(s1, s2, d);
 868                         store_reg_to_var_int(iptr->dst, d);
 869                         break;
 870
 871                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 872                                       /* val.l = constant                             */
 873
 874                         var_to_reg_int(s1, src, REG_ITMP1);
 875                         d = reg_of_var(iptr->dst, REG_ITMP3);
 876                         if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
 877                                 M_LADD_IMM(s1, iptr->val.l, d);
 878                                 }
 879                         else {
 880                                 LCONST(REG_ITMP2, iptr->val.l);
 881                                 M_LADD(s1, REG_ITMP2, d);
 882                                 }
 883                         store_reg_to_var_int(iptr->dst, d);
 884                         break;
 885
 886                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 887
 888                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 889                         var_to_reg_int(s2, src, REG_ITMP2);
 890                         d = reg_of_var(iptr->dst, REG_ITMP3);
 891                         M_ISUB(s1, s2, d);
 892                         store_reg_to_var_int(iptr->dst, d);
 893                         break;
 894
 895                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 896                                       /* val.i = constant                             */
 897
 898                         var_to_reg_int(s1, src, REG_ITMP1);
 899                         d = reg_of_var(iptr->dst, REG_ITMP3);
 900                         if ((iptr->val.i >= -32767) && (iptr->val.i <= 32768)) {
 901                                 M_IADD_IMM(s1, -iptr->val.i, d);
 902                                 }
 903                         else {
 904                                 ICONST(REG_ITMP2, iptr->val.i);
 905                                 M_ISUB(s1, REG_ITMP2, d);
 906                                 }
 907                         store_reg_to_var_int(iptr->dst, d);
 908                         break;
 909
 910                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 911
 912                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 913                         var_to_reg_int(s2, src, REG_ITMP2);
 914                         d = reg_of_var(iptr->dst, REG_ITMP3);
 915                         M_LSUB(s1, s2, d);
 916                         store_reg_to_var_int(iptr->dst, d);
 917                         break;
 918
 919                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 920                                       /* val.l = constant                             */
 921
 922                         var_to_reg_int(s1, src, REG_ITMP1);
 923                         d = reg_of_var(iptr->dst, REG_ITMP3);
 924                         if ((iptr->val.l >= -32767) && (iptr->val.l <= 32768)) {
 925                                 M_LADD_IMM(s1, -iptr->val.l, d);
 926                                 }
 927                         else {
 928                                 LCONST(REG_ITMP2, iptr->val.l);
 929                                 M_LSUB(s1, REG_ITMP2, d);
 930                                 }
 931                         store_reg_to_var_int(iptr->dst, d);
 932                         break;
 933
 934                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 935
 936                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 937                         var_to_reg_int(s2, src, REG_ITMP2);
 938                         d = reg_of_var(iptr->dst, REG_ITMP3);
 939                         M_IMUL(s1, s2);
 940                         M_MFLO(d);
 941                         M_NOP;
 942                         M_NOP;
 943                         store_reg_to_var_int(iptr->dst, d);
 944                         break;
 945
 946                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 947                                       /* val.i = constant                             */
 948
 949                         var_to_reg_int(s1, src, REG_ITMP1);
 950                         d = reg_of_var(iptr->dst, REG_ITMP3);
 951                         ICONST(REG_ITMP2, iptr->val.i);
 952                         M_IMUL(s1, REG_ITMP2);
 953                         M_MFLO(d);
 954                         M_NOP;
 955                         M_NOP;
 956                         store_reg_to_var_int(iptr->dst, d);
 957                         break;
 958
 959                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 960
 961                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 962                         var_to_reg_int(s2, src, REG_ITMP2);
 963                         d = reg_of_var(iptr->dst, REG_ITMP3);
 964                         M_LMUL(s1, s2);
 965                         M_MFLO(d);
 966                         M_NOP;
 967                         M_NOP;
 968                         store_reg_to_var_int(iptr->dst, d);
 969                         break;
 970
 971                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
 972                                       /* val.l = constant                             */
 973
 974                         var_to_reg_int(s1, src, REG_ITMP1);
 975                         d = reg_of_var(iptr->dst, REG_ITMP3);
 976                         LCONST(REG_ITMP2, iptr->val.l);
 977                         M_LMUL(s1, REG_ITMP2);
 978                         M_MFLO(d);
 979                         M_NOP;
 980                         M_NOP;
 981                         store_reg_to_var_int(iptr->dst, d);
 982                         break;
 983
 984                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 985
 986                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 987                         var_to_reg_int(s2, src, REG_ITMP2);
 988                         d = reg_of_var(iptr->dst, REG_ITMP3);
 989                         M_IDIV(s1, s2);
 990                         M_MFLO(d);
 991                         M_NOP;
 992                         M_NOP;
 993                         store_reg_to_var_int(iptr->dst, d);
 994                         break;
 995 #if 0
 996                 case ICMD_IDIVCONST:  /* ..., value  ==> ..., value / constant        */
 997                                       /* val.i = constant                             */
 998
 999                         var_to_reg_int(s1, src, REG_ITMP1);
1000                         d = reg_of_var(iptr->dst, REG_ITMP3);
1001                         ICONST(REG_ITMP2, iptr->val.i);
1002                         M_IDIV(s1, REG_ITMP2);
1003                         M_MFLO(d);
1004                         M_NOP;
1005                         M_NOP;
1006                         store_reg_to_var_int(iptr->dst, d);
1007                         break;
1008 #endif
1009                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1010
1011                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1012                         var_to_reg_int(s2, src, REG_ITMP2);
1013                         d = reg_of_var(iptr->dst, REG_ITMP3);
1014                         M_LDIV(s1, s2);
1015                         M_MFLO(d);
1016                         M_NOP;
1017                         M_NOP;
1018                         store_reg_to_var_int(iptr->dst, d);
1019                         break;
1020 #if 0
1021                 case ICMD_LDIVCONST:  /* ..., value  ==> ..., value / constant        */
1022                                       /* val.l = constant                             */
1023
1024                         var_to_reg_int(s1, src, REG_ITMP1);
1025                         d = reg_of_var(iptr->dst, REG_ITMP3);
1026                         LCONST(REG_ITMP2, iptr->val.l);
1027                         M_LDIV(s1, REG_ITMP2);
1028                         M_MFLO(d);
1029                         M_NOP;
1030                         M_NOP;
1031                         store_reg_to_var_int(iptr->dst, d);
1032                         break;
1033 #endif
1034                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1035
1036                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1037                         var_to_reg_int(s2, src, REG_ITMP2);
1038                         d = reg_of_var(iptr->dst, REG_ITMP3);
1039                         M_IDIV(s1, s2);
1040                         M_MFHI(d);
1041                         M_NOP;
1042                         M_NOP;
1043                         store_reg_to_var_int(iptr->dst, d);
1044                         break;
1045 #if 0
1046                 case ICMD_IREMCONST:  /* ..., value  ==> ..., value % constant        */
1047                                       /* val.i = constant                             */
1048
1049                         var_to_reg_int(s1, src, REG_ITMP1);
1050                         d = reg_of_var(iptr->dst, REG_ITMP3);
1051                         ICONST(REG_ITMP2, iptr->val.i);
1052                         M_IDIV(s1, REG_ITMP2);
1053                         M_MFHI(d);
1054                         M_NOP;
1055                         M_NOP;
1056                         store_reg_to_var_int(iptr->dst, d);
1057                         break;
1058 #endif
1059                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1060
1061                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1062                         var_to_reg_int(s2, src, REG_ITMP2);
1063                         d = reg_of_var(iptr->dst, REG_ITMP3);
1064                         M_LDIV(s1, s2);
1065                         M_MFHI(d);
1066                         M_NOP;
1067                         M_NOP;
1068                         store_reg_to_var_int(iptr->dst, d);
1069                         break;
1070 #if 0
1071                 case ICMD_LREMCONST:  /* ..., value  ==> ..., value % constant        */
1072                                       /* val.l = constant                             */
1073
1074                         var_to_reg_int(s1, src, REG_ITMP1);
1075                         d = reg_of_var(iptr->dst, REG_ITMP3);
1076                         LCONST(REG_ITMP2, iptr->val.l);
1077                         M_LDIV(s1, REG_ITMP2);
1078                         M_MFHI(d);
1079                         M_NOP;
1080                         M_NOP;
1081                         store_reg_to_var_int(iptr->dst, d);
1082                         break;
1083 #endif
1084                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
1085                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
1086
1087                         var_to_reg_int(s1, src, REG_ITMP1);
1088                         d = reg_of_var(iptr->dst, REG_ITMP3);
1089                         M_LSRA_IMM(s1, 63, REG_ITMP2);
1090                         M_LSRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
1091                         M_LADD(s1, REG_ITMP2, REG_ITMP2);
1092                         M_LSRA_IMM(REG_ITMP2, iptr->val.i, d);
1093                         store_reg_to_var_int(iptr->dst, d);
1094                         break;
1095
1096                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1097
1098                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1099                         var_to_reg_int(s2, src, REG_ITMP2);
1100                         d = reg_of_var(iptr->dst, REG_ITMP3);
1101                         M_ISLL(s1, s2, d);
1102                         store_reg_to_var_int(iptr->dst, d);
1103                         break;
1104
1105                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1106                                       /* val.i = constant                             */
1107
1108                         var_to_reg_int(s1, src, REG_ITMP1);
1109                         d = reg_of_var(iptr->dst, REG_ITMP3);
1110                         M_ISLL_IMM(s1, iptr->val.i, d);
1111                         store_reg_to_var_int(iptr->dst, d);
1112                         break;
1113
1114                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1115
1116                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1117                         var_to_reg_int(s2, src, REG_ITMP2);
1118                         d = reg_of_var(iptr->dst, REG_ITMP3);
1119                         M_ISRA(s1, s2, d);
1120                         store_reg_to_var_int(iptr->dst, d);
1121                         break;
1122
1123                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1124                                       /* val.i = constant                             */
1125
1126                         var_to_reg_int(s1, src, REG_ITMP1);
1127                         d = reg_of_var(iptr->dst, REG_ITMP3);
1128                         M_ISRA_IMM(s1, iptr->val.i, d);
1129                         store_reg_to_var_int(iptr->dst, d);
1130                         break;
1131
1132                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1133
1134                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1135                         var_to_reg_int(s2, src, REG_ITMP2);
1136                         d = reg_of_var(iptr->dst, REG_ITMP3);
1137                         M_ISRL(s1, s2, d);
1138                         store_reg_to_var_int(iptr->dst, d);
1139                         break;
1140
1141                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1142                                       /* val.i = constant                             */
1143
1144                         var_to_reg_int(s1, src, REG_ITMP1);
1145                         d = reg_of_var(iptr->dst, REG_ITMP3);
1146                         M_ISRL_IMM(s1, iptr->val.i, d);
1147                         store_reg_to_var_int(iptr->dst, d);
1148                         break;
1149
1150                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1151
1152                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1153                         var_to_reg_int(s2, src, REG_ITMP2);
1154                         d = reg_of_var(iptr->dst, REG_ITMP3);
1155                         M_LSLL(s1, s2, d);
1156                         store_reg_to_var_int(iptr->dst, d);
1157                         break;
1158
1159                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1160                                       /* val.l = constant                             */
1161
1162                         var_to_reg_int(s1, src, REG_ITMP1);
1163                         d = reg_of_var(iptr->dst, REG_ITMP3);
1164                         M_LSLL_IMM(s1, iptr->val.l, d);
1165                         store_reg_to_var_int(iptr->dst, d);
1166                         break;
1167
1168                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1169
1170                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1171                         var_to_reg_int(s2, src, REG_ITMP2);
1172                         d = reg_of_var(iptr->dst, REG_ITMP3);
1173                         M_LSRA(s1, s2, d);
1174                         store_reg_to_var_int(iptr->dst, d);
1175                         break;
1176
1177                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1178                                       /* val.l = constant                             */
1179
1180                         var_to_reg_int(s1, src, REG_ITMP1);
1181                         d = reg_of_var(iptr->dst, REG_ITMP3);
1182                         M_LSRA_IMM(s1, iptr->val.l, d);
1183                         store_reg_to_var_int(iptr->dst, d);
1184                         break;
1185
1186                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1187
1188                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1189                         var_to_reg_int(s2, src, REG_ITMP2);
1190                         d = reg_of_var(iptr->dst, REG_ITMP3);
1191                         M_LSRL(s1, s2, d);
1192                         store_reg_to_var_int(iptr->dst, d);
1193                         break;
1194
1195                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1196                                       /* val.l = constant                             */
1197
1198                         var_to_reg_int(s1, src, REG_ITMP1);
1199                         d = reg_of_var(iptr->dst, REG_ITMP3);
1200                         M_LSRL_IMM(s1, iptr->val.l, d);
1201                         store_reg_to_var_int(iptr->dst, d);
1202                         break;
1203
1204                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1205                 case ICMD_LAND:
1206
1207                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1208                         var_to_reg_int(s2, src, REG_ITMP2);
1209                         d = reg_of_var(iptr->dst, REG_ITMP3);
1210                         M_AND(s1, s2, d);
1211                         store_reg_to_var_int(iptr->dst, d);
1212                         break;
1213
1214                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1215                                       /* val.i = constant                             */
1216
1217                         var_to_reg_int(s1, src, REG_ITMP1);
1218                         d = reg_of_var(iptr->dst, REG_ITMP3);
1219                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1220                                 M_AND_IMM(s1, iptr->val.i, d);
1221                                 }
1222                         else {
1223                                 ICONST(REG_ITMP2, iptr->val.i);
1224                                 M_AND(s1, REG_ITMP2, d);
1225                                 }
1226                         store_reg_to_var_int(iptr->dst, d);
1227                         break;
1228
1229                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1230                                       /* val.i = constant                             */
1231
1232                         var_to_reg_int(s1, src, REG_ITMP1);
1233                         d = reg_of_var(iptr->dst, REG_ITMP3);
1234                         if (s1 == d) {
1235                                 M_MOV(s1, REG_ITMP1);
1236                                 s1 = REG_ITMP1;
1237                                 }
1238                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1239                                 M_AND_IMM(s1, iptr->val.i, d);
1240                                 M_BGEZ(s1, 4);
1241                                 M_NOP;
1242                                 M_ISUB(REG_ZERO, s1, d);
1243                                 M_AND_IMM(d, iptr->val.i, d);
1244                                 }
1245                         else {
1246                                 ICONST(REG_ITMP2, iptr->val.i);
1247                                 M_AND(s1, REG_ITMP2, d);
1248                                 M_BGEZ(s1, 4);
1249                                 M_NOP;
1250                                 M_ISUB(REG_ZERO, s1, d);
1251                                 M_AND(d, REG_ITMP2, d);
1252                                 }
1253                         M_ISUB(REG_ZERO, d, d);
1254                         store_reg_to_var_int(iptr->dst, d);
1255                         break;
1256
1257                 case ICMD_IREM0X10001:  /* ..., value  ==> ..., value % 0x100001      */
1258
1259 /*          b = value & 0xffff;
1260                         a = value >> 16;
1261                         a = ((b - a) & 0xffff) + (b < a);
1262 */
1263                         var_to_reg_int(s1, src, REG_ITMP1);
1264                         d = reg_of_var(iptr->dst, REG_ITMP3);
1265                         if (s1 == d) {
1266                                 M_MOV(s1, REG_ITMP3);
1267                                 s1 = REG_ITMP3;
1268                                 }
1269                         M_BLTZ(s1, 7);
1270             M_CZEXT(s1, REG_ITMP2);                             /* delay slot */
1271                         M_ISRA_IMM(s1, 16, d);
1272                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1273                         M_ISUB(REG_ITMP2, d, d);
1274             M_CZEXT(d, d);
1275                         M_BR(7);
1276                         M_IADD(d, REG_ITMP1, d);                            /* delay slot */
1277
1278                         M_LUI(REG_ITMP2, 1);
1279                         M_IADD_IMM(REG_ITMP2, 1, REG_ITMP2);
1280                         M_IDIV(s1, REG_ITMP2);
1281                         M_MFHI(d);
1282                         M_NOP;
1283                         M_NOP;
1284                         store_reg_to_var_int(iptr->dst, d);
1285                         break;
1286
1287                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1288                                       /* val.l = constant                             */
1289
1290                         var_to_reg_int(s1, src, REG_ITMP1);
1291                         d = reg_of_var(iptr->dst, REG_ITMP3);
1292                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1293                                 M_AND_IMM(s1, iptr->val.l, d);
1294                                 }
1295                         else {
1296                                 LCONST(REG_ITMP2, iptr->val.l);
1297                                 M_AND(s1, REG_ITMP2, d);
1298                                 }
1299                         store_reg_to_var_int(iptr->dst, d);
1300                         break;
1301
1302                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1303                                       /* val.l = constant                             */
1304
1305                         var_to_reg_int(s1, src, REG_ITMP1);
1306                         d = reg_of_var(iptr->dst, REG_ITMP3);
1307                         if (s1 == d) {
1308                                 M_MOV(s1, REG_ITMP1);
1309                                 s1 = REG_ITMP1;
1310                                 }
1311                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1312                                 M_AND_IMM(s1, iptr->val.l, d);
1313                                 M_BGEZ(s1, 4);
1314                                 M_NOP;
1315                                 M_LSUB(REG_ZERO, s1, d);
1316                                 M_AND_IMM(d, iptr->val.l, d);
1317                                 }
1318                         else {
1319                                 LCONST(REG_ITMP2, iptr->val.l);
1320                                 M_AND(s1, REG_ITMP2, d);
1321                                 M_BGEZ(s1, 4);
1322                                 M_NOP;
1323                                 M_LSUB(REG_ZERO, s1, d);
1324                                 M_AND(d, REG_ITMP2, d);
1325                                 }
1326                         M_LSUB(REG_ZERO, d, d);
1327                         store_reg_to_var_int(iptr->dst, d);
1328                         break;
1329
1330                 case ICMD_LREM0X10001:/* ..., value  ==> ..., value % 0x10001         */
1331
1332                         var_to_reg_int(s1, src, REG_ITMP1);
1333                         d = reg_of_var(iptr->dst, REG_ITMP3);
1334                         M_LUI(REG_ITMP2, 1);
1335                         M_LADD_IMM(REG_ITMP2, 1, REG_ITMP2);
1336                         M_LDIV(s1, REG_ITMP2);
1337                         M_MFHI(d);
1338                         M_NOP;
1339                         M_NOP;
1340                         store_reg_to_var_int(iptr->dst, d);
1341                         break;
1342
1343                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1344                 case ICMD_LOR:
1345
1346                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1347                         var_to_reg_int(s2, src, REG_ITMP2);
1348                         d = reg_of_var(iptr->dst, REG_ITMP3);
1349                         M_OR( s1,s2, d);
1350                         store_reg_to_var_int(iptr->dst, d);
1351                         break;
1352
1353                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1354                                       /* val.i = constant                             */
1355
1356                         var_to_reg_int(s1, src, REG_ITMP1);
1357                         d = reg_of_var(iptr->dst, REG_ITMP3);
1358                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1359                                 M_OR_IMM(s1, iptr->val.i, d);
1360                                 }
1361                         else {
1362                                 ICONST(REG_ITMP2, iptr->val.i);
1363                                 M_OR(s1, REG_ITMP2, d);
1364                                 }
1365                         store_reg_to_var_int(iptr->dst, d);
1366                         break;
1367
1368                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1369                                       /* val.l = constant                             */
1370
1371                         var_to_reg_int(s1, src, REG_ITMP1);
1372                         d = reg_of_var(iptr->dst, REG_ITMP3);
1373                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1374                                 M_OR_IMM(s1, iptr->val.l, d);
1375                                 }
1376                         else {
1377                                 LCONST(REG_ITMP2, iptr->val.l);
1378                                 M_OR(s1, REG_ITMP2, d);
1379                                 }
1380                         store_reg_to_var_int(iptr->dst, d);
1381                         break;
1382
1383                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1384                 case ICMD_LXOR:
1385
1386                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1387                         var_to_reg_int(s2, src, REG_ITMP2);
1388                         d = reg_of_var(iptr->dst, REG_ITMP3);
1389                         M_XOR(s1, s2, d);
1390                         store_reg_to_var_int(iptr->dst, d);
1391                         break;
1392
1393                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1394                                       /* val.i = constant                             */
1395
1396                         var_to_reg_int(s1, src, REG_ITMP1);
1397                         d = reg_of_var(iptr->dst, REG_ITMP3);
1398                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1399                                 M_XOR_IMM(s1, iptr->val.i, d);
1400                                 }
1401                         else {
1402                                 ICONST(REG_ITMP2, iptr->val.i);
1403                                 M_XOR(s1, REG_ITMP2, d);
1404                                 }
1405                         store_reg_to_var_int(iptr->dst, d);
1406                         break;
1407
1408                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1409                                       /* val.l = constant                             */
1410
1411                         var_to_reg_int(s1, src, REG_ITMP1);
1412                         d = reg_of_var(iptr->dst, REG_ITMP3);
1413                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1414                                 M_XOR_IMM(s1, iptr->val.l, d);
1415                                 }
1416                         else {
1417                                 LCONST(REG_ITMP2, iptr->val.l);
1418                                 M_XOR(s1, REG_ITMP2, d);
1419                                 }
1420                         store_reg_to_var_int(iptr->dst, d);
1421                         break;
1422
1423
1424                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1425
1426                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1427                         var_to_reg_int(s2, src, REG_ITMP2);
1428                         d = reg_of_var(iptr->dst, REG_ITMP3);
1429                         M_CMPLT(s1, s2, REG_ITMP3);
1430                         M_CMPLT(s2, s1, REG_ITMP1);
1431                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1432                         store_reg_to_var_int(iptr->dst, d);
1433                         break;
1434
1435
1436                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1437                                       /* op1 = variable, val.i = constant             */
1438
1439                         var = &(locals[iptr->op1][TYPE_INT]);
1440                         if (var->flags & INMEMORY) {
1441                                 s1 = REG_ITMP1;
1442                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1443                                 }
1444                         else
1445                                 s1 = var->regoff;
1446                         M_IADD_IMM(s1, iptr->val.i, s1);
1447                         if (var->flags & INMEMORY)
1448                                 M_LST(s1, REG_SP, 8 * var->regoff);
1449                         break;
1450
1451
1452                 /* floating operations ************************************************/
1453
1454                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1455
1456                         var_to_reg_flt(s1, src, REG_FTMP1);
1457                         d = reg_of_var(iptr->dst, REG_FTMP3);
1458                         M_FNEG(s1, d);
1459                         store_reg_to_var_flt(iptr->dst, d);
1460                         break;
1461
1462                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1463
1464                         var_to_reg_flt(s1, src, REG_FTMP1);
1465                         d = reg_of_var(iptr->dst, REG_FTMP3);
1466                         M_DNEG(s1, d);
1467                         store_reg_to_var_flt(iptr->dst, d);
1468                         break;
1469
1470                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1471
1472                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1473                         var_to_reg_flt(s2, src, REG_FTMP2);
1474                         d = reg_of_var(iptr->dst, REG_FTMP3);
1475                         M_FADD(s1, s2, d);
1476                         store_reg_to_var_flt(iptr->dst, d);
1477                         break;
1478
1479                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1480
1481                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1482                         var_to_reg_flt(s2, src, REG_FTMP2);
1483                         d = reg_of_var(iptr->dst, REG_FTMP3);
1484                         M_DADD(s1, s2, d);
1485                         store_reg_to_var_flt(iptr->dst, d);
1486                         break;
1487
1488                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1489
1490                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1491                         var_to_reg_flt(s2, src, REG_FTMP2);
1492                         d = reg_of_var(iptr->dst, REG_FTMP3);
1493                         M_FSUB(s1, s2, d);
1494                         store_reg_to_var_flt(iptr->dst, d);
1495                         break;
1496
1497                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1498
1499                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1500                         var_to_reg_flt(s2, src, REG_FTMP2);
1501                         d = reg_of_var(iptr->dst, REG_FTMP3);
1502                         M_DSUB(s1, s2, d);
1503                         store_reg_to_var_flt(iptr->dst, d);
1504                         break;
1505
1506                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1507
1508                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1509                         var_to_reg_flt(s2, src, REG_FTMP2);
1510                         d = reg_of_var(iptr->dst, REG_FTMP3);
1511                         M_FMUL(s1, s2, d);
1512                         store_reg_to_var_flt(iptr->dst, d);
1513                         break;
1514
1515                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1516
1517                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1518                         var_to_reg_flt(s2, src, REG_FTMP2);
1519                         d = reg_of_var(iptr->dst, REG_FTMP3);
1520                         M_DMUL(s1, s2, d);
1521                         store_reg_to_var_flt(iptr->dst, d);
1522                         break;
1523
1524                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1525
1526                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1527                         var_to_reg_flt(s2, src, REG_FTMP2);
1528                         d = reg_of_var(iptr->dst, REG_FTMP3);
1529                         M_FDIV(s1, s2, d);
1530                         store_reg_to_var_flt(iptr->dst, d);
1531                         break;
1532
1533                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1534
1535                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1536                         var_to_reg_flt(s2, src, REG_FTMP2);
1537                         d = reg_of_var(iptr->dst, REG_FTMP3);
1538                         M_DDIV(s1, s2, d);
1539                         store_reg_to_var_flt(iptr->dst, d);
1540                         break;
1541
1542                 case ICMD_FREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1543
1544                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1545                         var_to_reg_flt(s2, src, REG_FTMP2);
1546                         d = reg_of_var(iptr->dst, REG_FTMP3);
1547                         M_FDIV(s1,s2, REG_FTMP3);
1548                         M_FLOORFL(REG_FTMP3, REG_FTMP3);
1549                         M_CVTLF(REG_FTMP3, REG_FTMP3);
1550                         M_FMUL(REG_FTMP3, s2, REG_FTMP3);
1551                         M_FSUB(s1, REG_FTMP3, d);
1552                         store_reg_to_var_flt(iptr->dst, d);
1553                     break;
1554
1555                 case ICMD_DREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1556
1557                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1558                         var_to_reg_flt(s2, src, REG_FTMP2);
1559                         d = reg_of_var(iptr->dst, REG_FTMP3);
1560                         M_DDIV(s1,s2, REG_FTMP3);
1561                         M_FLOORDL(REG_FTMP3, REG_FTMP3);
1562                         M_CVTLD(REG_FTMP3, REG_FTMP3);
1563                         M_DMUL(REG_FTMP3, s2, REG_FTMP3);
1564                         M_DSUB(s1, REG_FTMP3, d);
1565                         store_reg_to_var_flt(iptr->dst, d);
1566                     break;
1567
1568                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1569                 case ICMD_L2F:
1570                         var_to_reg_int(s1, src, REG_ITMP1);
1571                         d = reg_of_var(iptr->dst, REG_FTMP3);
1572                         M_MOVLD(s1, d);
1573                         M_CVTLF(d, d);
1574                         store_reg_to_var_flt(iptr->dst, d);
1575                         break;
1576
1577                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1578                 case ICMD_L2D:
1579                         var_to_reg_int(s1, src, REG_ITMP1);
1580                         d = reg_of_var(iptr->dst, REG_FTMP3);
1581                         M_MOVLD(s1, d);
1582                         M_CVTLD(d, d);
1583                         store_reg_to_var_flt(iptr->dst, d);
1584                         break;
1585
1586                 case ICMD_F2I:       /* ..., (float) value  ==> ..., (int) value      */
1587
1588                         var_to_reg_flt(s1, src, REG_FTMP1);
1589                         d = reg_of_var(iptr->dst, REG_ITMP3);
1590                         M_CVTFI(s1, REG_FTMP1);
1591                         M_MOVDL(REG_FTMP1, d);
1592                         store_reg_to_var_int(iptr->dst, d);
1593                         break;
1594
1595                 case ICMD_D2I:       /* ..., (double) value  ==> ..., (int) value     */
1596
1597                         var_to_reg_flt(s1, src, REG_FTMP1);
1598                         d = reg_of_var(iptr->dst, REG_ITMP3);
1599                         M_CVTDI(s1, REG_FTMP1);
1600                         M_MOVDL(REG_FTMP1, d);
1601                         store_reg_to_var_int(iptr->dst, d);
1602                         break;
1603
1604                 case ICMD_F2L:       /* ..., (float) value  ==> ..., (long) value     */
1605
1606                         var_to_reg_flt(s1, src, REG_FTMP1);
1607                         d = reg_of_var(iptr->dst, REG_ITMP3);
1608                         M_CVTFL(s1, REG_FTMP1);
1609                         M_MOVDL(REG_FTMP1, d);
1610                         store_reg_to_var_int(iptr->dst, d);
1611                         break;
1612
1613                 case ICMD_D2L:       /* ..., (double) value  ==> ..., (long) value    */
1614
1615                         var_to_reg_flt(s1, src, REG_FTMP1);
1616                         d = reg_of_var(iptr->dst, REG_ITMP3);
1617                         M_CVTDL(s1, REG_FTMP1);
1618                         M_MOVDL(REG_FTMP1, d);
1619                         store_reg_to_var_int(iptr->dst, d);
1620                         break;
1621
1622                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1623
1624                         var_to_reg_flt(s1, src, REG_FTMP1);
1625                         d = reg_of_var(iptr->dst, REG_FTMP3);
1626                         M_CVTFD(s1, d);
1627                         store_reg_to_var_flt(iptr->dst, d);
1628                         break;
1629
1630                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1631
1632                         var_to_reg_flt(s1, src, REG_FTMP1);
1633                         d = reg_of_var(iptr->dst, REG_FTMP3);
1634                         M_CVTDF(s1, d);
1635                         store_reg_to_var_flt(iptr->dst, d);
1636                         break;
1637
1638                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1639
1640                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1641                         var_to_reg_flt(s2, src, REG_FTMP2);
1642                         d = reg_of_var(iptr->dst, REG_ITMP3);
1643                         M_FCMPUEQF(s1, s2);
1644                         M_FBF(2);                          /* jump over next instructions */
1645                         M_LSUB_IMM(REG_ZERO, 1, d);
1646                         M_CLR(d);
1647                         M_FCMPULTF(s2, s1);
1648                         M_FBF(2);                          /* jump over next instruction  */
1649                         M_NOP;
1650                         M_LADD_IMM(REG_ZERO, 1, d);
1651                         store_reg_to_var_int(iptr->dst, d);
1652                         break;
1653
1654                 case ICMD_DCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1655
1656                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1657                         var_to_reg_flt(s2, src, REG_FTMP2);
1658                         d = reg_of_var(iptr->dst, REG_ITMP3);
1659                         M_FCMPUEQD(s1, s2);
1660                         M_FBF(2);                          /* jump over next instructions */
1661                         M_LSUB_IMM(REG_ZERO, 1, d);
1662                         M_CLR(d);
1663                         M_FCMPULTD(s2, s1);
1664                         M_FBF(2);                          /* jump over next instruction  */
1665                         M_NOP;
1666                         M_LADD_IMM(REG_ZERO, 1, d);
1667                         store_reg_to_var_int(iptr->dst, d);
1668                         break;
1669
1670                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1671
1672                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1673                         var_to_reg_flt(s2, src, REG_FTMP2);
1674                         d = reg_of_var(iptr->dst, REG_ITMP3);
1675                         M_FCMPUEQF(s1, s2);
1676                         M_FBF(2);                          /* jump over next instruction  */
1677                         M_LADD_IMM(REG_ZERO, 1, d);
1678                         M_CLR(d);
1679                         M_FCMPULTF(s1, s2);
1680                         M_FBF(2);                          /* jump over next instruction  */
1681                         M_NOP;
1682                         M_LSUB_IMM(REG_ZERO, 1, d);
1683                         store_reg_to_var_int(iptr->dst, d);
1684                         break;
1685
1686                 case ICMD_DCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1687
1688                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1689                         var_to_reg_flt(s2, src, REG_FTMP2);
1690                         d = reg_of_var(iptr->dst, REG_ITMP3);
1691                         M_FCMPUEQD(s1, s2);
1692                         M_FBF(2);                          /* jump over next instruction  */
1693                         M_LADD_IMM(REG_ZERO, 1, d);
1694                         M_CLR(d);
1695                         M_FCMPULTD(s1, s2);
1696                         M_FBF(2);                          /* jump over next instruction  */
1697                         M_NOP;
1698                         M_LSUB_IMM(REG_ZERO, 1, d);
1699                         store_reg_to_var_int(iptr->dst, d);
1700                         break;
1701
1702
1703                 /* memory operations **************************************************/
1704
1705 #define gen_bound_check \
1706                         if (checkbounds) {\
1707                                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1708                                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
1709                                 M_BEQZ(REG_ITMP3, 0);\
1710                                 mcode_addxboundrefs(mcodeptr);\
1711                                 M_NOP;\
1712                                 }
1713
1714                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1715
1716                         var_to_reg_int(s1, src, REG_ITMP1);
1717                         d = reg_of_var(iptr->dst, REG_ITMP3);
1718                         gen_nullptr_check(s1);
1719                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1720                         store_reg_to_var_int(iptr->dst, d);
1721                         break;
1722
1723                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1724
1725                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1726                         var_to_reg_int(s2, src, REG_ITMP2);
1727                         d = reg_of_var(iptr->dst, REG_ITMP3);
1728                         gen_nullptr_check(s1);
1729                         gen_bound_check;
1730                         M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
1731                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1732                         M_ALD(d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1733                         store_reg_to_var_int(iptr->dst, d);
1734                         break;
1735
1736                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1737
1738                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1739                         var_to_reg_int(s2, src, REG_ITMP2);
1740                         d = reg_of_var(iptr->dst, REG_ITMP3);
1741                         gen_nullptr_check(s1);
1742                         gen_bound_check;
1743                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1744                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1745                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1746                         store_reg_to_var_int(iptr->dst, d);
1747                         break;
1748
1749                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1750
1751                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1752                         var_to_reg_int(s2, src, REG_ITMP2);
1753                         d = reg_of_var(iptr->dst, REG_ITMP3);
1754                         gen_nullptr_check(s1);
1755                         gen_bound_check;
1756                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1757                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1758                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1759                         store_reg_to_var_int(iptr->dst, d);
1760                         break;
1761
1762                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1763
1764                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1765                         var_to_reg_int(s2, src, REG_ITMP2);
1766                         d = reg_of_var(iptr->dst, REG_FTMP3);
1767                         gen_nullptr_check(s1);
1768                         gen_bound_check;
1769                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1770                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1771                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1772                         store_reg_to_var_flt(iptr->dst, d);
1773                         break;
1774
1775                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1776
1777                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1778                         var_to_reg_int(s2, src, REG_ITMP2);
1779                         d = reg_of_var(iptr->dst, REG_FTMP3);
1780                         gen_nullptr_check(s1);
1781                         gen_bound_check;
1782                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1783                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1784                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1785                         store_reg_to_var_flt(iptr->dst, d);
1786                         break;
1787
1788                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1789
1790                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1791                         var_to_reg_int(s2, src, REG_ITMP2);
1792                         d = reg_of_var(iptr->dst, REG_ITMP3);
1793                         gen_nullptr_check(s1);
1794                         gen_bound_check;
1795                         M_AADD(s2, s1, REG_ITMP1);
1796                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
1797                         M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1798                         store_reg_to_var_int(iptr->dst, d);
1799                         break;
1800
1801                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1802
1803                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1804                         var_to_reg_int(s2, src, REG_ITMP2);
1805                         d = reg_of_var(iptr->dst, REG_ITMP3);
1806                         gen_nullptr_check(s1);
1807                         gen_bound_check;
1808                         M_AADD(s2, s1, REG_ITMP1);
1809                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
1810                         M_SLDS(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1811                         store_reg_to_var_int(iptr->dst, d);
1812                         break;
1813
1814                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1815
1816                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1817                         var_to_reg_int(s2, src, REG_ITMP2);
1818                         d = reg_of_var(iptr->dst, REG_ITMP3);
1819                         gen_nullptr_check(s1);
1820                         gen_bound_check;
1821                         M_AADD(s2, s1, REG_ITMP1);
1822                         M_BLDS(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1823                         store_reg_to_var_int(iptr->dst, d);
1824                         break;
1825
1826
1827                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1828
1829                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1830                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1831                         gen_nullptr_check(s1);
1832                         gen_bound_check;
1833                         var_to_reg_int(s3, src, REG_ITMP3);
1834                         M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
1835                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1836                         M_AST(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1837                         break;
1838
1839                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1840
1841                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1842                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1843                         gen_nullptr_check(s1);
1844                         gen_bound_check;
1845                         var_to_reg_int(s3, src, REG_ITMP3);
1846                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1847                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1848                         M_IST(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1849                         break;
1850
1851                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1852
1853                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1854                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1855                         gen_nullptr_check(s1);
1856                         gen_bound_check;
1857                         var_to_reg_int(s3, src, REG_ITMP3);
1858                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1859                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1860                         M_LST(s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1861                         break;
1862
1863                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1864
1865                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1866                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1867                         gen_nullptr_check(s1);
1868                         gen_bound_check;
1869                         var_to_reg_flt(s3, src, REG_FTMP3);
1870                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1871                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1872                         M_FST(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1873                         break;
1874
1875                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1876
1877                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1878                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1879                         gen_nullptr_check(s1);
1880                         gen_bound_check;
1881                         var_to_reg_flt(s3, src, REG_FTMP3);
1882                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1883                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1884                         M_DST(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1885                         break;
1886
1887                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1888                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1889
1890                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1891                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1892                         gen_nullptr_check(s1);
1893                         gen_bound_check;
1894                         var_to_reg_int(s3, src, REG_ITMP3);
1895                         M_AADD(s2, s1, REG_ITMP1);
1896                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
1897                         M_SST(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1898                         break;
1899
1900                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1901
1902                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1903                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1904                         gen_nullptr_check(s1);
1905                         gen_bound_check;
1906                         var_to_reg_int(s3, src, REG_ITMP3);
1907                         M_AADD(s2, s1, REG_ITMP1);
1908                         M_BST(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1909                         break;
1910
1911
1912                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
1913                                       /* op1 = type, val.a = field address            */
1914
1915                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
1916                         M_ALD(REG_ITMP1, REG_PV, a);
1917                         switch (iptr->op1) {
1918                                 case TYPE_INT:
1919                                         var_to_reg_int(s2, src, REG_ITMP2);
1920                                         M_IST(s2, REG_ITMP1, 0);
1921                                         break;
1922                                 case TYPE_LNG:
1923                                         var_to_reg_int(s2, src, REG_ITMP2);
1924                                         M_LST(s2, REG_ITMP1, 0);
1925                                         break;
1926                                 case TYPE_ADR:
1927                                         var_to_reg_int(s2, src, REG_ITMP2);
1928                                         M_AST(s2, REG_ITMP1, 0);
1929                                         break;
1930                                 case TYPE_FLT:
1931                                         var_to_reg_flt(s2, src, REG_FTMP2);
1932                                         M_FST(s2, REG_ITMP1, 0);
1933                                         break;
1934                                 case TYPE_DBL:
1935                                         var_to_reg_flt(s2, src, REG_FTMP2);
1936                                         M_DST(s2, REG_ITMP1, 0);
1937                                         break;
1938                                 default: panic ("internal error");
1939                                 }
1940                         break;
1941
1942                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
1943                                       /* op1 = type, val.a = field address            */
1944
1945                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
1946                         M_ALD(REG_ITMP1, REG_PV, a);
1947                         switch (iptr->op1) {
1948                                 case TYPE_INT:
1949                                         d = reg_of_var(iptr->dst, REG_ITMP3);
1950                                         M_ILD(d, REG_ITMP1, 0);
1951                                         store_reg_to_var_int(iptr->dst, d);
1952                                         break;
1953                                 case TYPE_LNG:
1954                                         d = reg_of_var(iptr->dst, REG_ITMP3);
1955                                         M_LLD(d, REG_ITMP1, 0);
1956                                         store_reg_to_var_int(iptr->dst, d);
1957                                         break;
1958                                 case TYPE_ADR:
1959                                         d = reg_of_var(iptr->dst, REG_ITMP3);
1960                                         M_ALD(d, REG_ITMP1, 0);
1961                                         store_reg_to_var_int(iptr->dst, d);
1962                                         break;
1963                                 case TYPE_FLT:
1964                                         d = reg_of_var(iptr->dst, REG_FTMP1);
1965                                         M_FLD(d, REG_ITMP1, 0);
1966                                         store_reg_to_var_flt(iptr->dst, d);
1967                                         break;
1968                                 case TYPE_DBL:
1969                                         d = reg_of_var(iptr->dst, REG_FTMP1);
1970                                         M_DLD(d, REG_ITMP1, 0);
1971                                         store_reg_to_var_flt(iptr->dst, d);
1972                                         break;
1973                                 default: panic ("internal error");
1974                                 }
1975                         break;
1976
1977
1978                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
1979                                       /* op1 = type, val.i = field offset             */
1980
1981                         a = ((fieldinfo *)(iptr->val.a))->offset;
1982                         switch (iptr->op1) {
1983                                 case TYPE_INT:
1984                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1985                                         var_to_reg_int(s2, src, REG_ITMP2);
1986                                         gen_nullptr_check(s1);
1987                                         M_IST(s2, s1, a);
1988                                         break;
1989                                 case TYPE_LNG:
1990                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1991                                         var_to_reg_int(s2, src, REG_ITMP2);
1992                                         gen_nullptr_check(s1);
1993                                         M_LST(s2, s1, a);
1994                                         break;
1995                                 case TYPE_ADR:
1996                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1997                                         var_to_reg_int(s2, src, REG_ITMP2);
1998                                         gen_nullptr_check(s1);
1999                                         M_AST(s2, s1, a);
2000                                         break;
2001                                 case TYPE_FLT:
2002                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2003                                         var_to_reg_flt(s2, src, REG_FTMP2);
2004                                         gen_nullptr_check(s1);
2005                                         M_FST(s2, s1, a);
2006                                         break;
2007                                 case TYPE_DBL:
2008                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2009                                         var_to_reg_flt(s2, src, REG_FTMP2);
2010                                         gen_nullptr_check(s1);
2011                                         M_DST(s2, s1, a);
2012                                         break;
2013                                 default: panic ("internal error");
2014                                 }
2015                         break;
2016
2017                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2018                                       /* op1 = type, val.i = field offset             */
2019
2020                         a = ((fieldinfo *)(iptr->val.a))->offset;
2021                         switch (iptr->op1) {
2022                                 case TYPE_INT:
2023                                         var_to_reg_int(s1, src, REG_ITMP1);
2024                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2025                                         gen_nullptr_check(s1);
2026                                         M_ILD(d, s1, a);
2027                                         store_reg_to_var_int(iptr->dst, d);
2028                                         break;
2029                                 case TYPE_LNG:
2030                                         var_to_reg_int(s1, src, REG_ITMP1);
2031                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2032                                         gen_nullptr_check(s1);
2033                                         M_LLD(d, s1, a);
2034                                         store_reg_to_var_int(iptr->dst, d);
2035                                         break;
2036                                 case TYPE_ADR:
2037                                         var_to_reg_int(s1, src, REG_ITMP1);
2038                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2039                                         gen_nullptr_check(s1);
2040                                         M_ALD(d, s1, a);
2041                                         store_reg_to_var_int(iptr->dst, d);
2042                                         break;
2043                                 case TYPE_FLT:
2044                                         var_to_reg_int(s1, src, REG_ITMP1);
2045                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2046                                         gen_nullptr_check(s1);
2047                                         M_FLD(d, s1, a);
2048                                         store_reg_to_var_flt(iptr->dst, d);
2049                                         break;
2050                                 case TYPE_DBL:
2051                                         var_to_reg_int(s1, src, REG_ITMP1);
2052                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2053                                         gen_nullptr_check(s1);
2054                                         M_DLD(d, s1, a);
2055                                         store_reg_to_var_flt(iptr->dst, d);
2056                                         break;
2057                                 default: panic ("internal error");
2058                                 }
2059                         break;
2060
2061
2062                 /* branch operations **************************************************/
2063
2064 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2065
2066                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2067
2068                         var_to_reg_int(s1, src, REG_ITMP1);
2069                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2070                         a = dseg_addaddress(asm_handle_exception);
2071                         M_ALD(REG_ITMP2, REG_PV, a);
2072                         M_JSR(REG_ITMP2_XPC, REG_ITMP2);
2073                         M_NOP;
2074                         ALIGNCODENOP;
2075                         break;
2076
2077                 case ICMD_GOTO:         /* ... ==> ...                                */
2078                                         /* op1 = target JavaVM pc                     */
2079                         M_BR(0);
2080                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2081                         M_NOP;
2082                         ALIGNCODENOP;
2083                         break;
2084
2085                 case ICMD_JSR:          /* ... ==> ...                                */
2086                                         /* op1 = target JavaVM pc                     */
2087
2088                         dseg_addtarget(BlockPtrOfPC(iptr->op1));
2089                         M_ALD(REG_ITMP1, REG_PV, -dseglen);
2090                         M_JSR(REG_ITMP1, REG_ITMP1);        /* REG_ITMP1 = return address */
2091                         M_NOP;
2092                         break;
2093
2094                 case ICMD_RET:          /* ... ==> ...                                */
2095                                         /* op1 = local variable                       */
2096
2097                         var = &(locals[iptr->op1][TYPE_ADR]);
2098                         if (var->flags & INMEMORY) {
2099                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2100                                 M_RET(REG_ITMP1);
2101                                 }
2102                         else
2103                                 M_RET(var->regoff);
2104                         M_NOP;
2105                         ALIGNCODENOP;
2106                         break;
2107
2108                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2109                                         /* op1 = target JavaVM pc                     */
2110
2111                         var_to_reg_int(s1, src, REG_ITMP1);
2112                         M_BEQZ(s1, 0);
2113                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2114                         M_NOP;
2115                         break;
2116
2117                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2118                                         /* op1 = target JavaVM pc                     */
2119
2120                         var_to_reg_int(s1, src, REG_ITMP1);
2121                         M_BNEZ(s1, 0);
2122                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2123                         M_NOP;
2124                         break;
2125
2126                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2127                                         /* op1 = target JavaVM pc, val.i = constant   */
2128
2129                         var_to_reg_int(s1, src, REG_ITMP1);
2130                         if (iptr->val.i == 0) {
2131                                 M_BEQZ(s1, 0);
2132                                 }
2133                         else {
2134                                 ICONST(REG_ITMP2, iptr->val.i);
2135                                 M_BEQ(s1, REG_ITMP2, 0);
2136                                 }
2137                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2138                         M_NOP;
2139                         break;
2140
2141                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2142                                         /* op1 = target JavaVM pc, val.i = constant   */
2143
2144                         var_to_reg_int(s1, src, REG_ITMP1);
2145                         if (iptr->val.i == 0) {
2146                                 M_BLTZ(s1, 0);
2147                                 }
2148                         else {
2149                                 if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
2150                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2151                                         }
2152                                 else {
2153                                         ICONST(REG_ITMP2, iptr->val.i);
2154                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2155                                         }
2156                                 M_BNEZ(REG_ITMP1, 0);
2157                                 }
2158                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2159                         M_NOP;
2160                         break;
2161
2162                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2163                                         /* op1 = target JavaVM pc, val.i = constant   */
2164
2165                         var_to_reg_int(s1, src, REG_ITMP1);
2166                         if (iptr->val.i == 0) {
2167                                 M_BLEZ(s1, 0);
2168                                 }
2169                         else {
2170                                 if ((iptr->val.i >= -32769) && (iptr->val.i <= 32766)) {
2171                                         M_CMPLT_IMM(s1, iptr->val.i + 1, REG_ITMP1);
2172                                         M_BNEZ(REG_ITMP1, 0);
2173                                         }
2174                                 else {
2175                                         ICONST(REG_ITMP2, iptr->val.i);
2176                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2177                                         M_BEQZ(REG_ITMP1, 0);
2178                                         }
2179                                 }
2180                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2181                         M_NOP;
2182                         break;
2183
2184                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2185                                         /* op1 = target JavaVM pc, val.i = constant   */
2186
2187                         var_to_reg_int(s1, src, REG_ITMP1);
2188                         if (iptr->val.i == 0) {
2189                                 M_BNEZ(s1, 0);
2190                                 }
2191                         else {
2192                                 ICONST(REG_ITMP2, iptr->val.i);
2193                                 M_BNE(s1, REG_ITMP2, 0);
2194                                 }
2195                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2196                         M_NOP;
2197                         break;
2198
2199                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2200                                         /* op1 = target JavaVM pc, val.i = constant   */
2201
2202                         var_to_reg_int(s1, src, REG_ITMP1);
2203                         if (iptr->val.i == 0) {
2204                                 M_BGTZ(s1, 0);
2205                                 }
2206                         else {
2207                                 if ((iptr->val.i >= -32769) && (iptr->val.i <= 32766)) {
2208                                         M_CMPLT_IMM(s1, iptr->val.i + 1, REG_ITMP1);
2209                                         M_BEQZ(REG_ITMP1, 0);
2210                                         }
2211                                 else {
2212                                         ICONST(REG_ITMP2, iptr->val.i);
2213                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2214                                         M_BNEZ(REG_ITMP1, 0);
2215                                         }
2216                                 }
2217                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2218                         M_NOP;
2219                         break;
2220
2221                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2222                                         /* op1 = target JavaVM pc, val.i = constant   */
2223
2224                         var_to_reg_int(s1, src, REG_ITMP1);
2225                         if (iptr->val.i == 0) {
2226                                 M_BGEZ(s1, 0);
2227                                 }
2228                         else {
2229                                 if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
2230                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2231                                         }
2232                                 else {
2233                                         ICONST(REG_ITMP2, iptr->val.i);
2234                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2235                                         }
2236                                 M_BEQZ(REG_ITMP1, 0);
2237                                 }
2238                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2239                         M_NOP;
2240                         break;
2241
2242                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2243                                         /* op1 = target JavaVM pc, val.l = constant   */
2244
2245                         var_to_reg_int(s1, src, REG_ITMP1);
2246                         if (iptr->val.l == 0) {
2247                                 M_BEQZ(s1, 0);
2248                                 }
2249                         else {
2250                                 LCONST(REG_ITMP2, iptr->val.l);
2251                                 M_BEQ(s1, REG_ITMP2, 0);
2252                                 }
2253                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2254                         M_NOP;
2255                         break;
2256
2257                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2258                                         /* op1 = target JavaVM pc, val.l = constant   */
2259
2260                         var_to_reg_int(s1, src, REG_ITMP1);
2261                         if (iptr->val.l == 0) {
2262                                 M_BLTZ(s1, 0);
2263                                 }
2264                         else {
2265                                 if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
2266                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2267                                         }
2268                                 else {
2269                                         LCONST(REG_ITMP2, iptr->val.l);
2270                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2271                                         }
2272                                 M_BNEZ(REG_ITMP1, 0);
2273                                 }
2274                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2275                         M_NOP;
2276                         break;
2277
2278                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2279                                         /* op1 = target JavaVM pc, val.l = constant   */
2280
2281                         var_to_reg_int(s1, src, REG_ITMP1);
2282                         if (iptr->val.l == 0) {
2283                                 M_BLEZ(s1, 0);
2284                                 }
2285                         else {
2286                                 if ((iptr->val.l >= -32769) && (iptr->val.l <= 32766)) {
2287                                         M_CMPLT_IMM(s1, iptr->val.l + 1, REG_ITMP1);
2288                                         M_BNEZ(REG_ITMP1, 0);
2289                                         }
2290                                 else {
2291                                         LCONST(REG_ITMP2, iptr->val.l);
2292                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2293                                         M_BEQZ(REG_ITMP1, 0);
2294                                         }
2295                                 }
2296                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2297                         M_NOP;
2298                         break;
2299
2300                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2301                                         /* op1 = target JavaVM pc, val.l = constant   */
2302
2303                         var_to_reg_int(s1, src, REG_ITMP1);
2304                         if (iptr->val.l == 0) {
2305                                 M_BNEZ(s1, 0);
2306                                 }
2307                         else {
2308                                 LCONST(REG_ITMP2, iptr->val.l);
2309                                 M_BNE(s1, REG_ITMP2, 0);
2310                                 }
2311                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2312                         M_NOP;
2313                         break;
2314
2315                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2316                                         /* op1 = target JavaVM pc, val.l = constant   */
2317
2318                         var_to_reg_int(s1, src, REG_ITMP1);
2319                         if (iptr->val.l == 0) {
2320                                 M_BGTZ(s1, 0);
2321                                 }
2322                         else {
2323                                 if ((iptr->val.l >= -32769) && (iptr->val.l <= 32766)) {
2324                                         M_CMPLT_IMM(s1, iptr->val.l + 1, REG_ITMP1);
2325                                         M_BEQZ(REG_ITMP1, 0);
2326                                         }
2327                                 else {
2328                                         LCONST(REG_ITMP2, iptr->val.l);
2329                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2330                                         M_BNEZ(REG_ITMP1, 0);
2331                                         }
2332                                 }
2333                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2334                         M_NOP;
2335                         break;
2336
2337                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2338                                         /* op1 = target JavaVM pc, val.l = constant   */
2339
2340                         var_to_reg_int(s1, src, REG_ITMP1);
2341                         if (iptr->val.l == 0) {
2342                                 M_BGEZ(s1, 0);
2343                                 }
2344                         else {
2345                                 if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
2346                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2347                                         }
2348                                 else {
2349                                         LCONST(REG_ITMP2, iptr->val.l);
2350                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2351                                         }
2352                                 M_BEQZ(REG_ITMP1, 0);
2353                                 }
2354                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2355                         M_NOP;
2356                         break;
2357
2358                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2359                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2360                 case ICMD_IF_ACMPEQ:
2361
2362                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2363                         var_to_reg_int(s2, src, REG_ITMP2);
2364                         M_BEQ(s1, s2, 0);
2365                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2366                         M_NOP;
2367                         break;
2368
2369                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2370                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2371                 case ICMD_IF_ACMPNE:
2372
2373                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2374                         var_to_reg_int(s2, src, REG_ITMP2);
2375                         M_BNE(s1, s2, 0);
2376                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2377                         M_NOP;
2378                         break;
2379
2380                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2381                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2382
2383                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2384                         var_to_reg_int(s2, src, REG_ITMP2);
2385                         M_CMPLT(s1, s2, REG_ITMP1);
2386                         M_BNEZ(REG_ITMP1, 0);
2387                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2388                         M_NOP;
2389                         break;
2390
2391                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2392                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2393
2394                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2395                         var_to_reg_int(s2, src, REG_ITMP2);
2396                         M_CMPGT(s1, s2, REG_ITMP1);
2397                         M_BNEZ(REG_ITMP1, 0);
2398                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2399                         M_NOP;
2400                         break;
2401
2402                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2403                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2404
2405                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2406                         var_to_reg_int(s2, src, REG_ITMP2);
2407                         M_CMPGT(s1, s2, REG_ITMP1);
2408                         M_BEQZ(REG_ITMP1, 0);
2409                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2410                         M_NOP;
2411                         break;
2412
2413                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2414                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2415
2416                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2417                         var_to_reg_int(s2, src, REG_ITMP2);
2418                         M_CMPLT(s1, s2, REG_ITMP1);
2419                         M_BEQZ(REG_ITMP1, 0);
2420                         mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2421                         M_NOP;
2422                         break;
2423
2424 #ifdef CONDITIONAL_LOADCONST
2425                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2426
2427                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2428                         break;
2429
2430                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2431                                         /* val.i = constant                           */
2432
2433                         var_to_reg_int(s1, src, REG_ITMP1);
2434                         d = reg_of_var(iptr->dst, REG_ITMP3);
2435                         a = iptr->val.i;
2436                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2437                                 if ((a == 1) && (iptr[1].val.i == 0)) {
2438                                         M_CMPEQ(s1, REG_ZERO, d);
2439                                         store_reg_to_var_int(iptr->dst, d);
2440                                         break;
2441                                         }
2442                                 if ((a == 0) && (iptr[1].val.i == 1)) {
2443                                         M_CMPEQ(s1, REG_ZERO, d);
2444                                         M_XOR_IMM(d, 1, d);
2445                                         store_reg_to_var_int(iptr->dst, d);
2446                                         break;
2447                                         }
2448                                 if (s1 == d) {
2449                                         M_MOV(s1, REG_ITMP1);
2450                                         s1 = REG_ITMP1;
2451                                         }
2452                                 ICONST(d, iptr[1].val.i);
2453                                 }
2454                         if ((a >= 0) && (a <= 255)) {
2455                                 M_CMOVEQ_IMM(s1, a, d);
2456                                 }
2457                         else {
2458                                 ICONST(REG_ITMP2, a);
2459                                 M_CMOVEQ(s1, REG_ITMP2, d);
2460                                 }
2461                         store_reg_to_var_int(iptr->dst, d);
2462                         break;
2463
2464                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2465                                         /* val.i = constant                           */
2466
2467                         var_to_reg_int(s1, src, REG_ITMP1);
2468                         d = reg_of_var(iptr->dst, REG_ITMP3);
2469                         a = iptr->val.i;
2470                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2471                                 if ((a == 0) && (iptr[1].val.i == 1)) {
2472                                         M_CMPEQ(s1, REG_ZERO, d);
2473                                         store_reg_to_var_int(iptr->dst, d);
2474                                         break;
2475                                         }
2476                                 if ((a == 1) && (iptr[1].val.i == 0)) {
2477                                         M_CMPEQ(s1, REG_ZERO, d);
2478                                         M_XOR_IMM(d, 1, d);
2479                                         store_reg_to_var_int(iptr->dst, d);
2480                                         break;
2481                                         }
2482                                 if (s1 == d) {
2483                                         M_MOV(s1, REG_ITMP1);
2484                                         s1 = REG_ITMP1;
2485                                         }
2486                                 ICONST(d, iptr[1].val.i);
2487                                 }
2488                         if ((a >= 0) && (a <= 255)) {
2489                                 M_CMOVNE_IMM(s1, a, d);
2490                                 }
2491                         else {
2492                                 ICONST(REG_ITMP2, a);
2493                                 M_CMOVNE(s1, REG_ITMP2, d);
2494                                 }
2495                         store_reg_to_var_int(iptr->dst, d);
2496                         break;
2497
2498                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2499                                         /* val.i = constant                           */
2500
2501                         var_to_reg_int(s1, src, REG_ITMP1);
2502                         d = reg_of_var(iptr->dst, REG_ITMP3);
2503                         a = iptr->val.i;
2504                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2505                                 if ((a == 1) && (iptr[1].val.i == 0)) {
2506                                         M_CMPLT(s1, REG_ZERO, d);
2507                                         store_reg_to_var_int(iptr->dst, d);
2508                                         break;
2509                                         }
2510                                 if ((a == 0) && (iptr[1].val.i == 1)) {
2511                                         M_CMPLE(REG_ZERO, s1, d);
2512                                         store_reg_to_var_int(iptr->dst, d);
2513                                         break;
2514                                         }
2515                                 if (s1 == d) {
2516                                         M_MOV(s1, REG_ITMP1);
2517                                         s1 = REG_ITMP1;
2518                                         }
2519                                 ICONST(d, iptr[1].val.i);
2520                                 }
2521                         if ((a >= 0) && (a <= 255)) {
2522                                 M_CMOVLT_IMM(s1, a, d);
2523                                 }
2524                         else {
2525                                 ICONST(REG_ITMP2, a);
2526                                 M_CMOVLT(s1, REG_ITMP2, d);
2527                                 }
2528                         store_reg_to_var_int(iptr->dst, d);
2529                         break;
2530
2531                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2532                                         /* val.i = constant                           */
2533
2534                         var_to_reg_int(s1, src, REG_ITMP1);
2535                         d = reg_of_var(iptr->dst, REG_ITMP3);
2536                         a = iptr->val.i;
2537                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2538                                 if ((a == 1) && (iptr[1].val.i == 0)) {
2539                                         M_CMPLE(REG_ZERO, s1, d);
2540                                         store_reg_to_var_int(iptr->dst, d);
2541                                         break;
2542                                         }
2543                                 if ((a == 0) && (iptr[1].val.i == 1)) {
2544                                         M_CMPLT(s1, REG_ZERO, d);
2545                                         store_reg_to_var_int(iptr->dst, d);
2546                                         break;
2547                                         }
2548                                 if (s1 == d) {
2549                                         M_MOV(s1, REG_ITMP1);
2550                                         s1 = REG_ITMP1;
2551                                         }
2552                                 ICONST(d, iptr[1].val.i);
2553                                 }
2554                         if ((a >= 0) && (a <= 255)) {
2555                                 M_CMOVGE_IMM(s1, a, d);
2556                                 }
2557                         else {
2558                                 ICONST(REG_ITMP2, a);
2559                                 M_CMOVGE(s1, REG_ITMP2, d);
2560                                 }
2561                         store_reg_to_var_int(iptr->dst, d);
2562                         break;
2563
2564                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2565                                         /* val.i = constant                           */
2566
2567                         var_to_reg_int(s1, src, REG_ITMP1);
2568                         d = reg_of_var(iptr->dst, REG_ITMP3);
2569                         a = iptr->val.i;
2570                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2571                                 if ((a == 1) && (iptr[1].val.i == 0)) {
2572                                         M_CMPLT(REG_ZERO, s1, d);
2573                                         store_reg_to_var_int(iptr->dst, d);
2574                                         break;
2575                                         }
2576                                 if ((a == 0) && (iptr[1].val.i == 1)) {
2577                                         M_CMPLE(s1, REG_ZERO, d);
2578                                         store_reg_to_var_int(iptr->dst, d);
2579                                         break;
2580                                         }
2581                                 if (s1 == d) {
2582                                         M_MOV(s1, REG_ITMP1);
2583                                         s1 = REG_ITMP1;
2584                                         }
2585                                 ICONST(d, iptr[1].val.i);
2586                                 }
2587                         if ((a >= 0) && (a <= 255)) {
2588                                 M_CMOVGT_IMM(s1, a, d);
2589                                 }
2590                         else {
2591                                 ICONST(REG_ITMP2, a);
2592                                 M_CMOVGT(s1, REG_ITMP2, d);
2593                                 }
2594                         store_reg_to_var_int(iptr->dst, d);
2595                         break;
2596
2597                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2598                                         /* val.i = constant                           */
2599
2600                         var_to_reg_int(s1, src, REG_ITMP1);
2601                         d = reg_of_var(iptr->dst, REG_ITMP3);
2602                         a = iptr->val.i;
2603                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2604                                 if ((a == 1) && (iptr[1].val.i == 0)) {
2605                                         M_CMPLE(s1, REG_ZERO, d);
2606                                         store_reg_to_var_int(iptr->dst, d);
2607                                         break;
2608                                         }
2609                                 if ((a == 0) && (iptr[1].val.i == 1)) {
2610                                         M_CMPLT(REG_ZERO, s1, d);
2611                                         store_reg_to_var_int(iptr->dst, d);
2612                                         break;
2613                                         }
2614                                 if (s1 == d) {
2615                                         M_MOV(s1, REG_ITMP1);
2616                                         s1 = REG_ITMP1;
2617                                         }
2618                                 ICONST(d, iptr[1].val.i);
2619                                 }
2620                         if ((a >= 0) && (a <= 255)) {
2621                                 M_CMOVLE_IMM(s1, a, d);
2622                                 }
2623                         else {
2624                                 ICONST(REG_ITMP2, a);
2625                                 M_CMOVLE(s1, REG_ITMP2, d);
2626                                 }
2627                         store_reg_to_var_int(iptr->dst, d);
2628                         break;
2629 #endif
2630
2631
2632                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2633                 case ICMD_LRETURN:
2634                 case ICMD_ARETURN:
2635
2636 #ifdef USE_THREADS
2637                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2638                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2639                                 M_ALD(REG_ITMP1, REG_PV, a);
2640                                 M_JSR(REG_RA, REG_ITMP1);
2641                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);    /* delay slot */
2642                                 }
2643 #endif
2644                         var_to_reg_int(s1, src, REG_RESULT);
2645                         M_INTMOVE(s1, REG_RESULT);
2646                         goto nowperformreturn;
2647
2648                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2649                 case ICMD_DRETURN:
2650
2651 #ifdef USE_THREADS
2652                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2653                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2654                                 M_ALD(REG_ITMP1, REG_PV, a);
2655                                 M_JSR(REG_RA, REG_ITMP1);
2656                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);    /* delay slot */
2657                                 }
2658 #endif
2659                         var_to_reg_flt(s1, src, REG_FRESULT);
2660                         M_FLTMOVE(s1, REG_FRESULT);
2661                         goto nowperformreturn;
2662
2663                 case ICMD_RETURN:      /* ...  ==> ...                                */
2664
2665 #ifdef USE_THREADS
2666                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2667                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2668                                 M_ALD(REG_ITMP1, REG_PV, a);
2669                                 M_JSR(REG_RA, REG_ITMP1);
2670                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);    /* delay slot */
2671                                 }
2672 #endif
2673
2674 nowperformreturn:
2675                         {
2676                         int r, p;
2677
2678                         p = parentargs_base;
2679
2680                         /* restore return address                                         */
2681
2682                         if (!isleafmethod)
2683                                 {p--;  M_LLD (REG_RA, REG_SP, 8 * p);}
2684
2685                         /* restore saved registers                                        */
2686
2687                         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
2688                                         {p--; M_LLD(savintregs[r], REG_SP, 8 * p);}
2689                         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
2690                                         {p--; M_DLD(savfltregs[r], REG_SP, 8 * p);}
2691
2692                         /* call trace function */
2693
2694                         if (runverbose) {
2695                                 M_LDA (REG_SP, REG_SP, -24);
2696                                 M_AST(REG_RA, REG_SP, 0);
2697                                 M_LST(REG_RESULT, REG_SP, 8);
2698                                 M_DST(REG_FRESULT, REG_SP,16);
2699                                 a = dseg_addaddress (method);
2700                                 M_ALD(argintregs[0], REG_PV, a);
2701                                 M_MOV(REG_RESULT, argintregs[1]);
2702                                 a = dseg_addaddress ((void*) (builtin_displaymethodstop));
2703                                 M_ALD(REG_ITMP1, REG_PV, a);
2704                                 M_JSR (REG_RA, REG_ITMP1);
2705                                 M_FLTMOVE(REG_FRESULT, argfltregs[2]);          /* delay slot */
2706
2707                                 M_ALD(REG_RA, REG_SP, 0);
2708                                 M_LLD(REG_RESULT, REG_SP, 8);
2709                                 M_DLD(REG_FRESULT, REG_SP,16);
2710                                 M_LDA (REG_SP, REG_SP, 24);
2711                                 }
2712
2713                         M_RET(REG_RA);
2714
2715                         /* deallocate stack                                               */
2716
2717                         if (parentargs_base)
2718                                 {M_LDA(REG_SP, REG_SP, parentargs_base*8);}
2719                         else
2720                                 {M_NOP;}
2721                         ALIGNCODENOP;
2722                         }
2723                         break;
2724
2725
2726                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2727                         {
2728                         s4 i, l, *s4ptr;
2729
2730                         s4ptr = iptr->val.a;
2731                         l = s4ptr[1];                          /* low     */
2732                         i = s4ptr[2];                          /* high    */
2733
2734                         var_to_reg_int(s1, src, REG_ITMP1);
2735                         if (l == 0)
2736                                 {M_INTMOVE(s1, REG_ITMP1);}
2737                         else if (l <= 32768) {
2738                                 M_IADD_IMM(s1, -l, REG_ITMP1);
2739                                 }
2740                         else {
2741                                 ICONST(REG_ITMP2, l);
2742                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
2743                                 }
2744                         i = i - l + 1;
2745
2746                         /* range check */
2747
2748                         M_CMPULT_IMM(REG_ITMP1, i, REG_ITMP2);
2749                         M_BEQZ(REG_ITMP2, 0);
2750                         mcode_addreference(BlockPtrOfPC(s4ptr[0]), mcodeptr);
2751                         M_ASLL_IMM(REG_ITMP1, POINTERSHIFT, REG_ITMP1);      /* delay slot*/
2752
2753                         /* build jump table top down and use address of lowest entry */
2754
2755                         s4ptr += 3 + i;
2756                         while (--i >= 0) {
2757                                 dseg_addtarget(BlockPtrOfPC(*--s4ptr));
2758                                 }
2759                         }
2760
2761                         /* length of dataseg after last dseg_addtarget is used by load */
2762
2763                         M_AADD(REG_ITMP1, REG_PV, REG_ITMP2);
2764                         M_ALD(REG_ITMP2, REG_ITMP2, -dseglen);
2765                         M_JMP(REG_ITMP2);
2766                         M_NOP;
2767                         ALIGNCODENOP;
2768                         break;
2769
2770
2771                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2772                         {
2773                         s4 i, l, val, *s4ptr;
2774
2775                         s4ptr = iptr->val.a;
2776                         l = s4ptr[0];                          /* default  */
2777                         i = s4ptr[1];                          /* count    */
2778
2779                         MCODECHECK((i<<2)+8);
2780                         var_to_reg_int(s1, src, REG_ITMP1);
2781                         if (i > 0) {
2782                                 s4ptr += 2;
2783                                 val = s4ptr[0];
2784                                 ICONST(REG_ITMP2, val);
2785                                 while (--i > 0) {
2786                                         M_BEQ(s1, REG_ITMP2, 0);
2787                                         mcode_addreference(BlockPtrOfPC(s4ptr[1]), mcodeptr);
2788                                         s4ptr += 2;
2789                                         val = s4ptr[0];
2790                                         ICONST(REG_ITMP2, val);
2791                                         }
2792                                 M_BEQ(s1, REG_ITMP2, 0);
2793                                 mcode_addreference(BlockPtrOfPC(s4ptr[1]), mcodeptr);
2794                                 M_NOP;
2795                                 }
2796
2797                         M_BR(0);
2798                         mcode_addreference(BlockPtrOfPC(l), mcodeptr);
2799                         M_NOP;
2800                         ALIGNCODENOP;
2801                         break;
2802                         }
2803
2804
2805                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
2806                                         /* op1 = return type, val.a = function pointer*/
2807                         s3 = 3;
2808                         goto gen_method;
2809
2810                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
2811                                         /* op1 = return type, val.a = function pointer*/
2812                         s3 = 2;
2813                         goto gen_method;
2814
2815                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
2816                                         /* op1 = return type, val.a = function pointer*/
2817                         s3 = 1;
2818                         goto gen_method;
2819
2820                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
2821                                         /* op1 = arg count, val.a = method pointer    */
2822
2823                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2824                                         /* op1 = arg count, val.a = method pointer    */
2825
2826                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2827                                         /* op1 = arg count, val.a = method pointer    */
2828
2829                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
2830                                         /* op1 = arg count, val.a = method pointer    */
2831
2832                         s3 = iptr->op1;
2833
2834 gen_method: {
2835                         methodinfo   *m;
2836                         classinfo    *ci;
2837
2838                         MCODECHECK((s3 << 1) + 64);
2839
2840                         /* copy arguments to registers or stack location                  */
2841
2842                         for (; --s3 >= 0; src = src->prev) {
2843                                 if (src->varkind == ARGVAR)
2844                                         continue;
2845                                 if (IS_INT_LNG_TYPE(src->type)) {
2846                                         if (s3 < INT_ARG_CNT) {
2847                                                 s1 = argintregs[s3];
2848                                                 var_to_reg_int(d, src, s1);
2849                                                 M_INTMOVE(d, s1);
2850                                                 }
2851                                         else  {
2852                                                 var_to_reg_int(d, src, REG_ITMP1);
2853                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
2854                                                 }
2855                                         }
2856                                 else
2857                                         if (s3 < FLT_ARG_CNT) {
2858                                                 s1 = argfltregs[s3];
2859                                                 var_to_reg_flt(d, src, s1);
2860                                                 M_FLTMOVE(d, s1);
2861                                                 }
2862                                         else {
2863                                                 var_to_reg_flt(d, src, REG_FTMP1);
2864                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
2865                                                 }
2866                                 } /* end of for */
2867
2868                         m = iptr->val.a;
2869                         switch (iptr->opc) {
2870                                 case ICMD_BUILTIN3:
2871                                 case ICMD_BUILTIN2:
2872                                 case ICMD_BUILTIN1:
2873                                         a = dseg_addaddress ((void*) (m));
2874                                         M_ALD(REG_ITMP1, REG_PV, a); /* built-in-function pointer */
2875                                         M_JSR (REG_RA, REG_ITMP1);
2876                                         M_NOP;
2877                                         d = iptr->op1;                             /* return type */
2878                                         goto afteractualcall;
2879
2880                                 case ICMD_INVOKESTATIC:
2881                                 case ICMD_INVOKESPECIAL:
2882                                         a = dseg_addaddress (m->stubroutine);
2883
2884                                         M_ALD(REG_PV, REG_PV, a );        /* method pointer in pv */
2885
2886                                         d = m->returntype;
2887                                         goto makeactualcall;
2888
2889                                 case ICMD_INVOKEVIRTUAL:
2890
2891                                         gen_nullptr_check(argintregs[0]);
2892                                         M_ALD(REG_METHODPTR, argintregs[0],
2893                                                                  OFFSET(java_objectheader, vftbl));
2894                                         M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl, table[0]) +
2895                                                                 sizeof(methodptr) * m->vftblindex);
2896
2897                                         d = m->returntype;
2898                                         goto makeactualcall;
2899
2900                                 case ICMD_INVOKEINTERFACE:
2901                                         ci = m->class;
2902
2903                                         gen_nullptr_check(argintregs[0]);
2904                                         M_ALD(REG_METHODPTR, argintregs[0],
2905                                                                  OFFSET(java_objectheader, vftbl));
2906                                         M_ALD(REG_METHODPTR, REG_METHODPTR,
2907                                               OFFSET(vftbl, interfacetable[0]) -
2908                                               sizeof(methodptr*) * ci->index);
2909                                         M_ALD(REG_PV, REG_METHODPTR,
2910                                                             sizeof(methodptr) * (m - ci->methods));
2911
2912                                         d = m->returntype;
2913                                         goto makeactualcall;
2914
2915                                 default:
2916                                         d = 0;
2917                                         sprintf (logtext, "Unkown ICMD-Command: %d", iptr->opc);
2918                                         error ();
2919                                 }
2920
2921 makeactualcall:
2922
2923                         M_JSR (REG_RA, REG_PV);
2924                         M_NOP;
2925
2926                         /* recompute pv */
2927
2928                         s1 = (int)((u1*) mcodeptr - mcodebase);
2929                         if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
2930                         else {
2931                                 panic("method to big");
2932                                 }
2933
2934 afteractualcall:
2935
2936                         /* d contains return type */
2937
2938                         if (d != TYPE_VOID) {
2939                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
2940                                         s1 = reg_of_var(iptr->dst, REG_RESULT);
2941                                         M_INTMOVE(REG_RESULT, s1);
2942                                         store_reg_to_var_int(iptr->dst, s1);
2943                                         }
2944                                 else {
2945                                         s1 = reg_of_var(iptr->dst, REG_FRESULT);
2946                                         M_FLTMOVE(REG_FRESULT, s1);
2947                                         store_reg_to_var_flt(iptr->dst, s1);
2948                                         }
2949                                 }
2950                         }
2951                         break;
2952
2953
2954                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
2955
2956                                       /* op1:   0 == array, 1 == class                */
2957                                       /* val.a: (classinfo*) superclass               */
2958
2959 /*          superclass is an interface:
2960  *
2961  *          return (sub != NULL) &&
2962  *                 (sub->vftbl->interfacetablelength > super->index) &&
2963  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
2964  *
2965  *          superclass is a class:
2966  *
2967  *          return ((sub != NULL) && (0
2968  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
2969  *                  super->vftbl->diffvall));
2970  */
2971
2972                         {
2973                         classinfo *super = (classinfo*) iptr->val.a;
2974
2975                         var_to_reg_int(s1, src, REG_ITMP1);
2976                         d = reg_of_var(iptr->dst, REG_ITMP3);
2977                         if (s1 == d) {
2978                                 M_MOV(s1, REG_ITMP1);
2979                                 s1 = REG_ITMP1;
2980                                 }
2981                         M_CLR(d);
2982                         if (iptr->op1) {                               /* class/interface */
2983                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
2984                                         M_BEQZ(s1, 8);
2985                                         M_NOP;
2986                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
2987                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
2988                                         M_IADD_IMM(REG_ITMP2, - super->index, REG_ITMP2);
2989                                         M_BLEZ(REG_ITMP2, 3);
2990                                         M_NOP;
2991                                         M_ALD(REG_ITMP1, REG_ITMP1,
2992                                               OFFSET(vftbl, interfacetable[0]) -
2993                                               super->index * sizeof(methodptr*));
2994                                         M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
2995                                         }
2996                                 else {                                     /* class           */
2997                                         s2 = super->vftbl->diffval;
2998                                         M_BEQZ(s1, 5);
2999                                         M_NOP;
3000                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3001                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3002                                         M_IADD_IMM(REG_ITMP1, - super->vftbl->baseval, REG_ITMP1);
3003                                         M_CMPULT_IMM(REG_ITMP1, s2 + 1, d);
3004                                         }
3005                                 }
3006                         else
3007                                 panic ("internal error: no inlined array instanceof");
3008                         }
3009                         store_reg_to_var_int(iptr->dst, d);
3010                         break;
3011
3012                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3013
3014                                       /* op1:   0 == array, 1 == class                */
3015                                       /* val.a: (classinfo*) superclass               */
3016
3017 /*          superclass is an interface:
3018  *
3019  *          OK if ((sub == NULL) ||
3020  *                 (sub->vftbl->interfacetablelength > super->index) &&
3021  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3022  *
3023  *          superclass is a class:
3024  *
3025  *          OK if ((sub == NULL) || (0
3026  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3027  *                 super->vftbl->diffvall));
3028  */
3029
3030                         {
3031                         classinfo *super = (classinfo*) iptr->val.a;
3032
3033                         d = reg_of_var(iptr->dst, REG_ITMP3);
3034                         var_to_reg_int(s1, src, d);
3035                         if (iptr->op1) {                               /* class/interface */
3036                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3037                                         M_BEQZ(s1, 9);
3038                                         M_NOP;
3039                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3040                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3041                                         M_IADD_IMM(REG_ITMP2, - super->index, REG_ITMP2);
3042                                         M_BLEZ(REG_ITMP2, 0);
3043                                         mcode_addxcastrefs(mcodeptr);
3044                                         M_NOP;
3045                                         M_ALD(REG_ITMP2, REG_ITMP1,
3046                                               OFFSET(vftbl, interfacetable[0]) -
3047                                               super->index * sizeof(methodptr*));
3048                                         M_BEQZ(REG_ITMP2, 0);
3049                                         mcode_addxcastrefs(mcodeptr);
3050                                         M_NOP;
3051                                         }
3052                                 else {                                     /* class           */
3053                                         s2 = super->vftbl->diffval;
3054                                         M_BEQZ(s1, 6 + (s2 != 0));
3055                                         M_NOP;
3056                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3057                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3058                                         M_IADD_IMM(REG_ITMP1, - super->vftbl->baseval, REG_ITMP1);
3059                                         if (s2 == 0) {
3060                                                 M_BNEZ(REG_ITMP1, 0);
3061                                                 }
3062                                         else{
3063                                                 M_CMPULT_IMM(REG_ITMP1, s2 + 1, REG_ITMP2);
3064                                                 M_BEQZ(REG_ITMP2, 0);
3065                                                 }
3066                                         mcode_addxcastrefs(mcodeptr);
3067                                         M_NOP;
3068                                         }
3069                                 }
3070                         else
3071                                 panic ("internal error: no inlined array checkcast");
3072                         }
3073                         M_INTMOVE(s1, d);
3074                         store_reg_to_var_int(iptr->dst, d);
3075                         break;
3076
3077                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3078
3079                         var_to_reg_int(s1, src, REG_ITMP1);
3080                         M_BLTZ(s1, 0);
3081                         mcode_addxcheckarefs(mcodeptr);
3082                         M_NOP;
3083                         break;
3084
3085                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3086                                       /* op1 = dimension, val.a = array descriptor    */
3087
3088                         /* check for negative sizes and copy sizes to stack if necessary  */
3089
3090                         MCODECHECK((iptr->op1 << 1) + 64);
3091
3092                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3093                                 var_to_reg_int(s2, src, REG_ITMP1);
3094                                 M_BLTZ(s2, 0);
3095                                 mcode_addxcheckarefs(mcodeptr);
3096                                 M_NOP;
3097
3098                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3099
3100                                 if (src->varkind != ARGVAR) {
3101                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3102                                         }
3103                                 }
3104
3105                         /* a0 = dimension count */
3106
3107                         ICONST(argintregs[0], iptr->op1);
3108
3109                         /* a1 = arraydescriptor */
3110
3111                         a = dseg_addaddress(iptr->val.a);
3112                         M_ALD(argintregs[1], REG_PV, a);
3113
3114                         /* a2 = pointer to dimensions = stack pointer */
3115
3116                         M_INTMOVE(REG_SP, argintregs[2]);
3117
3118                         a = dseg_addaddress((void*) (builtin_nmultianewarray));
3119                         M_ALD(REG_ITMP1, REG_PV, a);
3120                         M_JSR(REG_RA, REG_ITMP1);
3121                         M_NOP;
3122                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3123                         M_INTMOVE(REG_RESULT, s1);
3124                         store_reg_to_var_int(iptr->dst, s1);
3125                         break;
3126
3127
3128                 default: sprintf (logtext, "Unknown pseudo command: %d", iptr->opc);
3129                          error();
3130         } /* switch */
3131         } /* for instruction */
3132
3133         /* copy values to interface registers */
3134
3135         src = bptr->outstack;
3136         len = bptr->outdepth;
3137         MCODECHECK(64+len);
3138         while (src) {
3139                 len--;
3140                 if ((src->varkind != STACKVAR)) {
3141                         s2 = src->type;
3142                         if (IS_FLT_DBL_TYPE(s2)) {
3143                                 var_to_reg_flt(s1, src, REG_FTMP1);
3144                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3145                                         M_FLTMOVE(s1,interfaces[len][s2].regoff);
3146                                         }
3147                                 else {
3148                                         M_DST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3149                                         }
3150                                 }
3151                         else {
3152                                 var_to_reg_int(s1, src, REG_ITMP1);
3153                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3154                                         M_INTMOVE(s1,interfaces[len][s2].regoff);
3155                                         }
3156                                 else {
3157                                         M_LST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3158                                         }
3159                                 }
3160                         }
3161                 src = src->prev;
3162                 }
3163         } /* if (bptr -> flags >= BBREACHED) */
3164         } /* for basic block */
3165
3166         bptr -> mpc = (int)((u1*) mcodeptr - mcodebase);
3167
3168         {
3169         /* generate bound check stubs */
3170
3171         s4 *xcodeptr = NULL;
3172
3173         for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) {
3174                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3175                         gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3176                                 xboundrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3177                         continue;
3178                         }
3179
3180                 gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3181                                   xboundrefs->branchpos, (u1*) mcodeptr - mcodebase);
3182
3183                 MCODECHECK(8);
3184
3185                 M_LDA(REG_ITMP2_XPC, REG_PV, xboundrefs->branchpos);
3186
3187                 if (xcodeptr != NULL) {
3188                         M_BR((xcodeptr-mcodeptr)-1);
3189                         M_NOP;
3190                         }
3191                 else {
3192                         xcodeptr = mcodeptr;
3193
3194                         a = dseg_addaddress(proto_java_lang_ArrayIndexOutOfBoundsException);
3195                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3196
3197                         a = dseg_addaddress(asm_handle_exception);
3198                         M_ALD(REG_ITMP3, REG_PV, a);
3199
3200                         M_JMP(REG_ITMP3);
3201                         M_NOP;
3202                         }
3203                 }
3204
3205         /* generate negative array size check stubs */
3206
3207         xcodeptr = NULL;
3208
3209         for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) {
3210                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3211                         gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3212                                 xcheckarefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3213                         continue;
3214                         }
3215
3216                 gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3217                                   xcheckarefs->branchpos, (u1*) mcodeptr - mcodebase);
3218
3219                 MCODECHECK(8);
3220
3221                 M_LDA(REG_ITMP2_XPC, REG_PV, xcheckarefs->branchpos);
3222
3223                 if (xcodeptr != NULL) {
3224                         M_BR((xcodeptr-mcodeptr)-1);
3225                         M_NOP;
3226                         }
3227                 else {
3228                         xcodeptr = mcodeptr;
3229
3230                         a = dseg_addaddress(proto_java_lang_NegativeArraySizeException);
3231                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3232
3233                         a = dseg_addaddress(asm_handle_exception);
3234                         M_ALD(REG_ITMP3, REG_PV, a);
3235
3236                         M_JMP(REG_ITMP3);
3237                         M_NOP;
3238                         }
3239                 }
3240
3241         /* generate cast check stubs */
3242
3243         xcodeptr = NULL;
3244
3245         for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) {
3246                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3247                         gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3248                                 xcastrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3249                         continue;
3250                         }
3251
3252                 gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3253                                   xcastrefs->branchpos, (u1*) mcodeptr - mcodebase);
3254
3255                 MCODECHECK(8);
3256
3257                 M_LDA(REG_ITMP2_XPC, REG_PV, xcastrefs->branchpos);
3258
3259                 if (xcodeptr != NULL) {
3260                         M_BR((xcodeptr-mcodeptr)-1);
3261                         M_NOP;
3262                         }
3263                 else {
3264                         xcodeptr = mcodeptr;
3265
3266                         a = dseg_addaddress(proto_java_lang_ClassCastException);
3267                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3268
3269                         a = dseg_addaddress(asm_handle_exception);
3270                         M_ALD(REG_ITMP3, REG_PV, a);
3271
3272                         M_JMP(REG_ITMP3);
3273                         M_NOP;
3274                         }
3275                 }
3276
3277
3278 #ifdef SOFTNULLPTRCHECK
3279
3280         /* generate null pointer check stubs */
3281
3282         xcodeptr = NULL;
3283
3284         for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) {
3285                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3286                         gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3287                                 xnullrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3288                         continue;
3289                         }
3290
3291                 gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3292                                   xnullrefs->branchpos, (u1*) mcodeptr - mcodebase);
3293
3294                 MCODECHECK(8);
3295
3296                 M_LDA(REG_ITMP2_XPC, REG_PV, xnullrefs->branchpos - 4);
3297
3298                 if (xcodeptr != NULL) {
3299                         M_BR((xcodeptr-mcodeptr)-1);
3300                         M_NOP;
3301                         }
3302                 else {
3303                         xcodeptr = mcodeptr;
3304
3305                         a = dseg_addaddress(proto_java_lang_NullPointerException);
3306                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3307
3308                         a = dseg_addaddress(asm_handle_exception);
3309                         M_ALD(REG_ITMP3, REG_PV, a);
3310
3311                         M_JMP(REG_ITMP3);
3312                         M_NOP;
3313                         }
3314                 }
3315
3316 #endif
3317         }
3318
3319         mcode_finish((int)((u1*) mcodeptr - mcodebase));
3320 }
3321
3322
3323 /* redefinition of code generation macros (compiling into array) **************/
3324
3325 /*
3326 These macros are newly defined to allow code generation into an array.
3327 This is necessary, because the original M_.. macros generate code by
3328 calling 'mcode_adds4' that uses an additional data structure to
3329 receive the code.
3330
3331 For a faster (but less flexible) version to generate code, these
3332 macros directly use the (s4* p) - pointer to put the code directly
3333 in a locally defined array.
3334 This makes sense only for the stub-generation-routines below.
3335 */
3336
3337 #undef M_ITYPE
3338 #define M_ITYPE(op, rs, rt, imm)\
3339   *(p++) = (((op)<<26)|((rs)<<21)|((rt)<<16)|((imm)&0xffff))
3340
3341 #undef M_JTYPE
3342 #define M_JTYPE(op, imm)\
3343   *(p++) = (((op)<<26)|((off)&0x3ffffff))
3344
3345 #undef M_RTYPE
3346 #define M_RTYPE(op, rs, rt, rd, sa, fu)\
3347   *(p++) = (((op)<<26)|((rs)<<21)|((rt)<<16)|((rd)<<11)|((sa)<<6)|(fu))
3348
3349
3350 /* function createcompilerstub *************************************************
3351
3352         creates a stub routine which calls the compiler
3353
3354 *******************************************************************************/
3355
3356 #define COMPSTUBSIZE 4
3357
3358 u1 *createcompilerstub (methodinfo *m)
3359 {
3360         u8 *s = CNEW (u8, COMPSTUBSIZE);    /* memory to hold the stub            */
3361         s4 *p = (s4*) s;                    /* code generation pointer            */
3362
3363                                             /* code for the stub                  */
3364         M_ALD(REG_PV, REG_PV, 16);          /* load pointer to the compiler       */
3365         M_JSR(REG_ITMP1, REG_PV);           /* jump to the compiler, return address
3366                                                in itmp1 is used as method pointer */
3367         M_NOP;
3368         M_NOP;
3369
3370         s[2] = (u8) m;                      /* literals to be adressed            */
3371         s[3] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
3372
3373 #ifdef STATISTICS
3374         count_cstub_len += COMPSTUBSIZE * 8;
3375 #endif
3376
3377         return (u1*) s;
3378 }
3379
3380
3381 /* function removecompilerstub *************************************************
3382
3383      deletes a compilerstub from memory  (simply by freeing it)
3384
3385 *******************************************************************************/
3386
3387 void removecompilerstub (u1 *stub)
3388 {
3389         CFREE (stub, COMPSTUBSIZE * 8);
3390 }
3391
3392
3393 /* function: createnativestub **************************************************
3394
3395         creates a stub routine which calls a native method
3396
3397 *******************************************************************************/
3398
3399 #define NATIVESTUBSIZE 11
3400
3401 u1 *createnativestub (functionptr f, methodinfo *m)
3402 {
3403         u8 *s = CNEW (u8, NATIVESTUBSIZE);  /* memory to hold the stub            */
3404         s4 *p = (s4*) s;                    /* code generation pointer            */
3405
3406         M_ALD  (REG_ITMP1, REG_PV, 8*8);    /* load adress of native method       */
3407         M_LDA  (REG_SP, REG_SP, -8);        /* build up stackframe                */
3408
3409         M_AST  (REG_RA, REG_SP, 0);         /* store return address               */
3410         M_JSR  (REG_RA, REG_ITMP1);         /* call native method                 */
3411
3412         M_NOP;                              /* delay slot                         */
3413         M_ALD  (REG_ITMP3, REG_PV, 9*8);    /* get address of exceptionptr        */
3414
3415         M_ALD  (REG_RA, REG_SP, 0);         /* load return address                */
3416         M_ALD  (REG_ITMP1, REG_ITMP3, 0);   /* load exception into reg. itmp1     */
3417
3418         M_BNEZ (REG_ITMP1, 2);              /* if no exception then return        */
3419         M_LDA  (REG_SP, REG_SP, 8);         /* remove stackframe, delay slot      */
3420
3421         M_RET  (REG_RA);                    /* return to caller                   */
3422         M_NOP;                              /* delay slot                         */
3423
3424         M_AST  (REG_ZERO, REG_ITMP3, 0);    /* store NULL into exceptionptr       */
3425         M_ALD  (REG_ITMP3, REG_PV,10*8);    /* load asm exception handler address */
3426
3427         M_JMP  (REG_ITMP3);                 /* jump to asm exception handler      */
3428         M_LDA  (REG_ITMP2, REG_RA, -4);     /* move fault address into reg. itmp2 */
3429                                             /* delay slot                         */
3430
3431         s[8] = (u8) f;                      /* address of native method           */
3432         s[9] = (u8) (&exceptionptr);        /* address of exceptionptr            */
3433         s[10]= (u8) (asm_handle_nat_exception); /* addr of asm exception handler  */
3434
3435 #ifdef STATISTICS
3436         count_nstub_len += NATIVESTUBSIZE * 8;
3437 #endif
3438
3439         return (u1*) s;
3440 }
3441
3442
3443 /* function: removenativestub **************************************************
3444
3445     removes a previously created native-stub from memory
3446
3447 *******************************************************************************/
3448
3449 void removenativestub (u1 *stub)
3450 {
3451         CFREE (stub, NATIVESTUBSIZE * 8);
3452 }
3453
3454
3455 /*
3456  * These are local overrides for various environment variables in Emacs.
3457  * Please do not remove this and leave it at the end of the file, where
3458  * Emacs will automagically detect them.
3459  * ---------------------------------------------------------------------
3460  * Local variables:
3461  * mode: c
3462  * indent-tabs-mode: t
3463  * c-basic-offset: 4
3464  * tab-width: 4
3465  * End:
3466  */