jit/alpha/codegen.c

   1 /* jit/alpha/codegen.c - machine code generator for alpha
   2
   3    Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
   4    Institut f. Computersprachen, TU Wien
   5    R. Grafl, A. Krall, C. Kruegel, C. Oates, R. Obermaisser, M. Probst,
   6    S. Ring, E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich,
   7    J. Wenninger
   8
   9    This file is part of CACAO.
  10
  11    This program is free software; you can redistribute it and/or
  12    modify it under the terms of the GNU General Public License as
  13    published by the Free Software Foundation; either version 2, or (at
  14    your option) any later version.
  15
  16    This program is distributed in the hope that it will be useful, but
  17    WITHOUT ANY WARRANTY; without even the implied warranty of
  18    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19    General Public License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software
  23    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  24    02111-1307, USA.
  25
  26    Contact: cacao@complang.tuwien.ac.at
  27
  28    Authors: Andreas Krall
  29             Reinhard Grafl
  30
  31    $Id: codegen.c 616 2003-11-13 00:57:22Z stefan $
  32
  33 */
  34
  35
  36 #include <stdio.h>
  37 #include <signal.h>
  38 #include "types.h"
  39 #include "codegen.h"
  40 #include "jit.h"
  41 #include "reg.h"
  42 #include "builtin.h"
  43 #include "asmpart.h"
  44 #include "jni.h"
  45 #include "loader.h"
  46 #include "tables.h"
  47 #include "native.h"
  48
  49 /* include independent code generation stuff */
  50 #include "codegen.inc"
  51 #include "reg.inc"
  52
  53
  54 /* *****************************************************************************
  55
  56 Datatypes and Register Allocations:
  57 -----------------------------------
  58
  59 On 64-bit-machines (like the Alpha) all operands are stored in the
  60 registers in a 64-bit form, even when the correspondig JavaVM  operands
  61 only need 32 bits. This is done by a canonical representation:
  62
  63 32-bit integers are allways stored as sign-extended 64-bit values (this
  64 approach is directly supported by the Alpha architecture and is very easy
  65 to implement).
  66
  67 32-bit-floats are stored in a 64-bit doubleprecision register by simply
  68 expanding the exponent and mantissa with zeroes. (also supported by the
  69 architecture)
  70
  71
  72 Stackframes:
  73
  74 The calling conventions and the layout of the stack is  explained in detail
  75 in the documention file: calling.doc
  76
  77 *******************************************************************************/
  78
  79
  80 /* register descripton - array ************************************************/
  81
  82 /* #define REG_RES   0         reserved register for OS or code generator     */
  83 /* #define REG_RET   1         return value register                          */
  84 /* #define REG_EXC   2         exception value register (only old jit)        */
  85 /* #define REG_SAV   3         (callee) saved register                        */
  86 /* #define REG_TMP   4         scratch temporary register (caller saved)      */
  87 /* #define REG_ARG   5         argument register (caller saved)               */
  88
  89 /* #define REG_END   -1        last entry in tables */
  90
  91 int nregdescint[] = {
  92         REG_RET, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
  93         REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
  94         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP,
  95         REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES,
  96         REG_END };
  97
  98 /* for use of reserved registers, see comment above */
  99
 100 int nregdescfloat[] = {
 101         REG_RET, REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
 102         REG_SAV, REG_SAV, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
 103         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP,
 104         REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES,
 105         REG_END };
 106
 107 /* for use of reserved registers, see comment above */
 108
 109
 110 /* parameter allocation mode */
 111
 112 int nreg_parammode = PARAMMODE_NUMBERED;
 113
 114    /* parameter-registers will be allocated by assigning the
 115       1. parameter:   int/float-reg 16
 116       2. parameter:   int/float-reg 17
 117       3. parameter:   int/float-reg 18 ....
 118    */
 119
 120
 121 /* stackframe-infos ***********************************************************/
 122
 123 int parentargs_base; /* offset in stackframe for the parameter from the caller*/
 124
 125 /* -> see file 'calling.doc' */
 126
 127
 128 /* additional functions and macros to generate code ***************************/
 129
 130 /* #define BlockPtrOfPC(pc)        block+block_index[pc] */
 131 #define BlockPtrOfPC(pc)  ((basicblock *) iptr->target)
 132
 133
 134 #ifdef STATISTICS
 135 #define COUNT_SPILLS count_spills++
 136 #else
 137 #define COUNT_SPILLS
 138 #endif
 139
 140
 141 /* gen_nullptr_check(objreg) */
 142
 143 #ifdef SOFTNULLPTRCHECK
 144 #define gen_nullptr_check(objreg) \
 145         if (checknull) {\
 146             M_BEQZ((objreg), 0);\
 147             codegen_addxnullrefs(mcodeptr);\
 148         }
 149 #else
 150 #define gen_nullptr_check(objreg)
 151 #endif
 152
 153
 154 /* MCODECHECK(icnt) */
 155
 156 #define MCODECHECK(icnt) \
 157         if((mcodeptr + (icnt)) > mcodeend) mcodeptr = codegen_increase((u1*) mcodeptr)
 158
 159 /* M_INTMOVE:
 160      generates an integer-move from register a to b.
 161      if a and b are the same int-register, no code will be generated.
 162 */
 163
 164 #define M_INTMOVE(a,b) if(a!=b){M_MOV(a,b);}
 165
 166
 167 /* M_FLTMOVE:
 168     generates a floating-point-move from register a to b.
 169     if a and b are the same float-register, no code will be generated
 170 */
 171
 172 #define M_FLTMOVE(a,b) if(a!=b){M_FMOV(a,b);}
 173
 174
 175 /* var_to_reg_xxx:
 176     this function generates code to fetch data from a pseudo-register
 177     into a real register.
 178     If the pseudo-register has actually been assigned to a real
 179     register, no code will be emitted, since following operations
 180     can use this register directly.
 181
 182     v: pseudoregister to be fetched from
 183     tempregnum: temporary register to be used if v is actually spilled to ram
 184
 185     return: the register number, where the operand can be found after
 186             fetching (this wil be either tempregnum or the register
 187             number allready given to v)
 188 */
 189
 190 #define var_to_reg_int(regnr,v,tempnr) { \
 191         if ((v)->flags & INMEMORY) \
 192                 {COUNT_SPILLS;M_LLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 193         else regnr=(v)->regoff; \
 194 }
 195
 196
 197 #define var_to_reg_flt(regnr,v,tempnr) { \
 198         if ((v)->flags & INMEMORY) \
 199                 {COUNT_SPILLS;M_DLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 200         else regnr=(v)->regoff; \
 201 }
 202
 203
 204 /* reg_of_var:
 205     This function determines a register, to which the result of an operation
 206     should go, when it is ultimatively intended to store the result in
 207     pseudoregister v.
 208     If v is assigned to an actual register, this register will be returned.
 209     Otherwise (when v is spilled) this function returns tempregnum.
 210     If not already done, regoff and flags are set in the stack location.
 211 */
 212
 213 static int reg_of_var(stackptr v, int tempregnum)
 214 {
 215         varinfo      *var;
 216
 217         switch (v->varkind) {
 218                 case TEMPVAR:
 219                         if (!(v->flags & INMEMORY))
 220                                 return(v->regoff);
 221                         break;
 222                 case STACKVAR:
 223                         var = &(interfaces[v->varnum][v->type]);
 224                         v->regoff = var->regoff;
 225                         if (!(var->flags & INMEMORY))
 226                                 return(var->regoff);
 227                         break;
 228                 case LOCALVAR:
 229                         var = &(locals[v->varnum][v->type]);
 230                         v->regoff = var->regoff;
 231                         if (!(var->flags & INMEMORY))
 232                                 return(var->regoff);
 233                         break;
 234                 case ARGVAR:
 235                         v->regoff = v->varnum;
 236                         if (IS_FLT_DBL_TYPE(v->type)) {
 237                                 if (v->varnum < fltreg_argnum) {
 238                                         v->regoff = argfltregs[v->varnum];
 239                                         return(argfltregs[v->varnum]);
 240                                         }
 241                                 }
 242                         else
 243                                 if (v->varnum < intreg_argnum) {
 244                                         v->regoff = argintregs[v->varnum];
 245                                         return(argintregs[v->varnum]);
 246                                         }
 247                         v->regoff -= intreg_argnum;
 248                         break;
 249                 }
 250         v->flags |= INMEMORY;
 251         return tempregnum;
 252 }
 253
 254
 255 /* store_reg_to_var_xxx:
 256     This function generates the code to store the result of an operation
 257     back into a spilled pseudo-variable.
 258     If the pseudo-variable has not been spilled in the first place, this
 259     function will generate nothing.
 260
 261     v ............ Pseudovariable
 262     tempregnum ... Number of the temporary registers as returned by
 263                    reg_of_var.
 264 */
 265
 266 #define store_reg_to_var_int(sptr, tempregnum) {       \
 267         if ((sptr)->flags & INMEMORY) {                    \
 268                 COUNT_SPILLS;                                  \
 269                 M_LST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 270                 }                                              \
 271         }
 272
 273 #define store_reg_to_var_flt(sptr, tempregnum) {       \
 274         if ((sptr)->flags & INMEMORY) {                    \
 275                 COUNT_SPILLS;                                  \
 276                 M_DST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 277                 }                                              \
 278         }
 279
 280
 281 /* NullPointerException handlers and exception handling initialisation        */
 282
 283 typedef struct sigctx_struct {
 284
 285         long          sc_onstack;           /* sigstack state to restore          */
 286         long          sc_mask;              /* signal mask to restore             */
 287         long          sc_pc;                /* pc at time of signal               */
 288         long          sc_ps;                /* psl to retore                      */
 289         long          sc_regs[32];          /* processor regs 0 to 31             */
 290         long          sc_ownedfp;           /* fp has been used                   */
 291         long          sc_fpregs[32];        /* fp regs 0 to 31                    */
 292         unsigned long sc_fpcr;              /* floating point control register    */
 293         unsigned long sc_fp_control;        /* software fpcr                      */
 294                                             /* rest is unused                     */
 295         unsigned long sc_reserved1, sc_reserved2;
 296         unsigned long sc_ssize;
 297         char          *sc_sbase;
 298         unsigned long sc_traparg_a0;
 299         unsigned long sc_traparg_a1;
 300         unsigned long sc_traparg_a2;
 301         unsigned long sc_fp_trap_pc;
 302         unsigned long sc_fp_trigger_sum;
 303         unsigned long sc_fp_trigger_inst;
 304         unsigned long sc_retcode[2];
 305 } sigctx_struct;
 306
 307
 308 /* NullPointerException signal handler for hardware null pointer check */
 309
 310 void catch_NullPointerException(int sig, int code, sigctx_struct *sigctx)
 311 {
 312         sigset_t nsig;
 313         int      instr;
 314         long     faultaddr;
 315
 316         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 317
 318         instr = *((int*)(sigctx->sc_pc));
 319         faultaddr = sigctx->sc_regs[(instr >> 16) & 0x1f];
 320
 321         if (faultaddr == 0) {
 322                 signal(sig, (void*) catch_NullPointerException); /* reinstall handler */
 323                 sigemptyset(&nsig);
 324                 sigaddset(&nsig, sig);
 325                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 326                 sigctx->sc_regs[REG_ITMP1_XPTR] =
 327                                             (long) proto_java_lang_NullPointerException;
 328                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 329                 sigctx->sc_pc = (long) asm_handle_exception;
 330                 return;
 331                 }
 332         else {
 333                 faultaddr += (long) ((instr << 16) >> 16);
 334                 fprintf(stderr, "faulting address: 0x%16lx\n", faultaddr);
 335                 panic("Stack overflow");
 336                 }
 337 }
 338
 339
 340 #ifdef __osf__
 341
 342 void init_exceptions(void)
 343 {
 344
 345 #else /* Linux */
 346
 347 /* Linux on Digital Alpha needs an initialisation of the ieee floating point
 348         control for IEEE compliant arithmetic (option -mieee of GCC). Under
 349         Digital Unix this is done automatically.
 350 */
 351
 352 #include <asm/fpu.h>
 353
 354 extern unsigned long ieee_get_fp_control();
 355 extern void ieee_set_fp_control(unsigned long fp_control);
 356
 357 void init_exceptions(void)
 358 {
 359 /* initialize floating point control */
 360
 361 ieee_set_fp_control(ieee_get_fp_control()
 362                     & ~IEEE_TRAP_ENABLE_INV
 363                     & ~IEEE_TRAP_ENABLE_DZE
 364 /*                  & ~IEEE_TRAP_ENABLE_UNF   we dont want underflow */
 365                     & ~IEEE_TRAP_ENABLE_OVF);
 366 #endif
 367
 368         /* install signal handlers we need to convert to exceptions */
 369
 370         if (!checknull) {
 371
 372 #if defined(SIGSEGV)
 373                 signal(SIGSEGV, (void*) catch_NullPointerException);
 374 #endif
 375
 376 #if defined(SIGBUS)
 377                 signal(SIGBUS, (void*) catch_NullPointerException);
 378 #endif
 379                 }
 380 }
 381
 382
 383 /* function gen_mcode **********************************************************
 384
 385         generates machine code
 386
 387 *******************************************************************************/
 388
 389 #define         MethodPointer   -8
 390 #define         FrameSize       -12
 391 #define     IsSync          -16
 392 #define     IsLeaf          -20
 393 #define     IntSave         -24
 394 #define     FltSave         -28
 395 #define     ExTableSize     -32
 396 #define     ExTableStart    -32
 397
 398 #define     ExEntrySize     -32
 399 #define     ExStartPC       -8
 400 #define     ExEndPC         -16
 401 #define     ExHandlerPC     -24
 402 #define     ExCatchType     -32
 403
 404 void codegen()
 405 {
 406         int  len, s1, s2, s3, d, bbs;
 407         s4   a;
 408         s4          *mcodeptr;
 409         stackptr    src;
 410         varinfo     *var;
 411         basicblock  *bptr;
 412         instruction *iptr;
 413         xtable *ex;
 414
 415         {
 416         int p, pa, t, l, r;
 417
 418         savedregs_num = (isleafmethod) ? 0 : 1;           /* space to save the RA */
 419
 420         /* space to save used callee saved registers */
 421
 422         savedregs_num += (savintregcnt - maxsavintreguse);
 423         savedregs_num += (savfltregcnt - maxsavfltreguse);
 424
 425         parentargs_base = maxmemuse + savedregs_num;
 426
 427 #ifdef USE_THREADS                 /* space to save argument of monitor_enter */
 428
 429         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 430                 parentargs_base++;
 431
 432 #endif
 433
 434         /* create method header */
 435
 436         (void) dseg_addaddress(method);                         /* MethodPointer  */
 437         (void) dseg_adds4(parentargs_base * 8);                 /* FrameSize      */
 438
 439 #ifdef USE_THREADS
 440
 441         /* IsSync contains the offset relative to the stack pointer for the
 442            argument of monitor_exit used in the exception handler. Since the
 443            offset could be zero and give a wrong meaning of the flag it is
 444            offset by one.
 445         */
 446
 447         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 448                 (void) dseg_adds4((maxmemuse + 1) * 8);             /* IsSync         */
 449         else
 450
 451 #endif
 452
 453         (void) dseg_adds4(0);                                   /* IsSync         */
 454
 455         (void) dseg_adds4(isleafmethod);                        /* IsLeaf         */
 456         (void) dseg_adds4(savintregcnt - maxsavintreguse);      /* IntSave        */
 457         (void) dseg_adds4(savfltregcnt - maxsavfltreguse);      /* FltSave        */
 458         (void) dseg_adds4(exceptiontablelength);                /* ExTableSize    */
 459
 460         /* create exception table */
 461
 462         for (ex = extable; ex != NULL; ex = ex->down) {
 463
 464 #ifdef LOOP_DEBUG
 465                 if (ex->start != NULL)
 466                         printf("adding start - %d - ", ex->start->debug_nr);
 467                 else {
 468                         printf("PANIC - start is NULL");
 469                         exit(-1);
 470                 }
 471 #endif
 472
 473                 dseg_addtarget(ex->start);
 474
 475 #ifdef LOOP_DEBUG
 476                 if (ex->end != NULL)
 477                         printf("adding end - %d - ", ex->end->debug_nr);
 478                 else {
 479                         printf("PANIC - end is NULL");
 480                         exit(-1);
 481                 }
 482 #endif
 483
 484                 dseg_addtarget(ex->end);
 485
 486 #ifdef LOOP_DEBUG
 487                 if (ex->handler != NULL)
 488                         printf("adding handler - %d\n", ex->handler->debug_nr);
 489                 else {
 490                         printf("PANIC - handler is NULL");
 491                         exit(-1);
 492                 }
 493 #endif
 494
 495                 dseg_addtarget(ex->handler);
 496
 497                 (void) dseg_addaddress(ex->catchtype);
 498                 }
 499
 500         /* initialize mcode variables */
 501
 502         mcodeptr = (s4*) mcodebase;
 503         mcodeend = (s4*) (mcodebase + mcodesize);
 504         MCODECHECK(128 + mparamcount);
 505
 506         /* create stack frame (if necessary) */
 507
 508         if (parentargs_base)
 509                 {M_LDA (REG_SP, REG_SP, -parentargs_base * 8);}
 510
 511         /* save return address and used callee saved registers */
 512
 513         p = parentargs_base;
 514         if (!isleafmethod)
 515                 {p--;  M_AST (REG_RA, REG_SP, 8*p);}
 516         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
 517                 {p--; M_LST (savintregs[r], REG_SP, 8 * p);}
 518         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
 519                 {p--; M_DST (savfltregs[r], REG_SP, 8 * p);}
 520
 521         /* save monitorenter argument */
 522
 523 #ifdef USE_THREADS
 524         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 525                 if (method->flags & ACC_STATIC) {
 526                         p = dseg_addaddress (class);
 527                         M_ALD(REG_ITMP1, REG_PV, p);
 528                         M_AST(REG_ITMP1, REG_SP, 8 * maxmemuse);
 529                         }
 530                 else {
 531                         M_AST (argintregs[0], REG_SP, 8 * maxmemuse);
 532                         }
 533                 }
 534 #endif
 535
 536         /* copy argument registers to stack and call trace function with pointer
 537            to arguments on stack. ToDo: save floating point registers !!!!!!!!!
 538         */
 539
 540         if (runverbose) {
 541                 int disp;
 542                 M_LDA (REG_SP, REG_SP, -(14*8));
 543                 M_AST(REG_RA, REG_SP, 1*8);
 544
 545                 M_LST(argintregs[0], REG_SP,  2*8);
 546                 M_LST(argintregs[1], REG_SP,  3*8);
 547                 M_LST(argintregs[2], REG_SP,  4*8);
 548                 M_LST(argintregs[3], REG_SP,  5*8);
 549                 M_LST(argintregs[4], REG_SP,  6*8);
 550                 M_LST(argintregs[5], REG_SP,  7*8);
 551
 552                 M_DST(argfltregs[0], REG_SP,  8*8);
 553                 M_DST(argfltregs[1], REG_SP,  9*8);
 554                 M_DST(argfltregs[2], REG_SP, 10*8);
 555                 M_DST(argfltregs[3], REG_SP, 11*8);
 556                 M_DST(argfltregs[4], REG_SP, 12*8);
 557                 M_DST(argfltregs[5], REG_SP, 13*8);
 558
 559                 p = dseg_addaddress (method);
 560                 M_ALD(REG_ITMP1, REG_PV, p);
 561                 M_AST(REG_ITMP1, REG_SP, 0);
 562                 p = dseg_addaddress ((void*) (builtin_trace_args));
 563                 M_ALD(REG_PV, REG_PV, p);
 564                 M_JSR(REG_RA, REG_PV);
 565                 disp = -(int)((u1*) mcodeptr - mcodebase);
 566                 M_LDA(REG_PV, REG_RA, disp);
 567                 M_ALD(REG_RA, REG_SP, 1*8);
 568
 569                 M_LLD(argintregs[0], REG_SP,  2*8);
 570                 M_LLD(argintregs[1], REG_SP,  3*8);
 571                 M_LLD(argintregs[2], REG_SP,  4*8);
 572                 M_LLD(argintregs[3], REG_SP,  5*8);
 573                 M_LLD(argintregs[4], REG_SP,  6*8);
 574                 M_LLD(argintregs[5], REG_SP,  7*8);
 575
 576                 M_DLD(argfltregs[0], REG_SP,  8*8);
 577                 M_DLD(argfltregs[1], REG_SP,  9*8);
 578                 M_DLD(argfltregs[2], REG_SP, 10*8);
 579                 M_DLD(argfltregs[3], REG_SP, 11*8);
 580                 M_DLD(argfltregs[4], REG_SP, 12*8);
 581                 M_DLD(argfltregs[5], REG_SP, 13*8);
 582
 583                 M_LDA (REG_SP, REG_SP, 14*8);
 584                 }
 585
 586         /* take arguments out of register or stack frame */
 587
 588         for (p = 0, l = 0; p < mparamcount; p++) {
 589                 t = mparamtypes[p];
 590                 var = &(locals[l][t]);
 591                 l++;
 592                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 593                         l++;
 594                 if (var->type < 0)
 595                         continue;
 596                 r = var->regoff;
 597                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 598                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 599                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 600                                         {M_INTMOVE (argintregs[p], r);}
 601                                 else                                 /* reg arg -> spilled    */
 602                                         M_LST (argintregs[p], REG_SP, 8 * r);
 603                                 }
 604                         else {                                   /* stack arguments       */
 605                                 pa = p - INT_ARG_CNT;
 606                                 if (!(var->flags & INMEMORY))        /* stack arg -> register */
 607                                         M_LLD (r, REG_SP, 8 * (parentargs_base + pa));
 608                                 else {                               /* stack arg -> spilled  */
 609                                         M_LLD (REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 610                                         M_LST (REG_ITMP1, REG_SP, 8 * r);
 611                                         }
 612                                 }
 613                         }
 614                 else {                                       /* floating args         */
 615                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 616                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 617                                         {M_FLTMOVE (argfltregs[p], r);}
 618                                 else                                             /* reg arg -> spilled    */
 619                                         M_DST (argfltregs[p], REG_SP, 8 * r);
 620                                 }
 621                         else {                                   /* stack arguments       */
 622                                 pa = p - FLT_ARG_CNT;
 623                                 if (!(var->flags & INMEMORY))        /* stack-arg -> register */
 624                                         M_DLD (r, REG_SP, 8 * (parentargs_base + pa) );
 625                                 else {                               /* stack-arg -> spilled  */
 626                                         M_DLD (REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 627                                         M_DST (REG_FTMP1, REG_SP, 8 * r);
 628                                         }
 629                                 }
 630                         }
 631                 }  /* end for */
 632
 633         /* call trace function */
 634
 635 #if 0
 636         if (runverbose && !isleafmethod) {
 637                 M_LDA (REG_SP, REG_SP, -8);
 638                 p = dseg_addaddress (method);
 639                 M_ALD(REG_ITMP1, REG_PV, p);
 640                 M_AST(REG_ITMP1, REG_SP, 0);
 641                 p = dseg_addaddress ((void*) (builtin_trace_args));
 642                 M_ALD(REG_PV, REG_PV, p);
 643                 M_JSR(REG_RA, REG_PV);
 644                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
 645                 M_LDA(REG_SP, REG_SP, 8);
 646                 }
 647 #endif
 648
 649         /* call monitorenter function */
 650
 651 #ifdef USE_THREADS
 652         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 653                 int disp;
 654                 p = dseg_addaddress ((void*) (builtin_monitorenter));
 655                 M_ALD(REG_PV, REG_PV, p);
 656                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
 657                 M_JSR(REG_RA, REG_PV);
 658                 disp = -(int)((u1*) mcodeptr - mcodebase);
 659                 M_LDA(REG_PV, REG_RA, disp);
 660                 }
 661 #endif
 662         }
 663
 664         /* end of header generation */
 665
 666         /* walk through all basic blocks */
 667         for (/* bbs = block_count, */ bptr = block; /* --bbs >= 0 */ bptr != NULL; bptr = bptr->next) {
 668
 669                 bptr -> mpc = (int)((u1*) mcodeptr - mcodebase);
 670
 671                 if (bptr->flags >= BBREACHED) {
 672
 673                 /* branch resolving */
 674
 675                 {
 676                 branchref *brefs;
 677                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 678                         gen_resolvebranch((u1*) mcodebase + brefs->branchpos,
 679                                           brefs->branchpos, bptr->mpc);
 680                         }
 681                 }
 682
 683                 /* copy interface registers to their destination */
 684
 685                 src = bptr->instack;
 686                 len = bptr->indepth;
 687                 MCODECHECK(64+len);
 688                 while (src != NULL) {
 689                         len--;
 690                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 691                                 d = reg_of_var(src, REG_ITMP1);
 692                                 M_INTMOVE(REG_ITMP1, d);
 693                                 store_reg_to_var_int(src, d);
 694                                 }
 695                         else {
 696                                 d = reg_of_var(src, REG_IFTMP);
 697                                 if ((src->varkind != STACKVAR)) {
 698                                         s2 = src->type;
 699                                         if (IS_FLT_DBL_TYPE(s2)) {
 700                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 701                                                         s1 = interfaces[len][s2].regoff;
 702                                                         M_FLTMOVE(s1,d);
 703                                                         }
 704                                                 else {
 705                                                         M_DLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 706                                                         }
 707                                                 store_reg_to_var_flt(src, d);
 708                                                 }
 709                                         else {
 710                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 711                                                         s1 = interfaces[len][s2].regoff;
 712                                                         M_INTMOVE(s1,d);
 713                                                         }
 714                                                 else {
 715                                                         M_LLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 716                                                         }
 717                                                 store_reg_to_var_int(src, d);
 718                                                 }
 719                                         }
 720                                 }
 721                         src = src->prev;
 722                         }
 723
 724                 /* walk through all instructions */
 725
 726                 src = bptr->instack;
 727                 len = bptr->icount;
 728                 for (iptr = bptr->iinstr;
 729                     len > 0;
 730                     src = iptr->dst, len--, iptr++) {
 731
 732         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 733         switch (iptr->opc) {
 734
 735                 case ICMD_NOP:        /* ...  ==> ...                                 */
 736                         break;
 737
 738                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 739
 740                         var_to_reg_int(s1, src, REG_ITMP1);
 741                         M_BEQZ(s1, 0);
 742                         codegen_addxnullrefs(mcodeptr);
 743                         break;
 744
 745                 /* constant operations ************************************************/
 746
 747 #define ICONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 748                     else{a=dseg_adds4(c);M_ILD(r,REG_PV,a);}
 749
 750 #define LCONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 751                     else{a=dseg_adds8(c);M_LLD(r,REG_PV,a);}
 752
 753                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 754                                       /* op1 = 0, val.i = constant                    */
 755
 756                         d = reg_of_var(iptr->dst, REG_ITMP1);
 757                         ICONST(d, iptr->val.i);
 758                         store_reg_to_var_int(iptr->dst, d);
 759                         break;
 760
 761                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 762                                       /* op1 = 0, val.l = constant                    */
 763
 764                         d = reg_of_var(iptr->dst, REG_ITMP1);
 765                         LCONST(d, iptr->val.l);
 766                         store_reg_to_var_int(iptr->dst, d);
 767                         break;
 768
 769                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 770                                       /* op1 = 0, val.f = constant                    */
 771
 772                         d = reg_of_var (iptr->dst, REG_FTMP1);
 773                         a = dseg_addfloat (iptr->val.f);
 774                         M_FLD(d, REG_PV, a);
 775                         store_reg_to_var_flt (iptr->dst, d);
 776                         break;
 777
 778                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 779                                       /* op1 = 0, val.d = constant                    */
 780
 781                         d = reg_of_var (iptr->dst, REG_FTMP1);
 782                         a = dseg_adddouble (iptr->val.d);
 783                         M_DLD(d, REG_PV, a);
 784                         store_reg_to_var_flt (iptr->dst, d);
 785                         break;
 786
 787                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 788                                       /* op1 = 0, val.a = constant                    */
 789
 790                         d = reg_of_var(iptr->dst, REG_ITMP1);
 791                         if (iptr->val.a) {
 792                                 a = dseg_addaddress (iptr->val.a);
 793                                 M_ALD(d, REG_PV, a);
 794                                 }
 795                         else {
 796                                 M_INTMOVE(REG_ZERO, d);
 797                                 }
 798                         store_reg_to_var_int(iptr->dst, d);
 799                         break;
 800
 801
 802                 /* load/store operations **********************************************/
 803
 804                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 805                 case ICMD_LLOAD:      /* op1 = local variable                         */
 806                 case ICMD_ALOAD:
 807
 808                         d = reg_of_var(iptr->dst, REG_ITMP1);
 809                         if ((iptr->dst->varkind == LOCALVAR) &&
 810                             (iptr->dst->varnum == iptr->op1))
 811                                 break;
 812                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 813                         if (var->flags & INMEMORY)
 814                                 M_LLD(d, REG_SP, 8 * var->regoff);
 815                         else
 816                                 {M_INTMOVE(var->regoff,d);}
 817                         store_reg_to_var_int(iptr->dst, d);
 818                         break;
 819
 820                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 821                 case ICMD_DLOAD:      /* op1 = local variable                         */
 822
 823                         d = reg_of_var(iptr->dst, REG_FTMP1);
 824                         if ((iptr->dst->varkind == LOCALVAR) &&
 825                             (iptr->dst->varnum == iptr->op1))
 826                                 break;
 827                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 828                         if (var->flags & INMEMORY)
 829                                 M_DLD(d, REG_SP, 8 * var->regoff);
 830                         else
 831                                 {M_FLTMOVE(var->regoff,d);}
 832                         store_reg_to_var_flt(iptr->dst, d);
 833                         break;
 834
 835
 836                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 837                 case ICMD_LSTORE:     /* op1 = local variable                         */
 838                 case ICMD_ASTORE:
 839
 840                         if ((src->varkind == LOCALVAR) &&
 841                             (src->varnum == iptr->op1))
 842                                 break;
 843                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 844                         if (var->flags & INMEMORY) {
 845                                 var_to_reg_int(s1, src, REG_ITMP1);
 846                                 M_LST(s1, REG_SP, 8 * var->regoff);
 847                                 }
 848                         else {
 849                                 var_to_reg_int(s1, src, var->regoff);
 850                                 M_INTMOVE(s1, var->regoff);
 851                                 }
 852                         break;
 853
 854                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 855                 case ICMD_DSTORE:     /* op1 = local variable                         */
 856
 857                         if ((src->varkind == LOCALVAR) &&
 858                             (src->varnum == iptr->op1))
 859                                 break;
 860                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 861                         if (var->flags & INMEMORY) {
 862                                 var_to_reg_flt(s1, src, REG_FTMP1);
 863                                 M_DST(s1, REG_SP, 8 * var->regoff);
 864                                 }
 865                         else {
 866                                 var_to_reg_flt(s1, src, var->regoff);
 867                                 M_FLTMOVE(s1, var->regoff);
 868                                 }
 869                         break;
 870
 871
 872                 /* pop/dup/swap operations ********************************************/
 873
 874                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 875
 876                 case ICMD_POP:        /* ..., value  ==> ...                          */
 877                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 878                         break;
 879
 880 #define M_COPY(from,to) \
 881                         d = reg_of_var(to, REG_IFTMP); \
 882                         if ((from->regoff != to->regoff) || \
 883                             ((from->flags ^ to->flags) & INMEMORY)) { \
 884                                 if (IS_FLT_DBL_TYPE(from->type)) { \
 885                                         var_to_reg_flt(s1, from, d); \
 886                                         M_FLTMOVE(s1,d); \
 887                                         store_reg_to_var_flt(to, d); \
 888                                         }\
 889                                 else { \
 890                                         var_to_reg_int(s1, from, d); \
 891                                         M_INTMOVE(s1,d); \
 892                                         store_reg_to_var_int(to, d); \
 893                                         }\
 894                                 }
 895
 896                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 897                         M_COPY(src, iptr->dst);
 898                         break;
 899
 900                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 901
 902                         M_COPY(src,       iptr->dst->prev->prev);
 903
 904                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 905
 906                         M_COPY(src,       iptr->dst);
 907                         M_COPY(src->prev, iptr->dst->prev);
 908                         break;
 909
 910                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 911
 912                         M_COPY(src->prev,       iptr->dst->prev->prev->prev);
 913
 914                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 915
 916                         M_COPY(src,             iptr->dst);
 917                         M_COPY(src->prev,       iptr->dst->prev);
 918                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 919                         M_COPY(src, iptr->dst->prev->prev->prev);
 920                         break;
 921
 922                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 923
 924                         M_COPY(src,                   iptr->dst);
 925                         M_COPY(src->prev,             iptr->dst->prev);
 926                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 927                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 928                         M_COPY(src,       iptr->dst->prev->prev->prev->prev);
 929                         M_COPY(src->prev, iptr->dst->prev->prev->prev->prev->prev);
 930                         break;
 931
 932                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 933
 934                         M_COPY(src, iptr->dst->prev);
 935                         M_COPY(src->prev, iptr->dst);
 936                         break;
 937
 938
 939                 /* integer operations *************************************************/
 940
 941                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 942
 943                         var_to_reg_int(s1, src, REG_ITMP1);
 944                         d = reg_of_var(iptr->dst, REG_ITMP3);
 945                         M_ISUB(REG_ZERO, s1, d);
 946                         store_reg_to_var_int(iptr->dst, d);
 947                         break;
 948
 949                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 950
 951                         var_to_reg_int(s1, src, REG_ITMP1);
 952                         d = reg_of_var(iptr->dst, REG_ITMP3);
 953                         M_LSUB(REG_ZERO, s1, d);
 954                         store_reg_to_var_int(iptr->dst, d);
 955                         break;
 956
 957                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 958
 959                         var_to_reg_int(s1, src, REG_ITMP1);
 960                         d = reg_of_var(iptr->dst, REG_ITMP3);
 961                         M_INTMOVE(s1, d);
 962                         store_reg_to_var_int(iptr->dst, d);
 963                         break;
 964
 965                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 966
 967                         var_to_reg_int(s1, src, REG_ITMP1);
 968                         d = reg_of_var(iptr->dst, REG_ITMP3);
 969                         M_IADD(s1, REG_ZERO, d );
 970                         store_reg_to_var_int(iptr->dst, d);
 971                         break;
 972
 973                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 974
 975                         var_to_reg_int(s1, src, REG_ITMP1);
 976                         d = reg_of_var(iptr->dst, REG_ITMP3);
 977                         if (has_ext_instr_set) {
 978                                 M_BSEXT(s1, d);
 979                                 }
 980                         else {
 981                                 M_SLL_IMM(s1, 56, d);
 982                                 M_SRA_IMM( d, 56, d);
 983                                 }
 984                         store_reg_to_var_int(iptr->dst, d);
 985                         break;
 986
 987                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 988
 989                         var_to_reg_int(s1, src, REG_ITMP1);
 990                         d = reg_of_var(iptr->dst, REG_ITMP3);
 991             M_CZEXT(s1, d);
 992                         store_reg_to_var_int(iptr->dst, d);
 993                         break;
 994
 995                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 996
 997                         var_to_reg_int(s1, src, REG_ITMP1);
 998                         d = reg_of_var(iptr->dst, REG_ITMP3);
 999                         if (has_ext_instr_set) {
1000                                 M_SSEXT(s1, d);
1001                                 }
1002                         else {
1003                                 M_SLL_IMM(s1, 48, d);
1004                                 M_SRA_IMM( d, 48, d);
1005                                 }
1006                         store_reg_to_var_int(iptr->dst, d);
1007                         break;
1008
1009
1010                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1011
1012                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1013                         var_to_reg_int(s2, src, REG_ITMP2);
1014                         d = reg_of_var(iptr->dst, REG_ITMP3);
1015                         M_IADD(s1, s2, d);
1016                         store_reg_to_var_int(iptr->dst, d);
1017                         break;
1018
1019                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
1020                                       /* val.i = constant                             */
1021
1022                         var_to_reg_int(s1, src, REG_ITMP1);
1023                         d = reg_of_var(iptr->dst, REG_ITMP3);
1024                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1025                                 M_IADD_IMM(s1, iptr->val.i, d);
1026                                 }
1027                         else {
1028                                 ICONST(REG_ITMP2, iptr->val.i);
1029                                 M_IADD(s1, REG_ITMP2, d);
1030                                 }
1031                         store_reg_to_var_int(iptr->dst, d);
1032                         break;
1033
1034                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1035
1036                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1037                         var_to_reg_int(s2, src, REG_ITMP2);
1038                         d = reg_of_var(iptr->dst, REG_ITMP3);
1039                         M_LADD(s1, s2, d);
1040                         store_reg_to_var_int(iptr->dst, d);
1041                         break;
1042
1043                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
1044                                       /* val.l = constant                             */
1045
1046                         var_to_reg_int(s1, src, REG_ITMP1);
1047                         d = reg_of_var(iptr->dst, REG_ITMP3);
1048                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1049                                 M_LADD_IMM(s1, iptr->val.l, d);
1050                                 }
1051                         else {
1052                                 LCONST(REG_ITMP2, iptr->val.l);
1053                                 M_LADD(s1, REG_ITMP2, d);
1054                                 }
1055                         store_reg_to_var_int(iptr->dst, d);
1056                         break;
1057
1058                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1059
1060                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1061                         var_to_reg_int(s2, src, REG_ITMP2);
1062                         d = reg_of_var(iptr->dst, REG_ITMP3);
1063                         M_ISUB(s1, s2, d);
1064                         store_reg_to_var_int(iptr->dst, d);
1065                         break;
1066
1067                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
1068                                       /* val.i = constant                             */
1069
1070                         var_to_reg_int(s1, src, REG_ITMP1);
1071                         d = reg_of_var(iptr->dst, REG_ITMP3);
1072                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1073                                 M_ISUB_IMM(s1, iptr->val.i, d);
1074                                 }
1075                         else {
1076                                 ICONST(REG_ITMP2, iptr->val.i);
1077                                 M_ISUB(s1, REG_ITMP2, d);
1078                                 }
1079                         store_reg_to_var_int(iptr->dst, d);
1080                         break;
1081
1082                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1083
1084                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1085                         var_to_reg_int(s2, src, REG_ITMP2);
1086                         d = reg_of_var(iptr->dst, REG_ITMP3);
1087                         M_LSUB(s1, s2, d);
1088                         store_reg_to_var_int(iptr->dst, d);
1089                         break;
1090
1091                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
1092                                       /* val.l = constant                             */
1093
1094                         var_to_reg_int(s1, src, REG_ITMP1);
1095                         d = reg_of_var(iptr->dst, REG_ITMP3);
1096                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1097                                 M_LSUB_IMM(s1, iptr->val.l, d);
1098                                 }
1099                         else {
1100                                 LCONST(REG_ITMP2, iptr->val.l);
1101                                 M_LSUB(s1, REG_ITMP2, d);
1102                                 }
1103                         store_reg_to_var_int(iptr->dst, d);
1104                         break;
1105
1106                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1107
1108                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1109                         var_to_reg_int(s2, src, REG_ITMP2);
1110                         d = reg_of_var(iptr->dst, REG_ITMP3);
1111                         M_IMUL(s1, s2, d);
1112                         store_reg_to_var_int(iptr->dst, d);
1113                         break;
1114
1115                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
1116                                       /* val.i = constant                             */
1117
1118                         var_to_reg_int(s1, src, REG_ITMP1);
1119                         d = reg_of_var(iptr->dst, REG_ITMP3);
1120                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1121                                 M_IMUL_IMM(s1, iptr->val.i, d);
1122                                 }
1123                         else {
1124                                 ICONST(REG_ITMP2, iptr->val.i);
1125                                 M_IMUL(s1, REG_ITMP2, d);
1126                                 }
1127                         store_reg_to_var_int(iptr->dst, d);
1128                         break;
1129
1130                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1131
1132                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1133                         var_to_reg_int(s2, src, REG_ITMP2);
1134                         d = reg_of_var(iptr->dst, REG_ITMP3);
1135                         M_LMUL (s1, s2, d);
1136                         store_reg_to_var_int(iptr->dst, d);
1137                         break;
1138
1139                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
1140                                       /* val.l = constant                             */
1141
1142                         var_to_reg_int(s1, src, REG_ITMP1);
1143                         d = reg_of_var(iptr->dst, REG_ITMP3);
1144                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1145                                 M_LMUL_IMM(s1, iptr->val.l, d);
1146                                 }
1147                         else {
1148                                 LCONST(REG_ITMP2, iptr->val.l);
1149                                 M_LMUL(s1, REG_ITMP2, d);
1150                                 }
1151                         store_reg_to_var_int(iptr->dst, d);
1152                         break;
1153
1154                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
1155                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
1156
1157                         var_to_reg_int(s1, src, REG_ITMP1);
1158                         d = reg_of_var(iptr->dst, REG_ITMP3);
1159                         if (iptr->val.i <= 15) {
1160                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
1161                                 M_CMOVGE(s1, s1, REG_ITMP2);
1162                                 }
1163                         else {
1164                                 M_SRA_IMM(s1, 63, REG_ITMP2);
1165                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
1166                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
1167                                 }
1168                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
1169                         store_reg_to_var_int(iptr->dst, d);
1170                         break;
1171
1172                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1173
1174                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1175                         var_to_reg_int(s2, src, REG_ITMP2);
1176                         d = reg_of_var(iptr->dst, REG_ITMP3);
1177                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1178                         M_SLL(s1, REG_ITMP3, d);
1179                         M_IADD(d, REG_ZERO, d);
1180                         store_reg_to_var_int(iptr->dst, d);
1181                         break;
1182
1183                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1184                                       /* val.i = constant                             */
1185
1186                         var_to_reg_int(s1, src, REG_ITMP1);
1187                         d = reg_of_var(iptr->dst, REG_ITMP3);
1188                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
1189                         M_IADD(d, REG_ZERO, d);
1190                         store_reg_to_var_int(iptr->dst, d);
1191                         break;
1192
1193                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1194
1195                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1196                         var_to_reg_int(s2, src, REG_ITMP2);
1197                         d = reg_of_var(iptr->dst, REG_ITMP3);
1198                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1199                         M_SRA(s1, REG_ITMP3, d);
1200                         store_reg_to_var_int(iptr->dst, d);
1201                         break;
1202
1203                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1204                                       /* val.i = constant                             */
1205
1206                         var_to_reg_int(s1, src, REG_ITMP1);
1207                         d = reg_of_var(iptr->dst, REG_ITMP3);
1208                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1209                         store_reg_to_var_int(iptr->dst, d);
1210                         break;
1211
1212                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1213
1214                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1215                         var_to_reg_int(s2, src, REG_ITMP2);
1216                         d = reg_of_var(iptr->dst, REG_ITMP3);
1217                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1218             M_IZEXT(s1, d);
1219                         M_SRL(d, REG_ITMP2, d);
1220                         M_IADD(d, REG_ZERO, d);
1221                         store_reg_to_var_int(iptr->dst, d);
1222                         break;
1223
1224                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1225                                       /* val.i = constant                             */
1226
1227                         var_to_reg_int(s1, src, REG_ITMP1);
1228                         d = reg_of_var(iptr->dst, REG_ITMP3);
1229             M_IZEXT(s1, d);
1230                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
1231                         M_IADD(d, REG_ZERO, d);
1232                         store_reg_to_var_int(iptr->dst, d);
1233                         break;
1234
1235                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1236
1237                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1238                         var_to_reg_int(s2, src, REG_ITMP2);
1239                         d = reg_of_var(iptr->dst, REG_ITMP3);
1240                         M_SLL(s1, s2, d);
1241                         store_reg_to_var_int(iptr->dst, d);
1242                         break;
1243
1244                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1245                                       /* val.i = constant                             */
1246
1247                         var_to_reg_int(s1, src, REG_ITMP1);
1248                         d = reg_of_var(iptr->dst, REG_ITMP3);
1249                         M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
1250                         store_reg_to_var_int(iptr->dst, d);
1251                         break;
1252
1253                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1254
1255                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1256                         var_to_reg_int(s2, src, REG_ITMP2);
1257                         d = reg_of_var(iptr->dst, REG_ITMP3);
1258                         M_SRA(s1, s2, d);
1259                         store_reg_to_var_int(iptr->dst, d);
1260                         break;
1261
1262                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1263                                       /* val.i = constant                             */
1264
1265                         var_to_reg_int(s1, src, REG_ITMP1);
1266                         d = reg_of_var(iptr->dst, REG_ITMP3);
1267                         M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
1268                         store_reg_to_var_int(iptr->dst, d);
1269                         break;
1270
1271                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1272
1273                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1274                         var_to_reg_int(s2, src, REG_ITMP2);
1275                         d = reg_of_var(iptr->dst, REG_ITMP3);
1276                         M_SRL(s1, s2, d);
1277                         store_reg_to_var_int(iptr->dst, d);
1278                         break;
1279
1280                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1281                                       /* val.i = constant                             */
1282
1283                         var_to_reg_int(s1, src, REG_ITMP1);
1284                         d = reg_of_var(iptr->dst, REG_ITMP3);
1285                         M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
1286                         store_reg_to_var_int(iptr->dst, d);
1287                         break;
1288
1289                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1290                 case ICMD_LAND:
1291
1292                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1293                         var_to_reg_int(s2, src, REG_ITMP2);
1294                         d = reg_of_var(iptr->dst, REG_ITMP3);
1295                         M_AND(s1, s2, d);
1296                         store_reg_to_var_int(iptr->dst, d);
1297                         break;
1298
1299                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1300                                       /* val.i = constant                             */
1301
1302                         var_to_reg_int(s1, src, REG_ITMP1);
1303                         d = reg_of_var(iptr->dst, REG_ITMP3);
1304                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1305                                 M_AND_IMM(s1, iptr->val.i, d);
1306                                 }
1307                         else if (iptr->val.i == 0xffff) {
1308                                 M_CZEXT(s1, d);
1309                                 }
1310                         else if (iptr->val.i == 0xffffff) {
1311                                 M_ZAPNOT_IMM(s1, 0x07, d);
1312                                 }
1313                         else {
1314                                 ICONST(REG_ITMP2, iptr->val.i);
1315                                 M_AND(s1, REG_ITMP2, d);
1316                                 }
1317                         store_reg_to_var_int(iptr->dst, d);
1318                         break;
1319
1320                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1321                                       /* val.i = constant                             */
1322
1323                         var_to_reg_int(s1, src, REG_ITMP1);
1324                         d = reg_of_var(iptr->dst, REG_ITMP3);
1325                         if (s1 == d) {
1326                                 M_MOV(s1, REG_ITMP1);
1327                                 s1 = REG_ITMP1;
1328                                 }
1329                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1330                                 M_AND_IMM(s1, iptr->val.i, d);
1331                                 M_BGEZ(s1, 3);
1332                                 M_ISUB(REG_ZERO, s1, d);
1333                                 M_AND_IMM(d, iptr->val.i, d);
1334                                 }
1335                         else if (iptr->val.i == 0xffff) {
1336                                 M_CZEXT(s1, d);
1337                                 M_BGEZ(s1, 3);
1338                                 M_ISUB(REG_ZERO, s1, d);
1339                                 M_CZEXT(d, d);
1340                                 }
1341                         else if (iptr->val.i == 0xffffff) {
1342                                 M_ZAPNOT_IMM(s1, 0x07, d);
1343                                 M_BGEZ(s1, 3);
1344                                 M_ISUB(REG_ZERO, s1, d);
1345                                 M_ZAPNOT_IMM(d, 0x07, d);
1346                                 }
1347                         else {
1348                                 ICONST(REG_ITMP2, iptr->val.i);
1349                                 M_AND(s1, REG_ITMP2, d);
1350                                 M_BGEZ(s1, 3);
1351                                 M_ISUB(REG_ZERO, s1, d);
1352                                 M_AND(d, REG_ITMP2, d);
1353                                 }
1354                         M_ISUB(REG_ZERO, d, d);
1355                         store_reg_to_var_int(iptr->dst, d);
1356                         break;
1357
1358                 case ICMD_IREM0X10001:  /* ..., value  ==> ..., value % 0x100001      */
1359
1360 /*          b = value & 0xffff;
1361                         a = value >> 16;
1362                         a = ((b - a) & 0xffff) + (b < a);
1363 */
1364                         var_to_reg_int(s1, src, REG_ITMP1);
1365                         d = reg_of_var(iptr->dst, REG_ITMP3);
1366                         if (s1 == d) {
1367                                 M_MOV(s1, REG_ITMP3);
1368                                 s1 = REG_ITMP3;
1369                                 }
1370                         M_BLTZ(s1, 7);
1371             M_CZEXT(s1, REG_ITMP2);
1372                         M_SRA_IMM(s1, 16, d);
1373                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1374                         M_ISUB(REG_ITMP2, d, d);
1375             M_CZEXT(d, d);
1376                         M_IADD(d, REG_ITMP1, d);
1377                         M_BR(11 + (s1 == REG_ITMP1));
1378                         M_ISUB(REG_ZERO, s1, REG_ITMP1);
1379             M_CZEXT(REG_ITMP1, REG_ITMP2);
1380                         M_SRA_IMM(REG_ITMP1, 16, d);
1381                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1382                         M_ISUB(REG_ITMP2, d, d);
1383             M_CZEXT(d, d);
1384                         M_IADD(d, REG_ITMP1, d);
1385                         M_ISUB(REG_ZERO, d, d);
1386                         if (s1 == REG_ITMP1) {
1387                                 var_to_reg_int(s1, src, REG_ITMP1);
1388                                 }
1389                         M_SLL_IMM(s1, 33, REG_ITMP2);
1390                         M_CMPEQ(REG_ITMP2, REG_ZERO, REG_ITMP2);
1391                         M_ISUB(d, REG_ITMP2, d);
1392                         store_reg_to_var_int(iptr->dst, d);
1393                         break;
1394
1395                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1396                                       /* val.l = constant                             */
1397
1398                         var_to_reg_int(s1, src, REG_ITMP1);
1399                         d = reg_of_var(iptr->dst, REG_ITMP3);
1400                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1401                                 M_AND_IMM(s1, iptr->val.l, d);
1402                                 }
1403                         else if (iptr->val.l == 0xffffL) {
1404                                 M_CZEXT(s1, d);
1405                                 }
1406                         else if (iptr->val.l == 0xffffffL) {
1407                                 M_ZAPNOT_IMM(s1, 0x07, d);
1408                                 }
1409                         else if (iptr->val.l == 0xffffffffL) {
1410                                 M_IZEXT(s1, d);
1411                                 }
1412                         else if (iptr->val.l == 0xffffffffffL) {
1413                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1414                                 }
1415                         else if (iptr->val.l == 0xffffffffffffL) {
1416                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1417                                 }
1418                         else if (iptr->val.l == 0xffffffffffffffL) {
1419                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1420                                 }
1421                         else {
1422                                 LCONST(REG_ITMP2, iptr->val.l);
1423                                 M_AND(s1, REG_ITMP2, d);
1424                                 }
1425                         store_reg_to_var_int(iptr->dst, d);
1426                         break;
1427
1428                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1429                                       /* val.l = constant                             */
1430
1431                         var_to_reg_int(s1, src, REG_ITMP1);
1432                         d = reg_of_var(iptr->dst, REG_ITMP3);
1433                         if (s1 == d) {
1434                                 M_MOV(s1, REG_ITMP1);
1435                                 s1 = REG_ITMP1;
1436                                 }
1437                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1438                                 M_AND_IMM(s1, iptr->val.l, d);
1439                                 M_BGEZ(s1, 3);
1440                                 M_LSUB(REG_ZERO, s1, d);
1441                                 M_AND_IMM(d, iptr->val.l, d);
1442                                 }
1443                         else if (iptr->val.l == 0xffffL) {
1444                                 M_CZEXT(s1, d);
1445                                 M_BGEZ(s1, 3);
1446                                 M_LSUB(REG_ZERO, s1, d);
1447                                 M_CZEXT(d, d);
1448                                 }
1449                         else if (iptr->val.l == 0xffffffL) {
1450                                 M_ZAPNOT_IMM(s1, 0x07, d);
1451                                 M_BGEZ(s1, 3);
1452                                 M_LSUB(REG_ZERO, s1, d);
1453                                 M_ZAPNOT_IMM(d, 0x07, d);
1454                                 }
1455                         else if (iptr->val.l == 0xffffffffL) {
1456                                 M_IZEXT(s1, d);
1457                                 M_BGEZ(s1, 3);
1458                                 M_LSUB(REG_ZERO, s1, d);
1459                                 M_IZEXT(d, d);
1460                                 }
1461                         else if (iptr->val.l == 0xffffffffffL) {
1462                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1463                                 M_BGEZ(s1, 3);
1464                                 M_LSUB(REG_ZERO, s1, d);
1465                                 M_ZAPNOT_IMM(d, 0x1f, d);
1466                                 }
1467                         else if (iptr->val.l == 0xffffffffffffL) {
1468                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1469                                 M_BGEZ(s1, 3);
1470                                 M_LSUB(REG_ZERO, s1, d);
1471                                 M_ZAPNOT_IMM(d, 0x3f, d);
1472                                 }
1473                         else if (iptr->val.l == 0xffffffffffffffL) {
1474                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1475                                 M_BGEZ(s1, 3);
1476                                 M_LSUB(REG_ZERO, s1, d);
1477                                 M_ZAPNOT_IMM(d, 0x7f, d);
1478                                 }
1479                         else {
1480                                 LCONST(REG_ITMP2, iptr->val.l);
1481                                 M_AND(s1, REG_ITMP2, d);
1482                                 M_BGEZ(s1, 3);
1483                                 M_LSUB(REG_ZERO, s1, d);
1484                                 M_AND(d, REG_ITMP2, d);
1485                                 }
1486                         M_LSUB(REG_ZERO, d, d);
1487                         store_reg_to_var_int(iptr->dst, d);
1488                         break;
1489
1490                 case ICMD_LREM0X10001:/* ..., value  ==> ..., value % 0x10001         */
1491
1492                         var_to_reg_int(s1, src, REG_ITMP1);
1493                         d = reg_of_var(iptr->dst, REG_ITMP3);
1494                         if (s1 == d) {
1495                                 M_MOV(s1, REG_ITMP3);
1496                                 s1 = REG_ITMP3;
1497                                 }
1498                         M_CZEXT(s1, REG_ITMP2);
1499                         M_SRA_IMM(s1, 16, d);
1500                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1501                         M_LSUB(REG_ITMP2, d, d);
1502             M_CZEXT(d, d);
1503                         M_LADD(d, REG_ITMP1, d);
1504                         M_LDA(REG_ITMP2, REG_ZERO, -1);
1505                         M_SRL_IMM(REG_ITMP2, 33, REG_ITMP2);
1506                         if (s1 == REG_ITMP1) {
1507                                 var_to_reg_int(s1, src, REG_ITMP1);
1508                                 }
1509                         M_CMPULT(s1, REG_ITMP2, REG_ITMP2);
1510                         M_BNEZ(REG_ITMP2, 11);
1511                         M_LDA(d, REG_ZERO, -257);
1512                         M_ZAPNOT_IMM(d, 0xcd, d);
1513                         M_LSUB(REG_ZERO, s1, REG_ITMP2);
1514                         M_CMOVGE(s1, s1, REG_ITMP2);
1515                         M_UMULH(REG_ITMP2, d, REG_ITMP2);
1516                         M_SRL_IMM(REG_ITMP2, 16, REG_ITMP2);
1517                         M_LSUB(REG_ZERO, REG_ITMP2, d);
1518                         M_CMOVGE(s1, REG_ITMP2, d);
1519                         M_SLL_IMM(d, 16, REG_ITMP2);
1520                         M_LADD(d, REG_ITMP2, d);
1521                         M_LSUB(s1, d, d);
1522                         store_reg_to_var_int(iptr->dst, d);
1523                         break;
1524
1525                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1526                 case ICMD_LOR:
1527
1528                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1529                         var_to_reg_int(s2, src, REG_ITMP2);
1530                         d = reg_of_var(iptr->dst, REG_ITMP3);
1531                         M_OR( s1,s2, d);
1532                         store_reg_to_var_int(iptr->dst, d);
1533                         break;
1534
1535                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1536                                       /* val.i = constant                             */
1537
1538                         var_to_reg_int(s1, src, REG_ITMP1);
1539                         d = reg_of_var(iptr->dst, REG_ITMP3);
1540                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1541                                 M_OR_IMM(s1, iptr->val.i, d);
1542                                 }
1543                         else {
1544                                 ICONST(REG_ITMP2, iptr->val.i);
1545                                 M_OR(s1, REG_ITMP2, d);
1546                                 }
1547                         store_reg_to_var_int(iptr->dst, d);
1548                         break;
1549
1550                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1551                                       /* val.l = constant                             */
1552
1553                         var_to_reg_int(s1, src, REG_ITMP1);
1554                         d = reg_of_var(iptr->dst, REG_ITMP3);
1555                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1556                                 M_OR_IMM(s1, iptr->val.l, d);
1557                                 }
1558                         else {
1559                                 LCONST(REG_ITMP2, iptr->val.l);
1560                                 M_OR(s1, REG_ITMP2, d);
1561                                 }
1562                         store_reg_to_var_int(iptr->dst, d);
1563                         break;
1564
1565                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1566                 case ICMD_LXOR:
1567
1568                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1569                         var_to_reg_int(s2, src, REG_ITMP2);
1570                         d = reg_of_var(iptr->dst, REG_ITMP3);
1571                         M_XOR(s1, s2, d);
1572                         store_reg_to_var_int(iptr->dst, d);
1573                         break;
1574
1575                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1576                                       /* val.i = constant                             */
1577
1578                         var_to_reg_int(s1, src, REG_ITMP1);
1579                         d = reg_of_var(iptr->dst, REG_ITMP3);
1580                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1581                                 M_XOR_IMM(s1, iptr->val.i, d);
1582                                 }
1583                         else {
1584                                 ICONST(REG_ITMP2, iptr->val.i);
1585                                 M_XOR(s1, REG_ITMP2, d);
1586                                 }
1587                         store_reg_to_var_int(iptr->dst, d);
1588                         break;
1589
1590                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1591                                       /* val.l = constant                             */
1592
1593                         var_to_reg_int(s1, src, REG_ITMP1);
1594                         d = reg_of_var(iptr->dst, REG_ITMP3);
1595                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1596                                 M_XOR_IMM(s1, iptr->val.l, d);
1597                                 }
1598                         else {
1599                                 LCONST(REG_ITMP2, iptr->val.l);
1600                                 M_XOR(s1, REG_ITMP2, d);
1601                                 }
1602                         store_reg_to_var_int(iptr->dst, d);
1603                         break;
1604
1605
1606                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1607
1608                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1609                         var_to_reg_int(s2, src, REG_ITMP2);
1610                         d = reg_of_var(iptr->dst, REG_ITMP3);
1611                         M_CMPLT(s1, s2, REG_ITMP3);
1612                         M_CMPLT(s2, s1, REG_ITMP1);
1613                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1614                         store_reg_to_var_int(iptr->dst, d);
1615                         break;
1616
1617
1618                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1619                                       /* op1 = variable, val.i = constant             */
1620
1621                         var = &(locals[iptr->op1][TYPE_INT]);
1622                         if (var->flags & INMEMORY) {
1623                                 s1 = REG_ITMP1;
1624                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1625                                 }
1626                         else
1627                                 s1 = var->regoff;
1628                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1629                                 M_IADD_IMM(s1, iptr->val.i, s1);
1630                                 }
1631                         else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1632                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1633                                 }
1634                         else {
1635                                 M_LDA (s1, s1, iptr->val.i);
1636                                 M_IADD(s1, REG_ZERO, s1);
1637                                 }
1638                         if (var->flags & INMEMORY)
1639                                 M_LST(s1, REG_SP, 8 * var->regoff);
1640                         break;
1641
1642
1643                 /* floating operations ************************************************/
1644
1645                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1646
1647                         var_to_reg_flt(s1, src, REG_FTMP1);
1648                         d = reg_of_var(iptr->dst, REG_FTMP3);
1649                         M_FMOVN(s1, d);
1650                         store_reg_to_var_flt(iptr->dst, d);
1651                         break;
1652
1653                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1654
1655                         var_to_reg_flt(s1, src, REG_FTMP1);
1656                         d = reg_of_var(iptr->dst, REG_FTMP3);
1657                         M_FMOVN(s1, d);
1658                         store_reg_to_var_flt(iptr->dst, d);
1659                         break;
1660
1661                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1662
1663                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1664                         var_to_reg_flt(s2, src, REG_FTMP2);
1665                         d = reg_of_var(iptr->dst, REG_FTMP3);
1666                         if (opt_noieee) {
1667                                 M_FADD(s1, s2, d);
1668                                 }
1669                         else {
1670                                 M_FADDS(s1, s2, d);
1671                                 M_TRAPB;
1672                                 }
1673                         store_reg_to_var_flt(iptr->dst, d);
1674                         break;
1675
1676                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1677
1678                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1679                         var_to_reg_flt(s2, src, REG_FTMP2);
1680                         d = reg_of_var(iptr->dst, REG_FTMP3);
1681                         if (opt_noieee) {
1682                                 M_DADD(s1, s2, d);
1683                                 }
1684                         else {
1685                                 M_DADDS(s1, s2, d);
1686                                 M_TRAPB;
1687                                 }
1688                         store_reg_to_var_flt(iptr->dst, d);
1689                         break;
1690
1691                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1692
1693                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1694                         var_to_reg_flt(s2, src, REG_FTMP2);
1695                         d = reg_of_var(iptr->dst, REG_FTMP3);
1696                         if (opt_noieee) {
1697                                 M_FSUB(s1, s2, d);
1698                                 }
1699                         else {
1700                                 M_FSUBS(s1, s2, d);
1701                                 M_TRAPB;
1702                                 }
1703                         store_reg_to_var_flt(iptr->dst, d);
1704                         break;
1705
1706                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1707
1708                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1709                         var_to_reg_flt(s2, src, REG_FTMP2);
1710                         d = reg_of_var(iptr->dst, REG_FTMP3);
1711                         if (opt_noieee) {
1712                                 M_DSUB(s1, s2, d);
1713                                 }
1714                         else {
1715                                 M_DSUBS(s1, s2, d);
1716                                 M_TRAPB;
1717                                 }
1718                         store_reg_to_var_flt(iptr->dst, d);
1719                         break;
1720
1721                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1722
1723                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1724                         var_to_reg_flt(s2, src, REG_FTMP2);
1725                         d = reg_of_var(iptr->dst, REG_FTMP3);
1726                         if (opt_noieee) {
1727                                 M_FMUL(s1, s2, d);
1728                                 }
1729                         else {
1730                                 M_FMULS(s1, s2, d);
1731                                 M_TRAPB;
1732                                 }
1733                         store_reg_to_var_flt(iptr->dst, d);
1734                         break;
1735
1736                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1737
1738                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1739                         var_to_reg_flt(s2, src, REG_FTMP2);
1740                         d = reg_of_var(iptr->dst, REG_FTMP3);
1741                         if (opt_noieee) {
1742                                 M_DMUL(s1, s2, d);
1743                                 }
1744                         else {
1745                                 M_DMULS(s1, s2, d);
1746                                 M_TRAPB;
1747                                 }
1748                         store_reg_to_var_flt(iptr->dst, d);
1749                         break;
1750
1751                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1752
1753                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1754                         var_to_reg_flt(s2, src, REG_FTMP2);
1755                         d = reg_of_var(iptr->dst, REG_FTMP3);
1756                         if (opt_noieee) {
1757                                 M_FDIV(s1, s2, d);
1758                                 }
1759                         else {
1760                                 M_FDIVS(s1, s2, d);
1761                                 M_TRAPB;
1762                                 }
1763                         store_reg_to_var_flt(iptr->dst, d);
1764                         break;
1765
1766                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1767
1768                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1769                         var_to_reg_flt(s2, src, REG_FTMP2);
1770                         d = reg_of_var(iptr->dst, REG_FTMP3);
1771                         if (opt_noieee) {
1772                                 M_DDIV(s1, s2, d);
1773                                 }
1774                         else {
1775                                 M_DDIVS(s1, s2, d);
1776                                 M_TRAPB;
1777                                 }
1778                         store_reg_to_var_flt(iptr->dst, d);
1779                         break;
1780
1781                 case ICMD_FREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1782
1783                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1784                         var_to_reg_flt(s2, src, REG_FTMP2);
1785                         d = reg_of_var(iptr->dst, REG_FTMP3);
1786                         if (opt_noieee) {
1787                                 M_FDIV(s1,s2, REG_FTMP3);
1788                                 M_CVTDL_C(REG_FTMP3, REG_FTMP3); /* round to integer */
1789                                 M_CVTLF(REG_FTMP3, REG_FTMP3);
1790                                 M_FMUL(REG_FTMP3, s2, REG_FTMP3);
1791                                 M_FSUB(s1, REG_FTMP3, d);
1792                                 }
1793                         else {
1794                                 M_FDIVS(s1,s2, REG_FTMP3);
1795                                 M_TRAPB;
1796                                 M_CVTDL_CS(REG_FTMP3, REG_FTMP3); /* round to integer */
1797                                 M_TRAPB;
1798                                 M_CVTLF(REG_FTMP3, REG_FTMP3);
1799                                 M_FMULS(REG_FTMP3, s2, REG_FTMP3);
1800                                 M_TRAPB;
1801                                 M_FSUBS(s1, REG_FTMP3, d);
1802                                 M_TRAPB;
1803                                 }
1804                         store_reg_to_var_flt(iptr->dst, d);
1805                     break;
1806
1807                 case ICMD_DREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1808
1809                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1810                         var_to_reg_flt(s2, src, REG_FTMP2);
1811                         d = reg_of_var(iptr->dst, REG_FTMP3);
1812                         if (opt_noieee) {
1813                                 M_DDIV(s1,s2, REG_FTMP3);
1814                                 M_CVTDL_C(REG_FTMP3, REG_FTMP3); /* round to integer */
1815                                 M_CVTLD(REG_FTMP3, REG_FTMP3);
1816                                 M_DMUL(REG_FTMP3, s2, REG_FTMP3);
1817                                 M_DSUB(s1, REG_FTMP3, d);
1818                                 }
1819                         else {
1820                                 M_DDIVS(s1,s2, REG_FTMP3);
1821                                 M_TRAPB;
1822                                 M_CVTDL_CS(REG_FTMP3, REG_FTMP3); /* round to integer */
1823                                 M_TRAPB;
1824                                 M_CVTLD(REG_FTMP3, REG_FTMP3);
1825                                 M_DMULS(REG_FTMP3, s2, REG_FTMP3);
1826                                 M_TRAPB;
1827                                 M_DSUBS(s1, REG_FTMP3, d);
1828                                 M_TRAPB;
1829                                 }
1830                         store_reg_to_var_flt(iptr->dst, d);
1831                     break;
1832
1833                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1834                 case ICMD_L2F:
1835                         var_to_reg_int(s1, src, REG_ITMP1);
1836                         d = reg_of_var(iptr->dst, REG_FTMP3);
1837                         a = dseg_adddouble(0.0);
1838                         M_LST (s1, REG_PV, a);
1839                         M_DLD (d, REG_PV, a);
1840                         M_CVTLF(d, d);
1841                         store_reg_to_var_flt(iptr->dst, d);
1842                         break;
1843
1844                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1845                 case ICMD_L2D:
1846                         var_to_reg_int(s1, src, REG_ITMP1);
1847                         d = reg_of_var(iptr->dst, REG_FTMP3);
1848                         a = dseg_adddouble(0.0);
1849                         M_LST (s1, REG_PV, a);
1850                         M_DLD (d, REG_PV, a);
1851                         M_CVTLD(d, d);
1852                         store_reg_to_var_flt(iptr->dst, d);
1853                         break;
1854
1855                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1856                 case ICMD_D2I:
1857                         var_to_reg_flt(s1, src, REG_FTMP1);
1858                         d = reg_of_var(iptr->dst, REG_ITMP3);
1859                         a = dseg_adddouble(0.0);
1860                         if (opt_noieee) {
1861                                 M_CVTDL_C(s1, REG_FTMP1);
1862                                 M_CVTLI(REG_FTMP1, REG_FTMP2);
1863                                 }
1864                         else {
1865                                 M_CVTDL_CS(s1, REG_FTMP1);
1866                                 M_TRAPB;
1867                                 M_CVTLIS(REG_FTMP1, REG_FTMP2);
1868                                 M_TRAPB;
1869                                 }
1870                         M_DST (REG_FTMP1, REG_PV, a);
1871                         M_ILD (d, REG_PV, a);
1872                         store_reg_to_var_int(iptr->dst, d);
1873                         break;
1874
1875                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1876                 case ICMD_D2L:
1877                         var_to_reg_flt(s1, src, REG_FTMP1);
1878                         d = reg_of_var(iptr->dst, REG_ITMP3);
1879                         a = dseg_adddouble(0.0);
1880                         if (opt_noieee) {
1881                                 M_CVTDL_C(s1, REG_FTMP1);
1882                                 }
1883                         else {
1884                                 M_CVTDL_CS(s1, REG_FTMP1);
1885                                 M_TRAPB;
1886                                 }
1887                         M_DST (REG_FTMP1, REG_PV, a);
1888                         M_LLD (d, REG_PV, a);
1889                         store_reg_to_var_int(iptr->dst, d);
1890                         break;
1891
1892                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1893
1894                         var_to_reg_flt(s1, src, REG_FTMP1);
1895                         d = reg_of_var(iptr->dst, REG_FTMP3);
1896                         M_FLTMOVE(s1, d);
1897                         store_reg_to_var_flt(iptr->dst, d);
1898                         break;
1899
1900                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1901
1902                         var_to_reg_flt(s1, src, REG_FTMP1);
1903                         d = reg_of_var(iptr->dst, REG_FTMP3);
1904                         if (opt_noieee) {
1905                                 M_CVTDF(s1, d);
1906                                 }
1907                         else {
1908                                 M_CVTDFS(s1, d);
1909                                 M_TRAPB;
1910                                 }
1911                         store_reg_to_var_flt(iptr->dst, d);
1912                         break;
1913
1914                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1915                 case ICMD_DCMPL:
1916                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1917                         var_to_reg_flt(s2, src, REG_FTMP2);
1918                         d = reg_of_var(iptr->dst, REG_ITMP3);
1919                         if (opt_noieee) {
1920                                 M_LSUB_IMM(REG_ZERO, 1, d);
1921                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1922                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1923                                 M_CLR   (d);
1924                                 M_FCMPLT(s2, s1, REG_FTMP3);
1925                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1926                                 M_LADD_IMM(REG_ZERO, 1, d);
1927                                 }
1928                         else {
1929                                 M_LSUB_IMM(REG_ZERO, 1, d);
1930                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1931                                 M_TRAPB;
1932                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1933                                 M_CLR   (d);
1934                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1935                                 M_TRAPB;
1936                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1937                                 M_LADD_IMM(REG_ZERO, 1, d);
1938                                 }
1939                         store_reg_to_var_int(iptr->dst, d);
1940                         break;
1941
1942                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1943                 case ICMD_DCMPG:
1944                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1945                         var_to_reg_flt(s2, src, REG_FTMP2);
1946                         d = reg_of_var(iptr->dst, REG_ITMP3);
1947                         if (opt_noieee) {
1948                                 M_LADD_IMM(REG_ZERO, 1, d);
1949                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1950                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1951                                 M_CLR   (d);
1952                                 M_FCMPLT(s1, s2, REG_FTMP3);
1953                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1954                                 M_LSUB_IMM(REG_ZERO, 1, d);
1955                                 }
1956                         else {
1957                                 M_LADD_IMM(REG_ZERO, 1, d);
1958                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1959                                 M_TRAPB;
1960                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1961                                 M_CLR   (d);
1962                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1963                                 M_TRAPB;
1964                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1965                                 M_LSUB_IMM(REG_ZERO, 1, d);
1966                                 }
1967                         store_reg_to_var_int(iptr->dst, d);
1968                         break;
1969
1970
1971                 /* memory operations **************************************************/
1972
1973                         /* #define gen_bound_check \
1974                         if (checkbounds) {\
1975                                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1976                                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
1977                                 M_BEQZ(REG_ITMP3, 0);\
1978                                 codegen_addxboundrefs(mcodeptr);\
1979                                 }
1980                         */
1981
1982 #define gen_bound_check \
1983             if (checkbounds) { \
1984                                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1985                                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
1986                                 M_BEQZ(REG_ITMP3, 0);\
1987                                 codegen_addxboundrefs(mcodeptr); \
1988                 }
1989
1990                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1991
1992                         var_to_reg_int(s1, src, REG_ITMP1);
1993                         d = reg_of_var(iptr->dst, REG_ITMP3);
1994                         gen_nullptr_check(s1);
1995                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1996                         store_reg_to_var_int(iptr->dst, d);
1997                         break;
1998
1999                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
2000
2001                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2002                         var_to_reg_int(s2, src, REG_ITMP2);
2003                         d = reg_of_var(iptr->dst, REG_ITMP3);
2004                         if (iptr->op1 == 0) {
2005                                 gen_nullptr_check(s1);
2006                                 gen_bound_check;
2007                                 }
2008                         M_SAADDQ(s2, s1, REG_ITMP1);
2009                         M_ALD( d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2010                         store_reg_to_var_int(iptr->dst, d);
2011                         break;
2012
2013                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
2014
2015                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2016                         var_to_reg_int(s2, src, REG_ITMP2);
2017                         d = reg_of_var(iptr->dst, REG_ITMP3);
2018                         if (iptr->op1 == 0) {
2019                                 gen_nullptr_check(s1);
2020                                 gen_bound_check;
2021                                 }
2022                         M_S8ADDQ(s2, s1, REG_ITMP1);
2023                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
2024                         store_reg_to_var_int(iptr->dst, d);
2025                         break;
2026
2027                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
2028
2029                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2030                         var_to_reg_int(s2, src, REG_ITMP2);
2031                         d = reg_of_var(iptr->dst, REG_ITMP3);
2032                         if (iptr->op1 == 0) {
2033                                 gen_nullptr_check(s1);
2034                                 gen_bound_check;
2035                                 }
2036
2037                         M_S4ADDQ(s2, s1, REG_ITMP1);
2038                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
2039                         store_reg_to_var_int(iptr->dst, d);
2040                         break;
2041
2042                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
2043
2044                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2045                         var_to_reg_int(s2, src, REG_ITMP2);
2046                         d = reg_of_var(iptr->dst, REG_FTMP3);
2047                         if (iptr->op1 == 0) {
2048                                 gen_nullptr_check(s1);
2049                                 gen_bound_check;
2050                                 }
2051                         M_S4ADDQ(s2, s1, REG_ITMP1);
2052                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2053                         store_reg_to_var_flt(iptr->dst, d);
2054                         break;
2055
2056                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
2057
2058                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2059                         var_to_reg_int(s2, src, REG_ITMP2);
2060                         d = reg_of_var(iptr->dst, REG_FTMP3);
2061                         if (iptr->op1 == 0) {
2062                                 gen_nullptr_check(s1);
2063                                 gen_bound_check;
2064                                 }
2065                         M_S8ADDQ(s2, s1, REG_ITMP1);
2066                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2067                         store_reg_to_var_flt(iptr->dst, d);
2068                         break;
2069
2070                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
2071
2072                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2073                         var_to_reg_int(s2, src, REG_ITMP2);
2074                         d = reg_of_var(iptr->dst, REG_ITMP3);
2075                         if (iptr->op1 == 0) {
2076                                 gen_nullptr_check(s1);
2077                                 gen_bound_check;
2078                                 }
2079                         if (has_ext_instr_set) {
2080                                 M_LADD(s2, s1, REG_ITMP1);
2081                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2082                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
2083                                 }
2084                         else {
2085                                 M_LADD (s2, s1, REG_ITMP1);
2086                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2087                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2088                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2089                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
2090                                 }
2091                         store_reg_to_var_int(iptr->dst, d);
2092                         break;
2093
2094                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
2095
2096                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2097                         var_to_reg_int(s2, src, REG_ITMP2);
2098                         d = reg_of_var(iptr->dst, REG_ITMP3);
2099                         if (iptr->op1 == 0) {
2100                                 gen_nullptr_check(s1);
2101                                 gen_bound_check;
2102                                 }
2103                         if (has_ext_instr_set) {
2104                                 M_LADD(s2, s1, REG_ITMP1);
2105                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2106                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
2107                                 M_SSEXT(d, d);
2108                                 }
2109                         else {
2110                                 M_LADD(s2, s1, REG_ITMP1);
2111                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2112                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2113                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
2114                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
2115                                 M_SRA_IMM(d, 48, d);
2116                                 }
2117                         store_reg_to_var_int(iptr->dst, d);
2118                         break;
2119
2120                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
2121
2122                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2123                         var_to_reg_int(s2, src, REG_ITMP2);
2124                         d = reg_of_var(iptr->dst, REG_ITMP3);
2125                         if (iptr->op1 == 0) {
2126                                 gen_nullptr_check(s1);
2127                                 gen_bound_check;
2128                                 }
2129                         if (has_ext_instr_set) {
2130                                 M_LADD   (s2, s1, REG_ITMP1);
2131                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
2132                                 M_BSEXT  (d, d);
2133                                 }
2134                         else {
2135                                 M_LADD(s2, s1, REG_ITMP1);
2136                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2137                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
2138                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
2139                                 M_SRA_IMM(d, 56, d);
2140                                 }
2141                         store_reg_to_var_int(iptr->dst, d);
2142                         break;
2143
2144
2145                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
2146
2147                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2148                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2149                         if (iptr->op1 == 0) {
2150                                 gen_nullptr_check(s1);
2151                                 gen_bound_check;
2152                                 }
2153                         var_to_reg_int(s3, src, REG_ITMP3);
2154                         M_SAADDQ(s2, s1, REG_ITMP1);
2155                         M_AST   (s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2156                         break;
2157
2158                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
2159
2160                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2161                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2162                         if (iptr->op1 == 0) {
2163                                 gen_nullptr_check(s1);
2164                                 gen_bound_check;
2165                                 }
2166                         var_to_reg_int(s3, src, REG_ITMP3);
2167                         M_S8ADDQ(s2, s1, REG_ITMP1);
2168                         M_LST   (s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
2169                         break;
2170
2171                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
2172
2173                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2174                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2175                         if (iptr->op1 == 0) {
2176                                 gen_nullptr_check(s1);
2177                                 gen_bound_check;
2178                                 }
2179
2180                         var_to_reg_int(s3, src, REG_ITMP3);
2181                         M_S4ADDQ(s2, s1, REG_ITMP1);
2182                         M_IST   (s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
2183                         break;
2184
2185                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
2186
2187                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2188                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2189                         if (iptr->op1 == 0) {
2190                                 gen_nullptr_check(s1);
2191                                 gen_bound_check;
2192                                 }
2193                         var_to_reg_flt(s3, src, REG_FTMP3);
2194                         M_S4ADDQ(s2, s1, REG_ITMP1);
2195                         M_FST   (s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2196                         break;
2197
2198                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
2199
2200                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2201                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2202                         if (iptr->op1 == 0) {
2203                                 gen_nullptr_check(s1);
2204                                 gen_bound_check;
2205                                 }
2206                         var_to_reg_flt(s3, src, REG_FTMP3);
2207                         M_S8ADDQ(s2, s1, REG_ITMP1);
2208                         M_DST   (s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2209                         break;
2210
2211                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
2212
2213                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2214                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2215                         if (iptr->op1 == 0) {
2216                                 gen_nullptr_check(s1);
2217                                 gen_bound_check;
2218                                 }
2219                         var_to_reg_int(s3, src, REG_ITMP3);
2220                         if (has_ext_instr_set) {
2221                                 M_LADD(s2, s1, REG_ITMP1);
2222                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2223                                 M_SST (s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
2224                                 }
2225                         else {
2226                                 M_LADD (s2, s1, REG_ITMP1);
2227                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2228                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2229                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2230                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
2231                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2232                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2233                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2234                                 }
2235                         break;
2236
2237                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
2238
2239                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2240                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2241                         if (iptr->op1 == 0) {
2242                                 gen_nullptr_check(s1);
2243                                 gen_bound_check;
2244                                 }
2245                         var_to_reg_int(s3, src, REG_ITMP3);
2246                         if (has_ext_instr_set) {
2247                                 M_LADD(s2, s1, REG_ITMP1);
2248                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2249                                 M_SST (s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2250                                 }
2251                         else {
2252                                 M_LADD (s2, s1, REG_ITMP1);
2253                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2254                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2255                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2256                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
2257                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2258                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2259                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2260                                 }
2261                         break;
2262
2263                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
2264
2265                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2266                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2267                         if (iptr->op1 == 0) {
2268                                 gen_nullptr_check(s1);
2269                                 gen_bound_check;
2270                                 }
2271                         var_to_reg_int(s3, src, REG_ITMP3);
2272                         if (has_ext_instr_set) {
2273                                 M_LADD(s2, s1, REG_ITMP1);
2274                                 M_BST (s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2275                                 }
2276                         else {
2277                                 M_LADD (s2, s1, REG_ITMP1);
2278                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2279                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2280                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
2281                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2282                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2283                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2284                                 }
2285                         break;
2286
2287
2288                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2289                                       /* op1 = type, val.a = field address            */
2290
2291                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2292                         M_ALD(REG_ITMP1, REG_PV, a);
2293                         switch (iptr->op1) {
2294                                 case TYPE_INT:
2295                                         var_to_reg_int(s2, src, REG_ITMP2);
2296                                         M_IST(s2, REG_ITMP1, 0);
2297                                         break;
2298                                 case TYPE_LNG:
2299                                         var_to_reg_int(s2, src, REG_ITMP2);
2300                                         M_LST(s2, REG_ITMP1, 0);
2301                                         break;
2302                                 case TYPE_ADR:
2303                                         var_to_reg_int(s2, src, REG_ITMP2);
2304                                         M_AST(s2, REG_ITMP1, 0);
2305                                         break;
2306                                 case TYPE_FLT:
2307                                         var_to_reg_flt(s2, src, REG_FTMP2);
2308                                         M_FST(s2, REG_ITMP1, 0);
2309                                         break;
2310                                 case TYPE_DBL:
2311                                         var_to_reg_flt(s2, src, REG_FTMP2);
2312                                         M_DST(s2, REG_ITMP1, 0);
2313                                         break;
2314                                 default: panic ("internal error");
2315                                 }
2316                         break;
2317
2318                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2319                                       /* op1 = type, val.a = field address            */
2320
2321                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2322                         M_ALD(REG_ITMP1, REG_PV, a);
2323                         switch (iptr->op1) {
2324                                 case TYPE_INT:
2325                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2326                                         M_ILD(d, REG_ITMP1, 0);
2327                                         store_reg_to_var_int(iptr->dst, d);
2328                                         break;
2329                                 case TYPE_LNG:
2330                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2331                                         M_LLD(d, REG_ITMP1, 0);
2332                                         store_reg_to_var_int(iptr->dst, d);
2333                                         break;
2334                                 case TYPE_ADR:
2335                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2336                                         M_ALD(d, REG_ITMP1, 0);
2337                                         store_reg_to_var_int(iptr->dst, d);
2338                                         break;
2339                                 case TYPE_FLT:
2340                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2341                                         M_FLD(d, REG_ITMP1, 0);
2342                                         store_reg_to_var_flt(iptr->dst, d);
2343                                         break;
2344                                 case TYPE_DBL:
2345                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2346                                         M_DLD(d, REG_ITMP1, 0);
2347                                         store_reg_to_var_flt(iptr->dst, d);
2348                                         break;
2349                                 default: panic ("internal error");
2350                                 }
2351                         break;
2352
2353
2354                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2355                                       /* op1 = type, val.i = field offset             */
2356
2357                         a = ((fieldinfo *)(iptr->val.a))->offset;
2358                         switch (iptr->op1) {
2359                                 case TYPE_INT:
2360                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2361                                         var_to_reg_int(s2, src, REG_ITMP2);
2362                                         gen_nullptr_check(s1);
2363                                         M_IST(s2, s1, a);
2364                                         break;
2365                                 case TYPE_LNG:
2366                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2367                                         var_to_reg_int(s2, src, REG_ITMP2);
2368                                         gen_nullptr_check(s1);
2369                                         M_LST(s2, s1, a);
2370                                         break;
2371                                 case TYPE_ADR:
2372                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2373                                         var_to_reg_int(s2, src, REG_ITMP2);
2374                                         gen_nullptr_check(s1);
2375                                         M_AST(s2, s1, a);
2376                                         break;
2377                                 case TYPE_FLT:
2378                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2379                                         var_to_reg_flt(s2, src, REG_FTMP2);
2380                                         gen_nullptr_check(s1);
2381                                         M_FST(s2, s1, a);
2382                                         break;
2383                                 case TYPE_DBL:
2384                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2385                                         var_to_reg_flt(s2, src, REG_FTMP2);
2386                                         gen_nullptr_check(s1);
2387                                         M_DST(s2, s1, a);
2388                                         break;
2389                                 default: panic ("internal error");
2390                                 }
2391                         break;
2392
2393                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2394                                       /* op1 = type, val.i = field offset             */
2395
2396                         a = ((fieldinfo *)(iptr->val.a))->offset;
2397                         switch (iptr->op1) {
2398                                 case TYPE_INT:
2399                                         var_to_reg_int(s1, src, REG_ITMP1);
2400                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2401                                         gen_nullptr_check(s1);
2402                                         M_ILD(d, s1, a);
2403                                         store_reg_to_var_int(iptr->dst, d);
2404                                         break;
2405                                 case TYPE_LNG:
2406                                         var_to_reg_int(s1, src, REG_ITMP1);
2407                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2408                                         gen_nullptr_check(s1);
2409                                         M_LLD(d, s1, a);
2410                                         store_reg_to_var_int(iptr->dst, d);
2411                                         break;
2412                                 case TYPE_ADR:
2413                                         var_to_reg_int(s1, src, REG_ITMP1);
2414                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2415                                         gen_nullptr_check(s1);
2416                                         M_ALD(d, s1, a);
2417                                         store_reg_to_var_int(iptr->dst, d);
2418                                         break;
2419                                 case TYPE_FLT:
2420                                         var_to_reg_int(s1, src, REG_ITMP1);
2421                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2422                                         gen_nullptr_check(s1);
2423                                         M_FLD(d, s1, a);
2424                                         store_reg_to_var_flt(iptr->dst, d);
2425                                         break;
2426                                 case TYPE_DBL:
2427                                         var_to_reg_int(s1, src, REG_ITMP1);
2428                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2429                                         gen_nullptr_check(s1);
2430                                         M_DLD(d, s1, a);
2431                                         store_reg_to_var_flt(iptr->dst, d);
2432                                         break;
2433                                 default: panic ("internal error");
2434                                 }
2435                         break;
2436
2437
2438                 /* branch operations **************************************************/
2439
2440 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2441
2442                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2443
2444                         var_to_reg_int(s1, src, REG_ITMP1);
2445                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2446                         a = dseg_addaddress(asm_handle_exception);
2447                         M_ALD(REG_ITMP2, REG_PV, a);
2448                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2449                         M_NOP;              /* nop ensures that XPC is less than the end */
2450                                             /* of basic block                            */
2451                         ALIGNCODENOP;
2452                         break;
2453
2454                 case ICMD_GOTO:         /* ... ==> ...                                */
2455                                         /* op1 = target JavaVM pc                     */
2456                         M_BR(0);
2457                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2458                         ALIGNCODENOP;
2459                         break;
2460
2461                 case ICMD_JSR:          /* ... ==> ...                                */
2462                                         /* op1 = target JavaVM pc                     */
2463
2464                         M_BSR(REG_ITMP1, 0);
2465                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2466                         break;
2467
2468                 case ICMD_RET:          /* ... ==> ...                                */
2469                                         /* op1 = local variable                       */
2470
2471                         var = &(locals[iptr->op1][TYPE_ADR]);
2472                         if (var->flags & INMEMORY) {
2473                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2474                                 M_RET(REG_ZERO, REG_ITMP1);
2475                                 }
2476                         else
2477                                 M_RET(REG_ZERO, var->regoff);
2478                         ALIGNCODENOP;
2479                         break;
2480
2481                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2482                                         /* op1 = target JavaVM pc                     */
2483
2484                         var_to_reg_int(s1, src, REG_ITMP1);
2485                         M_BEQZ(s1, 0);
2486                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2487                         break;
2488
2489                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2490                                         /* op1 = target JavaVM pc                     */
2491
2492                         var_to_reg_int(s1, src, REG_ITMP1);
2493                         M_BNEZ(s1, 0);
2494                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2495                         break;
2496
2497                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2498                                         /* op1 = target JavaVM pc, val.i = constant   */
2499
2500                         var_to_reg_int(s1, src, REG_ITMP1);
2501                         if (iptr->val.i == 0) {
2502                                 M_BEQZ(s1, 0);
2503                                 }
2504                         else {
2505                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2506                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2507                                         }
2508                                 else {
2509                                         ICONST(REG_ITMP2, iptr->val.i);
2510                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2511                                         }
2512                                 M_BNEZ(REG_ITMP1, 0);
2513                                 }
2514                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2515                         break;
2516
2517                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2518                                         /* op1 = target JavaVM pc, val.i = constant   */
2519
2520                         var_to_reg_int(s1, src, REG_ITMP1);
2521                         if (iptr->val.i == 0) {
2522                                 M_BLTZ(s1, 0);
2523                                 }
2524                         else {
2525                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2526                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2527                                         }
2528                                 else {
2529                                         ICONST(REG_ITMP2, iptr->val.i);
2530                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2531                                         }
2532                                 M_BNEZ(REG_ITMP1, 0);
2533                                 }
2534                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2535                         break;
2536
2537                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2538                                         /* op1 = target JavaVM pc, val.i = constant   */
2539
2540                         var_to_reg_int(s1, src, REG_ITMP1);
2541                         if (iptr->val.i == 0) {
2542                                 M_BLEZ(s1, 0);
2543                                 }
2544                         else {
2545                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2546                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2547                                         }
2548                                 else {
2549                                         ICONST(REG_ITMP2, iptr->val.i);
2550                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2551                                         }
2552                                 M_BNEZ(REG_ITMP1, 0);
2553                                 }
2554                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2555                         break;
2556
2557                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2558                                         /* op1 = target JavaVM pc, val.i = constant   */
2559
2560                         var_to_reg_int(s1, src, REG_ITMP1);
2561                         if (iptr->val.i == 0) {
2562                                 M_BNEZ(s1, 0);
2563                                 }
2564                         else {
2565                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2566                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2567                                         }
2568                                 else {
2569                                         ICONST(REG_ITMP2, iptr->val.i);
2570                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2571                                         }
2572                                 M_BEQZ(REG_ITMP1, 0);
2573                                 }
2574                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2575                         break;
2576
2577                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2578                                         /* op1 = target JavaVM pc, val.i = constant   */
2579
2580                         var_to_reg_int(s1, src, REG_ITMP1);
2581                         if (iptr->val.i == 0) {
2582                                 M_BGTZ(s1, 0);
2583                                 }
2584                         else {
2585                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2586                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2587                                         }
2588                                 else {
2589                                         ICONST(REG_ITMP2, iptr->val.i);
2590                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2591                                         }
2592                                 M_BEQZ(REG_ITMP1, 0);
2593                                 }
2594                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2595                         break;
2596
2597                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2598                                         /* op1 = target JavaVM pc, val.i = constant   */
2599
2600                         var_to_reg_int(s1, src, REG_ITMP1);
2601                         if (iptr->val.i == 0) {
2602                                 M_BGEZ(s1, 0);
2603                                 }
2604                         else {
2605                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2606                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2607                                         }
2608                                 else {
2609                                         ICONST(REG_ITMP2, iptr->val.i);
2610                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2611                                         }
2612                                 M_BEQZ(REG_ITMP1, 0);
2613                                 }
2614                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2615                         break;
2616
2617                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2618                                         /* op1 = target JavaVM pc, val.l = constant   */
2619
2620                         var_to_reg_int(s1, src, REG_ITMP1);
2621                         if (iptr->val.l == 0) {
2622                                 M_BEQZ(s1, 0);
2623                                 }
2624                         else {
2625                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2626                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2627                                         }
2628                                 else {
2629                                         LCONST(REG_ITMP2, iptr->val.l);
2630                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2631                                         }
2632                                 M_BNEZ(REG_ITMP1, 0);
2633                                 }
2634                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2635                         break;
2636
2637                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2638                                         /* op1 = target JavaVM pc, val.l = constant   */
2639
2640                         var_to_reg_int(s1, src, REG_ITMP1);
2641                         if (iptr->val.l == 0) {
2642                                 M_BLTZ(s1, 0);
2643                                 }
2644                         else {
2645                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2646                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2647                                         }
2648                                 else {
2649                                         LCONST(REG_ITMP2, iptr->val.l);
2650                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2651                                         }
2652                                 M_BNEZ(REG_ITMP1, 0);
2653                                 }
2654                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2655                         break;
2656
2657                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2658                                         /* op1 = target JavaVM pc, val.l = constant   */
2659
2660                         var_to_reg_int(s1, src, REG_ITMP1);
2661                         if (iptr->val.l == 0) {
2662                                 M_BLEZ(s1, 0);
2663                                 }
2664                         else {
2665                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2666                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2667                                         }
2668                                 else {
2669                                         LCONST(REG_ITMP2, iptr->val.l);
2670                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2671                                         }
2672                                 M_BNEZ(REG_ITMP1, 0);
2673                                 }
2674                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2675                         break;
2676
2677                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2678                                         /* op1 = target JavaVM pc, val.l = constant   */
2679
2680                         var_to_reg_int(s1, src, REG_ITMP1);
2681                         if (iptr->val.l == 0) {
2682                                 M_BNEZ(s1, 0);
2683                                 }
2684                         else {
2685                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2686                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2687                                         }
2688                                 else {
2689                                         LCONST(REG_ITMP2, iptr->val.l);
2690                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2691                                         }
2692                                 M_BEQZ(REG_ITMP1, 0);
2693                                 }
2694                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2695                         break;
2696
2697                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2698                                         /* op1 = target JavaVM pc, val.l = constant   */
2699
2700                         var_to_reg_int(s1, src, REG_ITMP1);
2701                         if (iptr->val.l == 0) {
2702                                 M_BGTZ(s1, 0);
2703                                 }
2704                         else {
2705                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2706                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2707                                         }
2708                                 else {
2709                                         LCONST(REG_ITMP2, iptr->val.l);
2710                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2711                                         }
2712                                 M_BEQZ(REG_ITMP1, 0);
2713                                 }
2714                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2715                         break;
2716
2717                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2718                                         /* op1 = target JavaVM pc, val.l = constant   */
2719
2720                         var_to_reg_int(s1, src, REG_ITMP1);
2721                         if (iptr->val.l == 0) {
2722                                 M_BGEZ(s1, 0);
2723                                 }
2724                         else {
2725                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2726                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2727                                         }
2728                                 else {
2729                                         LCONST(REG_ITMP2, iptr->val.l);
2730                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2731                                         }
2732                                 M_BEQZ(REG_ITMP1, 0);
2733                                 }
2734                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2735                         break;
2736
2737                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2738                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2739                 case ICMD_IF_ACMPEQ:
2740
2741                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2742                         var_to_reg_int(s2, src, REG_ITMP2);
2743                         M_CMPEQ(s1, s2, REG_ITMP1);
2744                         M_BNEZ(REG_ITMP1, 0);
2745                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2746                         break;
2747
2748                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2749                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2750                 case ICMD_IF_ACMPNE:
2751
2752                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2753                         var_to_reg_int(s2, src, REG_ITMP2);
2754                         M_CMPEQ(s1, s2, REG_ITMP1);
2755                         M_BEQZ(REG_ITMP1, 0);
2756                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2757                         break;
2758
2759                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2760                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2761
2762                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2763                         var_to_reg_int(s2, src, REG_ITMP2);
2764                         M_CMPLT(s1, s2, REG_ITMP1);
2765                         M_BNEZ(REG_ITMP1, 0);
2766                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2767                         break;
2768
2769                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2770                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2771
2772                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2773                         var_to_reg_int(s2, src, REG_ITMP2);
2774                         M_CMPLE(s1, s2, REG_ITMP1);
2775                         M_BEQZ(REG_ITMP1, 0);
2776                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2777                         break;
2778
2779                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2780                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2781
2782                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2783                         var_to_reg_int(s2, src, REG_ITMP2);
2784                         M_CMPLE(s1, s2, REG_ITMP1);
2785                         M_BNEZ(REG_ITMP1, 0);
2786                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2787                         break;
2788
2789                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2790                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2791
2792                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2793                         var_to_reg_int(s2, src, REG_ITMP2);
2794                         M_CMPLT(s1, s2, REG_ITMP1);
2795                         M_BEQZ(REG_ITMP1, 0);
2796                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2797                         break;
2798
2799                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2800
2801                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2802                         break;
2803
2804                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2805                                         /* val.i = constant                           */
2806
2807                         var_to_reg_int(s1, src, REG_ITMP1);
2808                         d = reg_of_var(iptr->dst, REG_ITMP3);
2809                         s3 = iptr->val.i;
2810                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2811                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2812                                         M_CMPEQ(s1, REG_ZERO, d);
2813                                         store_reg_to_var_int(iptr->dst, d);
2814                                         break;
2815                                         }
2816                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2817                                         M_CMPEQ(s1, REG_ZERO, d);
2818                                         M_XOR_IMM(d, 1, d);
2819                                         store_reg_to_var_int(iptr->dst, d);
2820                                         break;
2821                                         }
2822                                 if (s1 == d) {
2823                                         M_MOV(s1, REG_ITMP1);
2824                                         s1 = REG_ITMP1;
2825                                         }
2826                                 ICONST(d, iptr[1].val.i);
2827                                 }
2828                         if ((s3 >= 0) && (s3 <= 255)) {
2829                                 M_CMOVEQ_IMM(s1, s3, d);
2830                                 }
2831                         else {
2832                                 ICONST(REG_ITMP2, s3);
2833                                 M_CMOVEQ(s1, REG_ITMP2, d);
2834                                 }
2835                         store_reg_to_var_int(iptr->dst, d);
2836                         break;
2837
2838                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2839                                         /* val.i = constant                           */
2840
2841                         var_to_reg_int(s1, src, REG_ITMP1);
2842                         d = reg_of_var(iptr->dst, REG_ITMP3);
2843                         s3 = iptr->val.i;
2844                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2845                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2846                                         M_CMPEQ(s1, REG_ZERO, d);
2847                                         store_reg_to_var_int(iptr->dst, d);
2848                                         break;
2849                                         }
2850                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2851                                         M_CMPEQ(s1, REG_ZERO, d);
2852                                         M_XOR_IMM(d, 1, d);
2853                                         store_reg_to_var_int(iptr->dst, d);
2854                                         break;
2855                                         }
2856                                 if (s1 == d) {
2857                                         M_MOV(s1, REG_ITMP1);
2858                                         s1 = REG_ITMP1;
2859                                         }
2860                                 ICONST(d, iptr[1].val.i);
2861                                 }
2862                         if ((s3 >= 0) && (s3 <= 255)) {
2863                                 M_CMOVNE_IMM(s1, s3, d);
2864                                 }
2865                         else {
2866                                 ICONST(REG_ITMP2, s3);
2867                                 M_CMOVNE(s1, REG_ITMP2, d);
2868                                 }
2869                         store_reg_to_var_int(iptr->dst, d);
2870                         break;
2871
2872                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2873                                         /* val.i = constant                           */
2874
2875                         var_to_reg_int(s1, src, REG_ITMP1);
2876                         d = reg_of_var(iptr->dst, REG_ITMP3);
2877                         s3 = iptr->val.i;
2878                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2879                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2880                                         M_CMPLT(s1, REG_ZERO, d);
2881                                         store_reg_to_var_int(iptr->dst, d);
2882                                         break;
2883                                         }
2884                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2885                                         M_CMPLE(REG_ZERO, s1, d);
2886                                         store_reg_to_var_int(iptr->dst, d);
2887                                         break;
2888                                         }
2889                                 if (s1 == d) {
2890                                         M_MOV(s1, REG_ITMP1);
2891                                         s1 = REG_ITMP1;
2892                                         }
2893                                 ICONST(d, iptr[1].val.i);
2894                                 }
2895                         if ((s3 >= 0) && (s3 <= 255)) {
2896                                 M_CMOVLT_IMM(s1, s3, d);
2897                                 }
2898                         else {
2899                                 ICONST(REG_ITMP2, s3);
2900                                 M_CMOVLT(s1, REG_ITMP2, d);
2901                                 }
2902                         store_reg_to_var_int(iptr->dst, d);
2903                         break;
2904
2905                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2906                                         /* val.i = constant                           */
2907
2908                         var_to_reg_int(s1, src, REG_ITMP1);
2909                         d = reg_of_var(iptr->dst, REG_ITMP3);
2910                         s3 = iptr->val.i;
2911                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2912                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2913                                         M_CMPLE(REG_ZERO, s1, d);
2914                                         store_reg_to_var_int(iptr->dst, d);
2915                                         break;
2916                                         }
2917                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2918                                         M_CMPLT(s1, REG_ZERO, d);
2919                                         store_reg_to_var_int(iptr->dst, d);
2920                                         break;
2921                                         }
2922                                 if (s1 == d) {
2923                                         M_MOV(s1, REG_ITMP1);
2924                                         s1 = REG_ITMP1;
2925                                         }
2926                                 ICONST(d, iptr[1].val.i);
2927                                 }
2928                         if ((s3 >= 0) && (s3 <= 255)) {
2929                                 M_CMOVGE_IMM(s1, s3, d);
2930                                 }
2931                         else {
2932                                 ICONST(REG_ITMP2, s3);
2933                                 M_CMOVGE(s1, REG_ITMP2, d);
2934                                 }
2935                         store_reg_to_var_int(iptr->dst, d);
2936                         break;
2937
2938                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2939                                         /* val.i = constant                           */
2940
2941                         var_to_reg_int(s1, src, REG_ITMP1);
2942                         d = reg_of_var(iptr->dst, REG_ITMP3);
2943                         s3 = iptr->val.i;
2944                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2945                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2946                                         M_CMPLT(REG_ZERO, s1, d);
2947                                         store_reg_to_var_int(iptr->dst, d);
2948                                         break;
2949                                         }
2950                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2951                                         M_CMPLE(s1, REG_ZERO, d);
2952                                         store_reg_to_var_int(iptr->dst, d);
2953                                         break;
2954                                         }
2955                                 if (s1 == d) {
2956                                         M_MOV(s1, REG_ITMP1);
2957                                         s1 = REG_ITMP1;
2958                                         }
2959                                 ICONST(d, iptr[1].val.i);
2960                                 }
2961                         if ((s3 >= 0) && (s3 <= 255)) {
2962                                 M_CMOVGT_IMM(s1, s3, d);
2963                                 }
2964                         else {
2965                                 ICONST(REG_ITMP2, s3);
2966                                 M_CMOVGT(s1, REG_ITMP2, d);
2967                                 }
2968                         store_reg_to_var_int(iptr->dst, d);
2969                         break;
2970
2971                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2972                                         /* val.i = constant                           */
2973
2974                         var_to_reg_int(s1, src, REG_ITMP1);
2975                         d = reg_of_var(iptr->dst, REG_ITMP3);
2976                         s3 = iptr->val.i;
2977                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2978                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2979                                         M_CMPLE(s1, REG_ZERO, d);
2980                                         store_reg_to_var_int(iptr->dst, d);
2981                                         break;
2982                                         }
2983                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2984                                         M_CMPLT(REG_ZERO, s1, d);
2985                                         store_reg_to_var_int(iptr->dst, d);
2986                                         break;
2987                                         }
2988                                 if (s1 == d) {
2989                                         M_MOV(s1, REG_ITMP1);
2990                                         s1 = REG_ITMP1;
2991                                         }
2992                                 ICONST(d, iptr[1].val.i);
2993                                 }
2994                         if ((s3 >= 0) && (s3 <= 255)) {
2995                                 M_CMOVLE_IMM(s1, s3, d);
2996                                 }
2997                         else {
2998                                 ICONST(REG_ITMP2, s3);
2999                                 M_CMOVLE(s1, REG_ITMP2, d);
3000                                 }
3001                         store_reg_to_var_int(iptr->dst, d);
3002                         break;
3003
3004
3005                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
3006                 case ICMD_LRETURN:
3007                 case ICMD_ARETURN:
3008
3009 #ifdef USE_THREADS
3010                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
3011                                 int disp;
3012                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
3013                                 M_ALD(REG_PV, REG_PV, a);
3014                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
3015                                 M_JSR(REG_RA, REG_PV);
3016                                 disp = -(int)((u1*) mcodeptr - mcodebase);
3017                                 M_LDA(REG_PV, REG_RA, disp);
3018                                 }
3019 #endif
3020                         var_to_reg_int(s1, src, REG_RESULT);
3021                         M_INTMOVE(s1, REG_RESULT);
3022                         goto nowperformreturn;
3023
3024                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
3025                 case ICMD_DRETURN:
3026
3027 #ifdef USE_THREADS
3028                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
3029                                 int disp;
3030                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
3031                                 M_ALD(REG_PV, REG_PV, a);
3032                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
3033                                 M_JSR(REG_RA, REG_PV);
3034                                 disp = -(int)((u1*) mcodeptr - mcodebase);
3035                                 M_LDA(REG_PV, REG_RA, disp);
3036                                 }
3037 #endif
3038                         var_to_reg_flt(s1, src, REG_FRESULT);
3039                         M_FLTMOVE(s1, REG_FRESULT);
3040                         goto nowperformreturn;
3041
3042                 case ICMD_RETURN:      /* ...  ==> ...                                */
3043
3044 #ifdef USE_THREADS
3045                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
3046                                 int disp;
3047                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
3048                                 M_ALD(REG_PV, REG_PV, a);
3049                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
3050                                 M_JSR(REG_RA, REG_PV);
3051                                 disp = -(int)((u1*) mcodeptr - mcodebase);
3052                                 M_LDA(REG_PV, REG_RA, disp);
3053                                 }
3054 #endif
3055
3056 nowperformreturn:
3057                         {
3058                         int r, p;
3059
3060                         p = parentargs_base;
3061
3062                         /* restore return address                                         */
3063
3064                         if (!isleafmethod)
3065                                 {p--;  M_LLD (REG_RA, REG_SP, 8 * p);}
3066
3067                         /* restore saved registers                                        */
3068
3069                         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
3070                                         {p--; M_LLD(savintregs[r], REG_SP, 8 * p);}
3071                         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
3072                                         {p--; M_DLD(savfltregs[r], REG_SP, 8 * p);}
3073
3074                         /* deallocate stack                                               */
3075
3076                         if (parentargs_base)
3077                                 {M_LDA(REG_SP, REG_SP, parentargs_base*8);}
3078
3079                         /* call trace function */
3080
3081                         if (runverbose) {
3082                                 M_LDA (REG_SP, REG_SP, -24);
3083                                 M_AST(REG_RA, REG_SP, 0);
3084                                 M_LST(REG_RESULT, REG_SP, 8);
3085                                 M_DST(REG_FRESULT, REG_SP,16);
3086                                 a = dseg_addaddress (method);
3087                                 M_ALD(argintregs[0], REG_PV, a);
3088                                 M_MOV(REG_RESULT, argintregs[1]);
3089                                 M_FLTMOVE(REG_FRESULT, argfltregs[2]);
3090                                 M_FLTMOVE(REG_FRESULT, argfltregs[3]);
3091                                 a = dseg_addaddress ((void*) (builtin_displaymethodstop));
3092                                 M_ALD(REG_PV, REG_PV, a);
3093                                 M_JSR (REG_RA, REG_PV);
3094                                 s1 = (int)((u1*) mcodeptr - mcodebase);
3095                                 if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
3096                                 else {
3097                                         s4 ml=-s1, mh=0;
3098                                         while (ml<-32768) { ml+=65536; mh--; }
3099                                         M_LDA (REG_PV, REG_RA, ml );
3100                                         M_LDAH (REG_PV, REG_PV, mh );
3101                                         }
3102                                 M_DLD(REG_FRESULT, REG_SP,16);
3103                                 M_LLD(REG_RESULT, REG_SP, 8);
3104                                 M_ALD(REG_RA, REG_SP, 0);
3105                                 M_LDA (REG_SP, REG_SP, 24);
3106                                 }
3107
3108                         M_RET(REG_ZERO, REG_RA);
3109                         ALIGNCODENOP;
3110                         }
3111                         break;
3112
3113
3114                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
3115                         {
3116                         s4 i, l, *s4ptr;
3117                         void **tptr;
3118
3119                         tptr = (void **) iptr->target;
3120
3121                         s4ptr = iptr->val.a;
3122                         l = s4ptr[1];                          /* low     */
3123                         i = s4ptr[2];                          /* high    */
3124
3125                         var_to_reg_int(s1, src, REG_ITMP1);
3126                         if (l == 0)
3127                                 {M_INTMOVE(s1, REG_ITMP1);}
3128                         else if (l <= 32768) {
3129                                 M_LDA(REG_ITMP1, s1, -l);
3130                                 }
3131                         else {
3132                                 ICONST(REG_ITMP2, l);
3133                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3134                                 }
3135                         i = i - l + 1;
3136
3137                         /* range check */
3138
3139                         if (i <= 256)
3140                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3141                         else {
3142                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3143                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3144                                 }
3145                         M_BEQZ(REG_ITMP2, 0);
3146
3147
3148                         /* codegen_addreference(BlockPtrOfPC(s4ptr[0]), mcodeptr); */
3149                         codegen_addreference((basicblock *) tptr[0], mcodeptr);
3150
3151                         /* build jump table top down and use address of lowest entry */
3152
3153                         /* s4ptr += 3 + i; */
3154                         tptr += i;
3155
3156                         while (--i >= 0) {
3157                                 /* dseg_addtarget(BlockPtrOfPC(*--s4ptr)); */
3158                                 dseg_addtarget((basicblock *) tptr[0]);
3159                                 --tptr;
3160                                 }
3161                         }
3162
3163                         /* length of dataseg after last dseg_addtarget is used by load */
3164
3165                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3166                         M_ALD(REG_ITMP2, REG_ITMP2, -dseglen);
3167                         M_JMP(REG_ZERO, REG_ITMP2);
3168                         ALIGNCODENOP;
3169                         break;
3170
3171
3172                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3173                         {
3174                         s4 i, l, val, *s4ptr;
3175                         void **tptr;
3176
3177                         tptr = (void **) iptr->target;
3178
3179                         s4ptr = iptr->val.a;
3180                         l = s4ptr[0];                          /* default  */
3181                         i = s4ptr[1];                          /* count    */
3182
3183                         MCODECHECK((i<<2)+8);
3184                         var_to_reg_int(s1, src, REG_ITMP1);
3185                         while (--i >= 0) {
3186                                 s4ptr += 2;
3187                                 ++tptr;
3188
3189                                 val = s4ptr[0];
3190                                 if ((val >= 0) && (val <= 255)) {
3191                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
3192                                         }
3193                                 else {
3194                                         if ((val >= -32768) && (val <= 32767)) {
3195                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
3196                                                 }
3197                                         else {
3198                                                 a = dseg_adds4 (val);
3199                                                 M_ILD(REG_ITMP2, REG_PV, a);
3200                                                 }
3201                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3202                                         }
3203                                 M_BNEZ(REG_ITMP2, 0);
3204                                 /* codegen_addreference(BlockPtrOfPC(s4ptr[1]), mcodeptr); */
3205                                 codegen_addreference((basicblock *) tptr[0], mcodeptr);
3206                                 }
3207
3208                         M_BR(0);
3209                         /* codegen_addreference(BlockPtrOfPC(l), mcodeptr); */
3210
3211                         tptr = (void **) iptr->target;
3212                         codegen_addreference((basicblock *) tptr[0], mcodeptr);
3213
3214                         ALIGNCODENOP;
3215                         break;
3216                         }
3217
3218
3219                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
3220                                         /* op1 = return type, val.a = function pointer*/
3221                         s3 = 3;
3222                         goto gen_method;
3223
3224                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
3225                                         /* op1 = return type, val.a = function pointer*/
3226                         s3 = 2;
3227                         goto gen_method;
3228
3229                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
3230                                         /* op1 = return type, val.a = function pointer*/
3231                         s3 = 1;
3232                         goto gen_method;
3233
3234                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3235                                         /* op1 = arg count, val.a = method pointer    */
3236
3237                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3238                                         /* op1 = arg count, val.a = method pointer    */
3239
3240                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3241                                         /* op1 = arg count, val.a = method pointer    */
3242
3243                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
3244                                         /* op1 = arg count, val.a = method pointer    */
3245
3246                         s3 = iptr->op1;
3247
3248 gen_method: {
3249                         methodinfo   *m;
3250                         classinfo    *ci;
3251
3252                         MCODECHECK((s3 << 1) + 64);
3253
3254                         /* copy arguments to registers or stack location                  */
3255
3256                         for (; --s3 >= 0; src = src->prev) {
3257                                 if (src->varkind == ARGVAR)
3258                                         continue;
3259                                 if (IS_INT_LNG_TYPE(src->type)) {
3260                                         if (s3 < INT_ARG_CNT) {
3261                                                 s1 = argintregs[s3];
3262                                                 var_to_reg_int(d, src, s1);
3263                                                 M_INTMOVE(d, s1);
3264                                                 }
3265                                         else  {
3266                                                 var_to_reg_int(d, src, REG_ITMP1);
3267                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
3268                                                 }
3269                                         }
3270                                 else
3271                                         if (s3 < FLT_ARG_CNT) {
3272                                                 s1 = argfltregs[s3];
3273                                                 var_to_reg_flt(d, src, s1);
3274                                                 M_FLTMOVE(d, s1);
3275                                                 }
3276                                         else {
3277                                                 var_to_reg_flt(d, src, REG_FTMP1);
3278                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
3279                                                 }
3280                                 } /* end of for */
3281
3282                         m = iptr->val.a;
3283                         switch (iptr->opc) {
3284                                 case ICMD_BUILTIN3:
3285                                 case ICMD_BUILTIN2:
3286                                 case ICMD_BUILTIN1:
3287                                         a = dseg_addaddress ((void*) (m));
3288
3289                                         M_ALD(REG_PV, REG_PV, a); /* Pointer to built-in-function */
3290                                         d = iptr->op1;
3291                                         goto makeactualcall;
3292
3293                                 case ICMD_INVOKESTATIC:
3294                                 case ICMD_INVOKESPECIAL:
3295                                         a = dseg_addaddress (m->stubroutine);
3296
3297                                         M_ALD(REG_PV, REG_PV, a );       /* method pointer in r27 */
3298
3299                                         d = m->returntype;
3300                                         goto makeactualcall;
3301
3302                                 case ICMD_INVOKEVIRTUAL:
3303
3304                                         gen_nullptr_check(argintregs[0]);
3305                                         M_ALD(REG_METHODPTR, argintregs[0],
3306                                                                  OFFSET(java_objectheader, vftbl));
3307                                         M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl, table[0]) +
3308                                                                 sizeof(methodptr) * m->vftblindex);
3309
3310                                         d = m->returntype;
3311                                         goto makeactualcall;
3312
3313                                 case ICMD_INVOKEINTERFACE:
3314                                         ci = m->class;
3315
3316                                         gen_nullptr_check(argintregs[0]);
3317                                         M_ALD(REG_METHODPTR, argintregs[0],
3318                                                                  OFFSET(java_objectheader, vftbl));
3319                                         M_ALD(REG_METHODPTR, REG_METHODPTR,
3320                                               OFFSET(vftbl, interfacetable[0]) -
3321                                               sizeof(methodptr*) * ci->index);
3322                                         M_ALD(REG_PV, REG_METHODPTR,
3323                                                             sizeof(methodptr) * (m - ci->methods));
3324
3325                                         d = m->returntype;
3326                                         goto makeactualcall;
3327
3328                                 default:
3329                                         d = 0;
3330                                         sprintf (logtext, "Unkown ICMD-Command: %d", iptr->opc);
3331                                         error ();
3332                                 }
3333
3334 makeactualcall:
3335
3336                         M_JSR (REG_RA, REG_PV);
3337
3338                         /* recompute pv */
3339
3340                         s1 = (int)((u1*) mcodeptr - mcodebase);
3341                         if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
3342                         else {
3343                                 s4 ml=-s1, mh=0;
3344                                 while (ml<-32768) { ml+=65536; mh--; }
3345                                 M_LDA (REG_PV, REG_RA, ml );
3346                                 M_LDAH (REG_PV, REG_PV, mh );
3347                                 }
3348
3349                         /* d contains return type */
3350
3351                         if (d != TYPE_VOID) {
3352                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3353                                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3354                                         M_INTMOVE(REG_RESULT, s1);
3355                                         store_reg_to_var_int(iptr->dst, s1);
3356                                         }
3357                                 else {
3358                                         s1 = reg_of_var(iptr->dst, REG_FRESULT);
3359                                         M_FLTMOVE(REG_FRESULT, s1);
3360                                         store_reg_to_var_flt(iptr->dst, s1);
3361                                         }
3362                                 }
3363                         }
3364                         break;
3365
3366
3367                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3368
3369                                       /* op1:   0 == array, 1 == class                */
3370                                       /* val.a: (classinfo*) superclass               */
3371
3372 /*          superclass is an interface:
3373  *
3374  *          return (sub != NULL) &&
3375  *                 (sub->vftbl->interfacetablelength > super->index) &&
3376  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
3377  *
3378  *          superclass is a class:
3379  *
3380  *          return ((sub != NULL) && (0
3381  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3382  *                  super->vftbl->diffvall));
3383  */
3384
3385                         {
3386                         classinfo *super = (classinfo*) iptr->val.a;
3387
3388                         var_to_reg_int(s1, src, REG_ITMP1);
3389                         d = reg_of_var(iptr->dst, REG_ITMP3);
3390                         if (s1 == d) {
3391                                 M_MOV(s1, REG_ITMP1);
3392                                 s1 = REG_ITMP1;
3393                                 }
3394                         M_CLR(d);
3395                         if (iptr->op1) {                               /* class/interface */
3396                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3397                                         M_BEQZ(s1, 6);
3398                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3399                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3400                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3401                                         M_BLEZ(REG_ITMP2, 2);
3402                                         M_ALD(REG_ITMP1, REG_ITMP1,
3403                                               OFFSET(vftbl, interfacetable[0]) -
3404                                               super->index * sizeof(methodptr*));
3405                                         M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3406                                         }
3407                                 else {                                     /* class           */
3408 /*
3409                                         s2 = super->vftbl->diffval;
3410                                         M_BEQZ(s1, 4 + (s2 > 255));
3411                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3412                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3413                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3414                                         if (s2 <= 255)
3415                                                 M_CMPULE_IMM(REG_ITMP1, s2, d);
3416                                         else {
3417                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3418                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3419                                                 }
3420 */
3421                                         M_BEQZ(s1, 7);
3422                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3423                                         a = dseg_addaddress ((void*) super->vftbl);
3424                                         M_ALD(REG_ITMP2, REG_PV, a);
3425                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3426                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3427                                         M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3428                                         M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3429                                         M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3430                                         }
3431                                 }
3432                         else
3433                                 panic ("internal error: no inlined array instanceof");
3434                         }
3435                         store_reg_to_var_int(iptr->dst, d);
3436                         break;
3437
3438                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3439
3440                                       /* op1:   0 == array, 1 == class                */
3441                                       /* val.a: (classinfo*) superclass               */
3442
3443 /*          superclass is an interface:
3444  *
3445  *          OK if ((sub == NULL) ||
3446  *                 (sub->vftbl->interfacetablelength > super->index) &&
3447  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3448  *
3449  *          superclass is a class:
3450  *
3451  *          OK if ((sub == NULL) || (0
3452  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3453  *                 super->vftbl->diffvall));
3454  */
3455
3456                         {
3457                         classinfo *super = (classinfo*) iptr->val.a;
3458
3459                         d = reg_of_var(iptr->dst, REG_ITMP3);
3460                         var_to_reg_int(s1, src, d);
3461                         if (iptr->op1) {                               /* class/interface */
3462                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3463                                         M_BEQZ(s1, 6);
3464                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3465                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3466                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3467                                         M_BLEZ(REG_ITMP2, 0);
3468                                         codegen_addxcastrefs(mcodeptr);
3469                                         M_ALD(REG_ITMP2, REG_ITMP1,
3470                                               OFFSET(vftbl, interfacetable[0]) -
3471                                               super->index * sizeof(methodptr*));
3472                                         M_BEQZ(REG_ITMP2, 0);
3473                                         codegen_addxcastrefs(mcodeptr);
3474                                         }
3475                                 else {                                     /* class           */
3476 /*
3477                                         s2 = super->vftbl->diffval;
3478                                         M_BEQZ(s1, 4 + (s2 != 0) + (s2 > 255));
3479                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3480                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3481                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3482                                         if (s2 == 0) {
3483                                                 M_BNEZ(REG_ITMP1, 0);
3484                                                 }
3485                                         else if (s2 <= 255) {
3486                                                 M_CMPULE_IMM(REG_ITMP1, s2, REG_ITMP2);
3487                                                 M_BEQZ(REG_ITMP2, 0);
3488                                                 }
3489                                         else {
3490                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3491                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3492                                                 M_BEQZ(REG_ITMP2, 0);
3493                                                 }
3494 */
3495                                         M_BEQZ(s1, 8 + (d == REG_ITMP3));
3496                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3497                                         a = dseg_addaddress ((void*) super->vftbl);
3498                                         M_ALD(REG_ITMP2, REG_PV, a);
3499                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3500                                         if (d != REG_ITMP3) {
3501                                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3502                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3503                                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3504                                                 }
3505                                         else {
3506                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, baseval));
3507                                                 M_ISUB(REG_ITMP1, REG_ITMP2, REG_ITMP1);
3508                                                 M_ALD(REG_ITMP2, REG_PV, a);
3509                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3510                                                 }
3511                                         M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3512                                         M_BEQZ(REG_ITMP2, 0);
3513                                         codegen_addxcastrefs(mcodeptr);
3514                                         }
3515                                 }
3516                         else
3517                                 panic ("internal error: no inlined array checkcast");
3518                         }
3519                         M_INTMOVE(s1, d);
3520                         store_reg_to_var_int(iptr->dst, d);
3521                         break;
3522
3523                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3524
3525                         var_to_reg_int(s1, src, REG_ITMP1);
3526                         M_BLTZ(s1, 0);
3527                         codegen_addxcheckarefs(mcodeptr);
3528                         break;
3529
3530                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3531                                       /* op1 = dimension, val.a = array descriptor    */
3532
3533                         /* check for negative sizes and copy sizes to stack if necessary  */
3534
3535                         MCODECHECK((iptr->op1 << 1) + 64);
3536
3537                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3538                                 var_to_reg_int(s2, src, REG_ITMP1);
3539                                 M_BLTZ(s2, 0);
3540                                 codegen_addxcheckarefs(mcodeptr);
3541
3542                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3543
3544                                 if (src->varkind != ARGVAR) {
3545                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3546                                         }
3547                                 }
3548
3549                         /* a0 = dimension count */
3550
3551                         ICONST(argintregs[0], iptr->op1);
3552
3553                         /* a1 = arraydescriptor */
3554
3555                         a = dseg_addaddress(iptr->val.a);
3556                         M_ALD(argintregs[1], REG_PV, a);
3557
3558                         /* a2 = pointer to dimensions = stack pointer */
3559
3560                         M_INTMOVE(REG_SP, argintregs[2]);
3561
3562                         a = dseg_addaddress((void*) (builtin_nmultianewarray));
3563                         M_ALD(REG_PV, REG_PV, a);
3564                         M_JSR(REG_RA, REG_PV);
3565                         s1 = (int)((u1*) mcodeptr - mcodebase);
3566                         if (s1 <= 32768)
3567                                 M_LDA (REG_PV, REG_RA, -s1);
3568                         else {
3569                                 s4 ml = -s1, mh = 0;
3570                                 while (ml < -32768) {ml += 65536; mh--;}
3571                                 M_LDA(REG_PV, REG_RA, ml);
3572                                 M_LDAH(REG_PV, REG_PV, mh);
3573                             }
3574                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3575                         M_INTMOVE(REG_RESULT, s1);
3576                         store_reg_to_var_int(iptr->dst, s1);
3577                         break;
3578
3579
3580                 default: sprintf (logtext, "Unknown pseudo command: %d", iptr->opc);
3581                          error();
3582
3583
3584
3585         } /* switch */
3586
3587         } /* for instruction */
3588
3589         /* copy values to interface registers */
3590
3591         src = bptr->outstack;
3592         len = bptr->outdepth;
3593         MCODECHECK(64+len);
3594         while (src) {
3595                 len--;
3596                 if ((src->varkind != STACKVAR)) {
3597                         s2 = src->type;
3598                         if (IS_FLT_DBL_TYPE(s2)) {
3599                                 var_to_reg_flt(s1, src, REG_FTMP1);
3600                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3601                                         M_FLTMOVE(s1,interfaces[len][s2].regoff);
3602                                         }
3603                                 else {
3604                                         M_DST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3605                                         }
3606                                 }
3607                         else {
3608                                 var_to_reg_int(s1, src, REG_ITMP1);
3609                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3610                                         M_INTMOVE(s1,interfaces[len][s2].regoff);
3611                                         }
3612                                 else {
3613                                         M_LST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3614                                         }
3615                                 }
3616                         }
3617                 src = src->prev;
3618                 }
3619         } /* if (bptr -> flags >= BBREACHED) */
3620         } /* for basic block */
3621
3622         /* bptr -> mpc = (int)((u1*) mcodeptr - mcodebase); */
3623
3624         {
3625         /* generate bound check stubs */
3626
3627         s4 *xcodeptr = NULL;
3628
3629         for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) {
3630                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3631                         gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3632                                 xboundrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3633                         continue;
3634                         }
3635
3636
3637                 gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3638                                   xboundrefs->branchpos, (u1*) mcodeptr - mcodebase);
3639
3640                 MCODECHECK(8);
3641
3642                 M_LDA(REG_ITMP2_XPC, REG_PV, xboundrefs->branchpos - 4);
3643
3644                 if (xcodeptr != NULL) {
3645                         int disp = (xcodeptr-mcodeptr)-1;
3646                         M_BR(disp);
3647                         }
3648                 else {
3649                         xcodeptr = mcodeptr;
3650
3651                         a = dseg_addaddress(proto_java_lang_ArrayIndexOutOfBoundsException);
3652                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3653
3654                         a = dseg_addaddress(asm_handle_exception);
3655                         M_ALD(REG_ITMP3, REG_PV, a);
3656
3657                         M_JMP(REG_ZERO, REG_ITMP3);
3658                         }
3659                 }
3660
3661         /* generate negative array size check stubs */
3662
3663         xcodeptr = NULL;
3664
3665         for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) {
3666                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3667                         gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3668                                 xcheckarefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3669                         continue;
3670                         }
3671
3672                 gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3673                                   xcheckarefs->branchpos, (u1*) mcodeptr - mcodebase);
3674
3675                 MCODECHECK(8);
3676
3677                 M_LDA(REG_ITMP2_XPC, REG_PV, xcheckarefs->branchpos - 4);
3678
3679                 if (xcodeptr != NULL) {
3680                         int disp = (xcodeptr-mcodeptr)-1;
3681                         M_BR(disp);
3682                         }
3683                 else {
3684                         xcodeptr = mcodeptr;
3685
3686                         a = dseg_addaddress(proto_java_lang_NegativeArraySizeException);
3687                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3688
3689                         a = dseg_addaddress(asm_handle_exception);
3690                         M_ALD(REG_ITMP3, REG_PV, a);
3691
3692                         M_JMP(REG_ZERO, REG_ITMP3);
3693                         }
3694                 }
3695
3696         /* generate cast check stubs */
3697
3698         xcodeptr = NULL;
3699
3700         for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) {
3701                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3702                         gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3703                                 xcastrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3704                         continue;
3705                         }
3706
3707                 gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3708                                   xcastrefs->branchpos, (u1*) mcodeptr - mcodebase);
3709
3710                 MCODECHECK(8);
3711
3712                 M_LDA(REG_ITMP2_XPC, REG_PV, xcastrefs->branchpos - 4);
3713
3714                 if (xcodeptr != NULL) {
3715                         int disp = (xcodeptr-mcodeptr)-1;
3716                         M_BR(disp);
3717                         }
3718                 else {
3719                         xcodeptr = mcodeptr;
3720
3721                         a = dseg_addaddress(proto_java_lang_ClassCastException);
3722                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3723
3724                         a = dseg_addaddress(asm_handle_exception);
3725                         M_ALD(REG_ITMP3, REG_PV, a);
3726
3727                         M_JMP(REG_ZERO, REG_ITMP3);
3728                         }
3729                 }
3730
3731
3732 #ifdef SOFTNULLPTRCHECK
3733
3734         /* generate null pointer check stubs */
3735
3736         xcodeptr = NULL;
3737
3738         for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) {
3739                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3740                         gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3741                                 xnullrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3742                         continue;
3743                         }
3744
3745                 gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3746                                   xnullrefs->branchpos, (u1*) mcodeptr - mcodebase);
3747
3748                 MCODECHECK(8);
3749
3750                 M_LDA(REG_ITMP2_XPC, REG_PV, xnullrefs->branchpos - 4);
3751
3752                 if (xcodeptr != NULL) {
3753                         int disp = (xcodeptr-mcodeptr)-1;
3754                         M_BR(disp);
3755                         }
3756                 else {
3757                         xcodeptr = mcodeptr;
3758
3759                         a = dseg_addaddress(proto_java_lang_NullPointerException);
3760                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3761
3762                         a = dseg_addaddress(asm_handle_exception);
3763                         M_ALD(REG_ITMP3, REG_PV, a);
3764
3765                         M_JMP(REG_ZERO, REG_ITMP3);
3766                         }
3767                 }
3768
3769 #endif
3770         }
3771
3772         codegen_finish((int)((u1*) mcodeptr - mcodebase));
3773 }
3774
3775
3776 /* redefinition of code generation macros (compiling into array) **************/
3777
3778 /*
3779 These macros are newly defined to allow code generation into an array.
3780 This is necessary, because the original M_.. macros generate code by
3781 calling 'codegen_adds4' that uses an additional data structure to
3782 receive the code.
3783
3784 For a faster (but less flexible) version to generate code, these
3785 macros directly use the (s4* p) - pointer to put the code directly
3786 in a locally defined array.
3787 This makes sense only for the stub-generation-routines below.
3788 */
3789
3790 #undef M_OP3
3791 #define M_OP3(op,fu,a,b,c,const) \
3792         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((b)<<(16-3*(const)))| \
3793         ((const)<<12)|((fu)<<5)|((c)) )
3794 #undef M_FOP3
3795 #define M_FOP3(op,fu,a,b,c) \
3796         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((b)<<16)|((fu)<<5)|(c) )
3797 #undef M_BRA
3798 #define M_BRA(op,a,disp) \
3799         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((disp)&0x1fffff) )
3800 #undef M_MEM
3801 #define M_MEM(op,a,b,disp) \
3802         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((b)<<16)|((disp)&0xffff) )
3803
3804
3805 /* function createcompilerstub *************************************************
3806
3807         creates a stub routine which calls the compiler
3808
3809 *******************************************************************************/
3810
3811 #define COMPSTUBSIZE 3
3812
3813 u1 *createcompilerstub (methodinfo *m)
3814 {
3815         u8 *s = CNEW (u8, COMPSTUBSIZE);    /* memory to hold the stub            */
3816         s4 *p = (s4*) s;                    /* code generation pointer            */
3817
3818                                             /* code for the stub                  */
3819         M_ALD (REG_PV, REG_PV, 16);         /* load pointer to the compiler       */
3820         M_JMP (0, REG_PV);                  /* jump to the compiler, return address
3821                                                in reg 0 is used as method pointer */
3822         s[1] = (u8) m;                      /* literals to be adressed            */
3823         s[2] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
3824
3825 #ifdef STATISTICS
3826         count_cstub_len += COMPSTUBSIZE * 8;
3827 #endif
3828
3829         return (u1*) s;
3830 }
3831
3832
3833 /* function removecompilerstub *************************************************
3834
3835      deletes a compilerstub from memory  (simply by freeing it)
3836
3837 *******************************************************************************/
3838
3839 void removecompilerstub (u1 *stub)
3840 {
3841         CFREE (stub, COMPSTUBSIZE * 8);
3842 }
3843
3844 /* function: createnativestub **************************************************
3845
3846         creates a stub routine which calls a native method
3847
3848 *******************************************************************************/
3849
3850 #define NATIVESTUBSIZE 34
3851 #define NATIVESTUBOFFSET 8
3852
3853 int runverbosenat = 0;
3854
3855 u1 *createnativestub (functionptr f, methodinfo *m)
3856 {
3857         int disp;
3858         u8 *s = CNEW (u8, NATIVESTUBSIZE);  /* memory to hold the stub            */
3859         u8 *cs = s + NATIVESTUBOFFSET;
3860         s4 *p = (s4*) (cs);                 /* code generation pointer            */
3861
3862         *(cs-1) = (u8) f;                   /* address of native method           */
3863         *(cs-2) = (u8) (&exceptionptr);     /* address of exceptionptr            */
3864         *(cs-3) = (u8) asm_handle_nat_exception; /* addr of asm exception handler */
3865         *(cs-4) = (u8) (&env);              /* addr of jni_environement           */
3866         *(cs-5) = (u8) asm_builtin_trace;
3867         *(cs-6) = (u8) m;
3868         *(cs-7) = (u8) asm_builtin_exittrace;
3869         *(cs-8) = (u8) builtin_trace_exception;
3870
3871 #if 0
3872         printf("stub: ");
3873         utf_display(m->class->name);
3874         printf(".");
3875         utf_display(m->name);
3876         printf(" 0x%p\n", cs);
3877 #endif
3878
3879         M_LDA  (REG_SP, REG_SP, -8);        /* build up stackframe                */
3880         M_AST  (REG_RA, REG_SP, 0);         /* store return address               */
3881
3882 #if 1
3883         if (runverbosenat) {
3884                 M_ALD(REG_ITMP1, REG_PV, -6*8);
3885                 M_ALD(REG_PV, REG_PV, -5*8);
3886
3887                 M_JSR(REG_RA, REG_PV);
3888                 disp = -(int) (p - (s4*) cs)*4;
3889                 M_LDA(REG_PV, REG_RA, disp);
3890         }
3891 #endif
3892
3893         reg_init(m);
3894
3895         M_MOV  (argintregs[4],argintregs[5]);
3896         M_FMOV (argfltregs[4],argfltregs[5]);
3897
3898         M_MOV  (argintregs[3],argintregs[4]);
3899         M_FMOV (argfltregs[3],argfltregs[4]);
3900
3901         M_MOV  (argintregs[2],argintregs[3]);
3902         M_FMOV (argfltregs[2],argfltregs[3]);
3903
3904         M_MOV  (argintregs[1],argintregs[2]);
3905         M_FMOV (argfltregs[1],argfltregs[2]);
3906
3907         M_MOV  (argintregs[0],argintregs[1]);
3908         M_FMOV (argfltregs[0],argfltregs[1]);
3909
3910         M_ALD  (argintregs[0], REG_PV, -4*8);/* load adress of jni_environement   */
3911
3912         M_ALD  (REG_PV, REG_PV, -1*8);      /* load adress of native method       */
3913         M_JSR  (REG_RA, REG_PV);            /* call native method                 */
3914
3915         disp = -(int) (p - (s4*) cs)*4;
3916         M_LDA  (REG_PV, REG_RA, disp);      /* recompute pv from ra               */
3917         M_ALD  (REG_ITMP3, REG_PV, -2*8);   /* get address of exceptionptr        */
3918
3919         M_ALD  (REG_ITMP1, REG_ITMP3, 0);   /* load exception into reg. itmp1     */
3920         M_BNEZ (REG_ITMP1,
3921                         3 + (runverbosenat ? 6 : 0));  /* if no exception then return        */
3922
3923 #if 1
3924         if (runverbosenat) {
3925                 M_ALD(argintregs[0], REG_PV, -6*8);
3926                 M_MOV(REG_RESULT, argintregs[1]);
3927                 M_FMOV(REG_FRESULT, argfltregs[2]);
3928                 M_FMOV(REG_FRESULT, argfltregs[3]);
3929                 M_ALD(REG_PV, REG_PV, -7*8);
3930                 M_JSR(REG_RA, REG_PV);
3931         }
3932 #endif
3933
3934         M_ALD  (REG_RA, REG_SP, 0);         /* load return address                */
3935         M_LDA  (REG_SP, REG_SP, 8);         /* remove stackframe                  */
3936
3937         M_RET  (REG_ZERO, REG_RA);          /* return to caller                   */
3938
3939         M_AST  (REG_ZERO, REG_ITMP3, 0);    /* store NULL into exceptionptr       */
3940
3941 #if 1
3942         if (runverbosenat) {
3943                 M_LDA(REG_SP, REG_SP, -8);
3944                 M_AST(REG_ITMP1, REG_SP, 0);
3945                 M_MOV(REG_ITMP1, argintregs[0]);
3946                 M_ALD(argintregs[1], REG_PV, -6*8);
3947                 M_ALD(argintregs[2], REG_SP, 0);
3948                 M_CLR(argintregs[3]);
3949                 M_ALD(REG_PV, REG_PV, -8*8);
3950                 M_JSR(REG_RA, REG_PV);
3951                 disp = -(int) (p - (s4*) cs)*4;
3952                 M_LDA  (REG_PV, REG_RA, disp);
3953                 M_ALD(REG_ITMP1, REG_SP, 0);
3954                 M_LDA(REG_SP, REG_SP, 8);
3955         }
3956 #endif
3957
3958         M_ALD  (REG_RA, REG_SP, 0);         /* load return address                */
3959         M_LDA  (REG_SP, REG_SP, 8);         /* remove stackframe                  */
3960
3961         M_LDA  (REG_ITMP2, REG_RA, -4);     /* move fault address into reg. itmp2 */
3962
3963         M_ALD  (REG_ITMP3, REG_PV, -3*8);   /* load asm exception handler address */
3964         M_JMP  (REG_ZERO, REG_ITMP3);       /* jump to asm exception handler      */
3965
3966 #if 0
3967         {
3968                 static int stubprinted;
3969                 if (!stubprinted)
3970                         printf("stubsize: %d/2\n", (int) (p - (s4*) s));
3971                 stubprinted = 1;
3972         }
3973 #endif
3974
3975 #ifdef STATISTICS
3976         count_nstub_len += NATIVESTUBSIZE * 8;
3977 #endif
3978
3979         return (u1*) (s + NATIVESTUBOFFSET);
3980 }
3981
3982 /* function: removenativestub **************************************************
3983
3984     removes a previously created native-stub from memory
3985
3986 *******************************************************************************/
3987
3988 void removenativestub (u1 *stub)
3989 {
3990         CFREE ((u8*) stub - NATIVESTUBOFFSET, NATIVESTUBSIZE * 8);
3991 }
3992
3993
3994 /*
3995  * These are local overrides for various environment variables in Emacs.
3996  * Please do not remove this and leave it at the end of the file, where
3997  * Emacs will automagically detect them.
3998  * ---------------------------------------------------------------------
3999  * Local variables:
4000  * mode: c
4001  * indent-tabs-mode: t
4002  * c-basic-offset: 4
4003  * tab-width: 4
4004  * End:
4005  */