jit/alpha/codegen.c

   1 /* jit/alpha/codegen.c - machine code generator for alpha
   2
   3    Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
   4    Institut f. Computersprachen, TU Wien
   5    R. Grafl, A. Krall, C. Kruegel, C. Oates, R. Obermaisser, M. Probst,
   6    S. Ring, E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich,
   7    J. Wenninger
   8
   9    This file is part of CACAO.
  10
  11    This program is free software; you can redistribute it and/or
  12    modify it under the terms of the GNU General Public License as
  13    published by the Free Software Foundation; either version 2, or (at
  14    your option) any later version.
  15
  16    This program is distributed in the hope that it will be useful, but
  17    WITHOUT ANY WARRANTY; without even the implied warranty of
  18    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19    General Public License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software
  23    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  24    02111-1307, USA.
  25
  26    Contact: cacao@complang.tuwien.ac.at
  27
  28    Authors: Andreas Krall
  29             Reinhard Grafl
  30
  31    $Id: codegen.c 1595 2004-11-25 15:49:48Z twisti $
  32
  33 */
  34
  35
  36 #include "global.h"
  37 #include <stdio.h>
  38 #include <signal.h>
  39 #include "types.h"
  40 #include "main.h"
  41 #include "jit/alpha/codegen.h"
  42 #include "jit/jit.h"
  43 #include "jit/parse.h"
  44 #include "jit/reg.h"
  45 #include "jit/lsra.h"
  46 #include "builtin.h"
  47 #include "asmpart.h"
  48 #include "jni.h"
  49 #include "loader.h"
  50 #include "tables.h"
  51 #include "native.h"
  52 #include "main.h"
  53
  54
  55 /* *****************************************************************************
  56
  57 Datatypes and Register Allocations:
  58 -----------------------------------
  59
  60 On 64-bit-machines (like the Alpha) all operands are stored in the
  61 registers in a 64-bit form, even when the correspondig JavaVM  operands
  62 only need 32 bits. This is done by a canonical representation:
  63
  64 32-bit integers are allways stored as sign-extended 64-bit values (this
  65 approach is directly supported by the Alpha architecture and is very easy
  66 to implement).
  67
  68 32-bit-floats are stored in a 64-bit doubleprecision register by simply
  69 expanding the exponent and mantissa with zeroes. (also supported by the
  70 architecture)
  71
  72
  73 Stackframes:
  74
  75 The calling conventions and the layout of the stack is  explained in detail
  76 in the documention file: calling.doc
  77
  78 *******************************************************************************/
  79
  80
  81 /* register descripton - array ************************************************/
  82
  83 /* #define REG_RES   0         reserved register for OS or code generator     */
  84 /* #define REG_RET   1         return value register                          */
  85 /* #define REG_EXC   2         exception value register (only old jit)        */
  86 /* #define REG_SAV   3         (callee) saved register                        */
  87 /* #define REG_TMP   4         scratch temporary register (caller saved)      */
  88 /* #define REG_ARG   5         argument register (caller saved)               */
  89
  90 /* #define REG_END   -1        last entry in tables */
  91
  92 int nregdescint[] = {
  93         REG_RET, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
  94         REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
  95         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP,
  96         REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES,
  97         REG_END };
  98
  99 /* for use of reserved registers, see comment above */
 100
 101 int nregdescfloat[] = {
 102         REG_RET, REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
 103         REG_SAV, REG_SAV, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
 104         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP,
 105         REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES,
 106         REG_END };
 107
 108 /* for use of reserved registers, see comment above */
 109
 110 /* include independent code generation stuff -- include after register        */
 111 /* descriptions to avoid extern definitions                                   */
 112
 113 #include "jit/codegen.inc"
 114 #include "jit/reg.inc"
 115 #include "jit/lsra.inc"
 116
 117
 118 /* NullPointerException handlers and exception handling initialisation        */
 119
 120 typedef struct sigctx_struct {
 121         long          sc_onstack;           /* sigstack state to restore          */
 122         long          sc_mask;              /* signal mask to restore             */
 123         long          sc_pc;                /* pc at time of signal               */
 124         long          sc_ps;                /* psl to retore                      */
 125         long          sc_regs[32];          /* processor regs 0 to 31             */
 126         long          sc_ownedfp;           /* fp has been used                   */
 127         long          sc_fpregs[32];        /* fp regs 0 to 31                    */
 128         unsigned long sc_fpcr;              /* floating point control register    */
 129         unsigned long sc_fp_control;        /* software fpcr                      */
 130                                             /* rest is unused                     */
 131         unsigned long sc_reserved1, sc_reserved2;
 132         unsigned long sc_ssize;
 133         char          *sc_sbase;
 134         unsigned long sc_traparg_a0;
 135         unsigned long sc_traparg_a1;
 136         unsigned long sc_traparg_a2;
 137         unsigned long sc_fp_trap_pc;
 138         unsigned long sc_fp_trigger_sum;
 139         unsigned long sc_fp_trigger_inst;
 140         unsigned long sc_retcode[2];
 141 } sigctx_struct;
 142
 143
 144 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
 145 void thread_restartcriticalsection(ucontext_t *uc)
 146 {
 147         void *critical;
 148         if ((critical = thread_checkcritical((void*) uc->uc_mcontext.sc_pc)) != NULL)
 149                 uc->uc_mcontext.sc_pc = (u8) critical;
 150 }
 151 #endif
 152
 153 /* NullPointerException signal handler for hardware null pointer check */
 154
 155 void catch_NullPointerException(int sig, int code, sigctx_struct *sigctx)
 156 {
 157         sigset_t nsig;
 158         int      instr;
 159         long     faultaddr;
 160         java_objectheader *xptr;
 161
 162         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 163
 164         instr = *((int*)(sigctx->sc_pc));
 165         faultaddr = sigctx->sc_regs[(instr >> 16) & 0x1f];
 166
 167         if (faultaddr == 0) {
 168                 /* reinstall handler */
 169                 signal(sig, (functionptr) catch_NullPointerException);
 170                 sigemptyset(&nsig);
 171                 sigaddset(&nsig, sig);
 172                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 173
 174                 xptr = new_nullpointerexception();
 175
 176                 sigctx->sc_regs[REG_ITMP1_XPTR] = (u8) xptr;
 177                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 178                 sigctx->sc_pc = (u8) asm_handle_exception;
 179                 return;
 180
 181         } else {
 182                 faultaddr += (long) ((instr << 16) >> 16);
 183                 fprintf(stderr, "faulting address: 0x%016lx\n", faultaddr);
 184                 panic("Stack overflow");
 185         }
 186 }
 187
 188
 189 #ifdef __osf__
 190
 191 void init_exceptions(void)
 192 {
 193
 194 #else /* Linux */
 195
 196 /* Linux on Digital Alpha needs an initialisation of the ieee floating point
 197         control for IEEE compliant arithmetic (option -mieee of GCC). Under
 198         Digital Unix this is done automatically.
 199 */
 200
 201 #include <asm/fpu.h>
 202
 203 extern unsigned long ieee_get_fp_control();
 204 extern void ieee_set_fp_control(unsigned long fp_control);
 205
 206 void init_exceptions(void)
 207 {
 208 /* initialize floating point control */
 209
 210 ieee_set_fp_control(ieee_get_fp_control()
 211                     & ~IEEE_TRAP_ENABLE_INV
 212                     & ~IEEE_TRAP_ENABLE_DZE
 213 /*                  & ~IEEE_TRAP_ENABLE_UNF   we dont want underflow */
 214                     & ~IEEE_TRAP_ENABLE_OVF);
 215 #endif
 216
 217         /* install signal handlers we need to convert to exceptions */
 218
 219         if (!checknull) {
 220 #if defined(SIGSEGV)
 221                 signal(SIGSEGV, (functionptr) catch_NullPointerException);
 222 #endif
 223
 224 #if defined(SIGBUS)
 225                 signal(SIGBUS, (functionptr) catch_NullPointerException);
 226 #endif
 227         }
 228 }
 229
 230
 231 /* function gen_mcode **********************************************************
 232
 233         generates machine code
 234
 235 *******************************************************************************/
 236
 237 void codegen(methodinfo *m, codegendata *cd, registerdata *rd)
 238 {
 239         s4 len, s1, s2, s3, d;
 240         s4 a;
 241         s4 parentargs_base;
 242         s4             *mcodeptr;
 243         stackptr        src;
 244         varinfo        *var;
 245         basicblock     *bptr;
 246         instruction    *iptr;
 247         exceptiontable *ex;
 248
 249         {
 250         s4 i, p, pa, t, l;
 251         s4 savedregs_num;
 252
 253         savedregs_num = (m->isleafmethod) ? 0 : 1;        /* space to save the RA */
 254
 255         /* space to save used callee saved registers */
 256
 257         savedregs_num += (rd->savintregcnt - rd->maxsavintreguse);
 258         savedregs_num += (rd->savfltregcnt - rd->maxsavfltreguse);
 259
 260         parentargs_base = rd->maxmemuse + savedregs_num;
 261
 262 #if defined(USE_THREADS)           /* space to save argument of monitor_enter */
 263
 264         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 265                 parentargs_base++;
 266
 267 #endif
 268
 269         /* create method header */
 270
 271         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
 272         (void) dseg_adds4(cd, parentargs_base * 8);             /* FrameSize      */
 273
 274 #if defined(USE_THREADS)
 275
 276         /* IsSync contains the offset relative to the stack pointer for the
 277            argument of monitor_exit used in the exception handler. Since the
 278            offset could be zero and give a wrong meaning of the flag it is
 279            offset by one.
 280         */
 281
 282         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 283                 (void) dseg_adds4(cd, (rd->maxmemuse + 1) * 8);     /* IsSync         */
 284         else
 285
 286 #endif
 287
 288         (void) dseg_adds4(cd, 0);                               /* IsSync         */
 289
 290         (void) dseg_adds4(cd, m->isleafmethod);                 /* IsLeaf         */
 291         (void) dseg_adds4(cd, rd->savintregcnt - rd->maxsavintreguse);/* IntSave  */
 292         (void) dseg_adds4(cd, rd->savfltregcnt - rd->maxsavfltreguse);/* FltSave  */
 293
 294         dseg_addlinenumbertablesize(cd);
 295
 296         (void) dseg_adds4(cd, cd->exceptiontablelength);        /* ExTableSize    */
 297
 298         /* create exception table */
 299
 300         for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
 301                 dseg_addtarget(cd, ex->start);
 302                 dseg_addtarget(cd, ex->end);
 303                 dseg_addtarget(cd, ex->handler);
 304                 (void) dseg_addaddress(cd, ex->catchtype);
 305         }
 306
 307         /* initialize mcode variables */
 308
 309         mcodeptr = (s4 *) cd->mcodebase;
 310         cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize);
 311         MCODECHECK(128 + m->paramcount);
 312
 313         /* create stack frame (if necessary) */
 314
 315         if (parentargs_base) {
 316                 M_LDA(REG_SP, REG_SP, -parentargs_base * 8);
 317         }
 318
 319         /* save return address and used callee saved registers */
 320
 321         p = parentargs_base;
 322         if (!m->isleafmethod) {
 323                 p--; M_AST(REG_RA, REG_SP, p * 8);
 324         }
 325         for (i = rd->savintregcnt - 1; i >= rd->maxsavintreguse; i--) {
 326                 p--; M_LST(rd->savintregs[i], REG_SP, p * 8);
 327         }
 328         for (i = rd->savfltregcnt - 1; i >= rd->maxsavfltreguse; i--) {
 329                 p--; M_DST(rd->savfltregs[i], REG_SP, p * 8);
 330         }
 331
 332         /* save monitorenter argument */
 333
 334 #if defined(USE_THREADS)
 335         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 336                 if (m->flags & ACC_STATIC) {
 337                         p = dseg_addaddress(cd, m->class);
 338                         M_ALD(REG_ITMP1, REG_PV, p);
 339                         M_AST(REG_ITMP1, REG_SP, rd->maxmemuse * 8);
 340
 341                 } else {
 342                         M_AST(rd->argintregs[0], REG_SP, rd->maxmemuse * 8);
 343                 }
 344         }
 345 #endif
 346
 347         /* copy argument registers to stack and call trace function with pointer
 348            to arguments on stack.
 349         */
 350
 351         if (runverbose) {
 352                 s4 disp;
 353                 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
 354                 M_AST(REG_RA, REG_SP, 1 * 8);
 355
 356                 /* save integer argument registers */
 357                 for (p = 0; /* p < m->paramcount && */ p < INT_ARG_CNT; p++) {
 358                         M_LST(rd->argintregs[p], REG_SP,  (2 + p) * 8);
 359                 }
 360
 361                 /* save and copy float arguments into integer registers */
 362                 for (p = 0; /* p < m->paramcount && */ p < FLT_ARG_CNT; p++) {
 363                         t = m->paramtypes[p];
 364
 365                         if (IS_FLT_DBL_TYPE(t)) {
 366                                 if (IS_2_WORD_TYPE(t)) {
 367                                         M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 368
 369                                 } else {
 370                                         M_FST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 371                                 }
 372
 373                                 M_LLD(rd->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 374
 375                         } else {
 376                                 M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 377                         }
 378                 }
 379
 380                 p = dseg_addaddress(cd, m);
 381                 M_ALD(REG_ITMP1, REG_PV, p);
 382                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
 383                 p = dseg_addaddress(cd, (void *) builtin_trace_args);
 384                 M_ALD(REG_PV, REG_PV, p);
 385                 M_JSR(REG_RA, REG_PV);
 386                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 387                 M_LDA(REG_PV, REG_RA, disp);
 388                 M_ALD(REG_RA, REG_SP, 1 * 8);
 389
 390                 for (p = 0; /* p < mparamcount && */ p < INT_ARG_CNT; p++) {
 391                         M_LLD(rd->argintregs[p], REG_SP,  (2 + p) * 8);
 392                 }
 393
 394                 for (p = 0; /* p < mparamcount && */ p < FLT_ARG_CNT; p++) {
 395                         t = m->paramtypes[p];
 396
 397                         if (IS_FLT_DBL_TYPE(t)) {
 398                                 if (IS_2_WORD_TYPE(t)) {
 399                                         M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 400
 401                                 } else {
 402                                         M_FLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 403                                 }
 404
 405                         } else {
 406                                 M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 407                         }
 408                 }
 409
 410                 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
 411         }
 412
 413         /* take arguments out of register or stack frame */
 414
 415         for (p = 0, l = 0; p < m->paramcount; p++) {
 416                 t = m->paramtypes[p];
 417                 var = &(rd->locals[l][t]);
 418                 l++;
 419                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 420                         l++;
 421                 if (var->type < 0)
 422                         continue;
 423                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 424                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 425                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 426                                         M_INTMOVE(rd->argintregs[p], var->regoff);
 427                                 } else {                             /* reg arg -> spilled    */
 428                                         M_LST(rd->argintregs[p], REG_SP, 8 * var->regoff);
 429                                 }
 430
 431                         } else {                                 /* stack arguments       */
 432                                 pa = p - INT_ARG_CNT;
 433                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 434                                         M_LLD(var->regoff, REG_SP, 8 * (parentargs_base + pa));
 435
 436                                 } else {                             /* stack arg -> spilled  */
 437                                         M_LLD(REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 438                                         M_LST(REG_ITMP1, REG_SP, 8 * var->regoff);
 439                                 }
 440                         }
 441
 442                 } else {                                     /* floating args         */
 443                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 444                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 445                                         M_FLTMOVE(rd->argfltregs[p], var->regoff);
 446
 447                                 } else {                                         /* reg arg -> spilled    */
 448                                         M_DST(rd->argfltregs[p], REG_SP, 8 * var->regoff);
 449                                 }
 450
 451                         } else {                                 /* stack arguments       */
 452                                 pa = p - FLT_ARG_CNT;
 453                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 454                                         M_DLD(var->regoff, REG_SP, 8 * (parentargs_base + pa) );
 455
 456                                 } else {                             /* stack-arg -> spilled  */
 457                                         M_DLD(REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 458                                         M_DST(REG_FTMP1, REG_SP, 8 * var->regoff);
 459                                 }
 460                         }
 461                 }
 462         } /* end for */
 463
 464         /* call monitorenter function */
 465
 466 #if defined(USE_THREADS)
 467         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 468                 s4 disp;
 469                 s8 func_enter = (m->flags & ACC_STATIC) ?
 470                         (s8) builtin_staticmonitorenter : (s8) builtin_monitorenter;
 471                 p = dseg_addaddress(cd, (void*) func_enter);
 472                 M_ALD(REG_PV, REG_PV, p);
 473                 M_ALD(rd->argintregs[0], REG_SP, rd->maxmemuse * 8);
 474                 M_JSR(REG_RA, REG_PV);
 475                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 476                 M_LDA(REG_PV, REG_RA, disp);
 477         }
 478 #endif
 479         }
 480
 481         /* end of header generation */
 482
 483         /* walk through all basic blocks */
 484         for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
 485
 486                 bptr->mpc = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 487
 488                 if (bptr->flags >= BBREACHED) {
 489
 490                 /* branch resolving */
 491
 492                 {
 493                 branchref *brefs;
 494                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 495                         gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
 496                                           brefs->branchpos, bptr->mpc);
 497                         }
 498                 }
 499
 500                 /* copy interface registers to their destination */
 501
 502                 src = bptr->instack;
 503                 len = bptr->indepth;
 504                 MCODECHECK(64+len);
 505                 if (opt_lsra) {
 506                 while (src != NULL) {
 507                         len--;
 508                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 509                                         /*                              d = reg_of_var(m, src, REG_ITMP1); */
 510                                         if (!(src->flags & INMEMORY))
 511                                                 d= src->regoff;
 512                                         else
 513                                                 d=REG_ITMP1;
 514                                         M_INTMOVE(REG_ITMP1, d);
 515                                         store_reg_to_var_int(src, d);
 516                                 }
 517                                 src = src->prev;
 518                         }
 519                 } else {
 520                         while (src != NULL) {
 521                                 len--;
 522                                 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 523                                 d = reg_of_var(rd, src, REG_ITMP1);
 524                                 M_INTMOVE(REG_ITMP1, d);
 525                                 store_reg_to_var_int(src, d);
 526                                 }
 527                         else {
 528                                 d = reg_of_var(rd, src, REG_IFTMP);
 529                                 if ((src->varkind != STACKVAR)) {
 530                                         s2 = src->type;
 531                                         if (IS_FLT_DBL_TYPE(s2)) {
 532                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 533                                                         s1 = rd->interfaces[len][s2].regoff;
 534                                                         M_FLTMOVE(s1,d);
 535                                                         }
 536                                                 else {
 537                                                         M_DLD(d, REG_SP, 8 * rd->interfaces[len][s2].regoff);
 538                                                         }
 539                                                 store_reg_to_var_flt(src, d);
 540                                                 }
 541                                         else {
 542                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 543                                                         s1 = rd->interfaces[len][s2].regoff;
 544                                                         M_INTMOVE(s1,d);
 545                                                         }
 546                                                 else {
 547                                                         M_LLD(d, REG_SP, 8 * rd->interfaces[len][s2].regoff);
 548                                                         }
 549                                                 store_reg_to_var_int(src, d);
 550                                                 }
 551                                         }
 552                                 }
 553                         src = src->prev;
 554                         }
 555                 }
 556
 557                 /* walk through all instructions */
 558
 559                 src = bptr->instack;
 560                 len = bptr->icount;
 561                 for (iptr = bptr->iinstr;
 562                     len > 0;
 563                     src = iptr->dst, len--, iptr++) {
 564
 565         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 566         switch (iptr->opc) {
 567
 568                 case ICMD_NOP:        /* ...  ==> ...                                 */
 569                         break;
 570
 571                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 572
 573                         var_to_reg_int(s1, src, REG_ITMP1);
 574                         M_BEQZ(s1, 0);
 575                         codegen_addxnullrefs(cd, mcodeptr);
 576                         break;
 577
 578                 /* constant operations ************************************************/
 579
 580                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 581                                       /* op1 = 0, val.i = constant                    */
 582
 583                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 584                         ICONST(d, iptr->val.i);
 585                         store_reg_to_var_int(iptr->dst, d);
 586                         break;
 587
 588                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 589                                       /* op1 = 0, val.l = constant                    */
 590
 591                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 592                         LCONST(d, iptr->val.l);
 593                         store_reg_to_var_int(iptr->dst, d);
 594                         break;
 595
 596                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 597                                       /* op1 = 0, val.f = constant                    */
 598
 599                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 600                         a = dseg_addfloat(cd, iptr->val.f);
 601                         M_FLD(d, REG_PV, a);
 602                         store_reg_to_var_flt(iptr->dst, d);
 603                         break;
 604
 605                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 606                                       /* op1 = 0, val.d = constant                    */
 607
 608                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 609                         a = dseg_adddouble(cd, iptr->val.d);
 610                         M_DLD(d, REG_PV, a);
 611                         store_reg_to_var_flt(iptr->dst, d);
 612                         break;
 613
 614                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 615                                       /* op1 = 0, val.a = constant                    */
 616
 617                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 618                         if (iptr->val.a) {
 619                                 a = dseg_addaddress(cd, iptr->val.a);
 620                                 M_ALD(d, REG_PV, a);
 621                         } else {
 622                                 M_INTMOVE(REG_ZERO, d);
 623                         }
 624                         store_reg_to_var_int(iptr->dst, d);
 625                         break;
 626
 627
 628                 /* load/store operations **********************************************/
 629
 630                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 631                 case ICMD_LLOAD:      /* op1 = local variable                         */
 632                 case ICMD_ALOAD:
 633
 634                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 635                         if ((iptr->dst->varkind == LOCALVAR) &&
 636                             (iptr->dst->varnum == iptr->op1))
 637                                 break;
 638                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 639                         if (var->flags & INMEMORY)
 640                                 M_LLD(d, REG_SP, 8 * var->regoff);
 641                         else
 642                                 {M_INTMOVE(var->regoff,d);}
 643                         store_reg_to_var_int(iptr->dst, d);
 644                         break;
 645
 646                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 647                 case ICMD_DLOAD:      /* op1 = local variable                         */
 648
 649                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 650                         if ((iptr->dst->varkind == LOCALVAR) &&
 651                             (iptr->dst->varnum == iptr->op1))
 652                                 break;
 653                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 654                         if (var->flags & INMEMORY)
 655                                 M_DLD(d, REG_SP, 8 * var->regoff);
 656                         else
 657                                 {M_FLTMOVE(var->regoff,d);}
 658                         store_reg_to_var_flt(iptr->dst, d);
 659                         break;
 660
 661
 662                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 663                 case ICMD_LSTORE:     /* op1 = local variable                         */
 664                 case ICMD_ASTORE:
 665
 666                         if ((src->varkind == LOCALVAR) &&
 667                             (src->varnum == iptr->op1))
 668                                 break;
 669                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 670                         if (var->flags & INMEMORY) {
 671                                 var_to_reg_int(s1, src, REG_ITMP1);
 672                                 M_LST(s1, REG_SP, 8 * var->regoff);
 673                                 }
 674                         else {
 675                                 var_to_reg_int(s1, src, var->regoff);
 676                                 M_INTMOVE(s1, var->regoff);
 677                                 }
 678                         break;
 679
 680                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 681                 case ICMD_DSTORE:     /* op1 = local variable                         */
 682
 683                         if ((src->varkind == LOCALVAR) &&
 684                             (src->varnum == iptr->op1))
 685                                 break;
 686                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 687                         if (var->flags & INMEMORY) {
 688                                 var_to_reg_flt(s1, src, REG_FTMP1);
 689                                 M_DST(s1, REG_SP, 8 * var->regoff);
 690                                 }
 691                         else {
 692                                 var_to_reg_flt(s1, src, var->regoff);
 693                                 M_FLTMOVE(s1, var->regoff);
 694                                 }
 695                         break;
 696
 697
 698                 /* pop/dup/swap operations ********************************************/
 699
 700                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 701
 702                 case ICMD_POP:        /* ..., value  ==> ...                          */
 703                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 704                         break;
 705
 706                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 707                         M_COPY(src, iptr->dst);
 708                         break;
 709
 710                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 711
 712                         M_COPY(src,       iptr->dst);
 713                         M_COPY(src->prev, iptr->dst->prev);
 714                         M_COPY(iptr->dst, iptr->dst->prev->prev);
 715                         break;
 716
 717                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 718
 719                         M_COPY(src,             iptr->dst);
 720                         M_COPY(src->prev,       iptr->dst->prev);
 721                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 722                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 723                         break;
 724
 725                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 726
 727                         M_COPY(src,       iptr->dst);
 728                         M_COPY(src->prev, iptr->dst->prev);
 729                         break;
 730
 731                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 732
 733                         M_COPY(src,             iptr->dst);
 734                         M_COPY(src->prev,       iptr->dst->prev);
 735                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 736                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 737                         M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
 738                         break;
 739
 740                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 741
 742                         M_COPY(src,                   iptr->dst);
 743                         M_COPY(src->prev,             iptr->dst->prev);
 744                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 745                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 746                         M_COPY(iptr->dst,             iptr->dst->prev->prev->prev->prev);
 747                         M_COPY(iptr->dst->prev,       iptr->dst->prev->prev->prev->prev->prev);
 748                         break;
 749
 750                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 751
 752                         M_COPY(src,       iptr->dst->prev);
 753                         M_COPY(src->prev, iptr->dst);
 754                         break;
 755
 756
 757                 /* integer operations *************************************************/
 758
 759                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 760
 761                         var_to_reg_int(s1, src, REG_ITMP1);
 762                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 763                         M_ISUB(REG_ZERO, s1, d);
 764                         store_reg_to_var_int(iptr->dst, d);
 765                         break;
 766
 767                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 768
 769                         var_to_reg_int(s1, src, REG_ITMP1);
 770                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 771                         M_LSUB(REG_ZERO, s1, d);
 772                         store_reg_to_var_int(iptr->dst, d);
 773                         break;
 774
 775                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 776
 777                         var_to_reg_int(s1, src, REG_ITMP1);
 778                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 779                         M_INTMOVE(s1, d);
 780                         store_reg_to_var_int(iptr->dst, d);
 781                         break;
 782
 783                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 784
 785                         var_to_reg_int(s1, src, REG_ITMP1);
 786                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 787                         M_IADD(s1, REG_ZERO, d );
 788                         store_reg_to_var_int(iptr->dst, d);
 789                         break;
 790
 791                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 792
 793                         var_to_reg_int(s1, src, REG_ITMP1);
 794                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 795                         if (has_ext_instr_set) {
 796                                 M_BSEXT(s1, d);
 797                                 }
 798                         else {
 799                                 M_SLL_IMM(s1, 56, d);
 800                                 M_SRA_IMM( d, 56, d);
 801                                 }
 802                         store_reg_to_var_int(iptr->dst, d);
 803                         break;
 804
 805                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 806
 807                         var_to_reg_int(s1, src, REG_ITMP1);
 808                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 809             M_CZEXT(s1, d);
 810                         store_reg_to_var_int(iptr->dst, d);
 811                         break;
 812
 813                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 814
 815                         var_to_reg_int(s1, src, REG_ITMP1);
 816                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 817                         if (has_ext_instr_set) {
 818                                 M_SSEXT(s1, d);
 819                                 }
 820                         else {
 821                                 M_SLL_IMM(s1, 48, d);
 822                                 M_SRA_IMM( d, 48, d);
 823                                 }
 824                         store_reg_to_var_int(iptr->dst, d);
 825                         break;
 826
 827
 828                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 829
 830                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 831                         var_to_reg_int(s2, src, REG_ITMP2);
 832                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 833                         M_IADD(s1, s2, d);
 834                         store_reg_to_var_int(iptr->dst, d);
 835                         break;
 836
 837                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 838                                       /* val.i = constant                             */
 839
 840                         var_to_reg_int(s1, src, REG_ITMP1);
 841                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 842                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 843                                 M_IADD_IMM(s1, iptr->val.i, d);
 844                                 }
 845                         else {
 846                                 ICONST(REG_ITMP2, iptr->val.i);
 847                                 M_IADD(s1, REG_ITMP2, d);
 848                                 }
 849                         store_reg_to_var_int(iptr->dst, d);
 850                         break;
 851
 852                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 853
 854                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 855                         var_to_reg_int(s2, src, REG_ITMP2);
 856                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 857                         M_LADD(s1, s2, d);
 858                         store_reg_to_var_int(iptr->dst, d);
 859                         break;
 860
 861                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 862                                       /* val.l = constant                             */
 863
 864                         var_to_reg_int(s1, src, REG_ITMP1);
 865                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 866                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 867                                 M_LADD_IMM(s1, iptr->val.l, d);
 868                                 }
 869                         else {
 870                                 LCONST(REG_ITMP2, iptr->val.l);
 871                                 M_LADD(s1, REG_ITMP2, d);
 872                                 }
 873                         store_reg_to_var_int(iptr->dst, d);
 874                         break;
 875
 876                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 877
 878                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 879                         var_to_reg_int(s2, src, REG_ITMP2);
 880                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 881                         M_ISUB(s1, s2, d);
 882                         store_reg_to_var_int(iptr->dst, d);
 883                         break;
 884
 885                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 886                                       /* val.i = constant                             */
 887
 888                         var_to_reg_int(s1, src, REG_ITMP1);
 889                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 890                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 891                                 M_ISUB_IMM(s1, iptr->val.i, d);
 892                                 }
 893                         else {
 894                                 ICONST(REG_ITMP2, iptr->val.i);
 895                                 M_ISUB(s1, REG_ITMP2, d);
 896                                 }
 897                         store_reg_to_var_int(iptr->dst, d);
 898                         break;
 899
 900                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 901
 902                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 903                         var_to_reg_int(s2, src, REG_ITMP2);
 904                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 905                         M_LSUB(s1, s2, d);
 906                         store_reg_to_var_int(iptr->dst, d);
 907                         break;
 908
 909                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 910                                       /* val.l = constant                             */
 911
 912                         var_to_reg_int(s1, src, REG_ITMP1);
 913                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 914                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 915                                 M_LSUB_IMM(s1, iptr->val.l, d);
 916                                 }
 917                         else {
 918                                 LCONST(REG_ITMP2, iptr->val.l);
 919                                 M_LSUB(s1, REG_ITMP2, d);
 920                                 }
 921                         store_reg_to_var_int(iptr->dst, d);
 922                         break;
 923
 924                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 925
 926                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 927                         var_to_reg_int(s2, src, REG_ITMP2);
 928                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 929                         M_IMUL(s1, s2, d);
 930                         store_reg_to_var_int(iptr->dst, d);
 931                         break;
 932
 933                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 934                                       /* val.i = constant                             */
 935
 936                         var_to_reg_int(s1, src, REG_ITMP1);
 937                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 938                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 939                                 M_IMUL_IMM(s1, iptr->val.i, d);
 940                                 }
 941                         else {
 942                                 ICONST(REG_ITMP2, iptr->val.i);
 943                                 M_IMUL(s1, REG_ITMP2, d);
 944                                 }
 945                         store_reg_to_var_int(iptr->dst, d);
 946                         break;
 947
 948                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 949
 950                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 951                         var_to_reg_int(s2, src, REG_ITMP2);
 952                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 953                         M_LMUL (s1, s2, d);
 954                         store_reg_to_var_int(iptr->dst, d);
 955                         break;
 956
 957                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
 958                                       /* val.l = constant                             */
 959
 960                         var_to_reg_int(s1, src, REG_ITMP1);
 961                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 962                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 963                                 M_LMUL_IMM(s1, iptr->val.l, d);
 964                                 }
 965                         else {
 966                                 LCONST(REG_ITMP2, iptr->val.l);
 967                                 M_LMUL(s1, REG_ITMP2, d);
 968                                 }
 969                         store_reg_to_var_int(iptr->dst, d);
 970                         break;
 971
 972                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
 973                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
 974
 975                         var_to_reg_int(s1, src, REG_ITMP1);
 976                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 977                         if (iptr->val.i <= 15) {
 978                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
 979                                 M_CMOVGE(s1, s1, REG_ITMP2);
 980                                 }
 981                         else {
 982                                 M_SRA_IMM(s1, 63, REG_ITMP2);
 983                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
 984                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
 985                                 }
 986                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
 987                         store_reg_to_var_int(iptr->dst, d);
 988                         break;
 989
 990                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 991
 992                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 993                         var_to_reg_int(s2, src, REG_ITMP2);
 994                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 995                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 996                         M_SLL(s1, REG_ITMP3, d);
 997                         M_IADD(d, REG_ZERO, d);
 998                         store_reg_to_var_int(iptr->dst, d);
 999                         break;
1000
1001                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1002                                       /* val.i = constant                             */
1003
1004                         var_to_reg_int(s1, src, REG_ITMP1);
1005                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1006                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
1007                         M_IADD(d, REG_ZERO, d);
1008                         store_reg_to_var_int(iptr->dst, d);
1009                         break;
1010
1011                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1012
1013                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1014                         var_to_reg_int(s2, src, REG_ITMP2);
1015                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1016                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1017                         M_SRA(s1, REG_ITMP3, d);
1018                         store_reg_to_var_int(iptr->dst, d);
1019                         break;
1020
1021                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1022                                       /* val.i = constant                             */
1023
1024                         var_to_reg_int(s1, src, REG_ITMP1);
1025                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1026                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1027                         store_reg_to_var_int(iptr->dst, d);
1028                         break;
1029
1030                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1031
1032                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1033                         var_to_reg_int(s2, src, REG_ITMP2);
1034                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1035                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1036             M_IZEXT(s1, d);
1037                         M_SRL(d, REG_ITMP2, d);
1038                         M_IADD(d, REG_ZERO, d);
1039                         store_reg_to_var_int(iptr->dst, d);
1040                         break;
1041
1042                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1043                                       /* val.i = constant                             */
1044
1045                         var_to_reg_int(s1, src, REG_ITMP1);
1046                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1047             M_IZEXT(s1, d);
1048                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
1049                         M_IADD(d, REG_ZERO, d);
1050                         store_reg_to_var_int(iptr->dst, d);
1051                         break;
1052
1053                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1054
1055                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1056                         var_to_reg_int(s2, src, REG_ITMP2);
1057                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1058                         M_SLL(s1, s2, d);
1059                         store_reg_to_var_int(iptr->dst, d);
1060                         break;
1061
1062                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1063                                       /* val.i = constant                             */
1064
1065                         var_to_reg_int(s1, src, REG_ITMP1);
1066                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1067                         M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
1068                         store_reg_to_var_int(iptr->dst, d);
1069                         break;
1070
1071                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1072
1073                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1074                         var_to_reg_int(s2, src, REG_ITMP2);
1075                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1076                         M_SRA(s1, s2, d);
1077                         store_reg_to_var_int(iptr->dst, d);
1078                         break;
1079
1080                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1081                                       /* val.i = constant                             */
1082
1083                         var_to_reg_int(s1, src, REG_ITMP1);
1084                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1085                         M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
1086                         store_reg_to_var_int(iptr->dst, d);
1087                         break;
1088
1089                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1090
1091                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1092                         var_to_reg_int(s2, src, REG_ITMP2);
1093                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1094                         M_SRL(s1, s2, d);
1095                         store_reg_to_var_int(iptr->dst, d);
1096                         break;
1097
1098                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1099                                       /* val.i = constant                             */
1100
1101                         var_to_reg_int(s1, src, REG_ITMP1);
1102                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1103                         M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
1104                         store_reg_to_var_int(iptr->dst, d);
1105                         break;
1106
1107                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1108                 case ICMD_LAND:
1109
1110                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1111                         var_to_reg_int(s2, src, REG_ITMP2);
1112                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1113                         M_AND(s1, s2, d);
1114                         store_reg_to_var_int(iptr->dst, d);
1115                         break;
1116
1117                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1118                                       /* val.i = constant                             */
1119
1120                         var_to_reg_int(s1, src, REG_ITMP1);
1121                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1122                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1123                                 M_AND_IMM(s1, iptr->val.i, d);
1124                                 }
1125                         else if (iptr->val.i == 0xffff) {
1126                                 M_CZEXT(s1, d);
1127                                 }
1128                         else if (iptr->val.i == 0xffffff) {
1129                                 M_ZAPNOT_IMM(s1, 0x07, d);
1130                                 }
1131                         else {
1132                                 ICONST(REG_ITMP2, iptr->val.i);
1133                                 M_AND(s1, REG_ITMP2, d);
1134                                 }
1135                         store_reg_to_var_int(iptr->dst, d);
1136                         break;
1137
1138                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1139                                       /* val.i = constant                             */
1140
1141                         var_to_reg_int(s1, src, REG_ITMP1);
1142                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1143                         if (s1 == d) {
1144                                 M_MOV(s1, REG_ITMP1);
1145                                 s1 = REG_ITMP1;
1146                                 }
1147                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1148                                 M_AND_IMM(s1, iptr->val.i, d);
1149                                 M_BGEZ(s1, 3);
1150                                 M_ISUB(REG_ZERO, s1, d);
1151                                 M_AND_IMM(d, iptr->val.i, d);
1152                                 }
1153                         else if (iptr->val.i == 0xffff) {
1154                                 M_CZEXT(s1, d);
1155                                 M_BGEZ(s1, 3);
1156                                 M_ISUB(REG_ZERO, s1, d);
1157                                 M_CZEXT(d, d);
1158                                 }
1159                         else if (iptr->val.i == 0xffffff) {
1160                                 M_ZAPNOT_IMM(s1, 0x07, d);
1161                                 M_BGEZ(s1, 3);
1162                                 M_ISUB(REG_ZERO, s1, d);
1163                                 M_ZAPNOT_IMM(d, 0x07, d);
1164                                 }
1165                         else {
1166                                 ICONST(REG_ITMP2, iptr->val.i);
1167                                 M_AND(s1, REG_ITMP2, d);
1168                                 M_BGEZ(s1, 3);
1169                                 M_ISUB(REG_ZERO, s1, d);
1170                                 M_AND(d, REG_ITMP2, d);
1171                                 }
1172                         M_ISUB(REG_ZERO, d, d);
1173                         store_reg_to_var_int(iptr->dst, d);
1174                         break;
1175
1176                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1177                                       /* val.l = constant                             */
1178
1179                         var_to_reg_int(s1, src, REG_ITMP1);
1180                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1181                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1182                                 M_AND_IMM(s1, iptr->val.l, d);
1183                                 }
1184                         else if (iptr->val.l == 0xffffL) {
1185                                 M_CZEXT(s1, d);
1186                                 }
1187                         else if (iptr->val.l == 0xffffffL) {
1188                                 M_ZAPNOT_IMM(s1, 0x07, d);
1189                                 }
1190                         else if (iptr->val.l == 0xffffffffL) {
1191                                 M_IZEXT(s1, d);
1192                                 }
1193                         else if (iptr->val.l == 0xffffffffffL) {
1194                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1195                                 }
1196                         else if (iptr->val.l == 0xffffffffffffL) {
1197                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1198                                 }
1199                         else if (iptr->val.l == 0xffffffffffffffL) {
1200                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1201                                 }
1202                         else {
1203                                 LCONST(REG_ITMP2, iptr->val.l);
1204                                 M_AND(s1, REG_ITMP2, d);
1205                                 }
1206                         store_reg_to_var_int(iptr->dst, d);
1207                         break;
1208
1209                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1210                                       /* val.l = constant                             */
1211
1212                         var_to_reg_int(s1, src, REG_ITMP1);
1213                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1214                         if (s1 == d) {
1215                                 M_MOV(s1, REG_ITMP1);
1216                                 s1 = REG_ITMP1;
1217                                 }
1218                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1219                                 M_AND_IMM(s1, iptr->val.l, d);
1220                                 M_BGEZ(s1, 3);
1221                                 M_LSUB(REG_ZERO, s1, d);
1222                                 M_AND_IMM(d, iptr->val.l, d);
1223                                 }
1224                         else if (iptr->val.l == 0xffffL) {
1225                                 M_CZEXT(s1, d);
1226                                 M_BGEZ(s1, 3);
1227                                 M_LSUB(REG_ZERO, s1, d);
1228                                 M_CZEXT(d, d);
1229                                 }
1230                         else if (iptr->val.l == 0xffffffL) {
1231                                 M_ZAPNOT_IMM(s1, 0x07, d);
1232                                 M_BGEZ(s1, 3);
1233                                 M_LSUB(REG_ZERO, s1, d);
1234                                 M_ZAPNOT_IMM(d, 0x07, d);
1235                                 }
1236                         else if (iptr->val.l == 0xffffffffL) {
1237                                 M_IZEXT(s1, d);
1238                                 M_BGEZ(s1, 3);
1239                                 M_LSUB(REG_ZERO, s1, d);
1240                                 M_IZEXT(d, d);
1241                                 }
1242                         else if (iptr->val.l == 0xffffffffffL) {
1243                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1244                                 M_BGEZ(s1, 3);
1245                                 M_LSUB(REG_ZERO, s1, d);
1246                                 M_ZAPNOT_IMM(d, 0x1f, d);
1247                                 }
1248                         else if (iptr->val.l == 0xffffffffffffL) {
1249                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1250                                 M_BGEZ(s1, 3);
1251                                 M_LSUB(REG_ZERO, s1, d);
1252                                 M_ZAPNOT_IMM(d, 0x3f, d);
1253                                 }
1254                         else if (iptr->val.l == 0xffffffffffffffL) {
1255                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1256                                 M_BGEZ(s1, 3);
1257                                 M_LSUB(REG_ZERO, s1, d);
1258                                 M_ZAPNOT_IMM(d, 0x7f, d);
1259                                 }
1260                         else {
1261                                 LCONST(REG_ITMP2, iptr->val.l);
1262                                 M_AND(s1, REG_ITMP2, d);
1263                                 M_BGEZ(s1, 3);
1264                                 M_LSUB(REG_ZERO, s1, d);
1265                                 M_AND(d, REG_ITMP2, d);
1266                                 }
1267                         M_LSUB(REG_ZERO, d, d);
1268                         store_reg_to_var_int(iptr->dst, d);
1269                         break;
1270
1271                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1272                 case ICMD_LOR:
1273
1274                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1275                         var_to_reg_int(s2, src, REG_ITMP2);
1276                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1277                         M_OR( s1,s2, d);
1278                         store_reg_to_var_int(iptr->dst, d);
1279                         break;
1280
1281                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1282                                       /* val.i = constant                             */
1283
1284                         var_to_reg_int(s1, src, REG_ITMP1);
1285                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1286                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1287                                 M_OR_IMM(s1, iptr->val.i, d);
1288                                 }
1289                         else {
1290                                 ICONST(REG_ITMP2, iptr->val.i);
1291                                 M_OR(s1, REG_ITMP2, d);
1292                                 }
1293                         store_reg_to_var_int(iptr->dst, d);
1294                         break;
1295
1296                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1297                                       /* val.l = constant                             */
1298
1299                         var_to_reg_int(s1, src, REG_ITMP1);
1300                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1301                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1302                                 M_OR_IMM(s1, iptr->val.l, d);
1303                                 }
1304                         else {
1305                                 LCONST(REG_ITMP2, iptr->val.l);
1306                                 M_OR(s1, REG_ITMP2, d);
1307                                 }
1308                         store_reg_to_var_int(iptr->dst, d);
1309                         break;
1310
1311                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1312                 case ICMD_LXOR:
1313
1314                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1315                         var_to_reg_int(s2, src, REG_ITMP2);
1316                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1317                         M_XOR(s1, s2, d);
1318                         store_reg_to_var_int(iptr->dst, d);
1319                         break;
1320
1321                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1322                                       /* val.i = constant                             */
1323
1324                         var_to_reg_int(s1, src, REG_ITMP1);
1325                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1326                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1327                                 M_XOR_IMM(s1, iptr->val.i, d);
1328                                 }
1329                         else {
1330                                 ICONST(REG_ITMP2, iptr->val.i);
1331                                 M_XOR(s1, REG_ITMP2, d);
1332                                 }
1333                         store_reg_to_var_int(iptr->dst, d);
1334                         break;
1335
1336                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1337                                       /* val.l = constant                             */
1338
1339                         var_to_reg_int(s1, src, REG_ITMP1);
1340                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1341                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1342                                 M_XOR_IMM(s1, iptr->val.l, d);
1343                                 }
1344                         else {
1345                                 LCONST(REG_ITMP2, iptr->val.l);
1346                                 M_XOR(s1, REG_ITMP2, d);
1347                                 }
1348                         store_reg_to_var_int(iptr->dst, d);
1349                         break;
1350
1351
1352                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1353
1354                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1355                         var_to_reg_int(s2, src, REG_ITMP2);
1356                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1357                         M_CMPLT(s1, s2, REG_ITMP3);
1358                         M_CMPLT(s2, s1, REG_ITMP1);
1359                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1360                         store_reg_to_var_int(iptr->dst, d);
1361                         break;
1362
1363
1364                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1365                                       /* op1 = variable, val.i = constant             */
1366
1367                         var = &(rd->locals[iptr->op1][TYPE_INT]);
1368                         if (var->flags & INMEMORY) {
1369                                 s1 = REG_ITMP1;
1370                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1371                                 }
1372                         else
1373                                 s1 = var->regoff;
1374                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1375                                 M_IADD_IMM(s1, iptr->val.i, s1);
1376                                 }
1377                         else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1378                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1379                                 }
1380                         else {
1381                                 M_LDA (s1, s1, iptr->val.i);
1382                                 M_IADD(s1, REG_ZERO, s1);
1383                                 }
1384                         if (var->flags & INMEMORY)
1385                                 M_LST(s1, REG_SP, 8 * var->regoff);
1386                         break;
1387
1388
1389                 /* floating operations ************************************************/
1390
1391                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1392
1393                         var_to_reg_flt(s1, src, REG_FTMP1);
1394                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1395                         M_FMOVN(s1, d);
1396                         store_reg_to_var_flt(iptr->dst, d);
1397                         break;
1398
1399                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1400
1401                         var_to_reg_flt(s1, src, REG_FTMP1);
1402                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1403                         M_FMOVN(s1, d);
1404                         store_reg_to_var_flt(iptr->dst, d);
1405                         break;
1406
1407                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1408
1409                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1410                         var_to_reg_flt(s2, src, REG_FTMP2);
1411                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1412                         if (opt_noieee) {
1413                                 M_FADD(s1, s2, d);
1414                                 }
1415                         else {
1416                                 if (d == s1 || d == s2) {
1417                                         M_FADDS(s1, s2, REG_FTMP3);
1418                                         M_TRAPB;
1419                                         M_FMOV(REG_FTMP3, d);
1420                                         }
1421                                 else {
1422                                         M_FADDS(s1, s2, d);
1423                                         M_TRAPB;
1424                                         }
1425                                 }
1426                         store_reg_to_var_flt(iptr->dst, d);
1427                         break;
1428
1429                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1430
1431                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1432                         var_to_reg_flt(s2, src, REG_FTMP2);
1433                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1434                         if (opt_noieee) {
1435                                 M_DADD(s1, s2, d);
1436                                 }
1437                         else {
1438                                 if (d == s1 || d == s2) {
1439                                         M_DADDS(s1, s2, REG_FTMP3);
1440                                         M_TRAPB;
1441                                         M_FMOV(REG_FTMP3, d);
1442                                         }
1443                                 else {
1444                                         M_DADDS(s1, s2, d);
1445                                         M_TRAPB;
1446                                         }
1447                                 }
1448                         store_reg_to_var_flt(iptr->dst, d);
1449                         break;
1450
1451                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1452
1453                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1454                         var_to_reg_flt(s2, src, REG_FTMP2);
1455                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1456                         if (opt_noieee) {
1457                                 M_FSUB(s1, s2, d);
1458                                 }
1459                         else {
1460                                 if (d == s1 || d == s2) {
1461                                         M_FSUBS(s1, s2, REG_FTMP3);
1462                                         M_TRAPB;
1463                                         M_FMOV(REG_FTMP3, d);
1464                                         }
1465                                 else {
1466                                         M_FSUBS(s1, s2, d);
1467                                         M_TRAPB;
1468                                         }
1469                                 }
1470                         store_reg_to_var_flt(iptr->dst, d);
1471                         break;
1472
1473                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1474
1475                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1476                         var_to_reg_flt(s2, src, REG_FTMP2);
1477                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1478                         if (opt_noieee) {
1479                                 M_DSUB(s1, s2, d);
1480                                 }
1481                         else {
1482                                 if (d == s1 || d == s2) {
1483                                         M_DSUBS(s1, s2, REG_FTMP3);
1484                                         M_TRAPB;
1485                                         M_FMOV(REG_FTMP3, d);
1486                                         }
1487                                 else {
1488                                         M_DSUBS(s1, s2, d);
1489                                         M_TRAPB;
1490                                         }
1491                                 }
1492                         store_reg_to_var_flt(iptr->dst, d);
1493                         break;
1494
1495                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1496
1497                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1498                         var_to_reg_flt(s2, src, REG_FTMP2);
1499                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1500                         if (opt_noieee) {
1501                                 M_FMUL(s1, s2, d);
1502                                 }
1503                         else {
1504                                 if (d == s1 || d == s2) {
1505                                         M_FMULS(s1, s2, REG_FTMP3);
1506                                         M_TRAPB;
1507                                         M_FMOV(REG_FTMP3, d);
1508                                         }
1509                                 else {
1510                                         M_FMULS(s1, s2, d);
1511                                         M_TRAPB;
1512                                         }
1513                                 }
1514                         store_reg_to_var_flt(iptr->dst, d);
1515                         break;
1516
1517                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1518
1519                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1520                         var_to_reg_flt(s2, src, REG_FTMP2);
1521                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1522                         if (opt_noieee) {
1523                                 M_DMUL(s1, s2, d);
1524                                 }
1525                         else {
1526                                 if (d == s1 || d == s2) {
1527                                         M_DMULS(s1, s2, REG_FTMP3);
1528                                         M_TRAPB;
1529                                         M_FMOV(REG_FTMP3, d);
1530                                         }
1531                                 else {
1532                                         M_DMULS(s1, s2, d);
1533                                         M_TRAPB;
1534                                         }
1535                                 }
1536                         store_reg_to_var_flt(iptr->dst, d);
1537                         break;
1538
1539                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1540
1541                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1542                         var_to_reg_flt(s2, src, REG_FTMP2);
1543                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1544                         if (opt_noieee) {
1545                                 M_FDIV(s1, s2, d);
1546                                 }
1547                         else {
1548                                 if (d == s1 || d == s2) {
1549                                         M_FDIVS(s1, s2, REG_FTMP3);
1550                                         M_TRAPB;
1551                                         M_FMOV(REG_FTMP3, d);
1552                                         }
1553                                 else {
1554                                         M_FDIVS(s1, s2, d);
1555                                         M_TRAPB;
1556                                         }
1557                                 }
1558                         store_reg_to_var_flt(iptr->dst, d);
1559                         break;
1560
1561                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1562
1563                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1564                         var_to_reg_flt(s2, src, REG_FTMP2);
1565                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1566                         if (opt_noieee) {
1567                                 M_DDIV(s1, s2, d);
1568                                 }
1569                         else {
1570                                 if (d == s1 || d == s2) {
1571                                         M_DDIVS(s1, s2, REG_FTMP3);
1572                                         M_TRAPB;
1573                                         M_FMOV(REG_FTMP3, d);
1574                                         }
1575                                 else {
1576                                         M_DDIVS(s1, s2, d);
1577                                         M_TRAPB;
1578                                         }
1579                                 }
1580                         store_reg_to_var_flt(iptr->dst, d);
1581                         break;
1582
1583                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1584                 case ICMD_L2F:
1585                         var_to_reg_int(s1, src, REG_ITMP1);
1586                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1587                         a = dseg_adddouble(cd, 0.0);
1588                         M_LST (s1, REG_PV, a);
1589                         M_DLD (d, REG_PV, a);
1590                         M_CVTLF(d, d);
1591                         store_reg_to_var_flt(iptr->dst, d);
1592                         break;
1593
1594                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1595                 case ICMD_L2D:
1596                         var_to_reg_int(s1, src, REG_ITMP1);
1597                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1598                         a = dseg_adddouble(cd, 0.0);
1599                         M_LST (s1, REG_PV, a);
1600                         M_DLD (d, REG_PV, a);
1601                         M_CVTLD(d, d);
1602                         store_reg_to_var_flt(iptr->dst, d);
1603                         break;
1604
1605                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1606                 case ICMD_D2I:
1607                         var_to_reg_flt(s1, src, REG_FTMP1);
1608                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1609                         a = dseg_adddouble(cd, 0.0);
1610                         M_CVTDL_C(s1, REG_FTMP2);
1611                         M_CVTLI(REG_FTMP2, REG_FTMP3);
1612                         M_DST (REG_FTMP3, REG_PV, a);
1613                         M_ILD (d, REG_PV, a);
1614                         store_reg_to_var_int(iptr->dst, d);
1615                         break;
1616
1617                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1618                 case ICMD_D2L:
1619                         var_to_reg_flt(s1, src, REG_FTMP1);
1620                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1621                         a = dseg_adddouble(cd, 0.0);
1622                         M_CVTDL_C(s1, REG_FTMP2);
1623                         M_DST (REG_FTMP2, REG_PV, a);
1624                         M_LLD (d, REG_PV, a);
1625                         store_reg_to_var_int(iptr->dst, d);
1626                         break;
1627
1628                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1629
1630                         var_to_reg_flt(s1, src, REG_FTMP1);
1631                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1632                         M_CVTFDS(s1, d);
1633                         M_TRAPB;
1634                         store_reg_to_var_flt(iptr->dst, d);
1635                         break;
1636
1637                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1638
1639                         var_to_reg_flt(s1, src, REG_FTMP1);
1640                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1641                         if (opt_noieee) {
1642                                 M_CVTDF(s1, d);
1643                                 }
1644                         else {
1645                                 M_CVTDFS(s1, d);
1646                                 M_TRAPB;
1647                                 }
1648                         store_reg_to_var_flt(iptr->dst, d);
1649                         break;
1650
1651                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1652                 case ICMD_DCMPL:
1653                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1654                         var_to_reg_flt(s2, src, REG_FTMP2);
1655                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1656                         if (opt_noieee) {
1657                                 M_LSUB_IMM(REG_ZERO, 1, d);
1658                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1659                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1660                                 M_CLR   (d);
1661                                 M_FCMPLT(s2, s1, REG_FTMP3);
1662                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1663                                 M_LADD_IMM(REG_ZERO, 1, d);
1664                                 }
1665                         else {
1666                                 M_LSUB_IMM(REG_ZERO, 1, d);
1667                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1668                                 M_TRAPB;
1669                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1670                                 M_CLR   (d);
1671                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1672                                 M_TRAPB;
1673                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1674                                 M_LADD_IMM(REG_ZERO, 1, d);
1675                                 }
1676                         store_reg_to_var_int(iptr->dst, d);
1677                         break;
1678
1679                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1680                 case ICMD_DCMPG:
1681                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1682                         var_to_reg_flt(s2, src, REG_FTMP2);
1683                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1684                         if (opt_noieee) {
1685                                 M_LADD_IMM(REG_ZERO, 1, d);
1686                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1687                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1688                                 M_CLR   (d);
1689                                 M_FCMPLT(s1, s2, REG_FTMP3);
1690                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1691                                 M_LSUB_IMM(REG_ZERO, 1, d);
1692                                 }
1693                         else {
1694                                 M_LADD_IMM(REG_ZERO, 1, d);
1695                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1696                                 M_TRAPB;
1697                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1698                                 M_CLR   (d);
1699                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1700                                 M_TRAPB;
1701                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1702                                 M_LSUB_IMM(REG_ZERO, 1, d);
1703                                 }
1704                         store_reg_to_var_int(iptr->dst, d);
1705                         break;
1706
1707
1708                 /* memory operations **************************************************/
1709
1710                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1711
1712                         var_to_reg_int(s1, src, REG_ITMP1);
1713                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1714                         gen_nullptr_check(s1);
1715                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1716                         store_reg_to_var_int(iptr->dst, d);
1717                         break;
1718
1719                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1720
1721                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1722                         var_to_reg_int(s2, src, REG_ITMP2);
1723                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1724                         if (iptr->op1 == 0) {
1725                                 gen_nullptr_check(s1);
1726                                 gen_bound_check;
1727                                 }
1728                         M_SAADDQ(s2, s1, REG_ITMP1);
1729                         M_ALD( d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1730                         store_reg_to_var_int(iptr->dst, d);
1731                         break;
1732
1733                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1734
1735                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1736                         var_to_reg_int(s2, src, REG_ITMP2);
1737                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1738                         if (iptr->op1 == 0) {
1739                                 gen_nullptr_check(s1);
1740                                 gen_bound_check;
1741                                 }
1742                         M_S8ADDQ(s2, s1, REG_ITMP1);
1743                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1744                         store_reg_to_var_int(iptr->dst, d);
1745                         break;
1746
1747                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1748
1749                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1750                         var_to_reg_int(s2, src, REG_ITMP2);
1751                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1752                         if (iptr->op1 == 0) {
1753                                 gen_nullptr_check(s1);
1754                                 gen_bound_check;
1755                                 }
1756
1757                         M_S4ADDQ(s2, s1, REG_ITMP1);
1758                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1759                         store_reg_to_var_int(iptr->dst, d);
1760                         break;
1761
1762                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1763
1764                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1765                         var_to_reg_int(s2, src, REG_ITMP2);
1766                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1767                         if (iptr->op1 == 0) {
1768                                 gen_nullptr_check(s1);
1769                                 gen_bound_check;
1770                                 }
1771                         M_S4ADDQ(s2, s1, REG_ITMP1);
1772                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1773                         store_reg_to_var_flt(iptr->dst, d);
1774                         break;
1775
1776                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1777
1778                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1779                         var_to_reg_int(s2, src, REG_ITMP2);
1780                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1781                         if (iptr->op1 == 0) {
1782                                 gen_nullptr_check(s1);
1783                                 gen_bound_check;
1784                                 }
1785                         M_S8ADDQ(s2, s1, REG_ITMP1);
1786                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1787                         store_reg_to_var_flt(iptr->dst, d);
1788                         break;
1789
1790                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1791
1792                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1793                         var_to_reg_int(s2, src, REG_ITMP2);
1794                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1795                         if (iptr->op1 == 0) {
1796                                 gen_nullptr_check(s1);
1797                                 gen_bound_check;
1798                                 }
1799                         if (has_ext_instr_set) {
1800                                 M_LADD(s2, s1, REG_ITMP1);
1801                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1802                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1803                                 }
1804                         else {
1805                                 M_LADD (s2, s1, REG_ITMP1);
1806                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1807                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1808                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1809                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
1810                                 }
1811                         store_reg_to_var_int(iptr->dst, d);
1812                         break;
1813
1814                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1815
1816                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1817                         var_to_reg_int(s2, src, REG_ITMP2);
1818                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1819                         if (iptr->op1 == 0) {
1820                                 gen_nullptr_check(s1);
1821                                 gen_bound_check;
1822                                 }
1823                         if (has_ext_instr_set) {
1824                                 M_LADD(s2, s1, REG_ITMP1);
1825                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1826                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
1827                                 M_SSEXT(d, d);
1828                                 }
1829                         else {
1830                                 M_LADD(s2, s1, REG_ITMP1);
1831                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1832                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1833                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
1834                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1835                                 M_SRA_IMM(d, 48, d);
1836                                 }
1837                         store_reg_to_var_int(iptr->dst, d);
1838                         break;
1839
1840                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1841
1842                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1843                         var_to_reg_int(s2, src, REG_ITMP2);
1844                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1845                         if (iptr->op1 == 0) {
1846                                 gen_nullptr_check(s1);
1847                                 gen_bound_check;
1848                                 }
1849                         if (has_ext_instr_set) {
1850                                 M_LADD   (s2, s1, REG_ITMP1);
1851                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
1852                                 M_BSEXT  (d, d);
1853                                 }
1854                         else {
1855                                 M_LADD(s2, s1, REG_ITMP1);
1856                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1857                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
1858                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1859                                 M_SRA_IMM(d, 56, d);
1860                                 }
1861                         store_reg_to_var_int(iptr->dst, d);
1862                         break;
1863
1864
1865                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1866
1867                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1868                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1869                         if (iptr->op1 == 0) {
1870                                 gen_nullptr_check(s1);
1871                                 gen_bound_check;
1872                                 }
1873                         var_to_reg_int(s3, src, REG_ITMP3);
1874                         M_SAADDQ(s2, s1, REG_ITMP1);
1875                         M_AST   (s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1876                         break;
1877
1878                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1879
1880                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1881                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1882                         if (iptr->op1 == 0) {
1883                                 gen_nullptr_check(s1);
1884                                 gen_bound_check;
1885                                 }
1886                         var_to_reg_int(s3, src, REG_ITMP3);
1887                         M_S8ADDQ(s2, s1, REG_ITMP1);
1888                         M_LST   (s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1889                         break;
1890
1891                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1892
1893                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1894                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1895                         if (iptr->op1 == 0) {
1896                                 gen_nullptr_check(s1);
1897                                 gen_bound_check;
1898                                 }
1899
1900                         var_to_reg_int(s3, src, REG_ITMP3);
1901                         M_S4ADDQ(s2, s1, REG_ITMP1);
1902                         M_IST   (s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1903                         break;
1904
1905                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1906
1907                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1908                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1909                         if (iptr->op1 == 0) {
1910                                 gen_nullptr_check(s1);
1911                                 gen_bound_check;
1912                                 }
1913                         var_to_reg_flt(s3, src, REG_FTMP3);
1914                         M_S4ADDQ(s2, s1, REG_ITMP1);
1915                         M_FST   (s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1916                         break;
1917
1918                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1919
1920                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1921                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1922                         if (iptr->op1 == 0) {
1923                                 gen_nullptr_check(s1);
1924                                 gen_bound_check;
1925                                 }
1926                         var_to_reg_flt(s3, src, REG_FTMP3);
1927                         M_S8ADDQ(s2, s1, REG_ITMP1);
1928                         M_DST   (s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1929                         break;
1930
1931                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1932
1933                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1934                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1935                         if (iptr->op1 == 0) {
1936                                 gen_nullptr_check(s1);
1937                                 gen_bound_check;
1938                                 }
1939                         var_to_reg_int(s3, src, REG_ITMP3);
1940                         if (has_ext_instr_set) {
1941                                 M_LADD(s2, s1, REG_ITMP1);
1942                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1943                                 M_SST (s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1944                                 }
1945                         else {
1946                                 M_LADD (s2, s1, REG_ITMP1);
1947                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1948                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1949                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1950                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1951                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1952                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
1953                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1954                                 }
1955                         break;
1956
1957                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1958
1959                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1960                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1961                         if (iptr->op1 == 0) {
1962                                 gen_nullptr_check(s1);
1963                                 gen_bound_check;
1964                                 }
1965                         var_to_reg_int(s3, src, REG_ITMP3);
1966                         if (has_ext_instr_set) {
1967                                 M_LADD(s2, s1, REG_ITMP1);
1968                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1969                                 M_SST (s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1970                                 }
1971                         else {
1972                                 M_LADD (s2, s1, REG_ITMP1);
1973                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1974                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1975                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1976                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1977                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1978                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
1979                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1980                                 }
1981                         break;
1982
1983                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1984
1985                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1986                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1987                         if (iptr->op1 == 0) {
1988                                 gen_nullptr_check(s1);
1989                                 gen_bound_check;
1990                                 }
1991                         var_to_reg_int(s3, src, REG_ITMP3);
1992                         if (has_ext_instr_set) {
1993                                 M_LADD(s2, s1, REG_ITMP1);
1994                                 M_BST (s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1995                                 }
1996                         else {
1997                                 M_LADD (s2, s1, REG_ITMP1);
1998                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1999                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2000                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
2001                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2002                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2003                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2004                                 }
2005                         break;
2006
2007
2008                 case ICMD_IASTORECONST:   /* ..., arrayref, index  ==> ...            */
2009
2010                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2011                         var_to_reg_int(s2, src, REG_ITMP2);
2012                         if (iptr->op1 == 0) {
2013                                 gen_nullptr_check(s1);
2014                                 gen_bound_check;
2015                         }
2016                         M_S4ADDQ(s2, s1, REG_ITMP1);
2017                         M_IST(REG_ZERO, REG_ITMP1, OFFSET(java_intarray, data[0]));
2018                         break;
2019
2020                 case ICMD_LASTORECONST:   /* ..., arrayref, index  ==> ...            */
2021
2022                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2023                         var_to_reg_int(s2, src, REG_ITMP2);
2024                         if (iptr->op1 == 0) {
2025                                 gen_nullptr_check(s1);
2026                                 gen_bound_check;
2027                         }
2028                         M_S8ADDQ(s2, s1, REG_ITMP1);
2029                         M_LST(REG_ZERO, REG_ITMP1, OFFSET(java_longarray, data[0]));
2030                         break;
2031
2032                 case ICMD_AASTORECONST:   /* ..., arrayref, index  ==> ...            */
2033
2034                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2035                         var_to_reg_int(s2, src, REG_ITMP2);
2036                         if (iptr->op1 == 0) {
2037                                 gen_nullptr_check(s1);
2038                                 gen_bound_check;
2039                         }
2040                         M_SAADDQ(s2, s1, REG_ITMP1);
2041                         M_AST(REG_ZERO, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2042                         break;
2043
2044                 case ICMD_BASTORECONST:   /* ..., arrayref, index  ==> ...            */
2045
2046                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2047                         var_to_reg_int(s2, src, REG_ITMP2);
2048                         if (iptr->op1 == 0) {
2049                                 gen_nullptr_check(s1);
2050                                 gen_bound_check;
2051                         }
2052                         if (has_ext_instr_set) {
2053                                 M_LADD(s2, s1, REG_ITMP1);
2054                                 M_BST(REG_ZERO, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2055
2056                         } else {
2057                                 M_LADD(s2, s1, REG_ITMP1);
2058                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2059                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2060                                 M_INSBL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2061                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2062                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2063                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2064                         }
2065                         break;
2066
2067                 case ICMD_CASTORECONST:   /* ..., arrayref, index  ==> ...            */
2068
2069                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2070                         var_to_reg_int(s2, src, REG_ITMP2);
2071                         if (iptr->op1 == 0) {
2072                                 gen_nullptr_check(s1);
2073                                 gen_bound_check;
2074                         }
2075                         if (has_ext_instr_set) {
2076                                 M_LADD(s2, s1, REG_ITMP1);
2077                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2078                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_chararray, data[0]));
2079
2080                         } else {
2081                                 M_LADD(s2, s1, REG_ITMP1);
2082                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2083                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2084                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2085                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2086                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2087                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2088                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2089                         }
2090                         break;
2091
2092                 case ICMD_SASTORECONST:   /* ..., arrayref, index  ==> ...            */
2093
2094                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2095                         var_to_reg_int(s2, src, REG_ITMP2);
2096                         if (iptr->op1 == 0) {
2097                                 gen_nullptr_check(s1);
2098                                 gen_bound_check;
2099                         }
2100                         if (has_ext_instr_set) {
2101                                 M_LADD(s2, s1, REG_ITMP1);
2102                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2103                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2104
2105                         } else {
2106                                 M_LADD(s2, s1, REG_ITMP1);
2107                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2108                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2109                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2110                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2111                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2112                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2113                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2114                         }
2115                         break;
2116
2117
2118                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2119                                       /* op1 = type, val.a = field address            */
2120
2121                         /* If the static fields' class is not yet initialized, we do it   */
2122                         /* now. The call code is generated later.                         */
2123                         if (!((fieldinfo *) iptr->val.a)->class->initialized) {
2124                                 codegen_addclinitref(cd, mcodeptr, ((fieldinfo *) iptr->val.a)->class);
2125
2126                                 /* This is just for debugging purposes. Is very difficult to  */
2127                                 /* read patched code. Here we patch the following 2 nop's     */
2128                                 /* so that the real code keeps untouched.                     */
2129                                 if (showdisassemble) {
2130                                         M_NOP;
2131                                 }
2132                         }
2133
2134                         a = dseg_addaddress(cd, &(((fieldinfo *)(iptr->val.a))->value));
2135                         M_ALD(REG_ITMP1, REG_PV, a);
2136                         switch (iptr->op1) {
2137                                 case TYPE_INT:
2138                                         var_to_reg_int(s2, src, REG_ITMP2);
2139                                         M_IST(s2, REG_ITMP1, 0);
2140                                         break;
2141                                 case TYPE_LNG:
2142                                         var_to_reg_int(s2, src, REG_ITMP2);
2143                                         M_LST(s2, REG_ITMP1, 0);
2144                                         break;
2145                                 case TYPE_ADR:
2146                                         var_to_reg_int(s2, src, REG_ITMP2);
2147                                         M_AST(s2, REG_ITMP1, 0);
2148                                         break;
2149                                 case TYPE_FLT:
2150                                         var_to_reg_flt(s2, src, REG_FTMP2);
2151                                         M_FST(s2, REG_ITMP1, 0);
2152                                         break;
2153                                 case TYPE_DBL:
2154                                         var_to_reg_flt(s2, src, REG_FTMP2);
2155                                         M_DST(s2, REG_ITMP1, 0);
2156                                         break;
2157                                 default: panic ("internal error");
2158                                 }
2159                         break;
2160
2161                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2162                                       /* op1 = type, val.a = field address            */
2163
2164                         /* if class isn't yet initialized, do it */
2165                         if (!((fieldinfo *) iptr->val.a)->class->initialized) {
2166                                 codegen_addclinitref(cd, mcodeptr, ((fieldinfo *) iptr->val.a)->class);
2167
2168                                 /* This is just for debugging purposes. Is very difficult to  */
2169                                 /* read patched code. Here we patch the following 2 nop's     */
2170                                 /* so that the real code keeps untouched.                     */
2171                                 if (showdisassemble) {
2172                                         M_NOP;
2173                                 }
2174                         }
2175
2176                         a = dseg_addaddress(cd, &(((fieldinfo *) iptr->val.a)->value));
2177                         M_ALD(REG_ITMP1, REG_PV, a);
2178                         switch (iptr->op1) {
2179                                 case TYPE_INT:
2180                                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2181                                         M_ILD(d, REG_ITMP1, 0);
2182                                         store_reg_to_var_int(iptr->dst, d);
2183                                         break;
2184                                 case TYPE_LNG:
2185                                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2186                                         M_LLD(d, REG_ITMP1, 0);
2187                                         store_reg_to_var_int(iptr->dst, d);
2188                                         break;
2189                                 case TYPE_ADR:
2190                                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2191                                         M_ALD(d, REG_ITMP1, 0);
2192                                         store_reg_to_var_int(iptr->dst, d);
2193                                         break;
2194                                 case TYPE_FLT:
2195                                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2196                                         M_FLD(d, REG_ITMP1, 0);
2197                                         store_reg_to_var_flt(iptr->dst, d);
2198                                         break;
2199                                 case TYPE_DBL:
2200                                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2201                                         M_DLD(d, REG_ITMP1, 0);
2202                                         store_reg_to_var_flt(iptr->dst, d);
2203                                         break;
2204                                 default: panic ("internal error");
2205                                 }
2206                         break;
2207
2208
2209                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2210                                       /* op1 = type, val.i = field offset             */
2211
2212                         a = ((fieldinfo *) iptr->val.a)->offset;
2213                         switch (iptr->op1) {
2214                                 case TYPE_INT:
2215                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2216                                         var_to_reg_int(s2, src, REG_ITMP2);
2217                                         gen_nullptr_check(s1);
2218                                         M_IST(s2, s1, a);
2219                                         break;
2220                                 case TYPE_LNG:
2221                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2222                                         var_to_reg_int(s2, src, REG_ITMP2);
2223                                         gen_nullptr_check(s1);
2224                                         M_LST(s2, s1, a);
2225                                         break;
2226                                 case TYPE_ADR:
2227                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2228                                         var_to_reg_int(s2, src, REG_ITMP2);
2229                                         gen_nullptr_check(s1);
2230                                         M_AST(s2, s1, a);
2231                                         break;
2232                                 case TYPE_FLT:
2233                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2234                                         var_to_reg_flt(s2, src, REG_FTMP2);
2235                                         gen_nullptr_check(s1);
2236                                         M_FST(s2, s1, a);
2237                                         break;
2238                                 case TYPE_DBL:
2239                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2240                                         var_to_reg_flt(s2, src, REG_FTMP2);
2241                                         gen_nullptr_check(s1);
2242                                         M_DST(s2, s1, a);
2243                                         break;
2244                                 default: panic ("internal error");
2245                                 }
2246                         break;
2247
2248                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2249                                       /* op1 = type, val.i = field offset             */
2250
2251                         a = ((fieldinfo *)(iptr->val.a))->offset;
2252                         switch (iptr->op1) {
2253                                 case TYPE_INT:
2254                                         var_to_reg_int(s1, src, REG_ITMP1);
2255                                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2256                                         gen_nullptr_check(s1);
2257                                         M_ILD(d, s1, a);
2258                                         store_reg_to_var_int(iptr->dst, d);
2259                                         break;
2260                                 case TYPE_LNG:
2261                                         var_to_reg_int(s1, src, REG_ITMP1);
2262                                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2263                                         gen_nullptr_check(s1);
2264                                         M_LLD(d, s1, a);
2265                                         store_reg_to_var_int(iptr->dst, d);
2266                                         break;
2267                                 case TYPE_ADR:
2268                                         var_to_reg_int(s1, src, REG_ITMP1);
2269                                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2270                                         gen_nullptr_check(s1);
2271                                         M_ALD(d, s1, a);
2272                                         store_reg_to_var_int(iptr->dst, d);
2273                                         break;
2274                                 case TYPE_FLT:
2275                                         var_to_reg_int(s1, src, REG_ITMP1);
2276                                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2277                                         gen_nullptr_check(s1);
2278                                         M_FLD(d, s1, a);
2279                                         store_reg_to_var_flt(iptr->dst, d);
2280                                         break;
2281                                 case TYPE_DBL:
2282                                         var_to_reg_int(s1, src, REG_ITMP1);
2283                                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2284                                         gen_nullptr_check(s1);
2285                                         M_DLD(d, s1, a);
2286                                         store_reg_to_var_flt(iptr->dst, d);
2287                                         break;
2288                                 default: panic ("internal error");
2289                                 }
2290                         break;
2291
2292
2293                 /* branch operations **************************************************/
2294
2295 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2296
2297                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2298
2299                         var_to_reg_int(s1, src, REG_ITMP1);
2300                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2301                         a = dseg_addaddress(cd, asm_handle_exception);
2302                         M_ALD(REG_ITMP2, REG_PV, a);
2303                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2304                         M_NOP;              /* nop ensures that XPC is less than the end */
2305                                             /* of basic block                            */
2306                         ALIGNCODENOP;
2307                         break;
2308
2309                 case ICMD_GOTO:         /* ... ==> ...                                */
2310                                         /* op1 = target JavaVM pc                     */
2311                         M_BR(0);
2312                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2313                         ALIGNCODENOP;
2314                         break;
2315
2316                 case ICMD_JSR:          /* ... ==> ...                                */
2317                                         /* op1 = target JavaVM pc                     */
2318
2319                         M_BSR(REG_ITMP1, 0);
2320                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2321                         break;
2322
2323                 case ICMD_RET:          /* ... ==> ...                                */
2324                                         /* op1 = local variable                       */
2325
2326                         var = &(rd->locals[iptr->op1][TYPE_ADR]);
2327                         if (var->flags & INMEMORY) {
2328                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2329                                 M_RET(REG_ZERO, REG_ITMP1);
2330                                 }
2331                         else
2332                                 M_RET(REG_ZERO, var->regoff);
2333                         ALIGNCODENOP;
2334                         break;
2335
2336                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2337                                         /* op1 = target JavaVM pc                     */
2338
2339                         var_to_reg_int(s1, src, REG_ITMP1);
2340                         M_BEQZ(s1, 0);
2341                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2342                         break;
2343
2344                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2345                                         /* op1 = target JavaVM pc                     */
2346
2347                         var_to_reg_int(s1, src, REG_ITMP1);
2348                         M_BNEZ(s1, 0);
2349                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2350                         break;
2351
2352                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2353                                         /* op1 = target JavaVM pc, val.i = constant   */
2354
2355                         var_to_reg_int(s1, src, REG_ITMP1);
2356                         if (iptr->val.i == 0) {
2357                                 M_BEQZ(s1, 0);
2358                                 }
2359                         else {
2360                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2361                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2362                                         }
2363                                 else {
2364                                         ICONST(REG_ITMP2, iptr->val.i);
2365                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2366                                         }
2367                                 M_BNEZ(REG_ITMP1, 0);
2368                                 }
2369                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2370                         break;
2371
2372                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2373                                         /* op1 = target JavaVM pc, val.i = constant   */
2374
2375                         var_to_reg_int(s1, src, REG_ITMP1);
2376                         if (iptr->val.i == 0) {
2377                                 M_BLTZ(s1, 0);
2378                                 }
2379                         else {
2380                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2381                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2382                                         }
2383                                 else {
2384                                         ICONST(REG_ITMP2, iptr->val.i);
2385                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2386                                         }
2387                                 M_BNEZ(REG_ITMP1, 0);
2388                                 }
2389                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2390                         break;
2391
2392                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2393                                         /* op1 = target JavaVM pc, val.i = constant   */
2394
2395                         var_to_reg_int(s1, src, REG_ITMP1);
2396                         if (iptr->val.i == 0) {
2397                                 M_BLEZ(s1, 0);
2398                                 }
2399                         else {
2400                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2401                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2402                                         }
2403                                 else {
2404                                         ICONST(REG_ITMP2, iptr->val.i);
2405                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2406                                         }
2407                                 M_BNEZ(REG_ITMP1, 0);
2408                                 }
2409                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2410                         break;
2411
2412                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2413                                         /* op1 = target JavaVM pc, val.i = constant   */
2414
2415                         var_to_reg_int(s1, src, REG_ITMP1);
2416                         if (iptr->val.i == 0) {
2417                                 M_BNEZ(s1, 0);
2418                                 }
2419                         else {
2420                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2421                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2422                                         }
2423                                 else {
2424                                         ICONST(REG_ITMP2, iptr->val.i);
2425                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2426                                         }
2427                                 M_BEQZ(REG_ITMP1, 0);
2428                                 }
2429                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2430                         break;
2431
2432                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2433                                         /* op1 = target JavaVM pc, val.i = constant   */
2434
2435                         var_to_reg_int(s1, src, REG_ITMP1);
2436                         if (iptr->val.i == 0) {
2437                                 M_BGTZ(s1, 0);
2438                                 }
2439                         else {
2440                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2441                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2442                                         }
2443                                 else {
2444                                         ICONST(REG_ITMP2, iptr->val.i);
2445                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2446                                         }
2447                                 M_BEQZ(REG_ITMP1, 0);
2448                                 }
2449                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2450                         break;
2451
2452                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2453                                         /* op1 = target JavaVM pc, val.i = constant   */
2454
2455                         var_to_reg_int(s1, src, REG_ITMP1);
2456                         if (iptr->val.i == 0) {
2457                                 M_BGEZ(s1, 0);
2458                                 }
2459                         else {
2460                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2461                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2462                                         }
2463                                 else {
2464                                         ICONST(REG_ITMP2, iptr->val.i);
2465                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2466                                         }
2467                                 M_BEQZ(REG_ITMP1, 0);
2468                                 }
2469                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2470                         break;
2471
2472                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2473                                         /* op1 = target JavaVM pc, val.l = constant   */
2474
2475                         var_to_reg_int(s1, src, REG_ITMP1);
2476                         if (iptr->val.l == 0) {
2477                                 M_BEQZ(s1, 0);
2478                                 }
2479                         else {
2480                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2481                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2482                                         }
2483                                 else {
2484                                         LCONST(REG_ITMP2, iptr->val.l);
2485                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2486                                         }
2487                                 M_BNEZ(REG_ITMP1, 0);
2488                                 }
2489                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2490                         break;
2491
2492                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2493                                         /* op1 = target JavaVM pc, val.l = constant   */
2494
2495                         var_to_reg_int(s1, src, REG_ITMP1);
2496                         if (iptr->val.l == 0) {
2497                                 M_BLTZ(s1, 0);
2498                                 }
2499                         else {
2500                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2501                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2502                                         }
2503                                 else {
2504                                         LCONST(REG_ITMP2, iptr->val.l);
2505                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2506                                         }
2507                                 M_BNEZ(REG_ITMP1, 0);
2508                                 }
2509                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2510                         break;
2511
2512                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2513                                         /* op1 = target JavaVM pc, val.l = constant   */
2514
2515                         var_to_reg_int(s1, src, REG_ITMP1);
2516                         if (iptr->val.l == 0) {
2517                                 M_BLEZ(s1, 0);
2518                                 }
2519                         else {
2520                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2521                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2522                                         }
2523                                 else {
2524                                         LCONST(REG_ITMP2, iptr->val.l);
2525                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2526                                         }
2527                                 M_BNEZ(REG_ITMP1, 0);
2528                                 }
2529                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2530                         break;
2531
2532                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2533                                         /* op1 = target JavaVM pc, val.l = constant   */
2534
2535                         var_to_reg_int(s1, src, REG_ITMP1);
2536                         if (iptr->val.l == 0) {
2537                                 M_BNEZ(s1, 0);
2538                                 }
2539                         else {
2540                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2541                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2542                                         }
2543                                 else {
2544                                         LCONST(REG_ITMP2, iptr->val.l);
2545                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2546                                         }
2547                                 M_BEQZ(REG_ITMP1, 0);
2548                                 }
2549                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2550                         break;
2551
2552                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2553                                         /* op1 = target JavaVM pc, val.l = constant   */
2554
2555                         var_to_reg_int(s1, src, REG_ITMP1);
2556                         if (iptr->val.l == 0) {
2557                                 M_BGTZ(s1, 0);
2558                                 }
2559                         else {
2560                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2561                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2562                                         }
2563                                 else {
2564                                         LCONST(REG_ITMP2, iptr->val.l);
2565                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2566                                         }
2567                                 M_BEQZ(REG_ITMP1, 0);
2568                                 }
2569                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2570                         break;
2571
2572                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2573                                         /* op1 = target JavaVM pc, val.l = constant   */
2574
2575                         var_to_reg_int(s1, src, REG_ITMP1);
2576                         if (iptr->val.l == 0) {
2577                                 M_BGEZ(s1, 0);
2578                                 }
2579                         else {
2580                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2581                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2582                                         }
2583                                 else {
2584                                         LCONST(REG_ITMP2, iptr->val.l);
2585                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2586                                         }
2587                                 M_BEQZ(REG_ITMP1, 0);
2588                                 }
2589                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2590                         break;
2591
2592                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2593                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2594                 case ICMD_IF_ACMPEQ:
2595
2596                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2597                         var_to_reg_int(s2, src, REG_ITMP2);
2598                         M_CMPEQ(s1, s2, REG_ITMP1);
2599                         M_BNEZ(REG_ITMP1, 0);
2600                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2601                         break;
2602
2603                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2604                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2605                 case ICMD_IF_ACMPNE:
2606
2607                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2608                         var_to_reg_int(s2, src, REG_ITMP2);
2609                         M_CMPEQ(s1, s2, REG_ITMP1);
2610                         M_BEQZ(REG_ITMP1, 0);
2611                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2612                         break;
2613
2614                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2615                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2616
2617                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2618                         var_to_reg_int(s2, src, REG_ITMP2);
2619                         M_CMPLT(s1, s2, REG_ITMP1);
2620                         M_BNEZ(REG_ITMP1, 0);
2621                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2622                         break;
2623
2624                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2625                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2626
2627                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2628                         var_to_reg_int(s2, src, REG_ITMP2);
2629                         M_CMPLE(s1, s2, REG_ITMP1);
2630                         M_BEQZ(REG_ITMP1, 0);
2631                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2632                         break;
2633
2634                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2635                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2636
2637                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2638                         var_to_reg_int(s2, src, REG_ITMP2);
2639                         M_CMPLE(s1, s2, REG_ITMP1);
2640                         M_BNEZ(REG_ITMP1, 0);
2641                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2642                         break;
2643
2644                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2645                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2646
2647                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2648                         var_to_reg_int(s2, src, REG_ITMP2);
2649                         M_CMPLT(s1, s2, REG_ITMP1);
2650                         M_BEQZ(REG_ITMP1, 0);
2651                         codegen_addreference(cd, BlockPtrOfPC(iptr->op1), mcodeptr);
2652                         break;
2653
2654                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2655
2656                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2657                         break;
2658
2659                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2660                                         /* val.i = constant                           */
2661
2662                         var_to_reg_int(s1, src, REG_ITMP1);
2663                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2664                         s3 = iptr->val.i;
2665                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2666                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2667                                         M_CMPEQ(s1, REG_ZERO, d);
2668                                         store_reg_to_var_int(iptr->dst, d);
2669                                         break;
2670                                         }
2671                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2672                                         M_CMPEQ(s1, REG_ZERO, d);
2673                                         M_XOR_IMM(d, 1, d);
2674                                         store_reg_to_var_int(iptr->dst, d);
2675                                         break;
2676                                         }
2677                                 if (s1 == d) {
2678                                         M_MOV(s1, REG_ITMP1);
2679                                         s1 = REG_ITMP1;
2680                                         }
2681                                 ICONST(d, iptr[1].val.i);
2682                                 }
2683                         if ((s3 >= 0) && (s3 <= 255)) {
2684                                 M_CMOVEQ_IMM(s1, s3, d);
2685                                 }
2686                         else {
2687                                 ICONST(REG_ITMP2, s3);
2688                                 M_CMOVEQ(s1, REG_ITMP2, d);
2689                                 }
2690                         store_reg_to_var_int(iptr->dst, d);
2691                         break;
2692
2693                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2694                                         /* val.i = constant                           */
2695
2696                         var_to_reg_int(s1, src, REG_ITMP1);
2697                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2698                         s3 = iptr->val.i;
2699                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2700                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2701                                         M_CMPEQ(s1, REG_ZERO, d);
2702                                         store_reg_to_var_int(iptr->dst, d);
2703                                         break;
2704                                         }
2705                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2706                                         M_CMPEQ(s1, REG_ZERO, d);
2707                                         M_XOR_IMM(d, 1, d);
2708                                         store_reg_to_var_int(iptr->dst, d);
2709                                         break;
2710                                         }
2711                                 if (s1 == d) {
2712                                         M_MOV(s1, REG_ITMP1);
2713                                         s1 = REG_ITMP1;
2714                                         }
2715                                 ICONST(d, iptr[1].val.i);
2716                                 }
2717                         if ((s3 >= 0) && (s3 <= 255)) {
2718                                 M_CMOVNE_IMM(s1, s3, d);
2719                                 }
2720                         else {
2721                                 ICONST(REG_ITMP2, s3);
2722                                 M_CMOVNE(s1, REG_ITMP2, d);
2723                                 }
2724                         store_reg_to_var_int(iptr->dst, d);
2725                         break;
2726
2727                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2728                                         /* val.i = constant                           */
2729
2730                         var_to_reg_int(s1, src, REG_ITMP1);
2731                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2732                         s3 = iptr->val.i;
2733                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2734                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2735                                         M_CMPLT(s1, REG_ZERO, d);
2736                                         store_reg_to_var_int(iptr->dst, d);
2737                                         break;
2738                                         }
2739                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2740                                         M_CMPLE(REG_ZERO, s1, d);
2741                                         store_reg_to_var_int(iptr->dst, d);
2742                                         break;
2743                                         }
2744                                 if (s1 == d) {
2745                                         M_MOV(s1, REG_ITMP1);
2746                                         s1 = REG_ITMP1;
2747                                         }
2748                                 ICONST(d, iptr[1].val.i);
2749                                 }
2750                         if ((s3 >= 0) && (s3 <= 255)) {
2751                                 M_CMOVLT_IMM(s1, s3, d);
2752                                 }
2753                         else {
2754                                 ICONST(REG_ITMP2, s3);
2755                                 M_CMOVLT(s1, REG_ITMP2, d);
2756                                 }
2757                         store_reg_to_var_int(iptr->dst, d);
2758                         break;
2759
2760                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2761                                         /* val.i = constant                           */
2762
2763                         var_to_reg_int(s1, src, REG_ITMP1);
2764                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2765                         s3 = iptr->val.i;
2766                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2767                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2768                                         M_CMPLE(REG_ZERO, s1, d);
2769                                         store_reg_to_var_int(iptr->dst, d);
2770                                         break;
2771                                         }
2772                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2773                                         M_CMPLT(s1, REG_ZERO, d);
2774                                         store_reg_to_var_int(iptr->dst, d);
2775                                         break;
2776                                         }
2777                                 if (s1 == d) {
2778                                         M_MOV(s1, REG_ITMP1);
2779                                         s1 = REG_ITMP1;
2780                                         }
2781                                 ICONST(d, iptr[1].val.i);
2782                                 }
2783                         if ((s3 >= 0) && (s3 <= 255)) {
2784                                 M_CMOVGE_IMM(s1, s3, d);
2785                                 }
2786                         else {
2787                                 ICONST(REG_ITMP2, s3);
2788                                 M_CMOVGE(s1, REG_ITMP2, d);
2789                                 }
2790                         store_reg_to_var_int(iptr->dst, d);
2791                         break;
2792
2793                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2794                                         /* val.i = constant                           */
2795
2796                         var_to_reg_int(s1, src, REG_ITMP1);
2797                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2798                         s3 = iptr->val.i;
2799                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2800                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2801                                         M_CMPLT(REG_ZERO, s1, d);
2802                                         store_reg_to_var_int(iptr->dst, d);
2803                                         break;
2804                                         }
2805                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2806                                         M_CMPLE(s1, REG_ZERO, d);
2807                                         store_reg_to_var_int(iptr->dst, d);
2808                                         break;
2809                                         }
2810                                 if (s1 == d) {
2811                                         M_MOV(s1, REG_ITMP1);
2812                                         s1 = REG_ITMP1;
2813                                         }
2814                                 ICONST(d, iptr[1].val.i);
2815                                 }
2816                         if ((s3 >= 0) && (s3 <= 255)) {
2817                                 M_CMOVGT_IMM(s1, s3, d);
2818                                 }
2819                         else {
2820                                 ICONST(REG_ITMP2, s3);
2821                                 M_CMOVGT(s1, REG_ITMP2, d);
2822                                 }
2823                         store_reg_to_var_int(iptr->dst, d);
2824                         break;
2825
2826                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2827                                         /* val.i = constant                           */
2828
2829                         var_to_reg_int(s1, src, REG_ITMP1);
2830                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2831                         s3 = iptr->val.i;
2832                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2833                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2834                                         M_CMPLE(s1, REG_ZERO, d);
2835                                         store_reg_to_var_int(iptr->dst, d);
2836                                         break;
2837                                         }
2838                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2839                                         M_CMPLT(REG_ZERO, s1, d);
2840                                         store_reg_to_var_int(iptr->dst, d);
2841                                         break;
2842                                         }
2843                                 if (s1 == d) {
2844                                         M_MOV(s1, REG_ITMP1);
2845                                         s1 = REG_ITMP1;
2846                                         }
2847                                 ICONST(d, iptr[1].val.i);
2848                                 }
2849                         if ((s3 >= 0) && (s3 <= 255)) {
2850                                 M_CMOVLE_IMM(s1, s3, d);
2851                                 }
2852                         else {
2853                                 ICONST(REG_ITMP2, s3);
2854                                 M_CMOVLE(s1, REG_ITMP2, d);
2855                                 }
2856                         store_reg_to_var_int(iptr->dst, d);
2857                         break;
2858
2859
2860                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2861                 case ICMD_LRETURN:
2862                 case ICMD_ARETURN:
2863
2864                         var_to_reg_int(s1, src, REG_RESULT);
2865                         M_INTMOVE(s1, REG_RESULT);
2866
2867 #if defined(USE_THREADS)
2868                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2869                                 s4 disp;
2870                                 a = dseg_addaddress(cd, (void *) (builtin_monitorexit));
2871                                 M_ALD(REG_PV, REG_PV, a);
2872                                 M_ALD(rd->argintregs[0], REG_SP, rd->maxmemuse * 8);
2873                                 M_LST(REG_RESULT, REG_SP, rd->maxmemuse * 8);
2874                                 M_JSR(REG_RA, REG_PV);
2875                                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
2876                                 M_LDA(REG_PV, REG_RA, disp);
2877                                 M_LLD(REG_RESULT, REG_SP, rd->maxmemuse * 8);
2878                         }
2879 #endif
2880
2881                         goto nowperformreturn;
2882
2883                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2884                 case ICMD_DRETURN:
2885
2886                         var_to_reg_flt(s1, src, REG_FRESULT);
2887                         M_FLTMOVE(s1, REG_FRESULT);
2888
2889 #if defined(USE_THREADS)
2890                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2891                                 s4 disp;
2892                                 a = dseg_addaddress(cd, (void *) (builtin_monitorexit));
2893                                 M_ALD(REG_PV, REG_PV, a);
2894                                 M_ALD(rd->argintregs[0], REG_SP, rd->maxmemuse * 8);
2895                                 M_DST(REG_FRESULT, REG_SP, rd->maxmemuse * 8);
2896                                 M_JSR(REG_RA, REG_PV);
2897                                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
2898                                 M_LDA(REG_PV, REG_RA, disp);
2899                                 M_DLD(REG_FRESULT, REG_SP, rd->maxmemuse * 8);
2900                         }
2901 #endif
2902
2903                         goto nowperformreturn;
2904
2905                 case ICMD_RETURN:      /* ...  ==> ...                                */
2906
2907 #if defined(USE_THREADS)
2908                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2909                                 s4 disp;
2910                                 a = dseg_addaddress(cd, (void *) (builtin_monitorexit));
2911                                 M_ALD(REG_PV, REG_PV, a);
2912                                 M_ALD(rd->argintregs[0], REG_SP, rd->maxmemuse * 8);
2913                                 M_JSR(REG_RA, REG_PV);
2914                                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
2915                                 M_LDA(REG_PV, REG_RA, disp);
2916                         }
2917 #endif
2918
2919 nowperformreturn:
2920                         {
2921                         s4 i, p;
2922
2923                         p = parentargs_base;
2924
2925                         /* restore return address                                         */
2926
2927                         if (!m->isleafmethod) {
2928                                 p--; M_LLD(REG_RA, REG_SP, p * 8);
2929                         }
2930
2931                         /* restore saved registers                                        */
2932
2933                         for (i = rd->savintregcnt - 1; i >= rd->maxsavintreguse; i--) {
2934                                 p--; M_LLD(rd->savintregs[i], REG_SP, p * 8);
2935                         }
2936                         for (i = rd->savfltregcnt - 1; i >= rd->maxsavfltreguse; i--) {
2937                                 p--; M_DLD(rd->savfltregs[i], REG_SP, p * 8);
2938                         }
2939
2940                         /* deallocate stack                                               */
2941
2942                         if (parentargs_base) {
2943                                 M_LDA(REG_SP, REG_SP, parentargs_base * 8);
2944                         }
2945
2946                         /* call trace function */
2947
2948                         if (runverbose) {
2949                                 M_LDA(REG_SP, REG_SP, -3 * 8);
2950                                 M_AST(REG_RA, REG_SP, 0 * 8);
2951                                 M_LST(REG_RESULT, REG_SP, 1 * 8);
2952                                 M_DST(REG_FRESULT, REG_SP, 2 * 8);
2953                                 a = dseg_addaddress(cd, m);
2954                                 M_ALD(rd->argintregs[0], REG_PV, a);
2955                                 M_MOV(REG_RESULT, rd->argintregs[1]);
2956                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[2]);
2957                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[3]);
2958                                 a = dseg_addaddress(cd, (void *) builtin_displaymethodstop);
2959                                 M_ALD(REG_PV, REG_PV, a);
2960                                 M_JSR(REG_RA, REG_PV);
2961                                 s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2962                                 if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
2963                                 else {
2964                                         s4 ml = -s1, mh = 0;
2965                                         while (ml < -32768) { ml += 65536; mh--; }
2966                                         M_LDA(REG_PV, REG_RA, ml);
2967                                         M_LDAH(REG_PV, REG_PV, mh);
2968                                 }
2969                                 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
2970                                 M_LLD(REG_RESULT, REG_SP, 1 * 8);
2971                                 M_ALD(REG_RA, REG_SP, 0 * 8);
2972                                 M_LDA(REG_SP, REG_SP, 3 * 8);
2973                         }
2974
2975                         M_RET(REG_ZERO, REG_RA);
2976                         ALIGNCODENOP;
2977                         }
2978                         break;
2979
2980
2981                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2982                         {
2983                         s4 i, l, *s4ptr;
2984                         void **tptr;
2985
2986                         tptr = (void **) iptr->target;
2987
2988                         s4ptr = iptr->val.a;
2989                         l = s4ptr[1];                          /* low     */
2990                         i = s4ptr[2];                          /* high    */
2991
2992                         var_to_reg_int(s1, src, REG_ITMP1);
2993                         if (l == 0)
2994                                 {M_INTMOVE(s1, REG_ITMP1);}
2995                         else if (l <= 32768) {
2996                                 M_LDA(REG_ITMP1, s1, -l);
2997                                 }
2998                         else {
2999                                 ICONST(REG_ITMP2, l);
3000                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3001                                 }
3002                         i = i - l + 1;
3003
3004                         /* range check */
3005
3006                         if (i <= 256)
3007                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3008                         else {
3009                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3010                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3011                                 }
3012                         M_BEQZ(REG_ITMP2, 0);
3013
3014
3015                         /* codegen_addreference(cd, BlockPtrOfPC(s4ptr[0]), mcodeptr); */
3016                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3017
3018                         /* build jump table top down and use address of lowest entry */
3019
3020                         /* s4ptr += 3 + i; */
3021                         tptr += i;
3022
3023                         while (--i >= 0) {
3024                                 /* dseg_addtarget(cd, BlockPtrOfPC(*--s4ptr)); */
3025                                 dseg_addtarget(cd, (basicblock *) tptr[0]);
3026                                 --tptr;
3027                                 }
3028                         }
3029
3030                         /* length of dataseg after last dseg_addtarget is used by load */
3031
3032                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3033                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
3034                         M_JMP(REG_ZERO, REG_ITMP2);
3035                         ALIGNCODENOP;
3036                         break;
3037
3038
3039                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3040                         {
3041                         s4 i, l, val, *s4ptr;
3042                         void **tptr;
3043
3044                         tptr = (void **) iptr->target;
3045
3046                         s4ptr = iptr->val.a;
3047                         l = s4ptr[0];                          /* default  */
3048                         i = s4ptr[1];                          /* count    */
3049
3050                         MCODECHECK((i<<2)+8);
3051                         var_to_reg_int(s1, src, REG_ITMP1);
3052                         while (--i >= 0) {
3053                                 s4ptr += 2;
3054                                 ++tptr;
3055
3056                                 val = s4ptr[0];
3057                                 if ((val >= 0) && (val <= 255)) {
3058                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
3059                                         }
3060                                 else {
3061                                         if ((val >= -32768) && (val <= 32767)) {
3062                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
3063                                                 }
3064                                         else {
3065                                                 a = dseg_adds4(cd, val);
3066                                                 M_ILD(REG_ITMP2, REG_PV, a);
3067                                                 }
3068                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3069                                         }
3070                                 M_BNEZ(REG_ITMP2, 0);
3071                                 /* codegen_addreference(cd, BlockPtrOfPC(s4ptr[1]), mcodeptr); */
3072                                 codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3073                                 }
3074
3075                         M_BR(0);
3076                         /* codegen_addreference(cd, BlockPtrOfPC(l), mcodeptr); */
3077
3078                         tptr = (void **) iptr->target;
3079                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3080
3081                         ALIGNCODENOP;
3082                         break;
3083                         }
3084
3085
3086                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
3087                                         /* op1 = return type, val.a = function pointer*/
3088                         s3 = 3;
3089                         goto gen_method;
3090
3091                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
3092                                         /* op1 = return type, val.a = function pointer*/
3093                         s3 = 2;
3094                         goto gen_method;
3095
3096                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
3097                                         /* op1 = return type, val.a = function pointer*/
3098                         s3 = 1;
3099                         goto gen_method;
3100
3101                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3102                                         /* op1 = arg count, val.a = method pointer    */
3103
3104                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3105                                         /* op1 = arg count, val.a = method pointer    */
3106
3107                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3108                                         /* op1 = arg count, val.a = method pointer    */
3109
3110                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
3111                                         /* op1 = arg count, val.a = method pointer    */
3112
3113                         s3 = iptr->op1;
3114
3115 gen_method: {
3116                         methodinfo *lm;
3117
3118                         MCODECHECK((s3 << 1) + 64);
3119
3120                         /* copy arguments to registers or stack location                  */
3121
3122                         for (; --s3 >= 0; src = src->prev) {
3123                                 if (src->varkind == ARGVAR)
3124                                         continue;
3125                                 if (IS_INT_LNG_TYPE(src->type)) {
3126                                         if (s3 < INT_ARG_CNT) {
3127                                                 s1 = rd->argintregs[s3];
3128                                                 var_to_reg_int(d, src, s1);
3129                                                 M_INTMOVE(d, s1);
3130
3131                                         } else {
3132                                                 var_to_reg_int(d, src, REG_ITMP1);
3133                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
3134                                         }
3135
3136                                 } else {
3137                                         if (s3 < FLT_ARG_CNT) {
3138                                                 s1 = rd->argfltregs[s3];
3139                                                 var_to_reg_flt(d, src, s1);
3140                                                 M_FLTMOVE(d, s1);
3141
3142                                         } else {
3143                                                 var_to_reg_flt(d, src, REG_FTMP1);
3144                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
3145                                         }
3146                                 }
3147                         } /* end of for */
3148
3149                         lm = iptr->val.a;
3150                         switch (iptr->opc) {
3151                         case ICMD_BUILTIN3:
3152                         case ICMD_BUILTIN2:
3153                         case ICMD_BUILTIN1:
3154                                 a = dseg_addaddress(cd, (void *) lm);
3155                                 d = iptr->op1;
3156
3157                                 M_ALD(REG_PV, REG_PV, a);     /* Pointer to built-in-function */
3158                                 break;
3159
3160                         case ICMD_INVOKESTATIC:
3161                         case ICMD_INVOKESPECIAL:
3162                                 a = dseg_addaddress(cd, lm->stubroutine);
3163                                 d = lm->returntype;
3164
3165                                 M_ALD(REG_PV, REG_PV, a);            /* method pointer in r27 */
3166                                 break;
3167
3168                         case ICMD_INVOKEVIRTUAL:
3169                                 d = lm->returntype;
3170
3171                                 gen_nullptr_check(rd->argintregs[0]);
3172                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
3173                                           OFFSET(java_objectheader, vftbl));
3174                                 M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl_t, table[0]) +
3175                                           sizeof(methodptr) * lm->vftblindex);
3176                                 break;
3177
3178                         case ICMD_INVOKEINTERFACE:
3179                                 d = lm->returntype;
3180
3181                                 gen_nullptr_check(rd->argintregs[0]);
3182                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
3183                                           OFFSET(java_objectheader, vftbl));
3184                                 M_ALD(REG_METHODPTR, REG_METHODPTR,
3185                                           OFFSET(vftbl_t, interfacetable[0]) -
3186                                           sizeof(methodptr*) * lm->class->index);
3187                                 M_ALD(REG_PV, REG_METHODPTR,
3188                                           sizeof(methodptr) * (lm - lm->class->methods));
3189                                 break;
3190                         }
3191
3192                         M_JSR(REG_RA, REG_PV);
3193
3194                         /* recompute pv */
3195
3196                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3197                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3198                         else {
3199                                 s4 ml = -s1, mh = 0;
3200                                 while (ml < -32768) { ml += 65536; mh--; }
3201                                 M_LDA(REG_PV, REG_RA, ml);
3202                                 M_LDAH(REG_PV, REG_PV, mh);
3203                         }
3204
3205                         /* d contains return type */
3206
3207                         if (d != TYPE_VOID) {
3208                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3209                                         s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
3210                                         M_INTMOVE(REG_RESULT, s1);
3211                                         store_reg_to_var_int(iptr->dst, s1);
3212
3213                                 } else {
3214                                         s1 = reg_of_var(rd, iptr->dst, REG_FRESULT);
3215                                         M_FLTMOVE(REG_FRESULT, s1);
3216                                         store_reg_to_var_flt(iptr->dst, s1);
3217                                 }
3218                         }
3219                         }
3220                         break;
3221
3222
3223                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3224
3225                                       /* op1:   0 == array, 1 == class                */
3226                                       /* val.a: (classinfo*) superclass               */
3227
3228 /*          superclass is an interface:
3229  *
3230  *          return (sub != NULL) &&
3231  *                 (sub->vftbl->interfacetablelength > super->index) &&
3232  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
3233  *
3234  *          superclass is a class:
3235  *
3236  *          return ((sub != NULL) && (0
3237  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3238  *                  super->vftbl->diffvall));
3239  */
3240
3241                         {
3242                         classinfo *super = (classinfo*) iptr->val.a;
3243
3244 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3245                         codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
3246 #endif
3247                         var_to_reg_int(s1, src, REG_ITMP1);
3248                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
3249                         if (s1 == d) {
3250                                 M_MOV(s1, REG_ITMP1);
3251                                 s1 = REG_ITMP1;
3252                                 }
3253                         M_CLR(d);
3254                         if (iptr->op1) {                               /* class/interface */
3255                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3256                                         M_BEQZ(s1, 6);
3257                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3258                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3259                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3260                                         M_BLEZ(REG_ITMP2, 2);
3261                                         M_ALD(REG_ITMP1, REG_ITMP1,
3262                                               OFFSET(vftbl_t, interfacetable[0]) -
3263                                               super->index * sizeof(methodptr*));
3264                                         M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3265                                         }
3266                                 else {                                     /* class           */
3267 /*
3268                                         s2 = super->vftbl->diffval;
3269                                         M_BEQZ(s1, 4 + (s2 > 255));
3270                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3271                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3272                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3273                                         if (s2 <= 255)
3274                                                 M_CMPULE_IMM(REG_ITMP1, s2, d);
3275                                         else {
3276                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3277                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3278                                                 }
3279 */
3280                                         M_BEQZ(s1, 7);
3281                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3282                                         a = dseg_addaddress(cd, (void*) super->vftbl);
3283                                         M_ALD(REG_ITMP2, REG_PV, a);
3284 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3285                                         codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3286 #endif
3287                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3288                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3289                                         M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3290 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3291                                         codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3292 #endif
3293                                         M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3294                                         M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3295                                         }
3296                                 }
3297                         else
3298                                 panic ("internal error: no inlined array instanceof");
3299                         }
3300                         store_reg_to_var_int(iptr->dst, d);
3301                         break;
3302
3303                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3304
3305                                       /* op1:   0 == array, 1 == class                */
3306                                       /* val.a: (classinfo*) superclass               */
3307
3308 /*          superclass is an interface:
3309  *
3310  *          OK if ((sub == NULL) ||
3311  *                 (sub->vftbl->interfacetablelength > super->index) &&
3312  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3313  *
3314  *          superclass is a class:
3315  *
3316  *          OK if ((sub == NULL) || (0
3317  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3318  *                 super->vftbl->diffvall));
3319  */
3320
3321                         {
3322                         classinfo *super = (classinfo *) iptr->val.a;
3323
3324 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3325                         codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
3326 #endif
3327                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
3328                         var_to_reg_int(s1, src, d);
3329                         if (iptr->op1) {                               /* class/interface */
3330                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3331                                         M_BEQZ(s1, 6);
3332                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3333                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3334                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3335                                         M_BLEZ(REG_ITMP2, 0);
3336                                         codegen_addxcastrefs(cd, mcodeptr);
3337                                         M_ALD(REG_ITMP2, REG_ITMP1,
3338                                               OFFSET(vftbl_t, interfacetable[0]) -
3339                                               super->index * sizeof(methodptr*));
3340                                         M_BEQZ(REG_ITMP2, 0);
3341                                         codegen_addxcastrefs(cd, mcodeptr);
3342                                         }
3343                                 else {                                     /* class           */
3344 /*
3345                                         s2 = super->vftbl->diffval;
3346                                         M_BEQZ(s1, 4 + (s2 != 0) + (s2 > 255));
3347                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3348                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3349                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3350                                         if (s2 == 0) {
3351                                                 M_BNEZ(REG_ITMP1, 0);
3352                                                 }
3353                                         else if (s2 <= 255) {
3354                                                 M_CMPULE_IMM(REG_ITMP1, s2, REG_ITMP2);
3355                                                 M_BEQZ(REG_ITMP2, 0);
3356                                                 }
3357                                         else {
3358                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3359                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3360                                                 M_BEQZ(REG_ITMP2, 0);
3361                                                 }
3362 */
3363                                         M_BEQZ(s1, 8 + (d == REG_ITMP3));
3364                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3365                                         a = dseg_addaddress(cd, (void *) super->vftbl);
3366                                         M_ALD(REG_ITMP2, REG_PV, a);
3367 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3368                                         codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3369 #endif
3370                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3371                                         if (d != REG_ITMP3) {
3372                                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3373                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3374 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3375                                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3376 #endif
3377                                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3378                                                 }
3379                                         else {
3380                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3381                                                 M_ISUB(REG_ITMP1, REG_ITMP2, REG_ITMP1);
3382                                                 M_ALD(REG_ITMP2, REG_PV, a);
3383                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3384 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3385                                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3386 #endif
3387                                                 }
3388                                         M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3389                                         M_BEQZ(REG_ITMP2, 0);
3390                                         codegen_addxcastrefs(cd, mcodeptr);
3391                                         }
3392                                 }
3393                         else
3394                                 panic ("internal error: no inlined array checkcast");
3395                         }
3396                         M_INTMOVE(s1, d);
3397                         store_reg_to_var_int(iptr->dst, d);
3398                         break;
3399
3400                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3401
3402                         var_to_reg_int(s1, src, REG_ITMP1);
3403                         M_BLTZ(s1, 0);
3404                         codegen_addxcheckarefs(cd, mcodeptr);
3405                         break;
3406
3407                 case ICMD_CHECKEXCEPTION:    /* ... ==> ...                           */
3408
3409                         M_BEQZ(REG_RESULT, 0);
3410                         codegen_addxexceptionrefs(cd, mcodeptr);
3411                         break;
3412
3413                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3414                                       /* op1 = dimension, val.a = array descriptor    */
3415
3416                         /* check for negative sizes and copy sizes to stack if necessary  */
3417
3418                         MCODECHECK((iptr->op1 << 1) + 64);
3419
3420                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3421                                 var_to_reg_int(s2, src, REG_ITMP1);
3422                                 M_BLTZ(s2, 0);
3423                                 codegen_addxcheckarefs(cd, mcodeptr);
3424
3425                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3426
3427                                 if (src->varkind != ARGVAR) {
3428                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3429                                 }
3430                         }
3431
3432                         /* a0 = dimension count */
3433
3434                         ICONST(rd->argintregs[0], iptr->op1);
3435
3436                         /* a1 = arraydescriptor */
3437
3438                         a = dseg_addaddress(cd, iptr->val.a);
3439                         M_ALD(rd->argintregs[1], REG_PV, a);
3440
3441                         /* a2 = pointer to dimensions = stack pointer */
3442
3443                         M_INTMOVE(REG_SP, rd->argintregs[2]);
3444
3445                         a = dseg_addaddress(cd, (void *) builtin_nmultianewarray);
3446                         M_ALD(REG_PV, REG_PV, a);
3447                         M_JSR(REG_RA, REG_PV);
3448                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3449                         if (s1 <= 32768)
3450                                 M_LDA(REG_PV, REG_RA, -s1);
3451                         else {
3452                                 s4 ml = -s1, mh = 0;
3453                                 while (ml < -32768) { ml += 65536; mh--; }
3454                                 M_LDA(REG_PV, REG_RA, ml);
3455                                 M_LDAH(REG_PV, REG_PV, mh);
3456                         }
3457                         s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
3458                         M_INTMOVE(REG_RESULT, s1);
3459                         store_reg_to_var_int(iptr->dst, s1);
3460                         break;
3461
3462                 case ICMD_INLINE_START:
3463                 case ICMD_INLINE_END:
3464                         break;
3465
3466                 default: error ("Unknown pseudo command: %d", iptr->opc);
3467
3468
3469
3470         } /* switch */
3471
3472         } /* for instruction */
3473
3474         /* copy values to interface registers */
3475
3476         src = bptr->outstack;
3477         len = bptr->outdepth;
3478         MCODECHECK(64+len);
3479         if (!opt_lsra)
3480         while (src) {
3481                 len--;
3482                 if ((src->varkind != STACKVAR)) {
3483                         s2 = src->type;
3484                         if (IS_FLT_DBL_TYPE(s2)) {
3485                                 var_to_reg_flt(s1, src, REG_FTMP1);
3486                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3487                                         M_FLTMOVE(s1,rd->interfaces[len][s2].regoff);
3488                                         }
3489                                 else {
3490                                         M_DST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3491                                         }
3492                                 }
3493                         else {
3494                                 var_to_reg_int(s1, src, REG_ITMP1);
3495                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3496                                         M_INTMOVE(s1,rd->interfaces[len][s2].regoff);
3497                                         }
3498                                 else {
3499                                         M_LST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3500                                         }
3501                                 }
3502                         }
3503                 src = src->prev;
3504                 }
3505         } /* if (bptr -> flags >= BBREACHED) */
3506         } /* for basic block */
3507
3508         {
3509         /* generate bound check stubs */
3510
3511         s4 *xcodeptr = NULL;
3512         branchref *bref;
3513
3514         for (bref = cd->xboundrefs; bref != NULL; bref = bref->next) {
3515                 gen_resolvebranch((u1*) cd->mcodebase + bref->branchpos,
3516                                   bref->branchpos,
3517                                                   (u1*) mcodeptr - cd->mcodebase);
3518
3519                 MCODECHECK(8);
3520
3521                 /* move index register into REG_ITMP1 */
3522                 M_MOV(bref->reg, REG_ITMP1);
3523                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3524
3525                 if (xcodeptr != NULL) {
3526                         M_BR(xcodeptr - mcodeptr - 1);
3527
3528                 } else {
3529                         xcodeptr = mcodeptr;
3530
3531                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3532                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3533
3534                         a = dseg_addaddress(cd, string_java_lang_ArrayIndexOutOfBoundsException);
3535                         M_ALD(rd->argintregs[0], REG_PV, a);
3536                         M_MOV(REG_ITMP1, rd->argintregs[1]);
3537
3538                         a = dseg_addaddress(cd, new_exception_int);
3539                         M_ALD(REG_PV, REG_PV, a);
3540                         M_JSR(REG_RA, REG_PV);
3541
3542                         /* recompute pv */
3543                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3544                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3545                         else {
3546                                 s4 ml = -s1, mh = 0;
3547                                 while (ml < -32768) { ml += 65536; mh--; }
3548                                 M_LDA(REG_PV, REG_RA, ml);
3549                                 M_LDAH(REG_PV, REG_PV, mh);
3550                         }
3551
3552                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3553
3554                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3555                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3556
3557                         a = dseg_addaddress(cd, asm_handle_exception);
3558                         M_ALD(REG_ITMP3, REG_PV, a);
3559
3560                         M_JMP(REG_ZERO, REG_ITMP3);
3561                 }
3562         }
3563
3564         /* generate negative array size check stubs */
3565
3566         xcodeptr = NULL;
3567
3568         for (bref = cd->xcheckarefs; bref != NULL; bref = bref->next) {
3569                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3570                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3571                                                           bref->branchpos,
3572                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3573                         continue;
3574                 }
3575
3576                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3577                                   bref->branchpos,
3578                                                   (u1 *) mcodeptr - cd->mcodebase);
3579
3580                 MCODECHECK(8);
3581
3582                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3583
3584                 if (xcodeptr != NULL) {
3585                         M_BR(xcodeptr - mcodeptr - 1);
3586
3587                 } else {
3588                         xcodeptr = mcodeptr;
3589
3590                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3591                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3592
3593                         a = dseg_addaddress(cd, string_java_lang_NegativeArraySizeException);
3594                         M_ALD(rd->argintregs[0], REG_PV, a);
3595
3596                         a = dseg_addaddress(cd, new_exception);
3597                         M_ALD(REG_PV, REG_PV, a);
3598                         M_JSR(REG_RA, REG_PV);
3599
3600                         /* recompute pv */
3601                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3602                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3603                         else {
3604                                 s4 ml = -s1, mh = 0;
3605                                 while (ml < -32768) { ml += 65536; mh--; }
3606                                 M_LDA(REG_PV, REG_RA, ml);
3607                                 M_LDAH(REG_PV, REG_PV, mh);
3608                         }
3609
3610                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3611
3612                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3613                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3614
3615                         a = dseg_addaddress(cd, asm_handle_exception);
3616                         M_ALD(REG_ITMP3, REG_PV, a);
3617
3618                         M_JMP(REG_ZERO, REG_ITMP3);
3619                 }
3620         }
3621
3622         /* generate cast check stubs */
3623
3624         xcodeptr = NULL;
3625
3626         for (bref = cd->xcastrefs; bref != NULL; bref = bref->next) {
3627                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3628                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3629                                                           bref->branchpos,
3630                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3631                         continue;
3632                 }
3633
3634                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3635                                   bref->branchpos,
3636                                                   (u1 *) mcodeptr - cd->mcodebase);
3637
3638                 MCODECHECK(8);
3639
3640                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3641
3642                 if (xcodeptr != NULL) {
3643                         M_BR(xcodeptr - mcodeptr - 1);
3644
3645                 } else {
3646                         xcodeptr = mcodeptr;
3647
3648                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3649                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3650
3651                         a = dseg_addaddress(cd, string_java_lang_ClassCastException);
3652                         M_ALD(rd->argintregs[0], REG_PV, a);
3653
3654                         a = dseg_addaddress(cd, new_exception);
3655                         M_ALD(REG_PV, REG_PV, a);
3656                         M_JSR(REG_RA, REG_PV);
3657
3658                         /* recompute pv */
3659                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3660                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3661                         else {
3662                                 s4 ml = -s1, mh = 0;
3663                                 while (ml < -32768) { ml += 65536; mh--; }
3664                                 M_LDA(REG_PV, REG_RA, ml);
3665                                 M_LDAH(REG_PV, REG_PV, mh);
3666                         }
3667
3668                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3669
3670                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3671                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3672
3673                         a = dseg_addaddress(cd, asm_handle_exception);
3674                         M_ALD(REG_ITMP3, REG_PV, a);
3675
3676                         M_JMP(REG_ZERO, REG_ITMP3);
3677                 }
3678         }
3679
3680         /* generate exception check stubs */
3681
3682         xcodeptr = NULL;
3683
3684         for (bref = cd->xexceptionrefs; bref != NULL; bref = bref->next) {
3685                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3686                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3687                                                           bref->branchpos,
3688                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3689                         continue;
3690                 }
3691
3692                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3693                                   bref->branchpos,
3694                                                   (u1 *) mcodeptr - cd->mcodebase);
3695
3696                 MCODECHECK(8);
3697
3698                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3699
3700                 if (xcodeptr != NULL) {
3701                         M_BR(xcodeptr - mcodeptr - 1);
3702
3703                 } else {
3704                         xcodeptr = mcodeptr;
3705
3706 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3707                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3708                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3709
3710                         a = dseg_addaddress(cd, &builtin_get_exceptionptrptr);
3711                         M_ALD(REG_PV, REG_PV, a);
3712                         M_JSR(REG_RA, REG_PV);
3713
3714                         /* recompute pv */
3715                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3716                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3717                         else {
3718                                 s4 ml = -s1, mh = 0;
3719                                 while (ml < -32768) { ml += 65536; mh--; }
3720                                 M_LDA(REG_PV, REG_RA, ml);
3721                                 M_LDAH(REG_PV, REG_PV, mh);
3722                         }
3723
3724                         M_ALD(REG_ITMP1_XPTR, REG_RESULT, 0);
3725                         M_AST(REG_ZERO, REG_RESULT, 0);
3726
3727                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3728                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3729 #else
3730                         a = dseg_addaddress(cd, &_exceptionptr);
3731                         M_ALD(REG_ITMP3, REG_PV, a);
3732                         M_ALD(REG_ITMP1_XPTR, REG_ITMP3, 0);
3733                         M_AST(REG_ZERO, REG_ITMP3, 0);
3734 #endif
3735
3736                         a = dseg_addaddress(cd, asm_handle_exception);
3737                         M_ALD(REG_ITMP3, REG_PV, a);
3738
3739                         M_JMP(REG_ZERO, REG_ITMP3);
3740                 }
3741         }
3742
3743         /* generate null pointer check stubs */
3744
3745         xcodeptr = NULL;
3746
3747         for (bref = cd->xnullrefs; bref != NULL; bref = bref->next) {
3748                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3749                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3750                                                           bref->branchpos,
3751                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3752                         continue;
3753                 }
3754
3755                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3756                                   bref->branchpos,
3757                                                   (u1 *) mcodeptr - cd->mcodebase);
3758
3759                 MCODECHECK(8);
3760
3761                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3762
3763                 if (xcodeptr != NULL) {
3764                         M_BR(xcodeptr - mcodeptr - 1);
3765
3766                 } else {
3767                         xcodeptr = mcodeptr;
3768
3769                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3770                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3771
3772                         a = dseg_addaddress(cd, string_java_lang_NullPointerException);
3773                         M_ALD(rd->argintregs[0], REG_PV, a);
3774
3775                         a = dseg_addaddress(cd, new_exception);
3776                         M_ALD(REG_PV, REG_PV, a);
3777                         M_JSR(REG_RA, REG_PV);
3778
3779                         /* recompute pv */
3780                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3781                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3782                         else {
3783                                 s4 ml = -s1, mh = 0;
3784                                 while (ml < -32768) { ml += 65536; mh--; }
3785                                 M_LDA(REG_PV, REG_RA, ml);
3786                                 M_LDAH(REG_PV, REG_PV, mh);
3787                         }
3788
3789                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3790
3791                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3792                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3793
3794                         a = dseg_addaddress(cd, asm_handle_exception);
3795                         M_ALD(REG_ITMP3, REG_PV, a);
3796
3797                         M_JMP(REG_ZERO, REG_ITMP3);
3798                 }
3799         }
3800
3801         /* generate put/getstatic stub call code */
3802
3803         {
3804                 clinitref   *cref;
3805                 u4           mcode;
3806                 s4          *tmpmcodeptr;
3807
3808                 for (cref = cd->clinitrefs; cref != NULL; cref = cref->next) {
3809                         /* Get machine code which is patched back in later. The call is   */
3810                         /* 1 instruction word long.                                       */
3811                         xcodeptr = cd->mcodebase + cref->branchpos;
3812                         mcode = *xcodeptr;
3813
3814                         /* patch in the call to call the following code (done at compile  */
3815                         /* time)                                                          */
3816
3817                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
3818                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
3819
3820                         M_BSR(REG_RA, tmpmcodeptr - (xcodeptr + 1));
3821
3822                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
3823
3824                         MCODECHECK(6);
3825
3826                         /* move class pointer into REG_ITMP2                              */
3827                         a = dseg_addaddress(cd, cref->class);
3828                         M_ALD(REG_ITMP1, REG_PV, a);
3829
3830                         /* move machine code onto stack                                   */
3831                         a = dseg_adds4(cd, mcode);
3832                         M_ILD(REG_ITMP3, REG_PV, a);
3833                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3834                         M_IST(REG_ITMP3, REG_SP, 0);
3835
3836                         a = dseg_addaddress(cd, asm_check_clinit);
3837                         M_ALD(REG_ITMP2, REG_PV, a);
3838                         M_JMP(REG_ZERO, REG_ITMP2);
3839                 }
3840         }
3841         }
3842
3843         codegen_finish(m, cd, (s4) ((u1 *) mcodeptr - cd->mcodebase));
3844 }
3845
3846
3847 /* function createcompilerstub *************************************************
3848
3849         creates a stub routine which calls the compiler
3850
3851 *******************************************************************************/
3852
3853 #define COMPSTUBSIZE    3
3854
3855 u1 *createcompilerstub(methodinfo *m)
3856 {
3857         u8 *s = CNEW(u8, COMPSTUBSIZE);     /* memory to hold the stub            */
3858         s4 *mcodeptr = (s4 *) s;            /* code generation pointer            */
3859
3860                                             /* code for the stub                  */
3861         M_ALD(REG_PV, REG_PV, 16);          /* load pointer to the compiler       */
3862         M_JMP(0, REG_PV);                   /* jump to the compiler, return address
3863                                                in reg 0 is used as method pointer */
3864         s[1] = (u8) m;                      /* literals to be adressed            */
3865         s[2] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
3866
3867 #if defined(STATISTICS)
3868         if (opt_stat)
3869                 count_cstub_len += COMPSTUBSIZE * 8;
3870 #endif
3871
3872         return (u1 *) s;
3873 }
3874
3875
3876 /* function removecompilerstub *************************************************
3877
3878      deletes a compilerstub from memory  (simply by freeing it)
3879
3880 *******************************************************************************/
3881
3882 void removecompilerstub(u1 *stub)
3883 {
3884         CFREE(stub, COMPSTUBSIZE * 8);
3885 }
3886
3887
3888 /* function: createnativestub **************************************************
3889
3890         creates a stub routine which calls a native method
3891
3892 *******************************************************************************/
3893
3894 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3895 #define NATIVESTUB_STACK           2
3896 #define NATIVESTUB_THREAD_EXTRA    6
3897 #else
3898 #define NATIVESTUB_STACK           1
3899 #define NATIVESTUB_THREAD_EXTRA    1
3900 #endif
3901
3902 #define NATIVESTUB_SIZE            (44 + NATIVESTUB_THREAD_EXTRA - 1)
3903 #define NATIVESTUB_STATIC_SIZE     4
3904 #define NATIVESTUB_VERBOSE_SIZE    (39 + 13)
3905 #define NATIVESTUB_OFFSET          10
3906
3907 u1 *createnativestub(functionptr f, methodinfo *m)
3908 {
3909         u8 *s;                              /* memory pointer to hold the stub    */
3910         u8 *cs;
3911         s4 *mcodeptr;                       /* code generation pointer            */
3912         s4 stackframesize = 0;              /* size of stackframe if needed       */
3913         s4 disp;
3914         s4 stubsize;
3915         codegendata  *cd;
3916         registerdata *rd;
3917         t_inlining_globals *id;
3918         s4 dumpsize;
3919
3920         /* mark start of dump memory area */
3921
3922         dumpsize = dump_size();
3923
3924         /* setup registers before using it */
3925
3926         cd = DNEW(codegendata);
3927         rd = DNEW(registerdata);
3928         id = DNEW(t_inlining_globals);
3929
3930         inlining_setup(m, id);
3931         reg_setup(m, rd, id);
3932
3933         descriptor2types(m);                /* set paramcount and paramtypes      */
3934
3935         stubsize = NATIVESTUB_SIZE;         /* calculate nativestub size          */
3936
3937         if ((m->flags & ACC_STATIC) && !m->class->initialized)
3938                 stubsize += NATIVESTUB_STATIC_SIZE;
3939
3940         if (runverbose)
3941                 stubsize += NATIVESTUB_VERBOSE_SIZE;
3942
3943         s = CNEW(u8, stubsize);             /* memory to hold the stub            */
3944         cs = s + NATIVESTUB_OFFSET;
3945         mcodeptr = (s4 *) cs;               /* code generation pointer            */
3946
3947         /* set some required varibles which are normally set by codegen_setup     */
3948         cd->mcodebase = mcodeptr;
3949         cd->clinitrefs = NULL;
3950
3951         *(cs-1)  = (u8) f;                  /* address of native method           */
3952 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3953         *(cs-2)  = (u8) &builtin_get_exceptionptrptr;
3954 #else
3955         *(cs-2)  = (u8) (&_exceptionptr);   /* address of exceptionptr            */
3956 #endif
3957         *(cs-3)  = (u8) asm_handle_nat_exception; /* addr of asm exception handler*/
3958         *(cs-4)  = (u8) (&env);             /* addr of jni_environement           */
3959         *(cs-5)  = (u8) builtin_trace_args;
3960         *(cs-6)  = (u8) m;
3961         *(cs-7)  = (u8) builtin_displaymethodstop;
3962         *(cs-8)  = (u8) m->class;
3963         *(cs-9)  = (u8) asm_check_clinit;
3964         *(cs-10) = (u8) NULL;               /* filled with machine code           */
3965
3966         M_LDA(REG_SP, REG_SP, -NATIVESTUB_STACK * 8);     /* build up stackframe  */
3967         M_AST(REG_RA, REG_SP, 0 * 8);       /* store return address               */
3968
3969         /* if function is static, check for initialized */
3970
3971         if (m->flags & ACC_STATIC) {
3972         /* if class isn't yet initialized, do it */
3973                 if (!m->class->initialized) {
3974                         codegen_addclinitref(cd, mcodeptr, m->class);
3975                 }
3976         }
3977
3978         /* max. 39 instructions */
3979         if (runverbose) {
3980                 s4 p;
3981                 s4 t;
3982                 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
3983                 M_AST(REG_RA, REG_SP, 1 * 8);
3984
3985                 /* save integer argument registers */
3986                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
3987                         M_LST(rd->argintregs[p], REG_SP, (2 + p) * 8);
3988                 }
3989
3990                 /* save and copy float arguments into integer registers */
3991                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
3992                         t = m->paramtypes[p];
3993
3994                         if (IS_FLT_DBL_TYPE(t)) {
3995                                 if (IS_2_WORD_TYPE(t)) {
3996                                         M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
3997                                         M_LLD(rd->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
3998
3999                                 } else {
4000                                         M_FST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4001                                         M_ILD(rd->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4002                                 }
4003
4004                         } else {
4005                                 M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4006                         }
4007                 }
4008
4009                 M_ALD(REG_ITMP1, REG_PV, -6 * 8);
4010                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
4011                 M_ALD(REG_PV, REG_PV, -5 * 8);
4012                 M_JSR(REG_RA, REG_PV);
4013                 disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4014                 M_LDA(REG_PV, REG_RA, disp);
4015
4016                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
4017                         M_LLD(rd->argintregs[p], REG_SP, (2 + p) * 8);
4018                 }
4019
4020                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
4021                         t = m->paramtypes[p];
4022
4023                         if (IS_FLT_DBL_TYPE(t)) {
4024                                 if (IS_2_WORD_TYPE(t)) {
4025                                         M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4026
4027                                 } else {
4028                                         M_FLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4029                                 }
4030
4031                         } else {
4032                                 M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4033                         }
4034                 }
4035
4036                 M_ALD(REG_RA, REG_SP, 1 * 8);
4037                 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
4038         }
4039
4040         /* save argument registers on stack -- if we have to */
4041         if ((m->flags & ACC_STATIC && m->paramcount > (INT_ARG_CNT - 2)) || m->paramcount > (INT_ARG_CNT - 1)) {
4042                 s4 i;
4043                 s4 paramshiftcnt = (m->flags & ACC_STATIC) ? 2 : 1;
4044                 s4 stackparamcnt = (m->paramcount > INT_ARG_CNT) ? m->paramcount - INT_ARG_CNT : 0;
4045
4046                 stackframesize = stackparamcnt + paramshiftcnt;
4047
4048                 M_LDA(REG_SP, REG_SP, -stackframesize * 8);
4049
4050                 /* copy stack arguments into new stack frame -- if any */
4051                 for (i = 0; i < stackparamcnt; i++) {
4052                         M_LLD(REG_ITMP1, REG_SP, (stackparamcnt + 1 + i) * 8);
4053                         M_LST(REG_ITMP1, REG_SP, (paramshiftcnt + i) * 8);
4054                 }
4055
4056                 if (m->flags & ACC_STATIC) {
4057                         if (IS_FLT_DBL_TYPE(m->paramtypes[5])) {
4058                                 M_DST(rd->argfltregs[5], REG_SP, 1 * 8);
4059                         } else {
4060                                 M_LST(rd->argintregs[5], REG_SP, 1 * 8);
4061                         }
4062
4063                         if (IS_FLT_DBL_TYPE(m->paramtypes[4])) {
4064                                 M_DST(rd->argfltregs[4], REG_SP, 0 * 8);
4065                         } else {
4066                                 M_LST(rd->argintregs[4], REG_SP, 0 * 8);
4067                         }
4068
4069                 } else {
4070                         if (IS_FLT_DBL_TYPE(m->paramtypes[5])) {
4071                                 M_DST(rd->argfltregs[5], REG_SP, 0 * 8);
4072                         } else {
4073                                 M_LST(rd->argintregs[5], REG_SP, 0 * 8);
4074                         }
4075                 }
4076         }
4077
4078         if (m->flags & ACC_STATIC) {
4079                 M_MOV(rd->argintregs[3], rd->argintregs[5]);
4080                 M_MOV(rd->argintregs[2], rd->argintregs[4]);
4081                 M_MOV(rd->argintregs[1], rd->argintregs[3]);
4082                 M_MOV(rd->argintregs[0], rd->argintregs[2]);
4083                 M_FMOV(rd->argfltregs[3], rd->argfltregs[5]);
4084                 M_FMOV(rd->argfltregs[2], rd->argfltregs[4]);
4085                 M_FMOV(rd->argfltregs[1], rd->argfltregs[3]);
4086                 M_FMOV(rd->argfltregs[0], rd->argfltregs[2]);
4087
4088                 /* put class into second argument register */
4089                 M_ALD(rd->argintregs[1], REG_PV, -8 * 8);
4090
4091         } else {
4092                 M_MOV(rd->argintregs[4], rd->argintregs[5]);
4093                 M_MOV(rd->argintregs[3], rd->argintregs[4]);
4094                 M_MOV(rd->argintregs[2], rd->argintregs[3]);
4095                 M_MOV(rd->argintregs[1], rd->argintregs[2]);
4096                 M_MOV(rd->argintregs[0], rd->argintregs[1]);
4097                 M_FMOV(rd->argfltregs[4], rd->argfltregs[5]);
4098                 M_FMOV(rd->argfltregs[3], rd->argfltregs[4]);
4099                 M_FMOV(rd->argfltregs[2], rd->argfltregs[3]);
4100                 M_FMOV(rd->argfltregs[1], rd->argfltregs[2]);
4101                 M_FMOV(rd->argfltregs[0], rd->argfltregs[1]);
4102         }
4103
4104         /* put env into first argument register */
4105         M_ALD(rd->argintregs[0], REG_PV, -4 * 8);
4106
4107         M_ALD(REG_PV, REG_PV, -1 * 8);      /* load adress of native method       */
4108         M_JSR(REG_RA, REG_PV);              /* call native method                 */
4109         disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4110         M_LDA(REG_PV, REG_RA, disp);        /* recompute pv from ra               */
4111
4112         /* remove stackframe if there is one */
4113         if (stackframesize) {
4114                 M_LDA(REG_SP, REG_SP, stackframesize * 8);
4115         }
4116
4117         /* 13 instructions */
4118         if (runverbose) {
4119                 M_LDA(REG_SP, REG_SP, -2 * 8);
4120                 M_ALD(rd->argintregs[0], REG_PV, -6 * 8); /* load method adress       */
4121                 M_LST(REG_RESULT, REG_SP, 0 * 8);
4122                 M_DST(REG_FRESULT, REG_SP, 1 * 8);
4123                 M_MOV(REG_RESULT, rd->argintregs[1]);
4124                 M_FMOV(REG_FRESULT, rd->argfltregs[2]);
4125                 M_FMOV(REG_FRESULT, rd->argfltregs[3]);
4126                 M_ALD(REG_PV, REG_PV, -7 * 8);  /* builtin_displaymethodstop          */
4127                 M_JSR(REG_RA, REG_PV);
4128                 disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4129                 M_LDA(REG_PV, REG_RA, disp);
4130                 M_LLD(REG_RESULT, REG_SP, 0 * 8);
4131                 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
4132                 M_LDA(REG_SP, REG_SP, 2 * 8);
4133         }
4134
4135 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4136         if (IS_FLT_DBL_TYPE(m->returntype))
4137                 M_DST(REG_FRESULT, REG_SP, 1 * 8);
4138         else
4139                 M_AST(REG_RESULT, REG_SP, 1 * 8);
4140         M_ALD(REG_PV, REG_PV, -2 * 8);      /* builtin_get_exceptionptrptr        */
4141         M_JSR(REG_RA, REG_PV);
4142         disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4143         M_LDA(REG_PV, REG_RA, disp);
4144         M_MOV(REG_RESULT, REG_ITMP3);
4145         if (IS_FLT_DBL_TYPE(m->returntype))
4146                 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
4147         else
4148                 M_ALD(REG_RESULT, REG_SP, 1 * 8);
4149 #else
4150         M_ALD(REG_ITMP3, REG_PV, -2 * 8);   /* get address of exceptionptr        */
4151 #endif
4152         M_ALD(REG_ITMP1, REG_ITMP3, 0);     /* load exception into reg. itmp1     */
4153         M_BNEZ(REG_ITMP1, 3);               /* if no exception then return        */
4154
4155         M_ALD(REG_RA, REG_SP, 0 * 8);       /* load return address                */
4156         M_LDA(REG_SP, REG_SP, NATIVESTUB_STACK * 8); /* remove stackframe         */
4157         M_RET(REG_ZERO, REG_RA);            /* return to caller                   */
4158
4159         M_AST(REG_ZERO, REG_ITMP3, 0);      /* store NULL into exceptionptr       */
4160
4161         M_ALD(REG_RA, REG_SP, 0 * 8);       /* load return address                */
4162         M_LDA(REG_SP, REG_SP, NATIVESTUB_STACK * 8); /* remove stackframe         */
4163         M_LDA(REG_ITMP2, REG_RA, -4);       /* move fault address into reg. itmp2 */
4164         M_ALD(REG_ITMP3, REG_PV, -3 * 8);   /* load asm exception handler address */
4165         M_JMP(REG_ZERO, REG_ITMP3);         /* jump to asm exception handler      */
4166
4167         /* generate put/getstatic stub call code */
4168
4169         {
4170                 s4          *xcodeptr;
4171                 clinitref   *cref;
4172                 s4          *tmpmcodeptr;
4173
4174                 /* there can only be one clinit ref entry                             */
4175                 cref = cd->clinitrefs;
4176
4177                 if (cref) {
4178                         /* Get machine code which is patched back in later. The call is   */
4179                         /* 2 instruction words long.                                      */
4180                         xcodeptr = cd->mcodebase + cref->branchpos;
4181                         *(cs-10) = (u4) *xcodeptr;
4182
4183                         /* patch in the call to call the following code (done at compile  */
4184                         /* time)                                                          */
4185
4186                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
4187                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
4188
4189                         M_BSR(REG_RA, tmpmcodeptr - (xcodeptr + 1));
4190
4191                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
4192
4193                         /* move class pointer into REG_ITMP2                              */
4194                         M_ALD(REG_ITMP1, REG_PV, -8 * 8);     /* class                    */
4195
4196                         /* move machine code into REG_ITMP3                               */
4197                         M_ILD(REG_ITMP3, REG_PV, -10 * 8);    /* machine code             */
4198                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
4199                         M_IST(REG_ITMP3, REG_SP, 0);
4200
4201                         M_ALD(REG_ITMP2, REG_PV, -9 * 8);     /* asm_check_clinit         */
4202                         M_JMP(REG_ZERO, REG_ITMP2);
4203                 }
4204         }
4205
4206 #if 0
4207         dolog_plain("stubsize: %d (for %d params)\n", (int) (mcodeptr - (s4*) s), m->paramcount);
4208 #endif
4209
4210 #if defined(STATISTICS)
4211         if (opt_stat)
4212                 count_nstub_len += NATIVESTUB_SIZE * 8;
4213 #endif
4214
4215         /* release dump area */
4216
4217         dump_release(dumpsize);
4218
4219         return (u1 *) (s + NATIVESTUB_OFFSET);
4220 }
4221
4222
4223 /* function: removenativestub **************************************************
4224
4225     removes a previously created native-stub from memory
4226
4227 *******************************************************************************/
4228
4229 void removenativestub(u1 *stub)
4230 {
4231         CFREE((u8 *) stub - NATIVESTUBOFFSET, NATIVESTUBSIZE * 8);
4232 }
4233
4234
4235 /*
4236  * These are local overrides for various environment variables in Emacs.
4237  * Please do not remove this and leave it at the end of the file, where
4238  * Emacs will automagically detect them.
4239  * ---------------------------------------------------------------------
4240  * Local variables:
4241  * mode: c
4242  * indent-tabs-mode: t
4243  * c-basic-offset: 4
4244  * tab-width: 4
4245  * End:
4246  */