2 use ieee.std_logic_1164.all;
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3 use ieee.numeric_std.all;
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5 architecture beh of debounce_fsm is
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6 type DEBOUNCE_FSM_STATE_TYPE is
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7 (IDLE0, TIMEOUT0, IDLE1, TIMEOUT1);
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8 signal debounce_fsm_state, debounce_fsm_state_next : DEBOUNCE_FSM_STATE_TYPE;
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10 next_state : process(debounce_fsm_state, i, cnt)
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12 debounce_fsm_state_next <= debounce_fsm_state;
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13 case debounce_fsm_state is
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16 debounce_fsm_state_next <= TIMEOUT0;
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20 debounce_fsm_state_next <= IDLE0;
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21 elsif to_integer(unsigned(cnt)) = CNT_MAX then
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22 debounce_fsm_state_next <= IDLE1;
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26 debounce_fsm_state_next <= TIMEOUT1;
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30 debounce_fsm_state_next <= IDLE1;
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31 elsif to_integer(unsigned(cnt)) = CNT_MAX then
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32 debounce_fsm_state_next <= IDLE0;
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35 end process next_state;
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37 output : process(debounce_fsm_state)
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42 case debounce_fsm_state is
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56 assert RESET_VALUE = '0' or RESET_VALUE = '1' report
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57 "RESET_VALUE may only be 0 or 1!" severity failure;
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59 sync : process(sys_clk, sys_res_n)
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61 if sys_res_n = '0' then
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62 if RESET_VALUE = '0' then
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63 debounce_fsm_state <= IDLE0;
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65 debounce_fsm_state <= IDLE1;
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67 elsif rising_edge(sys_clk) then
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68 debounce_fsm_state <= debounce_fsm_state_next;
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71 end architecture beh;
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