2 use IEEE.std_logic_1164.all;
3 use IEEE.numeric_std.all;
5 use work.common_pkg.all;
9 use work.extension_pkg.all;
11 architecture behav of extension_gpm is
13 type pointers_t is array( 0 to ((2**(paddr_t'length))-1)) of ext_addr_t;
15 type gpm_internal is record
18 end record gpm_internal;
20 signal reg, reg_nxt : gpm_internal;
24 syn : process (clk, reset)
26 if (reset = RESET_VALUE) then
27 reg.status <= (others=>'0');
28 reg.preg <= (others => (std_logic_vector(to_unsigned(DATA_END_ADDR,reg.preg(0)'length))));
29 elsif rising_edge(clk) then
34 asyn : process (clk, reset, reg, psw_nxt, ext_reg, pwr_en, pinc, paddr)
35 variable reg_nxt_v : gpm_internal;
36 variable incb : ext_addr_t;
37 variable sel_pval, sel_pval_nxt : ext_addr_t;
39 variable data_out_v : gp_register_t;
40 variable data_v : gp_register_t;
41 variable tmp_data : gp_register_t;
45 data_v := ext_reg.data;
49 data_out_v := (others => '0');
53 incb(incb'high downto 1) := (others => '1');
55 incb(incb'high downto 1) := (others => '0');
58 if (ext_reg.sel = '1') and ext_reg.wr_en = '1' then
59 case ext_reg.addr(1 downto 0) is
61 if ext_reg.byte_en(0) = '1' then
62 reg_nxt_v.status := (data_v(0), data_v(1), data_v(3), data_v(2));
63 psw <= reg_nxt_v.status;
67 tmp_data := (others =>'0');
68 tmp_data(tmp_data'high downto BYTEADDR) := reg.preg(0);
70 if ext_reg.byte_en(0) = '1' then
71 tmp_data(byte_t'range) := data_v(byte_t'range);
73 if ext_reg.byte_en(1) = '1' then
74 tmp_data((2*byte_t'length-1) downto byte_t'length) := data_v((2*byte_t'length-1) downto byte_t'length);
76 if ext_reg.byte_en(2) = '1' then
77 tmp_data((3*byte_t'length-1) downto 2*byte_t'length) := data_v((3*byte_t'length-1) downto 2*byte_t'length);
79 if ext_reg.byte_en(3) = '1' then
80 tmp_data((4*byte_t'length-1) downto 3*byte_t'length) := data_v((4*byte_t'length-1) downto 3*byte_t'length);
83 reg_nxt_v.preg(0) := tmp_data(tmp_data'high downto BYTEADDR);
89 if (ext_reg.sel = '1') and ext_reg.wr_en = '0' then
90 case ext_reg.addr(1 downto 0) is
92 if ext_reg.byte_en(0) = '1' then
93 data_out_v(3 downto 0) := (reg.status.sign, reg.status.carry, reg.status.oflo, reg.status.zero);
97 data_out_v(data_out_v'high downto BYTEADDR) := reg.preg(0);
102 sel_pval:= reg_nxt_v.preg(to_integer(unsigned(paddr)));
103 sel_pval_nxt := std_logic_vector(unsigned(sel_pval)+unsigned(incb));
105 reg_nxt_v.preg(to_integer(unsigned(paddr))) := sel_pval_nxt;
108 reg_nxt_v.status := psw_nxt;
110 reg_nxt <= reg_nxt_v;
111 data_out <= data_out_v;
113 pval <= (others =>'0');
114 pval(pval'high downto BYTEADDR) <= sel_pval;
115 pval_nxt <= (others =>'0');
116 pval_nxt(pval'high downto BYTEADDR) <= sel_pval_nxt;