2 use IEEE.std_logic_1164.all;
3 use IEEE.numeric_std.all;
5 use work.common_pkg.all;
8 use work.extension_pkg.all;
10 architecture behav of execute_stage is
12 signal condition : condition_t;
13 signal op_group : op_info_t;
14 signal op_detail : op_opt_t;
15 signal left_operand, right_operand : gp_register_t;
16 signal alu_state, alu_nxt : alu_result_rec;
17 signal psw : status_rec;
20 type exec_internal is record
21 result : gp_register_t;
28 signal reg, reg_nxt : exec_internal;
33 port map(clk, reset, condition, op_group,
34 left_operand, right_operand, dec_instr.displacement, op_detail, alu_state, alu_nxt,addr,data);
37 generic map(RESET_VALUE)
38 port map(clk,reset,alu_nxt,psw);
44 syn: process(clk, reset)
48 if reset = RESET_VALUE then
52 reg.result <= (others =>'0');
53 reg.res_addr <= (others => '0');
54 elsif rising_edge(clk) then
60 asyn: process(reset,dec_instr, alu_nxt, psw, reg,left_operand,right_operand)
63 condition <= dec_instr.condition;
64 op_group <= dec_instr.op_group;
65 op_detail <= dec_instr.op_detail;
69 alu_state <= (reg.result,dec_instr.daddr,psw,'0',dec_instr.brpr,'0','0','0','0','0','0');
72 if reset = RESET_VALUE then
73 condition <= COND_NEVER;
78 reg_nxt.brpr <= alu_nxt.brpr;
79 reg_nxt.alu_jump <= alu_nxt.alu_jump;
80 reg_nxt.wr_en <= alu_nxt.reg_op;
81 reg_nxt.result <= alu_nxt.result;
82 reg_nxt.res_addr <= alu_nxt.result_addr;
86 forward: process(regfile_val, reg_we, reg_addr, dec_instr)
88 left_operand <= dec_instr.src1;
89 right_operand <= dec_instr.src2;
92 if dec_instr.saddr1 = reg_addr then
93 left_operand <= regfile_val;
95 if (dec_instr.saddr2 = reg_addr) and (dec_instr.op_detail(IMM_OPT) = '0') then
96 right_operand <= regfile_val;
101 result <= reg.result;
102 result_addr <= reg.res_addr;
103 alu_jump <= reg.alu_jump;
106 dmem <= alu_nxt.mem_op;
107 --dmem <= reg.result(4);
108 dmem_write_en <= alu_nxt.mem_en;
109 --dmem_write_en <= reg.result(0);
110 --dmem_write_en <= '1';
111 hword <= alu_nxt.hw_op;
112 --hword <= reg.result(1);
113 byte_s <= alu_nxt.byte_op;
115 --addr <= alu_nxt.result;
116 --data <= right_operand;
117 --byte_s <= reg.result(2);